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/qemu/tests/qtest/
H A Dtest-filter-redirector.c2 * QTest testcase for filter-redirector
8 * later. See the COPYING file in the top-level directory.
14 * +---------+ | +-------+
15 * | backend <---------------+ sock0 |
16 * +----+----+ | +-------+
18 * +----v----+ +-------+ |
19 * | rd0 +->+chardev| |
20 * +---------+ +---+---+ |
22 * +---------+ | |
23 * | rd1 <------+ |
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/qemu/.gitlab-ci.d/
H A Dcrossbuilds.yml2 - local: '/.gitlab-ci.d/crossbuild-template.yml'
4 cross-armhf-user:
7 job: armhf-debian-cross-container
9 IMAGE: debian-armhf-cross
11 cross-arm64-system:
14 job: arm64-debian-cross-container
16 IMAGE: debian-arm64-cross
18 cross-arm64-user:
21 job: arm64-debian-cross-container
23 IMAGE: debian-arm64-cross
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/qemu/docs/devel/testing/
H A Dci-jobs.rst.inc9 ------------------------------------------------
15 https://docs.gitlab.com/ee/ci/variables/#add-a-cicd-variable-to-a-project
18 ---------------------------------------------------------------------------
21 git-push command line arguments.
27 git push -o ci.variable="QEMU_CI_EXAMPLE_VAR=value" myrepo mybranch
31 https://docs.gitlab.com/ee/user/project/push_options.html#push-options-for-gitlab-cicd
34 ----------------------------------
41 git config --local alias.push-ci "push -o ci.variable=QEMU_CI=1"
42 git config --local alias.push-ci-now "push -o ci.variable=QEMU_CI=2"
48 git push-ci
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/qemu/docs/interop/
H A Dvhost-user.rst4 Vhost-user Protocol
11 version 2 or later. See the COPYING file in the top-level
26 The protocol defines 2 sides of the communication, *front-end* and
27 *back-end*. The *front-end* is the application that shares its virtqueues, in
28 our case QEMU. The *back-end* is the consumer of the virtqueues.
30 In the current implementation QEMU is the *front-end*, and the *back-end*
33 or a block device back-end processing read & write to a virtual
34 disk. In order to facilitate interoperability between various back-end
38 The *front-end* and *back-end* can be either a client (i.e. connecting) or
42 --------------------------------------
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H A Dqed_spec.rst7 +----------+----------+----------+-----+
9 +----------+----------+----------+-----+
22 All fields are little-endian.
25 ------
38 uint64_t autoclear_features; /* self-resetting feature bits */
51 - ``cluster_size`` must be a power of 2 in range [2^12, 2^26].
52 - ``table_size`` must be a power of 2 in range [1, 16].
53 - ``header_size`` is the number of clusters used by the header and any additional
55 - ``features``, ``compat_features``, and ``autoclear_features`` are file format
58 - An image with unknown ``features`` bits enabled must not be opened. File format
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/qemu/hw/ppc/
H A Dpnv_occ.c4 * Copyright (c) 2015-2017, IBM Corporation.
25 #include "hw/qdev-properties.h"
61 occ->occmisc = val; in pnv_occ_set_misc()
64 * OCCMISC IRQ bit triggers the interrupt on a 0->1 edge, but not clear in pnv_occ_set_misc()
65 * how that is handled in PSI so it is level-triggered here, which is not in pnv_occ_set_misc()
68 qemu_set_irq(occ->psi_irq, !!(val & OCCMISC_PSI_IRQ)); in pnv_occ_set_misc()
73 pnv_occ_set_misc(occ, occ->occmisc | OCCMISC_PSI_IRQ | OCCMISC_IRQ_SHMEM); in pnv_occ_raise_msg_irq()
85 val = occ->occmisc; in pnv_occ_power8_xscom_read()
102 pnv_occ_set_misc(occ, occ->occmisc & val); in pnv_occ_power8_xscom_write()
105 pnv_occ_set_misc(occ, occ->occmisc | val); in pnv_occ_power8_xscom_write()
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/qemu/docs/devel/
H A Ddecodetree.rst18 immediates, and sub-opcodes.
21 *formats*, each of which may be re-used to simplify further definitions.
33 For *unnamed_field*, the first number is the least-significant bit position
67 +---------------------------+---------------------------------------------+
71 +---------------------------+---------------------------------------------+
73 +---------------------------+---------------------------------------------+
77 +---------------------------+---------------------------------------------+
80 +---------------------------+---------------------------------------------+
82 | !function=expand_sz_imm | extract(a->sz, 0, 3)) |
83 +---------------------------+---------------------------------------------+
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H A Ds390-cpu-topology.rst7 command, defining 4 CPUs, where CPU[0] is defined by the -smp argument and will
10 .. code-block:: bash
12 qemu-system-s390x \
13 -enable-kvm \
14 -cpu z14,ctop=on \
15 -smp 1,drawers=3,books=3,sockets=2,cores=2,maxcpus=36 \
16 -device z14-s390x-cpu,core-id=19,entitlement=high \
17 -device z14-s390x-cpu,core-id=11,entitlement=low \
18 -device z14-s390x-cpu,core-id=12,entitlement=high \
21 Additions to query-cpus-fast
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/qemu/tests/tcg/mips/user/ase/msa/
H A Dtest_msa_run_64r6el.sh1 PATH_TO_QEMU="../../../../../../mips64el-linux-user/qemu-mips64el"
6 # ---------
8 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_64r6el
9 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_64r6el
10 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_64r6el
11 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_64r6el
12 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_64r6el
13 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_64r6el
14 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_64r6el
15 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_64r6el
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H A Dtest_msa_run_32r5el.sh1 PATH_TO_QEMU="../../../../../../mipsel-linux-user/qemu-mipsel"
6 # ---------
8 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_b_32r5el
9 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_h_32r5el
10 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_w_32r5el
11 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_d_32r5el
12 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_b_32r5el
13 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_h_32r5el
14 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_w_32r5el
15 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_d_32r5el
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H A Dtest_msa_run_64r6eb.sh1 PATH_TO_QEMU="../../../../../../mips64-linux-user/qemu-mips64"
6 # ---------
8 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_b_64r6eb
9 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_h_64r6eb
10 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_w_64r6eb
11 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nloc_d_64r6eb
12 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_b_64r6eb
13 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_h_64r6eb
14 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_w_64r6eb
15 $PATH_TO_QEMU -cpu I6400 /tmp/test_msa_nlzc_d_64r6eb
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H A Dtest_msa_run_32r5eb.sh1 PATH_TO_QEMU="../../../../../../mips-linux-user/qemu-mips"
6 # ---------
8 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_b_32r5eb
9 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_h_32r5eb
10 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_w_32r5eb
11 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nloc_d_32r5eb
12 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_b_32r5eb
13 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_h_32r5eb
14 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_w_32r5eb
15 $PATH_TO_QEMU -cpu P5600 /tmp/test_msa_nlzc_d_32r5eb
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/qemu/docs/devel/migration/
H A Ddirty-limit.rst12 ------------------------------------------------------------------------------
13 main --------------> throttle thread ------------> PREPARE(1) <--------
17 -\ CALCULATE(2) |
21 \ SET PENALTY(3) -----
22 -\ |
25 -> virtual CPU thread -------> ACCEPT PENALTY(4)
26 ------------------------------------------------------------------------------
32 - PREPARE (1)
42 - CALCULATE (2)
54 - SET PENALTY (3)
/qemu/tests/qemu-iotests/
H A D1546 # Copyright (C) 2016-2017 Red Hat, Inc.
54 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT
59 # X = non-zero data sector in backing file
60 # - = sector unallocated in whole backing chain
63 # 1. Tail unaligned: 00 00 -- --
64 # 2. Head unaligned: -- -- 00 00
65 # 3. Both unaligned: -- 00 00 --
66 # 4. Both, 2 clusters: -- -- -- 00 | 00 -- -- --
68 $QEMU_IO -c "write -z 0 2k" "$TEST_IMG" | _filter_qemu_io
69 $QEMU_IO -c "write -z 10k 2k" "$TEST_IMG" | _filter_qemu_io
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/qemu/docs/
H A Dblock-replication.txt2 ----------------------------------------
8 See the COPYING file in the top-level directory.
11 for COLO (COarse-grain LOck-stepping) where the Secondary VM is running.
12 It can also be applied for FT/HA (Fault-tolerance/High Assurance) scenario,
30 +----------------------+ +------------------------+
32 +----------------------+ +------------------------+
36 | /-------------\
38 |---------(1)----------+ | Disk Buffer |
40 | (3) \-------------/
45 +--------------+ +----------------+
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/qemu/docs/specs/
H A Dvmgenid.rst9 See the COPYING file in the top-level directory.
12 exposes a 128-bit, cryptographically random, integer value identifier,
20 re-initializing its random number generator etc.
24 ------------
31 - **R1a** The generation ID shall live in an 8-byte aligned buffer.
33 - **R1b** The buffer holding the generation ID shall be in guest RAM,
36 - **R1c** The buffer holding the generation ID shall be kept separate from
39 - **R1d** The buffer shall not be covered by an AddressRangeMemory or
42 - **R1e** The generation ID shall not live in a page frame that could be
47 - **R2** to **R5** [These AML requirements are isolated well enough in the
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/qemu/docs/system/
H A Dpr-manager.rst13 For this reason, QEMU's SCSI passthrough devices, ``scsi-block``
14 and ``scsi-generic`` (both are only available on Linux) can delegate
20 -----------------------------------------
22 -----------------------------------------
25 "pr-manager" QOM class.
27 Right now only one subclass is defined, ``pr-manager-helper``, which
34 ``pr-manager-helper`` has a single string property, ``path``, which
36 the following command line defines a ``pr-manager-helper`` object and
39 $ qemu-system-x86_64
40 -device virtio-scsi \
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/qemu/tests/tcg/multiarch/
H A DMakefile.target1 # -*- Mode: makefile -*-
3 # Multiarch Tests - included from tests/tcg/Makefile.target
13 ifeq ($(filter %-linux-user, $(TARGET)),$(TARGET))
24 float_%: LDFLAGS+=-lm
26 $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< $(MULTIARCH_SRC)/libs/float_helpers.c -o $@ $(LDFLAGS)
28 run-float_%: float_%
29 $(call run-test,$<, $(QEMU) $(QEMU_OPTS) $<)
30 $(call conditional-diff-out,$<,$(SRC_PATH)/tests/tcg/$(TARGET_NAME)/$<.ref)
33 testthread: LDFLAGS+=-lpthread
35 threadcount: LDFLAGS+=-lpthread
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/qemu/.gitlab-ci.d/custom-runners/
H A Dubuntu-22.04-aarch64.yml1 # All ubuntu-22.04 jobs should run successfully in an environment
2 # setup by the scripts/ci/setup/ubuntu/build-environment.yml task
5 ubuntu-22.04-aarch64-all-linux-static:
10 - ubuntu_22.04
11 - aarch64
13 - if: '$CI_PROJECT_NAMESPACE == "qemu-project" && $CI_COMMIT_BRANCH =~ /^staging/'
14 - if: "$AARCH64_RUNNER_AVAILABLE"
16 - mkdir build
17 - cd build
18 # Disable -static-pie due to build error with system libc:
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/qemu/target/s390x/
H A Dcpu_features_def.h.inc5 * - _FEAT: Feature (enum) name used internally (S390_FEAT_##_FEAT)
6 * - _NAME: Feature name exposed to the user.
7 * - _TYPE: Feature type (S390_FEAT_TYPE_##_TYPE).
8 * - _BIT: Feature bit number within feature type block (unused for MISC).
9 * - _DESC: Feature description, exposed to the user.
18 * your option) any later version. See the COPYING file in the top-level
25 DEF_FEAT(DAT_ENH, "dateh", STFL, 3, "DAT-enhancement facility")
26 DEF_FEAT(IDTE_SEGMENT, "idtes", STFL, 4, "IDTE selective TLB segment-table clearing")
27 DEF_FEAT(IDTE_REGION, "idter", STFL, 5, "IDTE selective TLB region-table clearing")
28 DEF_FEAT(ASN_LX_REUSE, "asnlxr", STFL, 6, "ASN-and-LX reuse facility")
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/qemu/include/hw/ppc/
H A Dxive.h12 * +------------------------------------+ IPIs
13 * | +---------+ +---------+ +--------+ | +-------+
14 * | |VC | |CQ | |PC |----> | CORES |
15 * | | esb | | | | |----> | |
16 * | | eas | | Bridge | | tctx |----> | |
18 * +------+ | +---------+ +----+----+ +--------+ | +-+-+-+-+
19 * | RAM | +------------------|-----------------+ | | |
22 * | | +--------------------v------------------------v-v-v--+ other
23 * | <--+ Power Bus +--> chips
24 * | esb | +---------+-----------------------+------------------+
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/qemu/tests/unit/
H A Dtest-bdrv-graph-mod.c4 * Copyright (c) 2019-2021 Virtuozzo International GmbH. All rights reserved.
23 #include "qemu/main-loop.h"
25 #include "system/block-backend.h"
28 .format_name = "pass-through",
45 .format_name = "no-perm",
61 .format_name = "exclusive-writer",
94 * +--------+
96 * +--------+
101 * +--------------------+ +----------------+
102 * | passthrough filter |--------->| null-co node |
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/qemu/tests/tcg/i386/
H A Dtest-i386-fyl2xp1.c11 { 0.0L, -12345.0L, -0.0L, -0.0L },
12 { -0.0L, 12345.0L, -0.0L, -0.0L },
13 { -0.0L, -12345.0L, 0.0L, 0.0L },
15 { 0.0L, -0.0L, -0.0L, -0.0L },
16 { -0.0L, 0.0L, -0.0L, -0.0L },
17 { -0.0L, -0.0L, 0.0L, 0.0L },
19 { 0.1L, -0.0L, -0.0L, -0.0L },
20 { -0.1L, 0.0L, -0.0L, -0.0L },
21 { -0.1L, -0.0L, 0.0L, 0.0L },
23 { 0.1L, -__builtin_infl(), -__builtin_infl(), -__builtin_infl() },
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/qemu/docs/system/riscv/
H A Dvirt.rst8 real-world hardware.
11 -----------------
17 * Platform-Level Interrupt Controller (PLIC)
22 * 8 virtio-mmio transport devices
31 ----------------------------------
34 which it passes to the guest, if there is no ``-dtb`` option. This provides
39 If users want to provide their own DTB, they can use the ``-dtb`` option.
42 * The number of subnodes of the /cpus node should match QEMU's ``-smp`` option
43 * The /memory reg size should match QEMU’s selected ram_size via ``-m``
48 ------------
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/qemu/target/i386/nvmm/
H A Dnvmm-all.c2 * Copyright (c) 2018-2019 Maxime Villard, All rights reserved.
7 * See the COPYING file in the top-level directory.
12 #include "system/address-spaces.h"
18 #include "qemu/main-loop.h"
19 #include "qemu/error-report.h"
25 #include "nvmm-accel-ops.h"
35 /* Window-exiting for INTs/NMIs. */
48 /* -------------------------------------------------------------------------- */
59 /* -------------------------------------------------------------------------- */
64 uint32_t attrib = qseg->flags; in nvmm_set_segment()
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