1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Copyright © 2022 Intel Corporation
4 */
5
6 #ifndef _XE_GT_H_
7 #define _XE_GT_H_
8
9 #include <linux/fault-inject.h>
10
11 #include <drm/drm_util.h>
12
13 #include "xe_device.h"
14 #include "xe_device_types.h"
15 #include "xe_hw_engine.h"
16
17 #define for_each_hw_engine(hwe__, gt__, id__) \
18 for ((id__) = 0; (id__) < ARRAY_SIZE((gt__)->hw_engines); (id__)++) \
19 for_each_if(((hwe__) = (gt__)->hw_engines + (id__)) && \
20 xe_hw_engine_is_valid((hwe__)))
21
22 #define CCS_MASK(gt) (((gt)->info.engine_mask & XE_HW_ENGINE_CCS_MASK) >> XE_HW_ENGINE_CCS0)
23
24 extern struct fault_attr gt_reset_failure;
xe_fault_inject_gt_reset(void)25 static inline bool xe_fault_inject_gt_reset(void)
26 {
27 return IS_ENABLED(CONFIG_DEBUG_FS) && should_fail(>_reset_failure, 1);
28 }
29
30 struct xe_gt *xe_gt_alloc(struct xe_tile *tile);
31 int xe_gt_init_early(struct xe_gt *gt);
32 int xe_gt_init(struct xe_gt *gt);
33 void xe_gt_mmio_init(struct xe_gt *gt);
34 void xe_gt_declare_wedged(struct xe_gt *gt);
35 int xe_gt_record_default_lrcs(struct xe_gt *gt);
36
37 /**
38 * xe_gt_record_user_engines - save data related to engines available to
39 * userspace
40 * @gt: GT structure
41 *
42 * Walk the available HW engines from gt->info.engine_mask and calculate data
43 * related to those engines that may be used by userspace. To be used whenever
44 * available engines change in runtime (e.g. with ccs_mode) or during
45 * initialization
46 */
47 void xe_gt_record_user_engines(struct xe_gt *gt);
48
49 void xe_gt_suspend_prepare(struct xe_gt *gt);
50 int xe_gt_suspend(struct xe_gt *gt);
51 void xe_gt_shutdown(struct xe_gt *gt);
52 int xe_gt_resume(struct xe_gt *gt);
53 void xe_gt_reset_async(struct xe_gt *gt);
54 void xe_gt_sanitize(struct xe_gt *gt);
55 int xe_gt_sanitize_freq(struct xe_gt *gt);
56
57 /**
58 * xe_gt_wait_for_reset - wait for gt's async reset to finalize.
59 * @gt: GT structure
60 * Return:
61 * %true if it waited for the work to finish execution,
62 * %false if there was no scheduled reset or it was done.
63 */
xe_gt_wait_for_reset(struct xe_gt * gt)64 static inline bool xe_gt_wait_for_reset(struct xe_gt *gt)
65 {
66 return flush_work(>->reset.worker);
67 }
68
69 /**
70 * xe_gt_reset - perform synchronous reset
71 * @gt: GT structure
72 * Return:
73 * %true if it waited for the reset to finish,
74 * %false if there was no scheduled reset.
75 */
xe_gt_reset(struct xe_gt * gt)76 static inline bool xe_gt_reset(struct xe_gt *gt)
77 {
78 xe_gt_reset_async(gt);
79 return xe_gt_wait_for_reset(gt);
80 }
81
82 /**
83 * xe_gt_any_hw_engine_by_reset_domain - scan the list of engines and return the
84 * first that matches the same reset domain as @class
85 * @gt: GT structure
86 * @class: hw engine class to lookup
87 */
88 struct xe_hw_engine *
89 xe_gt_any_hw_engine_by_reset_domain(struct xe_gt *gt, enum xe_engine_class class);
90
91 /**
92 * xe_gt_any_hw_engine - scan the list of engines and return the
93 * first available
94 * @gt: GT structure
95 */
96 struct xe_hw_engine *xe_gt_any_hw_engine(struct xe_gt *gt);
97
98 struct xe_hw_engine *xe_gt_hw_engine(struct xe_gt *gt,
99 enum xe_engine_class class,
100 u16 instance,
101 bool logical);
102
xe_gt_has_indirect_ring_state(struct xe_gt * gt)103 static inline bool xe_gt_has_indirect_ring_state(struct xe_gt *gt)
104 {
105 return gt->info.has_indirect_ring_state &&
106 xe_device_uc_enabled(gt_to_xe(gt));
107 }
108
xe_gt_is_main_type(struct xe_gt * gt)109 static inline bool xe_gt_is_main_type(struct xe_gt *gt)
110 {
111 return gt->info.type == XE_GT_TYPE_MAIN;
112 }
113
xe_gt_is_media_type(struct xe_gt * gt)114 static inline bool xe_gt_is_media_type(struct xe_gt *gt)
115 {
116 return gt->info.type == XE_GT_TYPE_MEDIA;
117 }
118
xe_gt_is_usm_hwe(struct xe_gt * gt,struct xe_hw_engine * hwe)119 static inline bool xe_gt_is_usm_hwe(struct xe_gt *gt, struct xe_hw_engine *hwe)
120 {
121 struct xe_device *xe = gt_to_xe(gt);
122
123 return xe->info.has_usm && hwe->class == XE_ENGINE_CLASS_COPY &&
124 hwe->instance == gt->usm.reserved_bcs_instance;
125 }
126
127 #endif
128