1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2020-2021 NXP
4 */
5
6 #include <linux/init.h>
7 #include <linux/interconnect.h>
8 #include <linux/ioctl.h>
9 #include <linux/list.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/of.h>
13 #include <linux/of_address.h>
14 #include <linux/platform_device.h>
15 #include <linux/slab.h>
16 #include <linux/types.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/pm_domain.h>
19 #include <linux/firmware.h>
20 #include <linux/vmalloc.h>
21 #include "vpu.h"
22 #include "vpu_defs.h"
23 #include "vpu_core.h"
24 #include "vpu_mbox.h"
25 #include "vpu_msgs.h"
26 #include "vpu_rpc.h"
27 #include "vpu_cmds.h"
28
csr_writel(struct vpu_core * core,u32 reg,u32 val)29 void csr_writel(struct vpu_core *core, u32 reg, u32 val)
30 {
31 writel(val, core->base + reg);
32 }
33
csr_readl(struct vpu_core * core,u32 reg)34 u32 csr_readl(struct vpu_core *core, u32 reg)
35 {
36 return readl(core->base + reg);
37 }
38
vpu_core_load_firmware(struct vpu_core * core)39 static int vpu_core_load_firmware(struct vpu_core *core)
40 {
41 const struct firmware *pfw = NULL;
42 int ret = 0;
43
44 if (!core->fw.virt) {
45 dev_err(core->dev, "firmware buffer is not ready\n");
46 return -EINVAL;
47 }
48
49 ret = request_firmware(&pfw, core->res->fwname, core->dev);
50 dev_dbg(core->dev, "request_firmware %s : %d\n", core->res->fwname, ret);
51 if (ret) {
52 dev_err(core->dev, "request firmware %s failed, ret = %d\n",
53 core->res->fwname, ret);
54 return ret;
55 }
56
57 if (core->fw.length < pfw->size) {
58 dev_err(core->dev, "firmware buffer size want %zu, but %d\n",
59 pfw->size, core->fw.length);
60 ret = -EINVAL;
61 goto exit;
62 }
63
64 memset(core->fw.virt, 0, core->fw.length);
65 memcpy(core->fw.virt, pfw->data, pfw->size);
66 core->fw.bytesused = pfw->size;
67 ret = vpu_iface_on_firmware_loaded(core);
68 exit:
69 release_firmware(pfw);
70 pfw = NULL;
71
72 return ret;
73 }
74
vpu_core_boot_done(struct vpu_core * core)75 static int vpu_core_boot_done(struct vpu_core *core)
76 {
77 u32 fw_version;
78
79 fw_version = vpu_iface_get_version(core);
80 dev_info(core->dev, "%s firmware version : %d.%d.%d\n",
81 vpu_core_type_desc(core->type),
82 (fw_version >> 16) & 0xff,
83 (fw_version >> 8) & 0xff,
84 fw_version & 0xff);
85 core->supported_instance_count = vpu_iface_get_max_instance_count(core);
86 if (core->res->act_size) {
87 u32 count = core->act.length / core->res->act_size;
88
89 core->supported_instance_count = min(core->supported_instance_count, count);
90 }
91 if (core->supported_instance_count >= BITS_PER_TYPE(core->instance_mask))
92 core->supported_instance_count = BITS_PER_TYPE(core->instance_mask);
93 core->fw_version = fw_version;
94 vpu_core_set_state(core, VPU_CORE_ACTIVE);
95
96 return 0;
97 }
98
vpu_core_wait_boot_done(struct vpu_core * core)99 static int vpu_core_wait_boot_done(struct vpu_core *core)
100 {
101 int ret;
102
103 ret = wait_for_completion_timeout(&core->cmp, VPU_TIMEOUT);
104 if (!ret) {
105 dev_err(core->dev, "boot timeout\n");
106 return -EINVAL;
107 }
108 return vpu_core_boot_done(core);
109 }
110
vpu_core_boot(struct vpu_core * core,bool load)111 static int vpu_core_boot(struct vpu_core *core, bool load)
112 {
113 int ret;
114
115 reinit_completion(&core->cmp);
116 if (load) {
117 ret = vpu_core_load_firmware(core);
118 if (ret)
119 return ret;
120 }
121
122 vpu_iface_boot_core(core);
123 return vpu_core_wait_boot_done(core);
124 }
125
vpu_core_shutdown(struct vpu_core * core)126 static int vpu_core_shutdown(struct vpu_core *core)
127 {
128 return vpu_iface_shutdown_core(core);
129 }
130
vpu_core_restore(struct vpu_core * core)131 static int vpu_core_restore(struct vpu_core *core)
132 {
133 int ret;
134
135 ret = vpu_core_sw_reset(core);
136 if (ret)
137 return ret;
138
139 vpu_core_boot_done(core);
140 return vpu_iface_restore_core(core);
141 }
142
__vpu_alloc_dma(struct device * dev,struct vpu_buffer * buf)143 static int __vpu_alloc_dma(struct device *dev, struct vpu_buffer *buf)
144 {
145 gfp_t gfp = GFP_KERNEL | GFP_DMA32;
146
147 if (!buf->length)
148 return 0;
149
150 buf->virt = dma_alloc_coherent(dev, buf->length, &buf->phys, gfp);
151 if (!buf->virt)
152 return -ENOMEM;
153
154 buf->dev = dev;
155
156 return 0;
157 }
158
vpu_free_dma(struct vpu_buffer * buf)159 void vpu_free_dma(struct vpu_buffer *buf)
160 {
161 if (!buf->virt || !buf->dev)
162 return;
163
164 dma_free_coherent(buf->dev, buf->length, buf->virt, buf->phys);
165 buf->virt = NULL;
166 buf->phys = 0;
167 buf->length = 0;
168 buf->bytesused = 0;
169 buf->dev = NULL;
170 }
171
vpu_alloc_dma(struct vpu_core * core,struct vpu_buffer * buf)172 int vpu_alloc_dma(struct vpu_core *core, struct vpu_buffer *buf)
173 {
174 return __vpu_alloc_dma(core->dev, buf);
175 }
176
vpu_core_set_state(struct vpu_core * core,enum vpu_core_state state)177 void vpu_core_set_state(struct vpu_core *core, enum vpu_core_state state)
178 {
179 if (state != core->state)
180 vpu_trace(core->dev, "vpu core state change from %d to %d\n", core->state, state);
181 core->state = state;
182 if (core->state == VPU_CORE_DEINIT)
183 core->hang_mask = 0;
184 }
185
vpu_core_update_state(struct vpu_core * core)186 static void vpu_core_update_state(struct vpu_core *core)
187 {
188 if (!vpu_iface_get_power_state(core)) {
189 if (core->request_count)
190 vpu_core_set_state(core, VPU_CORE_HANG);
191 else
192 vpu_core_set_state(core, VPU_CORE_DEINIT);
193
194 } else if (core->state == VPU_CORE_ACTIVE && core->hang_mask) {
195 vpu_core_set_state(core, VPU_CORE_HANG);
196 }
197 }
198
vpu_core_find_proper_by_type(struct vpu_dev * vpu,u32 type)199 static struct vpu_core *vpu_core_find_proper_by_type(struct vpu_dev *vpu, u32 type)
200 {
201 struct vpu_core *core = NULL;
202 int request_count = INT_MAX;
203 struct vpu_core *c;
204
205 list_for_each_entry(c, &vpu->cores, list) {
206 dev_dbg(c->dev, "instance_mask = 0x%lx, state = %d\n", c->instance_mask, c->state);
207 if (c->type != type)
208 continue;
209 mutex_lock(&c->lock);
210 vpu_core_update_state(c);
211 mutex_unlock(&c->lock);
212 if (c->state == VPU_CORE_DEINIT) {
213 core = c;
214 break;
215 }
216 if (c->state != VPU_CORE_ACTIVE)
217 continue;
218 if (c->request_count < request_count) {
219 request_count = c->request_count;
220 core = c;
221 }
222 if (!request_count)
223 break;
224 }
225
226 return core;
227 }
228
vpu_core_is_exist(struct vpu_dev * vpu,struct vpu_core * core)229 static bool vpu_core_is_exist(struct vpu_dev *vpu, struct vpu_core *core)
230 {
231 struct vpu_core *c;
232
233 list_for_each_entry(c, &vpu->cores, list) {
234 if (c == core)
235 return true;
236 }
237
238 return false;
239 }
240
vpu_core_get_vpu(struct vpu_core * core)241 static void vpu_core_get_vpu(struct vpu_core *core)
242 {
243 core->vpu->get_vpu(core->vpu);
244 if (core->type == VPU_CORE_TYPE_ENC)
245 core->vpu->get_enc(core->vpu);
246 if (core->type == VPU_CORE_TYPE_DEC)
247 core->vpu->get_dec(core->vpu);
248 }
249
vpu_core_register(struct device * dev,struct vpu_core * core)250 static int vpu_core_register(struct device *dev, struct vpu_core *core)
251 {
252 struct vpu_dev *vpu = dev_get_drvdata(dev);
253 unsigned int buffer_size;
254 int ret = 0;
255
256 dev_dbg(core->dev, "register core %s\n", vpu_core_type_desc(core->type));
257 if (vpu_core_is_exist(vpu, core))
258 return 0;
259
260 core->workqueue = alloc_ordered_workqueue("vpu", WQ_MEM_RECLAIM);
261 if (!core->workqueue) {
262 dev_err(core->dev, "fail to alloc workqueue\n");
263 return -ENOMEM;
264 }
265 INIT_WORK(&core->msg_work, vpu_msg_run_work);
266 INIT_DELAYED_WORK(&core->msg_delayed_work, vpu_msg_delayed_work);
267 buffer_size = roundup_pow_of_two(VPU_MSG_BUFFER_SIZE);
268 core->msg_buffer = vzalloc(buffer_size);
269 if (!core->msg_buffer) {
270 dev_err(core->dev, "failed allocate buffer for fifo\n");
271 ret = -ENOMEM;
272 goto error;
273 }
274 ret = kfifo_init(&core->msg_fifo, core->msg_buffer, buffer_size);
275 if (ret) {
276 dev_err(core->dev, "failed init kfifo\n");
277 goto error;
278 }
279
280 list_add_tail(&core->list, &vpu->cores);
281 vpu_core_get_vpu(core);
282
283 return 0;
284 error:
285 if (core->msg_buffer) {
286 vfree(core->msg_buffer);
287 core->msg_buffer = NULL;
288 }
289 if (core->workqueue) {
290 destroy_workqueue(core->workqueue);
291 core->workqueue = NULL;
292 }
293 return ret;
294 }
295
vpu_core_put_vpu(struct vpu_core * core)296 static void vpu_core_put_vpu(struct vpu_core *core)
297 {
298 if (core->type == VPU_CORE_TYPE_ENC)
299 core->vpu->put_enc(core->vpu);
300 if (core->type == VPU_CORE_TYPE_DEC)
301 core->vpu->put_dec(core->vpu);
302 core->vpu->put_vpu(core->vpu);
303 }
304
vpu_core_unregister(struct device * dev,struct vpu_core * core)305 static int vpu_core_unregister(struct device *dev, struct vpu_core *core)
306 {
307 list_del_init(&core->list);
308
309 vpu_core_put_vpu(core);
310 core->vpu = NULL;
311 vfree(core->msg_buffer);
312 core->msg_buffer = NULL;
313
314 if (core->workqueue) {
315 cancel_work_sync(&core->msg_work);
316 cancel_delayed_work_sync(&core->msg_delayed_work);
317 destroy_workqueue(core->workqueue);
318 core->workqueue = NULL;
319 }
320
321 return 0;
322 }
323
vpu_core_acquire_instance(struct vpu_core * core)324 static int vpu_core_acquire_instance(struct vpu_core *core)
325 {
326 int id;
327
328 id = ffz(core->instance_mask);
329 if (id >= core->supported_instance_count)
330 return -EINVAL;
331
332 set_bit(id, &core->instance_mask);
333
334 return id;
335 }
336
vpu_core_release_instance(struct vpu_core * core,int id)337 static void vpu_core_release_instance(struct vpu_core *core, int id)
338 {
339 if (id < 0 || id >= core->supported_instance_count)
340 return;
341
342 clear_bit(id, &core->instance_mask);
343 }
344
vpu_inst_get(struct vpu_inst * inst)345 struct vpu_inst *vpu_inst_get(struct vpu_inst *inst)
346 {
347 if (!inst)
348 return NULL;
349
350 atomic_inc(&inst->ref_count);
351
352 return inst;
353 }
354
vpu_inst_put(struct vpu_inst * inst)355 void vpu_inst_put(struct vpu_inst *inst)
356 {
357 if (!inst)
358 return;
359 if (atomic_dec_and_test(&inst->ref_count)) {
360 if (inst->release)
361 inst->release(inst);
362 }
363 }
364
vpu_request_core(struct vpu_dev * vpu,enum vpu_core_type type)365 struct vpu_core *vpu_request_core(struct vpu_dev *vpu, enum vpu_core_type type)
366 {
367 struct vpu_core *core = NULL;
368 int ret;
369
370 mutex_lock(&vpu->lock);
371
372 core = vpu_core_find_proper_by_type(vpu, type);
373 if (!core)
374 goto exit;
375
376 mutex_lock(&core->lock);
377 pm_runtime_resume_and_get(core->dev);
378
379 if (core->state == VPU_CORE_DEINIT) {
380 if (vpu_iface_get_power_state(core))
381 ret = vpu_core_restore(core);
382 else
383 ret = vpu_core_boot(core, true);
384 if (ret) {
385 pm_runtime_put_sync(core->dev);
386 mutex_unlock(&core->lock);
387 core = NULL;
388 goto exit;
389 }
390 }
391
392 core->request_count++;
393
394 mutex_unlock(&core->lock);
395 exit:
396 mutex_unlock(&vpu->lock);
397
398 return core;
399 }
400
vpu_release_core(struct vpu_core * core)401 void vpu_release_core(struct vpu_core *core)
402 {
403 if (!core)
404 return;
405
406 mutex_lock(&core->lock);
407 pm_runtime_put_sync(core->dev);
408 if (core->request_count)
409 core->request_count--;
410 mutex_unlock(&core->lock);
411 }
412
vpu_inst_register(struct vpu_inst * inst)413 int vpu_inst_register(struct vpu_inst *inst)
414 {
415 struct vpu_dev *vpu;
416 struct vpu_core *core;
417 int ret = 0;
418
419 vpu = inst->vpu;
420 core = inst->core;
421 if (!core) {
422 core = vpu_request_core(vpu, inst->type);
423 if (!core) {
424 dev_err(vpu->dev, "there is no vpu core for %s\n",
425 vpu_core_type_desc(inst->type));
426 return -EINVAL;
427 }
428 inst->core = core;
429 inst->dev = get_device(core->dev);
430 }
431
432 mutex_lock(&core->lock);
433 if (core->state != VPU_CORE_ACTIVE) {
434 dev_err(core->dev, "vpu core is not active, state = %d\n", core->state);
435 ret = -EINVAL;
436 goto exit;
437 }
438
439 if (inst->id >= 0 && inst->id < core->supported_instance_count)
440 goto exit;
441
442 ret = vpu_core_acquire_instance(core);
443 if (ret < 0)
444 goto exit;
445
446 vpu_trace(inst->dev, "[%d] %p\n", ret, inst);
447 inst->id = ret;
448 list_add_tail(&inst->list, &core->instances);
449 ret = 0;
450 if (core->res->act_size) {
451 inst->act.phys = core->act.phys + core->res->act_size * inst->id;
452 inst->act.virt = core->act.virt + core->res->act_size * inst->id;
453 inst->act.length = core->res->act_size;
454 }
455 vpu_inst_create_dbgfs_file(inst);
456 exit:
457 mutex_unlock(&core->lock);
458
459 if (ret)
460 dev_err(core->dev, "register instance fail\n");
461 return ret;
462 }
463
vpu_inst_unregister(struct vpu_inst * inst)464 int vpu_inst_unregister(struct vpu_inst *inst)
465 {
466 struct vpu_core *core;
467
468 if (!inst->core)
469 return 0;
470
471 core = inst->core;
472 vpu_clear_request(inst);
473 mutex_lock(&core->lock);
474 if (inst->id >= 0 && inst->id < core->supported_instance_count) {
475 vpu_inst_remove_dbgfs_file(inst);
476 list_del_init(&inst->list);
477 vpu_core_release_instance(core, inst->id);
478 inst->id = VPU_INST_NULL_ID;
479 }
480 vpu_core_update_state(core);
481 if (core->state == VPU_CORE_HANG && !core->instance_mask) {
482 int err;
483
484 dev_info(core->dev, "reset hang core\n");
485 mutex_unlock(&core->lock);
486 err = vpu_core_sw_reset(core);
487 mutex_lock(&core->lock);
488 if (!err) {
489 vpu_core_set_state(core, VPU_CORE_ACTIVE);
490 core->hang_mask = 0;
491 }
492 }
493 mutex_unlock(&core->lock);
494
495 return 0;
496 }
497
vpu_core_find_instance(struct vpu_core * core,u32 index)498 struct vpu_inst *vpu_core_find_instance(struct vpu_core *core, u32 index)
499 {
500 struct vpu_inst *inst = NULL;
501 struct vpu_inst *tmp;
502
503 mutex_lock(&core->lock);
504 if (index >= core->supported_instance_count || !test_bit(index, &core->instance_mask))
505 goto exit;
506 list_for_each_entry(tmp, &core->instances, list) {
507 if (tmp->id == index) {
508 inst = vpu_inst_get(tmp);
509 break;
510 }
511 }
512 exit:
513 mutex_unlock(&core->lock);
514
515 return inst;
516 }
517
vpu_get_resource(struct vpu_inst * inst)518 const struct vpu_core_resources *vpu_get_resource(struct vpu_inst *inst)
519 {
520 struct vpu_dev *vpu;
521 struct vpu_core *core = NULL;
522 const struct vpu_core_resources *res = NULL;
523
524 if (!inst || !inst->vpu)
525 return NULL;
526
527 if (inst->core && inst->core->res)
528 return inst->core->res;
529
530 vpu = inst->vpu;
531 mutex_lock(&vpu->lock);
532 list_for_each_entry(core, &vpu->cores, list) {
533 if (core->type == inst->type) {
534 res = core->res;
535 break;
536 }
537 }
538 mutex_unlock(&vpu->lock);
539
540 return res;
541 }
542
vpu_core_parse_dt(struct vpu_core * core,struct device_node * np)543 static int vpu_core_parse_dt(struct vpu_core *core, struct device_node *np)
544 {
545 struct device_node *node;
546 struct resource res;
547 int ret;
548
549 if (of_count_phandle_with_args(np, "memory-region", NULL) < 2) {
550 dev_err(core->dev, "need 2 memory-region for boot and rpc\n");
551 return -ENODEV;
552 }
553
554 node = of_parse_phandle(np, "memory-region", 0);
555 if (!node) {
556 dev_err(core->dev, "boot-region of_parse_phandle error\n");
557 return -ENODEV;
558 }
559 if (of_address_to_resource(node, 0, &res)) {
560 dev_err(core->dev, "boot-region of_address_to_resource error\n");
561 of_node_put(node);
562 return -EINVAL;
563 }
564 core->fw.phys = res.start;
565 core->fw.length = resource_size(&res);
566
567 of_node_put(node);
568
569 node = of_parse_phandle(np, "memory-region", 1);
570 if (!node) {
571 dev_err(core->dev, "rpc-region of_parse_phandle error\n");
572 return -ENODEV;
573 }
574 if (of_address_to_resource(node, 0, &res)) {
575 dev_err(core->dev, "rpc-region of_address_to_resource error\n");
576 of_node_put(node);
577 return -EINVAL;
578 }
579 core->rpc.phys = res.start;
580 core->rpc.length = resource_size(&res);
581
582 if (core->rpc.length < core->res->rpc_size + core->res->fwlog_size) {
583 dev_err(core->dev, "the rpc-region <%pad, 0x%x> is not enough\n",
584 &core->rpc.phys, core->rpc.length);
585 of_node_put(node);
586 return -EINVAL;
587 }
588
589 core->fw.virt = memremap(core->fw.phys, core->fw.length, MEMREMAP_WC);
590 core->rpc.virt = memremap(core->rpc.phys, core->rpc.length, MEMREMAP_WC);
591 memset(core->rpc.virt, 0, core->rpc.length);
592
593 ret = vpu_iface_check_memory_region(core, core->rpc.phys, core->rpc.length);
594 if (ret != VPU_CORE_MEMORY_UNCACHED) {
595 dev_err(core->dev, "rpc region<%pad, 0x%x> isn't uncached\n",
596 &core->rpc.phys, core->rpc.length);
597 of_node_put(node);
598 return -EINVAL;
599 }
600
601 core->log.phys = core->rpc.phys + core->res->rpc_size;
602 core->log.virt = core->rpc.virt + core->res->rpc_size;
603 core->log.length = core->res->fwlog_size;
604 core->act.phys = core->log.phys + core->log.length;
605 core->act.virt = core->log.virt + core->log.length;
606 core->act.length = core->rpc.length - core->res->rpc_size - core->log.length;
607 core->rpc.length = core->res->rpc_size;
608
609 of_node_put(node);
610
611 return 0;
612 }
613
vpu_core_probe(struct platform_device * pdev)614 static int vpu_core_probe(struct platform_device *pdev)
615 {
616 struct device *dev = &pdev->dev;
617 struct vpu_core *core;
618 struct vpu_dev *vpu = dev_get_drvdata(dev->parent);
619 struct vpu_shared_addr *iface;
620 u32 iface_data_size;
621 int ret;
622
623 dev_dbg(dev, "probe\n");
624 if (!vpu)
625 return -EINVAL;
626 core = devm_kzalloc(dev, sizeof(*core), GFP_KERNEL);
627 if (!core)
628 return -ENOMEM;
629
630 core->pdev = pdev;
631 core->dev = dev;
632 platform_set_drvdata(pdev, core);
633 core->vpu = vpu;
634 INIT_LIST_HEAD(&core->instances);
635 mutex_init(&core->lock);
636 mutex_init(&core->cmd_lock);
637 init_completion(&core->cmp);
638 init_waitqueue_head(&core->ack_wq);
639 vpu_core_set_state(core, VPU_CORE_DEINIT);
640
641 core->res = of_device_get_match_data(dev);
642 if (!core->res)
643 return -ENODEV;
644
645 core->type = core->res->type;
646 core->id = of_alias_get_id(dev->of_node, "vpu-core");
647 if (core->id < 0) {
648 dev_err(dev, "can't get vpu core id\n");
649 return core->id;
650 }
651 dev_info(core->dev, "[%d] = %s\n", core->id, vpu_core_type_desc(core->type));
652 ret = vpu_core_parse_dt(core, dev->of_node);
653 if (ret)
654 return ret;
655
656 core->base = devm_platform_ioremap_resource(pdev, 0);
657 if (IS_ERR(core->base))
658 return PTR_ERR(core->base);
659
660 if (!vpu_iface_check_codec(core)) {
661 dev_err(core->dev, "is not supported\n");
662 return -EINVAL;
663 }
664
665 ret = vpu_mbox_init(core);
666 if (ret)
667 return ret;
668
669 iface = devm_kzalloc(dev, sizeof(*iface), GFP_KERNEL);
670 if (!iface)
671 return -ENOMEM;
672
673 iface_data_size = vpu_iface_get_data_size(core);
674 if (iface_data_size) {
675 iface->priv = devm_kzalloc(dev, iface_data_size, GFP_KERNEL);
676 if (!iface->priv)
677 return -ENOMEM;
678 }
679
680 ret = vpu_iface_init(core, iface, &core->rpc, core->fw.phys);
681 if (ret) {
682 dev_err(core->dev, "init iface fail, ret = %d\n", ret);
683 return ret;
684 }
685
686 vpu_iface_config_system(core, vpu->res->mreg_base, vpu->base);
687 vpu_iface_set_log_buf(core, &core->log);
688
689 pm_runtime_enable(dev);
690 ret = pm_runtime_resume_and_get(dev);
691 if (ret) {
692 pm_runtime_put_noidle(dev);
693 pm_runtime_set_suspended(dev);
694 goto err_runtime_disable;
695 }
696
697 ret = vpu_core_register(dev->parent, core);
698 if (ret)
699 goto err_core_register;
700 core->parent = dev->parent;
701
702 pm_runtime_put_sync(dev);
703 vpu_core_create_dbgfs_file(core);
704
705 return 0;
706
707 err_core_register:
708 pm_runtime_put_sync(dev);
709 err_runtime_disable:
710 pm_runtime_disable(dev);
711
712 return ret;
713 }
714
vpu_core_remove(struct platform_device * pdev)715 static void vpu_core_remove(struct platform_device *pdev)
716 {
717 struct device *dev = &pdev->dev;
718 struct vpu_core *core = platform_get_drvdata(pdev);
719 int ret;
720
721 vpu_core_remove_dbgfs_file(core);
722 ret = pm_runtime_resume_and_get(dev);
723 WARN_ON(ret < 0);
724
725 vpu_core_shutdown(core);
726 pm_runtime_put_sync(dev);
727 pm_runtime_disable(dev);
728
729 vpu_core_unregister(core->parent, core);
730 memunmap(core->fw.virt);
731 memunmap(core->rpc.virt);
732 mutex_destroy(&core->lock);
733 mutex_destroy(&core->cmd_lock);
734 }
735
vpu_core_runtime_resume(struct device * dev)736 static int __maybe_unused vpu_core_runtime_resume(struct device *dev)
737 {
738 struct vpu_core *core = dev_get_drvdata(dev);
739
740 return vpu_mbox_request(core);
741 }
742
vpu_core_runtime_suspend(struct device * dev)743 static int __maybe_unused vpu_core_runtime_suspend(struct device *dev)
744 {
745 struct vpu_core *core = dev_get_drvdata(dev);
746
747 vpu_mbox_free(core);
748 return 0;
749 }
750
vpu_core_cancel_work(struct vpu_core * core)751 static void vpu_core_cancel_work(struct vpu_core *core)
752 {
753 struct vpu_inst *inst = NULL;
754
755 cancel_work_sync(&core->msg_work);
756 cancel_delayed_work_sync(&core->msg_delayed_work);
757
758 mutex_lock(&core->lock);
759 list_for_each_entry(inst, &core->instances, list)
760 cancel_work_sync(&inst->msg_work);
761 mutex_unlock(&core->lock);
762 }
763
vpu_core_resume_work(struct vpu_core * core)764 static void vpu_core_resume_work(struct vpu_core *core)
765 {
766 struct vpu_inst *inst = NULL;
767 unsigned long delay = msecs_to_jiffies(10);
768
769 queue_work(core->workqueue, &core->msg_work);
770 queue_delayed_work(core->workqueue, &core->msg_delayed_work, delay);
771
772 mutex_lock(&core->lock);
773 list_for_each_entry(inst, &core->instances, list)
774 queue_work(inst->workqueue, &inst->msg_work);
775 mutex_unlock(&core->lock);
776 }
777
vpu_core_resume(struct device * dev)778 static int __maybe_unused vpu_core_resume(struct device *dev)
779 {
780 struct vpu_core *core = dev_get_drvdata(dev);
781 int ret = 0;
782
783 mutex_lock(&core->lock);
784 pm_runtime_resume_and_get(dev);
785 vpu_core_get_vpu(core);
786
787 if (core->request_count) {
788 if (!vpu_iface_get_power_state(core))
789 ret = vpu_core_boot(core, false);
790 else
791 ret = vpu_core_sw_reset(core);
792 if (ret) {
793 dev_err(core->dev, "resume fail\n");
794 vpu_core_set_state(core, VPU_CORE_HANG);
795 }
796 }
797 vpu_core_update_state(core);
798 pm_runtime_put_sync(dev);
799 mutex_unlock(&core->lock);
800
801 vpu_core_resume_work(core);
802 return ret;
803 }
804
vpu_core_suspend(struct device * dev)805 static int __maybe_unused vpu_core_suspend(struct device *dev)
806 {
807 struct vpu_core *core = dev_get_drvdata(dev);
808 int ret = 0;
809
810 mutex_lock(&core->lock);
811 if (core->request_count)
812 ret = vpu_core_snapshot(core);
813 mutex_unlock(&core->lock);
814 if (ret)
815 return ret;
816
817 vpu_core_cancel_work(core);
818
819 mutex_lock(&core->lock);
820 vpu_core_put_vpu(core);
821 mutex_unlock(&core->lock);
822 return ret;
823 }
824
825 static const struct dev_pm_ops vpu_core_pm_ops = {
826 SET_RUNTIME_PM_OPS(vpu_core_runtime_suspend, vpu_core_runtime_resume, NULL)
827 SET_SYSTEM_SLEEP_PM_OPS(vpu_core_suspend, vpu_core_resume)
828 };
829
830 static struct vpu_core_resources imx8q_enc = {
831 .type = VPU_CORE_TYPE_ENC,
832 .fwname = "amphion/vpu/vpu_fw_imx8_enc.bin",
833 .stride = 16,
834 .max_width = 1920,
835 .max_height = 1920,
836 .min_width = 64,
837 .min_height = 48,
838 .step_width = 2,
839 .step_height = 2,
840 .rpc_size = 0x80000,
841 .fwlog_size = 0x80000,
842 .act_size = 0xc0000,
843 };
844
845 static struct vpu_core_resources imx8q_dec = {
846 .type = VPU_CORE_TYPE_DEC,
847 .fwname = "amphion/vpu/vpu_fw_imx8_dec.bin",
848 .stride = 256,
849 .max_width = 8188,
850 .max_height = 8188,
851 .min_width = 16,
852 .min_height = 16,
853 .step_width = 1,
854 .step_height = 1,
855 .rpc_size = 0x80000,
856 .fwlog_size = 0x80000,
857 };
858
859 static const struct of_device_id vpu_core_dt_match[] = {
860 { .compatible = "nxp,imx8q-vpu-encoder", .data = &imx8q_enc },
861 { .compatible = "nxp,imx8q-vpu-decoder", .data = &imx8q_dec },
862 {}
863 };
864 MODULE_DEVICE_TABLE(of, vpu_core_dt_match);
865
866 static struct platform_driver amphion_vpu_core_driver = {
867 .probe = vpu_core_probe,
868 .remove = vpu_core_remove,
869 .driver = {
870 .name = "amphion-vpu-core",
871 .of_match_table = vpu_core_dt_match,
872 .pm = &vpu_core_pm_ops,
873 },
874 };
875
vpu_core_driver_init(void)876 int __init vpu_core_driver_init(void)
877 {
878 return platform_driver_register(&hion_vpu_core_driver);
879 }
880
vpu_core_driver_exit(void)881 void __exit vpu_core_driver_exit(void)
882 {
883 platform_driver_unregister(&hion_vpu_core_driver);
884 }
885