1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * QEMU loongson 3a5000 develop board emulation
4 *
5 * Copyright (c) 2021 Loongson Technology Corporation Limited
6 */
7 #include "qemu/osdep.h"
8 #include "qemu/units.h"
9 #include "qemu/datadir.h"
10 #include "qapi/error.h"
11 #include "exec/target_page.h"
12 #include "hw/boards.h"
13 #include "hw/char/serial-mm.h"
14 #include "system/kvm.h"
15 #include "system/tcg.h"
16 #include "system/system.h"
17 #include "system/qtest.h"
18 #include "system/runstate.h"
19 #include "system/reset.h"
20 #include "system/rtc.h"
21 #include "hw/loongarch/virt.h"
22 #include "system/address-spaces.h"
23 #include "hw/irq.h"
24 #include "net/net.h"
25 #include "hw/loader.h"
26 #include "elf.h"
27 #include "hw/intc/loongarch_ipi.h"
28 #include "hw/intc/loongarch_extioi.h"
29 #include "hw/intc/loongarch_pch_pic.h"
30 #include "hw/intc/loongarch_pch_msi.h"
31 #include "hw/pci-host/ls7a.h"
32 #include "hw/pci-host/gpex.h"
33 #include "hw/misc/unimp.h"
34 #include "hw/loongarch/fw_cfg.h"
35 #include "target/loongarch/cpu.h"
36 #include "hw/firmware/smbios.h"
37 #include "qapi/qapi-visit-common.h"
38 #include "hw/acpi/generic_event_device.h"
39 #include "hw/mem/nvdimm.h"
40 #include "hw/platform-bus.h"
41 #include "hw/display/ramfb.h"
42 #include "hw/uefi/var-service-api.h"
43 #include "hw/mem/pc-dimm.h"
44 #include "system/tpm.h"
45 #include "system/block-backend.h"
46 #include "hw/block/flash.h"
47 #include "hw/virtio/virtio-iommu.h"
48 #include "qemu/error-report.h"
49
virt_get_veiointc(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)50 static void virt_get_veiointc(Object *obj, Visitor *v, const char *name,
51 void *opaque, Error **errp)
52 {
53 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj);
54 OnOffAuto veiointc = lvms->veiointc;
55
56 visit_type_OnOffAuto(v, name, &veiointc, errp);
57 }
58
virt_set_veiointc(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)59 static void virt_set_veiointc(Object *obj, Visitor *v, const char *name,
60 void *opaque, Error **errp)
61 {
62 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj);
63
64 visit_type_OnOffAuto(v, name, &lvms->veiointc, errp);
65 }
66
virt_flash_create1(LoongArchVirtMachineState * lvms,const char * name,const char * alias_prop_name)67 static PFlashCFI01 *virt_flash_create1(LoongArchVirtMachineState *lvms,
68 const char *name,
69 const char *alias_prop_name)
70 {
71 DeviceState *dev = qdev_new(TYPE_PFLASH_CFI01);
72
73 qdev_prop_set_uint64(dev, "sector-length", VIRT_FLASH_SECTOR_SIZE);
74 qdev_prop_set_uint8(dev, "width", 4);
75 qdev_prop_set_uint8(dev, "device-width", 2);
76 qdev_prop_set_bit(dev, "big-endian", false);
77 qdev_prop_set_uint16(dev, "id0", 0x89);
78 qdev_prop_set_uint16(dev, "id1", 0x18);
79 qdev_prop_set_uint16(dev, "id2", 0x00);
80 qdev_prop_set_uint16(dev, "id3", 0x00);
81 qdev_prop_set_string(dev, "name", name);
82 object_property_add_child(OBJECT(lvms), name, OBJECT(dev));
83 object_property_add_alias(OBJECT(lvms), alias_prop_name,
84 OBJECT(dev), "drive");
85 return PFLASH_CFI01(dev);
86 }
87
virt_flash_create(LoongArchVirtMachineState * lvms)88 static void virt_flash_create(LoongArchVirtMachineState *lvms)
89 {
90 lvms->flash[0] = virt_flash_create1(lvms, "virt.flash0", "pflash0");
91 lvms->flash[1] = virt_flash_create1(lvms, "virt.flash1", "pflash1");
92 }
93
virt_flash_map1(PFlashCFI01 * flash,hwaddr base,hwaddr size,MemoryRegion * sysmem)94 static void virt_flash_map1(PFlashCFI01 *flash,
95 hwaddr base, hwaddr size,
96 MemoryRegion *sysmem)
97 {
98 DeviceState *dev = DEVICE(flash);
99 BlockBackend *blk;
100 hwaddr real_size = size;
101
102 blk = pflash_cfi01_get_blk(flash);
103 if (blk) {
104 real_size = blk_getlength(blk);
105 assert(real_size && real_size <= size);
106 }
107
108 assert(QEMU_IS_ALIGNED(real_size, VIRT_FLASH_SECTOR_SIZE));
109 assert(real_size / VIRT_FLASH_SECTOR_SIZE <= UINT32_MAX);
110
111 qdev_prop_set_uint32(dev, "num-blocks", real_size / VIRT_FLASH_SECTOR_SIZE);
112 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
113 memory_region_add_subregion(sysmem, base,
114 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0));
115 }
116
virt_flash_map(LoongArchVirtMachineState * lvms,MemoryRegion * sysmem)117 static void virt_flash_map(LoongArchVirtMachineState *lvms,
118 MemoryRegion *sysmem)
119 {
120 PFlashCFI01 *flash0 = lvms->flash[0];
121 PFlashCFI01 *flash1 = lvms->flash[1];
122
123 virt_flash_map1(flash0, VIRT_FLASH0_BASE, VIRT_FLASH0_SIZE, sysmem);
124 virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem);
125 }
126
virt_build_smbios(LoongArchVirtMachineState * lvms)127 static void virt_build_smbios(LoongArchVirtMachineState *lvms)
128 {
129 MachineState *ms = MACHINE(lvms);
130 MachineClass *mc = MACHINE_GET_CLASS(lvms);
131 uint8_t *smbios_tables, *smbios_anchor;
132 size_t smbios_tables_len, smbios_anchor_len;
133 const char *product = "QEMU Virtual Machine";
134
135 if (!lvms->fw_cfg) {
136 return;
137 }
138
139 smbios_set_defaults("QEMU", product, mc->name);
140
141 smbios_get_tables(ms, SMBIOS_ENTRY_POINT_TYPE_64,
142 NULL, 0,
143 &smbios_tables, &smbios_tables_len,
144 &smbios_anchor, &smbios_anchor_len, &error_fatal);
145
146 if (smbios_anchor) {
147 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-tables",
148 smbios_tables, smbios_tables_len);
149 fw_cfg_add_file(lvms->fw_cfg, "etc/smbios/smbios-anchor",
150 smbios_anchor, smbios_anchor_len);
151 }
152 }
153
virt_done(Notifier * notifier,void * data)154 static void virt_done(Notifier *notifier, void *data)
155 {
156 LoongArchVirtMachineState *lvms = container_of(notifier,
157 LoongArchVirtMachineState, machine_done);
158 virt_build_smbios(lvms);
159 virt_acpi_setup(lvms);
160 virt_fdt_setup(lvms);
161 }
162
virt_powerdown_req(Notifier * notifier,void * opaque)163 static void virt_powerdown_req(Notifier *notifier, void *opaque)
164 {
165 LoongArchVirtMachineState *s;
166
167 s = container_of(notifier, LoongArchVirtMachineState, powerdown_notifier);
168 acpi_send_event(s->acpi_ged, ACPI_POWER_DOWN_STATUS);
169 }
170
memmap_add_entry(uint64_t address,uint64_t length,uint32_t type)171 static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
172 {
173 /* Ensure there are no duplicate entries. */
174 for (unsigned i = 0; i < memmap_entries; i++) {
175 assert(memmap_table[i].address != address);
176 }
177
178 memmap_table = g_renew(struct memmap_entry, memmap_table,
179 memmap_entries + 1);
180 memmap_table[memmap_entries].address = cpu_to_le64(address);
181 memmap_table[memmap_entries].length = cpu_to_le64(length);
182 memmap_table[memmap_entries].type = cpu_to_le32(type);
183 memmap_table[memmap_entries].reserved = 0;
184 memmap_entries++;
185 }
186
create_acpi_ged(DeviceState * pch_pic,LoongArchVirtMachineState * lvms)187 static DeviceState *create_acpi_ged(DeviceState *pch_pic,
188 LoongArchVirtMachineState *lvms)
189 {
190 DeviceState *dev;
191 MachineState *ms = MACHINE(lvms);
192 MachineClass *mc = MACHINE_GET_CLASS(lvms);
193 uint32_t event = ACPI_GED_PWR_DOWN_EVT;
194
195 if (ms->ram_slots) {
196 event |= ACPI_GED_MEM_HOTPLUG_EVT;
197 }
198
199 if (mc->has_hotpluggable_cpus) {
200 event |= ACPI_GED_CPU_HOTPLUG_EVT;
201 }
202
203 dev = qdev_new(TYPE_ACPI_GED);
204 qdev_prop_set_uint32(dev, "ged-event", event);
205 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
206
207 /* ged event */
208 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, VIRT_GED_EVT_ADDR);
209 /* memory hotplug */
210 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, VIRT_GED_MEM_ADDR);
211 /* ged regs used for reset and power down */
212 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR);
213
214 if (mc->has_hotpluggable_cpus) {
215 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 3, VIRT_GED_CPUHP_ADDR);
216 }
217
218 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
219 qdev_get_gpio_in(pch_pic, VIRT_SCI_IRQ - VIRT_GSI_BASE));
220 return dev;
221 }
222
create_platform_bus(DeviceState * pch_pic)223 static DeviceState *create_platform_bus(DeviceState *pch_pic)
224 {
225 DeviceState *dev;
226 SysBusDevice *sysbus;
227 int i, irq;
228 MemoryRegion *sysmem = get_system_memory();
229
230 dev = qdev_new(TYPE_PLATFORM_BUS_DEVICE);
231 dev->id = g_strdup(TYPE_PLATFORM_BUS_DEVICE);
232 qdev_prop_set_uint32(dev, "num_irqs", VIRT_PLATFORM_BUS_NUM_IRQS);
233 qdev_prop_set_uint32(dev, "mmio_size", VIRT_PLATFORM_BUS_SIZE);
234 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
235
236 sysbus = SYS_BUS_DEVICE(dev);
237 for (i = 0; i < VIRT_PLATFORM_BUS_NUM_IRQS; i++) {
238 irq = VIRT_PLATFORM_BUS_IRQ - VIRT_GSI_BASE + i;
239 sysbus_connect_irq(sysbus, i, qdev_get_gpio_in(pch_pic, irq));
240 }
241
242 memory_region_add_subregion(sysmem,
243 VIRT_PLATFORM_BUS_BASEADDRESS,
244 sysbus_mmio_get_region(sysbus, 0));
245 return dev;
246 }
247
virt_devices_init(DeviceState * pch_pic,LoongArchVirtMachineState * lvms)248 static void virt_devices_init(DeviceState *pch_pic,
249 LoongArchVirtMachineState *lvms)
250 {
251 MachineClass *mc = MACHINE_GET_CLASS(lvms);
252 DeviceState *gpex_dev;
253 SysBusDevice *d;
254 PCIBus *pci_bus;
255 MemoryRegion *ecam_alias, *ecam_reg, *pio_alias, *pio_reg;
256 MemoryRegion *mmio_alias, *mmio_reg;
257 int i;
258
259 gpex_dev = qdev_new(TYPE_GPEX_HOST);
260 d = SYS_BUS_DEVICE(gpex_dev);
261 sysbus_realize_and_unref(d, &error_fatal);
262 pci_bus = PCI_HOST_BRIDGE(gpex_dev)->bus;
263 lvms->pci_bus = pci_bus;
264
265 /* Map only part size_ecam bytes of ECAM space */
266 ecam_alias = g_new0(MemoryRegion, 1);
267 ecam_reg = sysbus_mmio_get_region(d, 0);
268 memory_region_init_alias(ecam_alias, OBJECT(gpex_dev), "pcie-ecam",
269 ecam_reg, 0, VIRT_PCI_CFG_SIZE);
270 memory_region_add_subregion(get_system_memory(), VIRT_PCI_CFG_BASE,
271 ecam_alias);
272
273 /* Map PCI mem space */
274 mmio_alias = g_new0(MemoryRegion, 1);
275 mmio_reg = sysbus_mmio_get_region(d, 1);
276 memory_region_init_alias(mmio_alias, OBJECT(gpex_dev), "pcie-mmio",
277 mmio_reg, VIRT_PCI_MEM_BASE, VIRT_PCI_MEM_SIZE);
278 memory_region_add_subregion(get_system_memory(), VIRT_PCI_MEM_BASE,
279 mmio_alias);
280
281 /* Map PCI IO port space. */
282 pio_alias = g_new0(MemoryRegion, 1);
283 pio_reg = sysbus_mmio_get_region(d, 2);
284 memory_region_init_alias(pio_alias, OBJECT(gpex_dev), "pcie-io", pio_reg,
285 VIRT_PCI_IO_OFFSET, VIRT_PCI_IO_SIZE);
286 memory_region_add_subregion(get_system_memory(), VIRT_PCI_IO_BASE,
287 pio_alias);
288
289 for (i = 0; i < PCI_NUM_PINS; i++) {
290 sysbus_connect_irq(d, i,
291 qdev_get_gpio_in(pch_pic, 16 + i));
292 gpex_set_irq_num(GPEX_HOST(gpex_dev), i, 16 + i);
293 }
294
295 /*
296 * Create uart fdt node in reverse order so that they appear
297 * in the finished device tree lowest address first
298 */
299 for (i = VIRT_UART_COUNT; i-- > 0;) {
300 hwaddr base = VIRT_UART_BASE + i * VIRT_UART_SIZE;
301 int irq = VIRT_UART_IRQ + i - VIRT_GSI_BASE;
302 serial_mm_init(get_system_memory(), base, 0,
303 qdev_get_gpio_in(pch_pic, irq),
304 115200, serial_hd(i), DEVICE_LITTLE_ENDIAN);
305 }
306
307 /* Network init */
308 pci_init_nic_devices(pci_bus, mc->default_nic);
309
310 /*
311 * There are some invalid guest memory access.
312 * Create some unimplemented devices to emulate this.
313 */
314 create_unimplemented_device("pci-dma-cfg", 0x1001041c, 0x4);
315 sysbus_create_simple("ls7a_rtc", VIRT_RTC_REG_BASE,
316 qdev_get_gpio_in(pch_pic,
317 VIRT_RTC_IRQ - VIRT_GSI_BASE));
318
319 /* acpi ged */
320 lvms->acpi_ged = create_acpi_ged(pch_pic, lvms);
321 /* platform bus */
322 lvms->platform_bus_dev = create_platform_bus(pch_pic);
323 }
324
virt_cpu_irq_init(LoongArchVirtMachineState * lvms)325 static void virt_cpu_irq_init(LoongArchVirtMachineState *lvms)
326 {
327 int num;
328 MachineState *ms = MACHINE(lvms);
329 MachineClass *mc = MACHINE_GET_CLASS(ms);
330 const CPUArchIdList *possible_cpus;
331 CPUState *cs;
332
333 /* cpu nodes */
334 possible_cpus = mc->possible_cpu_arch_ids(ms);
335 for (num = 0; num < possible_cpus->len; num++) {
336 cs = possible_cpus->cpus[num].cpu;
337 if (cs == NULL) {
338 continue;
339 }
340
341 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), DEVICE(cs),
342 &error_abort);
343 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), DEVICE(cs),
344 &error_abort);
345 }
346 }
347
virt_irq_init(LoongArchVirtMachineState * lvms)348 static void virt_irq_init(LoongArchVirtMachineState *lvms)
349 {
350 DeviceState *pch_pic, *pch_msi;
351 DeviceState *ipi, *extioi;
352 SysBusDevice *d;
353 int i, start, num;
354
355 /*
356 * Extended IRQ model.
357 * |
358 * +-----------+ +-------------|--------+ +-----------+
359 * | IPI/Timer | --> | CPUINTC(0-3)|(4-255) | <-- | IPI/Timer |
360 * +-----------+ +-------------|--------+ +-----------+
361 * ^ |
362 * |
363 * +---------+
364 * | EIOINTC |
365 * +---------+
366 * ^ ^
367 * | |
368 * +---------+ +---------+
369 * | PCH-PIC | | PCH-MSI |
370 * +---------+ +---------+
371 * ^ ^ ^
372 * | | |
373 * +--------+ +---------+ +---------+
374 * | UARTs | | Devices | | Devices |
375 * +--------+ +---------+ +---------+
376 *
377 * Virt extended IRQ model.
378 *
379 * +-----+ +---------------+ +-------+
380 * | IPI |--> | CPUINTC(0-255)| <-- | Timer |
381 * +-----+ +---------------+ +-------+
382 * ^
383 * |
384 * +-----------+
385 * | V-EIOINTC |
386 * +-----------+
387 * ^ ^
388 * | |
389 * +---------+ +---------+
390 * | PCH-PIC | | PCH-MSI |
391 * +---------+ +---------+
392 * ^ ^ ^
393 * | | |
394 * +--------+ +---------+ +---------+
395 * | UARTs | | Devices | | Devices |
396 * +--------+ +---------+ +---------+
397 */
398
399 /* Create IPI device */
400 ipi = qdev_new(TYPE_LOONGARCH_IPI);
401 lvms->ipi = ipi;
402 sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
403
404 /* IPI iocsr memory region */
405 memory_region_add_subregion(&lvms->system_iocsr, SMP_IPI_MAILBOX,
406 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 0));
407 memory_region_add_subregion(&lvms->system_iocsr, MAIL_SEND_ADDR,
408 sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
409
410 /* Create EXTIOI device */
411 extioi = qdev_new(TYPE_LOONGARCH_EXTIOI);
412 lvms->extioi = extioi;
413 if (virt_is_veiointc_enabled(lvms)) {
414 qdev_prop_set_bit(extioi, "has-virtualization-extension", true);
415 }
416 sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal);
417 memory_region_add_subregion(&lvms->system_iocsr, APIC_BASE,
418 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 0));
419 if (virt_is_veiointc_enabled(lvms)) {
420 memory_region_add_subregion(&lvms->system_iocsr, EXTIOI_VIRT_BASE,
421 sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), 1));
422 }
423
424 virt_cpu_irq_init(lvms);
425 pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
426 num = VIRT_PCH_PIC_IRQ_NUM;
427 qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
428 d = SYS_BUS_DEVICE(pch_pic);
429 sysbus_realize_and_unref(d, &error_fatal);
430 memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE,
431 sysbus_mmio_get_region(d, 0));
432
433 /* Connect pch_pic irqs to extioi */
434 for (i = 0; i < num; i++) {
435 qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
436 }
437
438 pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
439 start = num;
440 num = EXTIOI_IRQS - start;
441 qdev_prop_set_uint32(pch_msi, "msi_irq_base", start);
442 qdev_prop_set_uint32(pch_msi, "msi_irq_num", num);
443 d = SYS_BUS_DEVICE(pch_msi);
444 sysbus_realize_and_unref(d, &error_fatal);
445 sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW);
446 for (i = 0; i < num; i++) {
447 /* Connect pch_msi irqs to extioi */
448 qdev_connect_gpio_out(DEVICE(d), i,
449 qdev_get_gpio_in(extioi, i + start));
450 }
451
452 virt_devices_init(pch_pic, lvms);
453 }
454
virt_firmware_init(LoongArchVirtMachineState * lvms)455 static void virt_firmware_init(LoongArchVirtMachineState *lvms)
456 {
457 char *filename = MACHINE(lvms)->firmware;
458 char *bios_name = NULL;
459 int bios_size, i;
460 BlockBackend *pflash_blk0;
461 MemoryRegion *mr;
462
463 lvms->bios_loaded = false;
464
465 /* Map legacy -drive if=pflash to machine properties */
466 for (i = 0; i < ARRAY_SIZE(lvms->flash); i++) {
467 pflash_cfi01_legacy_drive(lvms->flash[i],
468 drive_get(IF_PFLASH, 0, i));
469 }
470
471 virt_flash_map(lvms, get_system_memory());
472
473 pflash_blk0 = pflash_cfi01_get_blk(lvms->flash[0]);
474
475 if (pflash_blk0) {
476 if (filename) {
477 error_report("cannot use both '-bios' and '-drive if=pflash'"
478 "options at once");
479 exit(1);
480 }
481 lvms->bios_loaded = true;
482 return;
483 }
484
485 if (filename) {
486 bios_name = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename);
487 if (!bios_name) {
488 error_report("Could not find ROM image '%s'", filename);
489 exit(1);
490 }
491
492 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(lvms->flash[0]), 0);
493 bios_size = load_image_mr(bios_name, mr);
494 if (bios_size < 0) {
495 error_report("Could not load ROM image '%s'", bios_name);
496 exit(1);
497 }
498 g_free(bios_name);
499 lvms->bios_loaded = true;
500 }
501 }
502
virt_iocsr_misc_write(void * opaque,hwaddr addr,uint64_t val,unsigned size,MemTxAttrs attrs)503 static MemTxResult virt_iocsr_misc_write(void *opaque, hwaddr addr,
504 uint64_t val, unsigned size,
505 MemTxAttrs attrs)
506 {
507 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque);
508 uint64_t features;
509
510 switch (addr) {
511 case MISC_FUNC_REG:
512 if (!virt_is_veiointc_enabled(lvms)) {
513 return MEMTX_OK;
514 }
515
516 features = address_space_ldl(&lvms->as_iocsr,
517 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG,
518 attrs, NULL);
519 if (val & BIT_ULL(IOCSRM_EXTIOI_EN)) {
520 features |= BIT(EXTIOI_ENABLE);
521 }
522 if (val & BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE)) {
523 features |= BIT(EXTIOI_ENABLE_INT_ENCODE);
524 }
525
526 address_space_stl(&lvms->as_iocsr,
527 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG,
528 features, attrs, NULL);
529 break;
530 default:
531 g_assert_not_reached();
532 }
533
534 return MEMTX_OK;
535 }
536
virt_iocsr_misc_read(void * opaque,hwaddr addr,uint64_t * data,unsigned size,MemTxAttrs attrs)537 static MemTxResult virt_iocsr_misc_read(void *opaque, hwaddr addr,
538 uint64_t *data,
539 unsigned size, MemTxAttrs attrs)
540 {
541 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(opaque);
542 uint64_t ret = 0;
543 int features;
544
545 switch (addr) {
546 case VERSION_REG:
547 ret = 0x11ULL;
548 break;
549 case FEATURE_REG:
550 ret = BIT(IOCSRF_MSI) | BIT(IOCSRF_EXTIOI) | BIT(IOCSRF_CSRIPI);
551 if (kvm_enabled()) {
552 ret |= BIT(IOCSRF_VM);
553 }
554 break;
555 case VENDOR_REG:
556 ret = 0x6e6f73676e6f6f4cULL; /* "Loongson" */
557 break;
558 case CPUNAME_REG:
559 ret = 0x303030354133ULL; /* "3A5000" */
560 break;
561 case MISC_FUNC_REG:
562 if (!virt_is_veiointc_enabled(lvms)) {
563 ret |= BIT_ULL(IOCSRM_EXTIOI_EN);
564 break;
565 }
566
567 features = address_space_ldl(&lvms->as_iocsr,
568 EXTIOI_VIRT_BASE + EXTIOI_VIRT_CONFIG,
569 attrs, NULL);
570 if (features & BIT(EXTIOI_ENABLE)) {
571 ret |= BIT_ULL(IOCSRM_EXTIOI_EN);
572 }
573 if (features & BIT(EXTIOI_ENABLE_INT_ENCODE)) {
574 ret |= BIT_ULL(IOCSRM_EXTIOI_INT_ENCODE);
575 }
576 break;
577 default:
578 g_assert_not_reached();
579 }
580
581 *data = ret;
582 return MEMTX_OK;
583 }
584
585 static const MemoryRegionOps virt_iocsr_misc_ops = {
586 .read_with_attrs = virt_iocsr_misc_read,
587 .write_with_attrs = virt_iocsr_misc_write,
588 .endianness = DEVICE_LITTLE_ENDIAN,
589 .valid = {
590 .min_access_size = 4,
591 .max_access_size = 8,
592 },
593 .impl = {
594 .min_access_size = 8,
595 .max_access_size = 8,
596 },
597 };
598
fw_cfg_add_memory(MachineState * ms)599 static void fw_cfg_add_memory(MachineState *ms)
600 {
601 hwaddr base, size, ram_size, gap;
602 int nb_numa_nodes, nodes;
603 NodeInfo *numa_info;
604
605 ram_size = ms->ram_size;
606 base = VIRT_LOWMEM_BASE;
607 gap = VIRT_LOWMEM_SIZE;
608 nodes = nb_numa_nodes = ms->numa_state->num_nodes;
609 numa_info = ms->numa_state->nodes;
610 if (!nodes) {
611 nodes = 1;
612 }
613
614 /* add fw_cfg memory map of node0 */
615 if (nb_numa_nodes) {
616 size = numa_info[0].node_mem;
617 } else {
618 size = ram_size;
619 }
620
621 if (size >= gap) {
622 memmap_add_entry(base, gap, 1);
623 size -= gap;
624 base = VIRT_HIGHMEM_BASE;
625 }
626
627 if (size) {
628 memmap_add_entry(base, size, 1);
629 base += size;
630 }
631
632 if (nodes < 2) {
633 return;
634 }
635
636 /* add fw_cfg memory map of other nodes */
637 if (numa_info[0].node_mem < gap && ram_size > gap) {
638 /*
639 * memory map for the maining nodes splited into two part
640 * lowram: [base, +(gap - numa_info[0].node_mem))
641 * highram: [VIRT_HIGHMEM_BASE, +(ram_size - gap))
642 */
643 memmap_add_entry(base, gap - numa_info[0].node_mem, 1);
644 size = ram_size - gap;
645 base = VIRT_HIGHMEM_BASE;
646 } else {
647 size = ram_size - numa_info[0].node_mem;
648 }
649
650 if (size) {
651 memmap_add_entry(base, size, 1);
652 }
653 }
654
virt_init(MachineState * machine)655 static void virt_init(MachineState *machine)
656 {
657 const char *cpu_model = machine->cpu_type;
658 MemoryRegion *address_space_mem = get_system_memory();
659 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(machine);
660 int i;
661 hwaddr base, size, ram_size = machine->ram_size;
662 MachineClass *mc = MACHINE_GET_CLASS(machine);
663 Object *cpuobj;
664
665 if (!cpu_model) {
666 cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
667 }
668
669 /* Create IOCSR space */
670 memory_region_init_io(&lvms->system_iocsr, OBJECT(machine), NULL,
671 machine, "iocsr", UINT64_MAX);
672 address_space_init(&lvms->as_iocsr, &lvms->system_iocsr, "IOCSR");
673 memory_region_init_io(&lvms->iocsr_mem, OBJECT(machine),
674 &virt_iocsr_misc_ops,
675 machine, "iocsr_misc", 0x428);
676 memory_region_add_subregion(&lvms->system_iocsr, 0, &lvms->iocsr_mem);
677
678 /* Init CPUs */
679 mc->possible_cpu_arch_ids(machine);
680 for (i = 0; i < machine->smp.cpus; i++) {
681 cpuobj = object_new(machine->cpu_type);
682 if (cpuobj == NULL) {
683 error_report("Fail to create object with type %s ",
684 machine->cpu_type);
685 exit(EXIT_FAILURE);
686 }
687 qdev_realize_and_unref(DEVICE(cpuobj), NULL, &error_fatal);
688 }
689 fw_cfg_add_memory(machine);
690
691 /* Node0 memory */
692 size = ram_size;
693 base = VIRT_LOWMEM_BASE;
694 if (size > VIRT_LOWMEM_SIZE) {
695 size = VIRT_LOWMEM_SIZE;
696 }
697
698 memory_region_init_alias(&lvms->lowmem, NULL, "loongarch.lowram",
699 machine->ram, base, size);
700 memory_region_add_subregion(address_space_mem, base, &lvms->lowmem);
701 base += size;
702 if (ram_size - size) {
703 base = VIRT_HIGHMEM_BASE;
704 memory_region_init_alias(&lvms->highmem, NULL, "loongarch.highram",
705 machine->ram, VIRT_LOWMEM_BASE + size, ram_size - size);
706 memory_region_add_subregion(address_space_mem, base, &lvms->highmem);
707 base += ram_size - size;
708 }
709
710 /* initialize device memory address space */
711 if (machine->ram_size < machine->maxram_size) {
712 ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size;
713
714 if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) {
715 error_report("unsupported amount of memory slots: %"PRIu64,
716 machine->ram_slots);
717 exit(EXIT_FAILURE);
718 }
719
720 if (QEMU_ALIGN_UP(machine->maxram_size,
721 TARGET_PAGE_SIZE) != machine->maxram_size) {
722 error_report("maximum memory size must by aligned to multiple of "
723 "%d bytes", TARGET_PAGE_SIZE);
724 exit(EXIT_FAILURE);
725 }
726 machine_memory_devices_init(machine, base, device_mem_size);
727 }
728
729 /* load the BIOS image. */
730 virt_firmware_init(lvms);
731
732 /* fw_cfg init */
733 lvms->fw_cfg = virt_fw_cfg_init(ram_size, machine);
734 rom_set_fw(lvms->fw_cfg);
735 if (lvms->fw_cfg != NULL) {
736 fw_cfg_add_file(lvms->fw_cfg, "etc/memmap",
737 memmap_table,
738 sizeof(struct memmap_entry) * (memmap_entries));
739 }
740
741 /* Initialize the IO interrupt subsystem */
742 virt_irq_init(lvms);
743 lvms->machine_done.notify = virt_done;
744 qemu_add_machine_init_done_notifier(&lvms->machine_done);
745 /* connect powerdown request */
746 lvms->powerdown_notifier.notify = virt_powerdown_req;
747 qemu_register_powerdown_notifier(&lvms->powerdown_notifier);
748
749 lvms->bootinfo.ram_size = ram_size;
750 loongarch_load_kernel(machine, &lvms->bootinfo);
751 }
752
virt_get_acpi(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)753 static void virt_get_acpi(Object *obj, Visitor *v, const char *name,
754 void *opaque, Error **errp)
755 {
756 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj);
757 OnOffAuto acpi = lvms->acpi;
758
759 visit_type_OnOffAuto(v, name, &acpi, errp);
760 }
761
virt_set_acpi(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)762 static void virt_set_acpi(Object *obj, Visitor *v, const char *name,
763 void *opaque, Error **errp)
764 {
765 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj);
766
767 visit_type_OnOffAuto(v, name, &lvms->acpi, errp);
768 }
769
virt_get_oem_id(Object * obj,Error ** errp)770 static char *virt_get_oem_id(Object *obj, Error **errp)
771 {
772 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj);
773
774 return g_strdup(lvms->oem_id);
775 }
776
virt_set_oem_id(Object * obj,const char * value,Error ** errp)777 static void virt_set_oem_id(Object *obj, const char *value, Error **errp)
778 {
779 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj);
780 size_t len = strlen(value);
781
782 if (len > 6) {
783 error_setg(errp,
784 "User specified oem-id value is bigger than 6 bytes in size");
785 return;
786 }
787
788 strncpy(lvms->oem_id, value, 6);
789 }
790
virt_get_oem_table_id(Object * obj,Error ** errp)791 static char *virt_get_oem_table_id(Object *obj, Error **errp)
792 {
793 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj);
794
795 return g_strdup(lvms->oem_table_id);
796 }
797
virt_set_oem_table_id(Object * obj,const char * value,Error ** errp)798 static void virt_set_oem_table_id(Object *obj, const char *value,
799 Error **errp)
800 {
801 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj);
802 size_t len = strlen(value);
803
804 if (len > 8) {
805 error_setg(errp,
806 "User specified oem-table-id value is bigger than 8 bytes in size");
807 return;
808 }
809 strncpy(lvms->oem_table_id, value, 8);
810 }
811
virt_initfn(Object * obj)812 static void virt_initfn(Object *obj)
813 {
814 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(obj);
815
816 if (tcg_enabled()) {
817 lvms->veiointc = ON_OFF_AUTO_OFF;
818 }
819 lvms->acpi = ON_OFF_AUTO_AUTO;
820 lvms->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6);
821 lvms->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8);
822 virt_flash_create(lvms);
823 }
824
virt_get_topo_from_index(MachineState * ms,LoongArchCPUTopo * topo,int index)825 static void virt_get_topo_from_index(MachineState *ms,
826 LoongArchCPUTopo *topo, int index)
827 {
828 topo->socket_id = index / (ms->smp.cores * ms->smp.threads);
829 topo->core_id = index / ms->smp.threads % ms->smp.cores;
830 topo->thread_id = index % ms->smp.threads;
831 }
832
topo_align_up(unsigned int count)833 static unsigned int topo_align_up(unsigned int count)
834 {
835 g_assert(count >= 1);
836 count -= 1;
837 return BIT(count ? 32 - clz32(count) : 0);
838 }
839
840 /*
841 * LoongArch Reference Manual Vol1, Chapter 7.4.12 CPU Identity
842 * For CPU architecture, bit0 .. bit8 is valid for CPU id, max cpuid is 512
843 * However for IPI/Eiointc interrupt controller, max supported cpu id for
844 * irq routingis 256
845 *
846 * Here max cpu id is 256 for virt machine
847 */
virt_get_arch_id_from_topo(MachineState * ms,LoongArchCPUTopo * topo)848 static int virt_get_arch_id_from_topo(MachineState *ms, LoongArchCPUTopo *topo)
849 {
850 int arch_id, threads, cores, sockets;
851
852 threads = topo_align_up(ms->smp.threads);
853 cores = topo_align_up(ms->smp.cores);
854 sockets = topo_align_up(ms->smp.sockets);
855 if ((threads * cores * sockets) > 256) {
856 error_report("Exceeding max cpuid 256 with sockets[%d] cores[%d]"
857 " threads[%d]", ms->smp.sockets, ms->smp.cores,
858 ms->smp.threads);
859 exit(1);
860 }
861
862 arch_id = topo->thread_id + topo->core_id * threads;
863 arch_id += topo->socket_id * threads * cores;
864 return arch_id;
865 }
866
867 /* Find cpu slot in machine->possible_cpus by arch_id */
virt_find_cpu_slot(MachineState * ms,int arch_id)868 static CPUArchId *virt_find_cpu_slot(MachineState *ms, int arch_id)
869 {
870 int n;
871 for (n = 0; n < ms->possible_cpus->len; n++) {
872 if (ms->possible_cpus->cpus[n].arch_id == arch_id) {
873 return &ms->possible_cpus->cpus[n];
874 }
875 }
876
877 return NULL;
878 }
879
880 /* Find cpu slot for cold-plut CPU object where cpu is NULL */
virt_find_empty_cpu_slot(MachineState * ms)881 static CPUArchId *virt_find_empty_cpu_slot(MachineState *ms)
882 {
883 int n;
884 for (n = 0; n < ms->possible_cpus->len; n++) {
885 if (ms->possible_cpus->cpus[n].cpu == NULL) {
886 return &ms->possible_cpus->cpus[n];
887 }
888 }
889
890 return NULL;
891 }
892
virt_cpu_pre_plug(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)893 static void virt_cpu_pre_plug(HotplugHandler *hotplug_dev,
894 DeviceState *dev, Error **errp)
895 {
896 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev);
897 MachineState *ms = MACHINE(OBJECT(hotplug_dev));
898 LoongArchCPU *cpu = LOONGARCH_CPU(dev);
899 CPUState *cs = CPU(dev);
900 CPUArchId *cpu_slot;
901 LoongArchCPUTopo topo;
902 int arch_id;
903
904 if (lvms->acpi_ged) {
905 if ((cpu->thread_id < 0) || (cpu->thread_id >= ms->smp.threads)) {
906 error_setg(errp,
907 "Invalid thread-id %u specified, must be in range 1:%u",
908 cpu->thread_id, ms->smp.threads - 1);
909 return;
910 }
911
912 if ((cpu->core_id < 0) || (cpu->core_id >= ms->smp.cores)) {
913 error_setg(errp,
914 "Invalid core-id %u specified, must be in range 1:%u",
915 cpu->core_id, ms->smp.cores - 1);
916 return;
917 }
918
919 if ((cpu->socket_id < 0) || (cpu->socket_id >= ms->smp.sockets)) {
920 error_setg(errp,
921 "Invalid socket-id %u specified, must be in range 1:%u",
922 cpu->socket_id, ms->smp.sockets - 1);
923 return;
924 }
925
926 topo.socket_id = cpu->socket_id;
927 topo.core_id = cpu->core_id;
928 topo.thread_id = cpu->thread_id;
929 arch_id = virt_get_arch_id_from_topo(ms, &topo);
930 cpu_slot = virt_find_cpu_slot(ms, arch_id);
931 if (CPU(cpu_slot->cpu)) {
932 error_setg(errp,
933 "cpu(id%d=%d:%d:%d) with arch-id %" PRIu64 " exists",
934 cs->cpu_index, cpu->socket_id, cpu->core_id,
935 cpu->thread_id, cpu_slot->arch_id);
936 return;
937 }
938 } else {
939 /* For cold-add cpu, find empty cpu slot */
940 cpu_slot = virt_find_empty_cpu_slot(ms);
941 topo.socket_id = cpu_slot->props.socket_id;
942 topo.core_id = cpu_slot->props.core_id;
943 topo.thread_id = cpu_slot->props.thread_id;
944 object_property_set_int(OBJECT(dev), "socket-id", topo.socket_id, NULL);
945 object_property_set_int(OBJECT(dev), "core-id", topo.core_id, NULL);
946 object_property_set_int(OBJECT(dev), "thread-id", topo.thread_id, NULL);
947 }
948
949 cpu->env.address_space_iocsr = &lvms->as_iocsr;
950 cpu->phy_id = cpu_slot->arch_id;
951 cs->cpu_index = cpu_slot - ms->possible_cpus->cpus;
952 numa_cpu_pre_plug(cpu_slot, dev, errp);
953 }
954
virt_cpu_unplug_request(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)955 static void virt_cpu_unplug_request(HotplugHandler *hotplug_dev,
956 DeviceState *dev, Error **errp)
957 {
958 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev);
959 LoongArchCPU *cpu = LOONGARCH_CPU(dev);
960 CPUState *cs = CPU(dev);
961
962 if (cs->cpu_index == 0) {
963 error_setg(errp, "hot-unplug of boot cpu(id%d=%d:%d:%d) not supported",
964 cs->cpu_index, cpu->socket_id,
965 cpu->core_id, cpu->thread_id);
966 return;
967 }
968
969 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp);
970 }
971
virt_cpu_unplug(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)972 static void virt_cpu_unplug(HotplugHandler *hotplug_dev,
973 DeviceState *dev, Error **errp)
974 {
975 CPUArchId *cpu_slot;
976 LoongArchCPU *cpu = LOONGARCH_CPU(dev);
977 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev);
978
979 /* Notify ipi and extioi irqchip to remove interrupt routing to CPU */
980 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->ipi), dev, &error_abort);
981 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->extioi), dev, &error_abort);
982
983 /* Notify acpi ged CPU removed */
984 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, &error_abort);
985
986 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id);
987 cpu_slot->cpu = NULL;
988 }
989
virt_cpu_plug(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)990 static void virt_cpu_plug(HotplugHandler *hotplug_dev,
991 DeviceState *dev, Error **errp)
992 {
993 CPUArchId *cpu_slot;
994 LoongArchCPU *cpu = LOONGARCH_CPU(dev);
995 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev);
996
997 if (lvms->ipi) {
998 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->ipi), dev, &error_abort);
999 }
1000
1001 if (lvms->extioi) {
1002 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->extioi), dev, &error_abort);
1003 }
1004
1005 if (lvms->acpi_ged) {
1006 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged), dev,
1007 &error_abort);
1008 }
1009
1010 cpu_slot = virt_find_cpu_slot(MACHINE(lvms), cpu->phy_id);
1011 cpu_slot->cpu = CPU(dev);
1012 }
1013
memhp_type_supported(DeviceState * dev)1014 static bool memhp_type_supported(DeviceState *dev)
1015 {
1016 /* we only support pc dimm now */
1017 return object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) &&
1018 !object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM);
1019 }
1020
virt_mem_pre_plug(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)1021 static void virt_mem_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
1022 Error **errp)
1023 {
1024 pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), errp);
1025 }
1026
virt_device_pre_plug(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)1027 static void virt_device_pre_plug(HotplugHandler *hotplug_dev,
1028 DeviceState *dev, Error **errp)
1029 {
1030 if (memhp_type_supported(dev)) {
1031 virt_mem_pre_plug(hotplug_dev, dev, errp);
1032 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) {
1033 virt_cpu_pre_plug(hotplug_dev, dev, errp);
1034 }
1035 }
1036
virt_mem_unplug_request(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)1037 static void virt_mem_unplug_request(HotplugHandler *hotplug_dev,
1038 DeviceState *dev, Error **errp)
1039 {
1040 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev);
1041
1042 /* the acpi ged is always exist */
1043 hotplug_handler_unplug_request(HOTPLUG_HANDLER(lvms->acpi_ged), dev,
1044 errp);
1045 }
1046
virt_device_unplug_request(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)1047 static void virt_device_unplug_request(HotplugHandler *hotplug_dev,
1048 DeviceState *dev, Error **errp)
1049 {
1050 if (memhp_type_supported(dev)) {
1051 virt_mem_unplug_request(hotplug_dev, dev, errp);
1052 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) {
1053 virt_cpu_unplug_request(hotplug_dev, dev, errp);
1054 }
1055 }
1056
virt_mem_unplug(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)1057 static void virt_mem_unplug(HotplugHandler *hotplug_dev,
1058 DeviceState *dev, Error **errp)
1059 {
1060 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev);
1061
1062 hotplug_handler_unplug(HOTPLUG_HANDLER(lvms->acpi_ged), dev, errp);
1063 pc_dimm_unplug(PC_DIMM(dev), MACHINE(lvms));
1064 qdev_unrealize(dev);
1065 }
1066
virt_device_unplug(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)1067 static void virt_device_unplug(HotplugHandler *hotplug_dev,
1068 DeviceState *dev, Error **errp)
1069 {
1070 if (memhp_type_supported(dev)) {
1071 virt_mem_unplug(hotplug_dev, dev, errp);
1072 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) {
1073 virt_cpu_unplug(hotplug_dev, dev, errp);
1074 }
1075 }
1076
virt_mem_plug(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)1077 static void virt_mem_plug(HotplugHandler *hotplug_dev,
1078 DeviceState *dev, Error **errp)
1079 {
1080 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev);
1081
1082 pc_dimm_plug(PC_DIMM(dev), MACHINE(lvms));
1083 hotplug_handler_plug(HOTPLUG_HANDLER(lvms->acpi_ged),
1084 dev, &error_abort);
1085 }
1086
virt_device_plug_cb(HotplugHandler * hotplug_dev,DeviceState * dev,Error ** errp)1087 static void virt_device_plug_cb(HotplugHandler *hotplug_dev,
1088 DeviceState *dev, Error **errp)
1089 {
1090 LoongArchVirtMachineState *lvms = LOONGARCH_VIRT_MACHINE(hotplug_dev);
1091 MachineClass *mc = MACHINE_GET_CLASS(lvms);
1092 PlatformBusDevice *pbus;
1093
1094 if (device_is_dynamic_sysbus(mc, dev)) {
1095 if (lvms->platform_bus_dev) {
1096 pbus = PLATFORM_BUS_DEVICE(lvms->platform_bus_dev);
1097 platform_bus_link_device(pbus, SYS_BUS_DEVICE(dev));
1098 }
1099 } else if (memhp_type_supported(dev)) {
1100 virt_mem_plug(hotplug_dev, dev, errp);
1101 } else if (object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU)) {
1102 virt_cpu_plug(hotplug_dev, dev, errp);
1103 }
1104 }
1105
virt_get_hotplug_handler(MachineState * machine,DeviceState * dev)1106 static HotplugHandler *virt_get_hotplug_handler(MachineState *machine,
1107 DeviceState *dev)
1108 {
1109 MachineClass *mc = MACHINE_GET_CLASS(machine);
1110
1111 if (device_is_dynamic_sysbus(mc, dev) ||
1112 object_dynamic_cast(OBJECT(dev), TYPE_LOONGARCH_CPU) ||
1113 object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) ||
1114 memhp_type_supported(dev)) {
1115 return HOTPLUG_HANDLER(machine);
1116 }
1117 return NULL;
1118 }
1119
virt_possible_cpu_arch_ids(MachineState * ms)1120 static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms)
1121 {
1122 int n, arch_id;
1123 unsigned int max_cpus = ms->smp.max_cpus;
1124 LoongArchCPUTopo topo;
1125
1126 if (ms->possible_cpus) {
1127 assert(ms->possible_cpus->len == max_cpus);
1128 return ms->possible_cpus;
1129 }
1130
1131 ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
1132 sizeof(CPUArchId) * max_cpus);
1133 ms->possible_cpus->len = max_cpus;
1134 for (n = 0; n < ms->possible_cpus->len; n++) {
1135 virt_get_topo_from_index(ms, &topo, n);
1136 arch_id = virt_get_arch_id_from_topo(ms, &topo);
1137 ms->possible_cpus->cpus[n].type = ms->cpu_type;
1138 ms->possible_cpus->cpus[n].arch_id = arch_id;
1139 ms->possible_cpus->cpus[n].vcpus_count = 1;
1140 ms->possible_cpus->cpus[n].props.has_socket_id = true;
1141 ms->possible_cpus->cpus[n].props.socket_id = topo.socket_id;
1142 ms->possible_cpus->cpus[n].props.has_core_id = true;
1143 ms->possible_cpus->cpus[n].props.core_id = topo.core_id;
1144 ms->possible_cpus->cpus[n].props.has_thread_id = true;
1145 ms->possible_cpus->cpus[n].props.thread_id = topo.thread_id;
1146 }
1147 return ms->possible_cpus;
1148 }
1149
virt_cpu_index_to_props(MachineState * ms,unsigned cpu_index)1150 static CpuInstanceProperties virt_cpu_index_to_props(MachineState *ms,
1151 unsigned cpu_index)
1152 {
1153 MachineClass *mc = MACHINE_GET_CLASS(ms);
1154 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms);
1155
1156 assert(cpu_index < possible_cpus->len);
1157 return possible_cpus->cpus[cpu_index].props;
1158 }
1159
virt_get_default_cpu_node_id(const MachineState * ms,int idx)1160 static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int idx)
1161 {
1162 int64_t socket_id;
1163
1164 if (ms->numa_state->num_nodes) {
1165 socket_id = ms->possible_cpus->cpus[idx].props.socket_id;
1166 return socket_id % ms->numa_state->num_nodes;
1167 } else {
1168 return 0;
1169 }
1170 }
1171
virt_class_init(ObjectClass * oc,const void * data)1172 static void virt_class_init(ObjectClass *oc, const void *data)
1173 {
1174 MachineClass *mc = MACHINE_CLASS(oc);
1175 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
1176
1177 mc->init = virt_init;
1178 mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464");
1179 mc->default_ram_id = "loongarch.ram";
1180 mc->desc = "QEMU LoongArch Virtual Machine";
1181 mc->max_cpus = LOONGARCH_MAX_CPUS;
1182 mc->is_default = 1;
1183 mc->default_kernel_irqchip_split = false;
1184 mc->block_default_type = IF_VIRTIO;
1185 mc->default_boot_order = "c";
1186 mc->no_cdrom = 1;
1187 mc->possible_cpu_arch_ids = virt_possible_cpu_arch_ids;
1188 mc->cpu_index_to_instance_props = virt_cpu_index_to_props;
1189 mc->get_default_cpu_node_id = virt_get_default_cpu_node_id;
1190 mc->numa_mem_supported = true;
1191 mc->auto_enable_numa_with_memhp = true;
1192 mc->auto_enable_numa_with_memdev = true;
1193 mc->has_hotpluggable_cpus = true;
1194 mc->get_hotplug_handler = virt_get_hotplug_handler;
1195 mc->default_nic = "virtio-net-pci";
1196 hc->plug = virt_device_plug_cb;
1197 hc->pre_plug = virt_device_pre_plug;
1198 hc->unplug_request = virt_device_unplug_request;
1199 hc->unplug = virt_device_unplug;
1200
1201 object_class_property_add(oc, "acpi", "OnOffAuto",
1202 virt_get_acpi, virt_set_acpi,
1203 NULL, NULL);
1204 object_class_property_set_description(oc, "acpi",
1205 "Enable ACPI");
1206 object_class_property_add(oc, "v-eiointc", "OnOffAuto",
1207 virt_get_veiointc, virt_set_veiointc,
1208 NULL, NULL);
1209 object_class_property_set_description(oc, "v-eiointc",
1210 "Enable Virt Extend I/O Interrupt Controller.");
1211 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
1212 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_UEFI_VARS_SYSBUS);
1213 #ifdef CONFIG_TPM
1214 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_TPM_TIS_SYSBUS);
1215 #endif
1216 object_class_property_add_str(oc, "x-oem-id",
1217 virt_get_oem_id,
1218 virt_set_oem_id);
1219 object_class_property_set_description(oc, "x-oem-id",
1220 "Override the default value of field OEMID "
1221 "in ACPI table header."
1222 "The string may be up to 6 bytes in size");
1223
1224
1225 object_class_property_add_str(oc, "x-oem-table-id",
1226 virt_get_oem_table_id,
1227 virt_set_oem_table_id);
1228 object_class_property_set_description(oc, "x-oem-table-id",
1229 "Override the default value of field OEM Table ID "
1230 "in ACPI table header."
1231 "The string may be up to 8 bytes in size");
1232 }
1233
1234 static const TypeInfo virt_machine_types[] = {
1235 {
1236 .name = TYPE_LOONGARCH_VIRT_MACHINE,
1237 .parent = TYPE_MACHINE,
1238 .instance_size = sizeof(LoongArchVirtMachineState),
1239 .class_init = virt_class_init,
1240 .instance_init = virt_initfn,
1241 .interfaces = (const InterfaceInfo[]) {
1242 { TYPE_HOTPLUG_HANDLER },
1243 { }
1244 },
1245 }
1246 };
1247
1248 DEFINE_TYPES(virt_machine_types)
1249