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Searched defs:val (Results 1 – 25 of 5041) sorted by relevance

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/linux/arch/arm/include/asm/hardware/
H A Dcp14.h12 #define dbg_write(val, reg) WCP14_##reg(val) argument
14 #define etm_write(val, reg) WCP14_##reg(val) argument
24 #define MCR14(val, op1, crn, crm, op2) \ argument
152 #define WCP14_DBGDTRTXint(val) MCR14(val, 0, c0, c5, 0) argument
153 #define WCP14_DBGWFAR(val) MCR14(val, 0, c0, c6, 0) argument
154 #define WCP14_DBGVCR(val) MCR14(val, 0, c0, c7, 0) argument
155 #define WCP14_DBGECR(val) MCR14(val, 0, c0, c9, 0) argument
156 #define WCP14_DBGDSCCR(val) MCR14(val, 0, c0, c10, 0) argument
157 #define WCP14_DBGDSMCR(val) MCR14(val, 0, c0, c11, 0) argument
158 #define WCP14_DBGDTRRXext(val) MCR14(val, 0, c0, c0, 2) argument
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/linux/arch/loongarch/include/asm/
H A Dkvm_csr.h49 #define write_gcsr_crmd(val) gcsr_write(val, LOONGARCH_CSR_CRMD) argument
51 #define write_gcsr_prmd(val) gcsr_write(val, LOONGARCH_CSR_PRMD) argument
53 #define write_gcsr_euen(val) gcsr_write(val, LOONGARCH_CSR_EUEN) argument
55 #define write_gcsr_misc(val) gcsr_write(val, LOONGARCH_CSR_MISC) argument
57 #define write_gcsr_ecfg(val) gcsr_write(val, LOONGARCH_CSR_ECFG) argument
59 #define write_gcsr_estat(val) gcsr_write(val, LOONGARCH_CSR_ESTAT) argument
61 #define write_gcsr_era(val) gcsr_write(val, LOONGARCH_CSR_ERA) argument
63 #define write_gcsr_badv(val) gcsr_write(val, LOONGARCH_CSR_BADV) argument
65 #define write_gcsr_badi(val) gcsr_write(val, LOONGARCH_CSR_BADI) argument
67 #define write_gcsr_eentry(val) gcsr_write(val, LOONGARCH_CSR_EENTRY) argument
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H A Dpercpu.h118 #define _pcp_protect(operation, pcp, val) \ argument
130 #define _percpu_add(pcp, val) \ argument
133 #define _percpu_add_return(pcp, val) _percpu_add(pcp, val) argument
135 #define _percpu_and(pcp, val) \ argument
138 #define _percpu_or(pcp, val) \ argument
141 #define this_cpu_add_4(pcp, val) _percpu_add(pcp, val) argument
142 #define this_cpu_add_8(pcp, val) _percpu_add(pcp, val) argument
144 #define this_cpu_add_return_4(pcp, val) _percpu_add_return(pcp, val) argument
145 #define this_cpu_add_return_8(pcp, val) _percpu_add_return(pcp, val) argument
147 #define this_cpu_and_4(pcp, val) _percpu_and(pcp, val) argument
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/linux/drivers/accel/rocket/
H A Drocket_registers.h23 static inline uint32_t PC_VERSION_VERSION(uint32_t val) in PC_VERSION_VERSION()
31 static inline uint32_t PC_VERSION_NUM_VERSION_NUM(uint32_t val) in PC_VERSION_NUM_VERSION_NUM()
39 static inline uint32_t PC_OPERATION_ENABLE_RESERVED_0(uint32_t val) in PC_OPERATION_ENABLE_RESERVED_0()
45 static inline uint32_t PC_OPERATION_ENABLE_OP_EN(uint32_t val) in PC_OPERATION_ENABLE_OP_EN()
53 static inline uint32_t PC_BASE_ADDRESS_PC_SOURCE_ADDR(uint32_t val) in PC_BASE_ADDRESS_PC_SOURCE_ADDR()
59 static inline uint32_t PC_BASE_ADDRESS_RESERVED_0(uint32_t val) in PC_BASE_ADDRESS_RESERVED_0()
65 static inline uint32_t PC_BASE_ADDRESS_PC_SEL(uint32_t val) in PC_BASE_ADDRESS_PC_SEL()
73 static inline uint32_t PC_REGISTER_AMOUNTS_RESERVED_0(uint32_t val) in PC_REGISTER_AMOUNTS_RESERVED_0()
79 static inline uint32_t PC_REGISTER_AMOUNTS_PC_DATA_AMOUNT(uint32_t val) in PC_REGISTER_AMOUNTS_PC_DATA_AMOUNT()
87 static inline uint32_t PC_INTERRUPT_MASK_RESERVED_0(uint32_t val) in PC_INTERRUPT_MASK_RESERVED_0()
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/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Dtypes.h133 #define CONF_HAS(config, val) ((config) & (1 << (val))) argument
138 #define CONF_IS(config, val) ((config) == (1 << (val))) argument
139 #define CONF_GE(config, val) ((config) & (0-(1 << (val)))) argument
140 #define CONF_GT(config, val) ((config) & (0-2*(1 << (val)))) argument
141 #define CONF_LT(config, val) ((config) & ((1 << (val))-1)) argument
142 #define CONF_LE(config, val) ((config) & (2*(1 << (val))-1)) argument
146 #define NCONF_HAS(val) CONF_HAS(NCONF, val) argument
148 #define NCONF_IS(val) CONF_IS(NCONF, val) argument
149 #define NCONF_GE(val) CONF_GE(NCONF, val) argument
150 #define NCONF_GT(val) CONF_GT(NCONF, val) argument
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/linux/arch/s390/include/asm/
H A Dpercpu.h19 #define arch_this_cpu_to_op_simple(pcp, val, op) \ argument
36 #define this_cpu_add_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
37 #define this_cpu_add_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
38 #define this_cpu_add_return_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
39 #define this_cpu_add_return_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
40 #define this_cpu_and_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, &) argument
41 #define this_cpu_and_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, &) argument
42 #define this_cpu_or_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, |) argument
43 #define this_cpu_or_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, |) argument
47 #define this_cpu_add_4(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument
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/linux/drivers/memory/
H A Drenesas-xspi-if-regs.h20 #define XSPI_BMCFG_MWRSIZE(val) (((val) & 0xff) << 8) argument
25 #define XSPI_CMCFG0_FFMT(val) (((val) & 0x03) << 0) argument
26 #define XSPI_CMCFG0_ADDSIZE(val) (((val) & 0x03) << 2) argument
30 #define XSPI_CMCFG1_RDCMD(val) (((val) & 0xffff) << 0) argument
31 #define XSPI_CMCFG1_RDCMD_UPPER_BYTE(val) (((val) & 0xff) << 8) argument
32 #define XSPI_CMCFG1_RDLATE(val) (((val) & 0x1f) << 16) argument
36 #define XSPI_CMCFG2_WRCMD(val) (((val) & 0xffff) << 0) argument
37 #define XSPI_CMCFG2_WRCMD_UPPER(val) (((val) & 0xff) << 8) argument
38 #define XSPI_CMCFG2_WRLATE(val) (((val) & 0x1f) << 16) argument
42 #define XSPI_LIOCFG_PRTMD(val) (((val) & 0x3ff) << 0) argument
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/linux/drivers/gpu/drm/panel/
H A Dpanel-abt-y030xx067a.c23 #define REG00_VBRT_CTRL(val) (val) argument
25 #define REG01_COM_DC(val) (val) argument
27 #define REG02_DA_CONTRAST(val) (val) argument
28 #define REG02_VESA_SEL(val) ((val) << 5) argument
31 #define REG03_VPOSITION(val) (val) argument
36 #define REG04_HPOSITION1(val) (val) argument
41 #define REG05_SLBRCHARGE(val) ((val) << 3) argument
42 #define REG05_PRECHARGE_LEVEL(val) ((val) << 6) argument
49 #define REG06_GAMMA_SEL(val) ((val) << 5) argument
58 #define REG07_AMPTST(val) ((val) << 6) argument
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/linux/sound/synth/emux/
H A Demux_nrpn.c41 int type, int val, int mode) in send_converted_effect()
128 static int fx_delay(int val) in fx_delay()
133 static int fx_attack(int val) in fx_attack()
138 static int fx_hold(int val) in fx_hold()
143 static int fx_decay(int val) in fx_decay()
148 static int fx_the_value(int val) in fx_the_value()
153 static int fx_twice_value(int val) in fx_twice_value()
158 static int fx_conv_pitch(int val) in fx_conv_pitch()
163 static int fx_conv_Q(int val) in fx_conv_Q()
209 static int gs_cutoff(int val) in gs_cutoff()
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/linux/arch/powerpc/lib/
H A Dqspinlock.c106 static inline int decode_tail_cpu(u32 val) in decode_tail_cpu()
111 static inline int get_owner_cpu(u32 val) in get_owner_cpu()
236 static __always_inline void seen_sleepy_owner(struct qspinlock *lock, u32 val) in seen_sleepy_owner()
285 static __always_inline bool __yield_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt,… in __yield_to_locked_owner()
338 static __always_inline bool yield_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt) in yield_to_locked_owner()
344 static __always_inline bool yield_head_to_locked_owner(struct qspinlock *lock, u32 val, bool paravi… in yield_head_to_locked_owner()
354 static __always_inline void propagate_sleepy(struct qnode *node, u32 val, bool paravirt) in propagate_sleepy()
393 u32 val = READ_ONCE(lock->val); in yield_to_prev() local
443 static __always_inline bool steal_break(u32 val, int iters, bool paravirt, bool sleepy) in steal_break()
462 u32 val; in try_to_steal_lock() local
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/linux/include/sound/
H A Demu8000_reg.h108 #define EMU8000_CPF_WRITE(emu, chan, val) \ argument
110 #define EMU8000_PTRX_WRITE(emu, chan, val) \ argument
112 #define EMU8000_CVCF_WRITE(emu, chan, val) \ argument
114 #define EMU8000_VTFT_WRITE(emu, chan, val) \ argument
116 #define EMU8000_PSST_WRITE(emu, chan, val) \ argument
118 #define EMU8000_CSL_WRITE(emu, chan, val) \ argument
120 #define EMU8000_CCCA_WRITE(emu, chan, val) \ argument
122 #define EMU8000_HWCF4_WRITE(emu, val) \ argument
124 #define EMU8000_HWCF5_WRITE(emu, val) \ argument
126 #define EMU8000_HWCF6_WRITE(emu, val) \ argument
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/linux/arch/alpha/lib/
H A Dfpreg.c15 #define STT(reg,val) asm volatile ("ftoit $f"#reg",%0" : "=r"(val)); argument
17 #define STT(reg,val) asm volatile ("stt $f"#reg",%0" : "=m"(val)); argument
23 unsigned long val; in alpha_read_fp_reg() local
70 #define LDT(reg,val) asm volatile ("itoft %0,$f"#reg : : "r"(val)); argument
72 #define LDT(reg,val) asm volatile ("ldt $f"#reg",%0" : : "m"(val)); argument
76 alpha_write_fp_reg (unsigned long reg, unsigned long val) in alpha_write_fp_reg()
124 #define STS(reg,val) asm volatile ("ftois $f"#reg",%0" : "=r"(val)); argument
126 #define STS(reg,val) asm volatile ("sts $f"#reg",%0" : "=m"(val)); argument
132 unsigned long val; in alpha_read_fp_reg_s() local
181 #define LDS(reg,val) asm volatile ("itofs %0,$f"#reg : : "r"(val)); argument
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/linux/arch/arm64/kvm/
H A Dvgic-sys-reg-v3.c14 u64 val) in set_gic_ctlr()
64 u64 val; in get_gic_ctlr() local
88 u64 val) in set_gic_pmr()
100 u64 *val) in get_gic_pmr()
111 u64 val) in set_gic_bpr0()
123 u64 *val) in get_gic_bpr0()
134 u64 val) in set_gic_bpr1()
148 u64 *val) in get_gic_bpr1()
163 u64 val) in set_gic_grpen0()
175 u64 *val) in get_gic_grpen0()
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/linux/drivers/accel/ivpu/
H A Divpu_hw_ip.c74 u32 val = 0; in host_ss_rst_clr() local
85 u32 val = REGV_RD32(VPU_37XX_HOST_SS_NOC_QREQN); in host_ss_noc_qreqn_check_37xx() local
95 u32 val = REGV_RD32(VPU_40XX_HOST_SS_NOC_QREQN); in host_ss_noc_qreqn_check_40xx() local
113 u32 val = REGV_RD32(VPU_37XX_HOST_SS_NOC_QACCEPTN); in host_ss_noc_qacceptn_check_37xx() local
123 u32 val = REGV_RD32(VPU_40XX_HOST_SS_NOC_QACCEPTN); in host_ss_noc_qacceptn_check_40xx() local
141 u32 val = REGV_RD32(VPU_37XX_HOST_SS_NOC_QDENY); in host_ss_noc_qdeny_check_37xx() local
151 u32 val = REGV_RD32(VPU_40XX_HOST_SS_NOC_QDENY); in host_ss_noc_qdeny_check_40xx() local
169 u32 val = REGV_RD32(VPU_37XX_TOP_NOC_QREQN); in top_noc_qrenqn_check_37xx() local
180 u32 val = REGV_RD32(VPU_40XX_TOP_NOC_QREQN); in top_noc_qrenqn_check_40xx() local
231 u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_VPU_IDLE_GEN); in idle_gen_drive_37xx() local
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/linux/arch/mips/include/asm/
H A Dmipsregs.h1540 #define write_r10k_perf_cntr(counter,val) \ argument
1559 #define write_r10k_perf_cntl(counter,val) \ argument
1666 #define __write_ulong_c0_register(reg, sel, val) \ argument
1725 #define __write_64bit_c0_split(source, sel, val) \ argument
1812 #define write_c0_index(val) __write_32bit_c0_register($0, 0, val) argument
1815 #define write_c0_random(val) __write_32bit_c0_register($1, 0, val) argument
1818 #define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val) argument
1821 #define writex_c0_entrylo0(val) __writex_32bit_c0_register($2, 0, val) argument
1824 #define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val) argument
1827 #define writex_c0_entrylo1(val) __writex_32bit_c0_register($3, 0, val) argument
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/linux/arch/arm64/include/asm/
H A Dpercpu.h181 #define this_cpu_write_1(pcp, val) \ argument
183 #define this_cpu_write_2(pcp, val) \ argument
185 #define this_cpu_write_4(pcp, val) \ argument
187 #define this_cpu_write_8(pcp, val) \ argument
190 #define this_cpu_add_1(pcp, val) \ argument
192 #define this_cpu_add_2(pcp, val) \ argument
194 #define this_cpu_add_4(pcp, val) \ argument
196 #define this_cpu_add_8(pcp, val) \ argument
199 #define this_cpu_add_return_1(pcp, val) \ argument
201 #define this_cpu_add_return_2(pcp, val) \ argument
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H A Darm_pmuv3.h24 static inline void write_pmevcntrn(int n, unsigned long val) in write_pmevcntrn()
31 static inline void write_pmevtypern(int n, unsigned long val) in write_pmevtypern()
65 static inline void write_pmcr(u64 val) in write_pmcr()
75 static inline void write_pmselr(u32 val) in write_pmselr()
80 static inline void write_pmccntr(u64 val) in write_pmccntr()
90 static inline void write_pmicntr(u64 val) in write_pmicntr()
100 static inline void write_pmcntenset(u64 val) in write_pmcntenset()
105 static inline void write_pmcntenclr(u64 val) in write_pmcntenclr()
110 static inline void write_pmintenset(u64 val) in write_pmintenset()
115 static inline void write_pmintenclr(u64 val) in write_pmintenclr()
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/linux/arch/alpha/include/uapi/asm/
H A Dcompiler.h14 # define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift) argument
15 # define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift) argument
16 # define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift) argument
17 # define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift) argument
18 # define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift) argument
19 # define __kernel_extwl(val, shift) __builtin_alpha_extwl(val, shift) argument
22 # define __kernel_insbl(val, shift) \ argument
26 # define __kernel_inswl(val, shift) \ argument
30 # define __kernel_insql(val, shift) \ argument
34 # define __kernel_inslh(val, shift) \ argument
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/linux/include/asm-generic/
H A Dpercpu.h85 #define raw_cpu_generic_to_op(pcp, val, op) \ argument
90 #define raw_cpu_generic_add_return(pcp, val) \ argument
167 #define this_cpu_generic_to_op(pcp, val, op) \ argument
176 #define this_cpu_generic_add_return(pcp, val) \ argument
230 #define raw_cpu_write_1(pcp, val) raw_cpu_generic_to_op(pcp, val, =) argument
233 #define raw_cpu_write_2(pcp, val) raw_cpu_generic_to_op(pcp, val, =) argument
236 #define raw_cpu_write_4(pcp, val) raw_cpu_generic_to_op(pcp, val, =) argument
239 #define raw_cpu_write_8(pcp, val) raw_cpu_generic_to_op(pcp, val, =) argument
243 #define raw_cpu_add_1(pcp, val) raw_cpu_generic_to_op(pcp, val, +=) argument
246 #define raw_cpu_add_2(pcp, val) raw_cpu_generic_to_op(pcp, val, +=) argument
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/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_tc_u32_parse.h41 int (*val)(struct ch_filter_specification *f, __be32 val, __be32 mask); member
46 __be32 val, __be32 mask) in cxgb4_fill_ipv4_tos()
55 __be32 val, __be32 mask) in cxgb4_fill_ipv4_frag()
77 __be32 val, __be32 mask) in cxgb4_fill_ipv4_proto()
86 __be32 val, __be32 mask) in cxgb4_fill_ipv4_src_ip()
95 __be32 val, __be32 mask) in cxgb4_fill_ipv4_dst_ip()
114 __be32 val, __be32 mask) in cxgb4_fill_ipv6_tos()
123 __be32 val, __be32 mask) in cxgb4_fill_ipv6_proto()
132 __be32 val, __be32 mask) in cxgb4_fill_ipv6_src_ip0()
141 __be32 val, __be32 mask) in cxgb4_fill_ipv6_src_ip1()
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/linux/drivers/hwtracing/coresight/
H A Dcoresight-etm3x-sysfs.c16 unsigned long val; in nr_addr_cmp_show() local
26 { unsigned long val; in nr_cntr_show() local
37 unsigned long val; in nr_ctxid_cmp_show() local
48 unsigned long flags, val; in etmsr_show() local
70 unsigned long val; in reset_store() local
99 unsigned long val; in mode_show() local
112 unsigned long val; in mode_store() local
184 unsigned long val; in trigger_event_show() local
197 unsigned long val; in trigger_event_store() local
214 unsigned long val; in enable_event_show() local
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/linux/tools/include/linux/
H A Dunaligned.h12 #define put_unaligned(val, ptr) __put_unaligned_t(typeof(*(ptr)), (val), (ptr)) argument
29 static inline void put_unaligned_le16(u16 val, void *p) in put_unaligned_le16()
34 static inline void put_unaligned_le32(u32 val, void *p) in put_unaligned_le32()
39 static inline void put_unaligned_le64(u64 val, void *p) in put_unaligned_le64()
59 static inline void put_unaligned_be16(u16 val, void *p) in put_unaligned_be16()
64 static inline void put_unaligned_be32(u32 val, void *p) in put_unaligned_be32()
69 static inline void put_unaligned_be64(u64 val, void *p) in put_unaligned_be64()
94 static inline void __put_unaligned_be24(const u32 val, u8 *p) in __put_unaligned_be24()
101 static inline void put_unaligned_be24(const u32 val, void *p) in put_unaligned_be24()
106 static inline void __put_unaligned_le24(const u32 val, u8 *p) in __put_unaligned_le24()
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/linux/include/linux/
H A Dunaligned.h14 #define put_unaligned(val, ptr) __put_unaligned_t(typeof(*(ptr)), (val), (ptr)) argument
31 static inline void put_unaligned_le16(u16 val, void *p) in put_unaligned_le16()
36 static inline void put_unaligned_le32(u32 val, void *p) in put_unaligned_le32()
41 static inline void put_unaligned_le64(u64 val, void *p) in put_unaligned_le64()
61 static inline void put_unaligned_be16(u16 val, void *p) in put_unaligned_be16()
66 static inline void put_unaligned_be32(u32 val, void *p) in put_unaligned_be32()
71 static inline void put_unaligned_be64(u64 val, void *p) in put_unaligned_be64()
96 static inline void __put_unaligned_be24(const u32 val, u8 *p) in __put_unaligned_be24()
103 static inline void put_unaligned_be24(const u32 val, void *p) in put_unaligned_be24()
108 static inline void __put_unaligned_le24(const u32 val, u8 *p) in __put_unaligned_le24()
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H A Diopoll.h143 #define read_poll_timeout(op, val, cond, sleep_us, timeout_us, \ argument
170 #define read_poll_timeout_atomic(op, val, cond, sleep_us, timeout_us, \ argument
192 #define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us) \ argument
212 #define readx_poll_timeout_atomic(op, addr, val, cond, delay_us, timeout_us) \ argument
215 #define readb_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument
218 #define readb_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument
221 #define readw_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument
224 #define readw_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument
227 #define readl_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument
230 #define readl_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument
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/linux/drivers/dma/ti/
H A Dk3-udma.h41 #define UDMA_CAP2_TCHAN_CNT(val) ((val) & 0x1ff) argument
42 #define UDMA_CAP2_ECHAN_CNT(val) (((val) >> 9) & 0x1ff) argument
43 #define UDMA_CAP2_RCHAN_CNT(val) (((val) >> 18) & 0x1ff) argument
44 #define UDMA_CAP3_RFLOW_CNT(val) ((val) & 0x3fff) argument
45 #define UDMA_CAP3_HCHAN_CNT(val) (((val) >> 14) & 0x1ff) argument
46 #define UDMA_CAP3_UCHAN_CNT(val) (((val) >> 23) & 0x1ff) argument
48 #define BCDMA_CAP2_BCHAN_CNT(val) ((val) & 0x1ff) argument
49 #define BCDMA_CAP2_TCHAN_CNT(val) (((val) >> 9) & 0x1ff) argument
50 #define BCDMA_CAP2_RCHAN_CNT(val) (((val) >> 18) & 0x1ff) argument
51 #define BCDMA_CAP3_HBCHAN_CNT(val) (((val) >> 14) & 0x1ff) argument
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