1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (C) 2015-2018 Broadcom */
3
4 #include <linux/delay.h>
5 #include <linux/mutex.h>
6 #include <linux/spinlock_types.h>
7 #include <linux/workqueue.h>
8
9 #include <drm/drm_encoder.h>
10 #include <drm/drm_gem.h>
11 #include <drm/drm_gem_shmem_helper.h>
12 #include <drm/gpu_scheduler.h>
13
14 #include "v3d_performance_counters.h"
15
16 #include "uapi/drm/v3d_drm.h"
17
18 struct clk;
19 struct platform_device;
20 struct reset_control;
21
22 #define V3D_MMU_PAGE_SHIFT 12
23 #define V3D_PAGE_FACTOR (PAGE_SIZE >> V3D_MMU_PAGE_SHIFT)
24
25 #define V3D_MAX_QUEUES (V3D_CPU + 1)
26
v3d_queue_to_string(enum v3d_queue queue)27 static inline char *v3d_queue_to_string(enum v3d_queue queue)
28 {
29 switch (queue) {
30 case V3D_BIN: return "bin";
31 case V3D_RENDER: return "render";
32 case V3D_TFU: return "tfu";
33 case V3D_CSD: return "csd";
34 case V3D_CACHE_CLEAN: return "cache_clean";
35 case V3D_CPU: return "cpu";
36 }
37 return "UNKNOWN";
38 }
39
40 struct v3d_stats {
41 u64 start_ns;
42 u64 enabled_ns;
43 u64 jobs_completed;
44
45 /*
46 * This seqcount is used to protect the access to the GPU stats
47 * variables. It must be used as, while we are reading the stats,
48 * IRQs can happen and the stats can be updated.
49 */
50 seqcount_t lock;
51 };
52
53 struct v3d_queue_state {
54 struct drm_gpu_scheduler sched;
55
56 u64 fence_context;
57 u64 emit_seqno;
58
59 /* Stores the GPU stats for this queue in the global context. */
60 struct v3d_stats stats;
61 };
62
63 /* Performance monitor object. The perform lifetime is controlled by userspace
64 * using perfmon related ioctls. A perfmon can be attached to a submit_cl
65 * request, and when this is the case, HW perf counters will be activated just
66 * before the submit_cl is submitted to the GPU and disabled when the job is
67 * done. This way, only events related to a specific job will be counted.
68 */
69 struct v3d_perfmon {
70 /* Tracks the number of users of the perfmon, when this counter reaches
71 * zero the perfmon is destroyed.
72 */
73 refcount_t refcnt;
74
75 /* Protects perfmon stop, as it can be invoked from multiple places. */
76 struct mutex lock;
77
78 /* Number of counters activated in this perfmon instance
79 * (should be less than DRM_V3D_MAX_PERF_COUNTERS).
80 */
81 u8 ncounters;
82
83 /* Events counted by the HW perf counters. */
84 u8 counters[DRM_V3D_MAX_PERF_COUNTERS];
85
86 /* Storage for counter values. Counters are incremented by the
87 * HW perf counter values every time the perfmon is attached
88 * to a GPU job. This way, perfmon users don't have to
89 * retrieve the results after each job if they want to track
90 * events covering several submissions. Note that counter
91 * values can't be reset, but you can fake a reset by
92 * destroying the perfmon and creating a new one.
93 */
94 u64 values[] __counted_by(ncounters);
95 };
96
97 struct v3d_dev {
98 struct drm_device drm;
99
100 /* Short representation (e.g. 33, 41) of the V3D tech version */
101 int ver;
102
103 /* Short representation (e.g. 5, 6) of the V3D tech revision */
104 int rev;
105
106 bool single_irq_line;
107
108 struct v3d_perfmon_info perfmon_info;
109
110 void __iomem *hub_regs;
111 void __iomem *core_regs[3];
112 void __iomem *bridge_regs;
113 void __iomem *gca_regs;
114 struct clk *clk;
115 struct reset_control *reset;
116
117 /* Virtual and DMA addresses of the single shared page table. */
118 volatile u32 *pt;
119 dma_addr_t pt_paddr;
120
121 /* Virtual and DMA addresses of the MMU's scratch page. When
122 * a read or write is invalid in the MMU, it will be
123 * redirected here.
124 */
125 void *mmu_scratch;
126 dma_addr_t mmu_scratch_paddr;
127 /* virtual address bits from V3D to the MMU. */
128 int va_width;
129
130 /* Number of V3D cores. */
131 u32 cores;
132
133 /* Allocator managing the address space. All units are in
134 * number of pages.
135 */
136 struct drm_mm mm;
137 spinlock_t mm_lock;
138
139 /*
140 * tmpfs instance used for shmem backed objects
141 */
142 struct vfsmount *gemfs;
143
144 struct work_struct overflow_mem_work;
145
146 struct v3d_bin_job *bin_job;
147 struct v3d_render_job *render_job;
148 struct v3d_tfu_job *tfu_job;
149 struct v3d_csd_job *csd_job;
150
151 struct v3d_queue_state queue[V3D_MAX_QUEUES];
152
153 /* Spinlock used to synchronize the overflow memory
154 * management against bin job submission.
155 */
156 spinlock_t job_lock;
157
158 /* Used to track the active perfmon if any. */
159 struct v3d_perfmon *active_perfmon;
160
161 /* Protects bo_stats */
162 struct mutex bo_lock;
163
164 /* Lock taken when resetting the GPU, to keep multiple
165 * processes from trying to park the scheduler threads and
166 * reset at once.
167 */
168 struct mutex reset_lock;
169
170 /* Lock taken when creating and pushing the GPU scheduler
171 * jobs, to keep the sched-fence seqnos in order.
172 */
173 struct mutex sched_lock;
174
175 /* Lock taken during a cache clean and when initiating an L2
176 * flush, to keep L2 flushes from interfering with the
177 * synchronous L2 cleans.
178 */
179 struct mutex cache_clean_lock;
180
181 struct {
182 u32 num_allocated;
183 u32 pages_allocated;
184 } bo_stats;
185
186 /* To support a performance analysis tool in user space, we require
187 * a single, globally configured performance monitor (perfmon) for
188 * all jobs.
189 */
190 struct v3d_perfmon *global_perfmon;
191 };
192
193 static inline struct v3d_dev *
to_v3d_dev(struct drm_device * dev)194 to_v3d_dev(struct drm_device *dev)
195 {
196 return container_of(dev, struct v3d_dev, drm);
197 }
198
199 static inline bool
v3d_has_csd(struct v3d_dev * v3d)200 v3d_has_csd(struct v3d_dev *v3d)
201 {
202 return v3d->ver >= 41;
203 }
204
205 #define v3d_to_pdev(v3d) to_platform_device((v3d)->drm.dev)
206
207 /* The per-fd struct, which tracks the MMU mappings. */
208 struct v3d_file_priv {
209 struct v3d_dev *v3d;
210
211 struct {
212 struct idr idr;
213 struct mutex lock;
214 } perfmon;
215
216 struct drm_sched_entity sched_entity[V3D_MAX_QUEUES];
217
218 /* Stores the GPU stats for a specific queue for this fd. */
219 struct v3d_stats stats[V3D_MAX_QUEUES];
220 };
221
222 struct v3d_bo {
223 struct drm_gem_shmem_object base;
224
225 struct drm_mm_node node;
226
227 /* List entry for the BO's position in
228 * v3d_render_job->unref_list
229 */
230 struct list_head unref_head;
231
232 void *vaddr;
233 };
234
235 static inline struct v3d_bo *
to_v3d_bo(struct drm_gem_object * bo)236 to_v3d_bo(struct drm_gem_object *bo)
237 {
238 return (struct v3d_bo *)bo;
239 }
240
241 struct v3d_fence {
242 struct dma_fence base;
243 struct drm_device *dev;
244 /* v3d seqno for signaled() test */
245 u64 seqno;
246 enum v3d_queue queue;
247 };
248
249 static inline struct v3d_fence *
to_v3d_fence(struct dma_fence * fence)250 to_v3d_fence(struct dma_fence *fence)
251 {
252 return (struct v3d_fence *)fence;
253 }
254
255 #define V3D_READ(offset) readl(v3d->hub_regs + offset)
256 #define V3D_WRITE(offset, val) writel(val, v3d->hub_regs + offset)
257
258 #define V3D_BRIDGE_READ(offset) readl(v3d->bridge_regs + offset)
259 #define V3D_BRIDGE_WRITE(offset, val) writel(val, v3d->bridge_regs + offset)
260
261 #define V3D_GCA_READ(offset) readl(v3d->gca_regs + offset)
262 #define V3D_GCA_WRITE(offset, val) writel(val, v3d->gca_regs + offset)
263
264 #define V3D_CORE_READ(core, offset) readl(v3d->core_regs[core] + offset)
265 #define V3D_CORE_WRITE(core, offset, val) writel(val, v3d->core_regs[core] + offset)
266
267 struct v3d_job {
268 struct drm_sched_job base;
269
270 struct kref refcount;
271
272 struct v3d_dev *v3d;
273
274 /* This is the array of BOs that were looked up at the start
275 * of submission.
276 */
277 struct drm_gem_object **bo;
278 u32 bo_count;
279
280 /* v3d fence to be signaled by IRQ handler when the job is complete. */
281 struct dma_fence *irq_fence;
282
283 /* scheduler fence for when the job is considered complete and
284 * the BO reservations can be released.
285 */
286 struct dma_fence *done_fence;
287
288 /* Pointer to a performance monitor object if the user requested it,
289 * NULL otherwise.
290 */
291 struct v3d_perfmon *perfmon;
292
293 /* File descriptor of the process that submitted the job that could be used
294 * for collecting stats by process of GPU usage.
295 */
296 struct drm_file *file;
297
298 /* Callback for the freeing of the job on refcount going to 0. */
299 void (*free)(struct kref *ref);
300 };
301
302 struct v3d_bin_job {
303 struct v3d_job base;
304
305 /* GPU virtual addresses of the start/end of the CL job. */
306 u32 start, end;
307
308 u32 timedout_ctca, timedout_ctra;
309
310 /* Corresponding render job, for attaching our overflow memory. */
311 struct v3d_render_job *render;
312
313 /* Submitted tile memory allocation start/size, tile state. */
314 u32 qma, qms, qts;
315 };
316
317 struct v3d_render_job {
318 struct v3d_job base;
319
320 /* GPU virtual addresses of the start/end of the CL job. */
321 u32 start, end;
322
323 u32 timedout_ctca, timedout_ctra;
324
325 /* List of overflow BOs used in the job that need to be
326 * released once the job is complete.
327 */
328 struct list_head unref_list;
329 };
330
331 struct v3d_tfu_job {
332 struct v3d_job base;
333
334 struct drm_v3d_submit_tfu args;
335 };
336
337 struct v3d_csd_job {
338 struct v3d_job base;
339
340 u32 timedout_batches;
341
342 struct drm_v3d_submit_csd args;
343 };
344
345 enum v3d_cpu_job_type {
346 V3D_CPU_JOB_TYPE_INDIRECT_CSD = 1,
347 V3D_CPU_JOB_TYPE_TIMESTAMP_QUERY,
348 V3D_CPU_JOB_TYPE_RESET_TIMESTAMP_QUERY,
349 V3D_CPU_JOB_TYPE_COPY_TIMESTAMP_QUERY,
350 V3D_CPU_JOB_TYPE_RESET_PERFORMANCE_QUERY,
351 V3D_CPU_JOB_TYPE_COPY_PERFORMANCE_QUERY,
352 };
353
354 struct v3d_timestamp_query {
355 /* Offset of this query in the timestamp BO for its value. */
356 u32 offset;
357
358 /* Syncobj that indicates the timestamp availability */
359 struct drm_syncobj *syncobj;
360 };
361
362 struct v3d_performance_query {
363 /* Performance monitor IDs for this query */
364 u32 *kperfmon_ids;
365
366 /* Syncobj that indicates the query availability */
367 struct drm_syncobj *syncobj;
368 };
369
370 struct v3d_indirect_csd_info {
371 /* Indirect CSD */
372 struct v3d_csd_job *job;
373
374 /* Clean cache job associated to the Indirect CSD job */
375 struct v3d_job *clean_job;
376
377 /* Offset within the BO where the workgroup counts are stored */
378 u32 offset;
379
380 /* Workgroups size */
381 u32 wg_size;
382
383 /* Indices of the uniforms with the workgroup dispatch counts
384 * in the uniform stream.
385 */
386 u32 wg_uniform_offsets[3];
387
388 /* Indirect BO */
389 struct drm_gem_object *indirect;
390
391 /* Context of the Indirect CSD job */
392 struct ww_acquire_ctx acquire_ctx;
393 };
394
395 struct v3d_timestamp_query_info {
396 struct v3d_timestamp_query *queries;
397
398 u32 count;
399 };
400
401 struct v3d_performance_query_info {
402 struct v3d_performance_query *queries;
403
404 /* Number of performance queries */
405 u32 count;
406
407 /* Number of performance monitors related to that query pool */
408 u32 nperfmons;
409
410 /* Number of performance counters related to that query pool */
411 u32 ncounters;
412 };
413
414 struct v3d_copy_query_results_info {
415 /* Define if should write to buffer using 64 or 32 bits */
416 bool do_64bit;
417
418 /* Define if it can write to buffer even if the query is not available */
419 bool do_partial;
420
421 /* Define if it should write availability bit to buffer */
422 bool availability_bit;
423
424 /* Offset of the copy buffer in the BO */
425 u32 offset;
426
427 /* Stride of the copy buffer in the BO */
428 u32 stride;
429 };
430
431 struct v3d_cpu_job {
432 struct v3d_job base;
433
434 enum v3d_cpu_job_type job_type;
435
436 struct v3d_indirect_csd_info indirect_csd;
437
438 struct v3d_timestamp_query_info timestamp_query;
439
440 struct v3d_copy_query_results_info copy;
441
442 struct v3d_performance_query_info performance_query;
443 };
444
445 typedef void (*v3d_cpu_job_fn)(struct v3d_cpu_job *);
446
447 struct v3d_submit_outsync {
448 struct drm_syncobj *syncobj;
449 };
450
451 struct v3d_submit_ext {
452 u32 flags;
453 u32 wait_stage;
454
455 u32 in_sync_count;
456 u64 in_syncs;
457
458 u32 out_sync_count;
459 struct v3d_submit_outsync *out_syncs;
460 };
461
462 /**
463 * __wait_for - magic wait macro
464 *
465 * Macro to help avoid open coding check/wait/timeout patterns. Note that it's
466 * important that we check the condition again after having timed out, since the
467 * timeout could be due to preemption or similar and we've never had a chance to
468 * check the condition before the timeout.
469 */
470 #define __wait_for(OP, COND, US, Wmin, Wmax) ({ \
471 const ktime_t end__ = ktime_add_ns(ktime_get_raw(), 1000ll * (US)); \
472 long wait__ = (Wmin); /* recommended min for usleep is 10 us */ \
473 int ret__; \
474 might_sleep(); \
475 for (;;) { \
476 const bool expired__ = ktime_after(ktime_get_raw(), end__); \
477 OP; \
478 /* Guarantee COND check prior to timeout */ \
479 barrier(); \
480 if (COND) { \
481 ret__ = 0; \
482 break; \
483 } \
484 if (expired__) { \
485 ret__ = -ETIMEDOUT; \
486 break; \
487 } \
488 usleep_range(wait__, wait__ * 2); \
489 if (wait__ < (Wmax)) \
490 wait__ <<= 1; \
491 } \
492 ret__; \
493 })
494
495 #define _wait_for(COND, US, Wmin, Wmax) __wait_for(, (COND), (US), (Wmin), \
496 (Wmax))
497 #define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000)
498
nsecs_to_jiffies_timeout(const u64 n)499 static inline unsigned long nsecs_to_jiffies_timeout(const u64 n)
500 {
501 /* nsecs_to_jiffies64() does not guard against overflow */
502 if ((NSEC_PER_SEC % HZ) != 0 &&
503 div_u64(n, NSEC_PER_SEC) >= MAX_JIFFY_OFFSET / HZ)
504 return MAX_JIFFY_OFFSET;
505
506 return min_t(u64, MAX_JIFFY_OFFSET, nsecs_to_jiffies64(n) + 1);
507 }
508
509 /* v3d_bo.c */
510 struct drm_gem_object *v3d_create_object(struct drm_device *dev, size_t size);
511 void v3d_free_object(struct drm_gem_object *gem_obj);
512 struct v3d_bo *v3d_bo_create(struct drm_device *dev, struct drm_file *file_priv,
513 size_t size);
514 void v3d_get_bo_vaddr(struct v3d_bo *bo);
515 void v3d_put_bo_vaddr(struct v3d_bo *bo);
516 int v3d_create_bo_ioctl(struct drm_device *dev, void *data,
517 struct drm_file *file_priv);
518 int v3d_mmap_bo_ioctl(struct drm_device *dev, void *data,
519 struct drm_file *file_priv);
520 int v3d_get_bo_offset_ioctl(struct drm_device *dev, void *data,
521 struct drm_file *file_priv);
522 int v3d_wait_bo_ioctl(struct drm_device *dev, void *data,
523 struct drm_file *file_priv);
524 struct drm_gem_object *v3d_prime_import_sg_table(struct drm_device *dev,
525 struct dma_buf_attachment *attach,
526 struct sg_table *sgt);
527
528 /* v3d_debugfs.c */
529 void v3d_debugfs_init(struct drm_minor *minor);
530
531 /* v3d_drv.c */
532 void v3d_get_stats(const struct v3d_stats *stats, u64 timestamp,
533 u64 *active_runtime, u64 *jobs_completed);
534
535 /* v3d_fence.c */
536 extern const struct dma_fence_ops v3d_fence_ops;
537 struct dma_fence *v3d_fence_create(struct v3d_dev *v3d, enum v3d_queue queue);
538
539 /* v3d_gem.c */
540 int v3d_gem_init(struct drm_device *dev);
541 void v3d_gem_destroy(struct drm_device *dev);
542 void v3d_reset(struct v3d_dev *v3d);
543 void v3d_invalidate_caches(struct v3d_dev *v3d);
544 void v3d_clean_caches(struct v3d_dev *v3d);
545
546 /* v3d_gemfs.c */
547 extern bool super_pages;
548 void v3d_gemfs_init(struct v3d_dev *v3d);
549 void v3d_gemfs_fini(struct v3d_dev *v3d);
550
551 /* v3d_submit.c */
552 void v3d_job_cleanup(struct v3d_job *job);
553 void v3d_job_put(struct v3d_job *job);
554 int v3d_submit_cl_ioctl(struct drm_device *dev, void *data,
555 struct drm_file *file_priv);
556 int v3d_submit_tfu_ioctl(struct drm_device *dev, void *data,
557 struct drm_file *file_priv);
558 int v3d_submit_csd_ioctl(struct drm_device *dev, void *data,
559 struct drm_file *file_priv);
560 int v3d_submit_cpu_ioctl(struct drm_device *dev, void *data,
561 struct drm_file *file_priv);
562
563 /* v3d_irq.c */
564 int v3d_irq_init(struct v3d_dev *v3d);
565 void v3d_irq_enable(struct v3d_dev *v3d);
566 void v3d_irq_disable(struct v3d_dev *v3d);
567 void v3d_irq_reset(struct v3d_dev *v3d);
568
569 /* v3d_mmu.c */
570 int v3d_mmu_flush_all(struct v3d_dev *v3d);
571 int v3d_mmu_set_page_table(struct v3d_dev *v3d);
572 void v3d_mmu_insert_ptes(struct v3d_bo *bo);
573 void v3d_mmu_remove_ptes(struct v3d_bo *bo);
574
575 /* v3d_sched.c */
576 void v3d_timestamp_query_info_free(struct v3d_timestamp_query_info *query_info,
577 unsigned int count);
578 void v3d_performance_query_info_free(struct v3d_performance_query_info *query_info,
579 unsigned int count);
580 void v3d_job_update_stats(struct v3d_job *job, enum v3d_queue queue);
581 int v3d_sched_init(struct v3d_dev *v3d);
582 void v3d_sched_fini(struct v3d_dev *v3d);
583
584 /* v3d_perfmon.c */
585 void v3d_perfmon_init(struct v3d_dev *v3d);
586 void v3d_perfmon_get(struct v3d_perfmon *perfmon);
587 void v3d_perfmon_put(struct v3d_perfmon *perfmon);
588 void v3d_perfmon_start(struct v3d_dev *v3d, struct v3d_perfmon *perfmon);
589 void v3d_perfmon_stop(struct v3d_dev *v3d, struct v3d_perfmon *perfmon,
590 bool capture);
591 struct v3d_perfmon *v3d_perfmon_find(struct v3d_file_priv *v3d_priv, int id);
592 void v3d_perfmon_open_file(struct v3d_file_priv *v3d_priv);
593 void v3d_perfmon_close_file(struct v3d_file_priv *v3d_priv);
594 int v3d_perfmon_create_ioctl(struct drm_device *dev, void *data,
595 struct drm_file *file_priv);
596 int v3d_perfmon_destroy_ioctl(struct drm_device *dev, void *data,
597 struct drm_file *file_priv);
598 int v3d_perfmon_get_values_ioctl(struct drm_device *dev, void *data,
599 struct drm_file *file_priv);
600 int v3d_perfmon_get_counter_ioctl(struct drm_device *dev, void *data,
601 struct drm_file *file_priv);
602 int v3d_perfmon_set_global_ioctl(struct drm_device *dev, void *data,
603 struct drm_file *file_priv);
604
605 /* v3d_sysfs.c */
606 int v3d_sysfs_init(struct device *dev);
607 void v3d_sysfs_destroy(struct device *dev);
608