1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __BCMASP_H 3 #define __BCMASP_H 4 5 #include <linux/netdevice.h> 6 #include <linux/phy.h> 7 #include <linux/io-64-nonatomic-hi-lo.h> 8 #include <uapi/linux/ethtool.h> 9 #include <net/page_pool/helpers.h> 10 11 #define ASP_INTR2_OFFSET 0x1000 12 #define ASP_INTR2_STATUS 0x0 13 #define ASP_INTR2_SET 0x4 14 #define ASP_INTR2_CLEAR 0x8 15 #define ASP_INTR2_MASK_STATUS 0xc 16 #define ASP_INTR2_MASK_SET 0x10 17 #define ASP_INTR2_MASK_CLEAR 0x14 18 19 #define ASP_INTR2_RX_ECH(intr) BIT(intr) 20 #define ASP_INTR2_TX_DESC(intr) BIT((intr) + 14) 21 #define ASP_INTR2_UMC0_WAKE BIT(22) 22 #define ASP_INTR2_UMC1_WAKE BIT(28) 23 #define ASP_INTR2_PHY_EVENT(intr) ((intr) ? BIT(30) | BIT(31) : \ 24 BIT(24) | BIT(25)) 25 26 #define ASP_WAKEUP_INTR2_OFFSET 0x1200 27 #define ASP_WAKEUP_INTR2_STATUS 0x0 28 #define ASP_WAKEUP_INTR2_SET 0x4 29 #define ASP_WAKEUP_INTR2_CLEAR 0x8 30 #define ASP_WAKEUP_INTR2_MASK_STATUS 0xc 31 #define ASP_WAKEUP_INTR2_MASK_SET 0x10 32 #define ASP_WAKEUP_INTR2_MASK_CLEAR 0x14 33 #define ASP_WAKEUP_INTR2_MPD_0 BIT(0) 34 #define ASP_WAKEUP_INTR2_MPD_1 BIT(1) 35 #define ASP_WAKEUP_INTR2_FILT_0 BIT(2) 36 #define ASP_WAKEUP_INTR2_FILT_1 BIT(3) 37 #define ASP_WAKEUP_INTR2_FW BIT(4) 38 39 #define ASP_CTRL2_OFFSET 0x2000 40 #define ASP_CTRL2_CORE_CLOCK_SELECT 0x0 41 #define ASP_CTRL2_CORE_CLOCK_SELECT_MAIN BIT(0) 42 #define ASP_CTRL2_CPU_CLOCK_SELECT 0x4 43 #define ASP_CTRL2_CPU_CLOCK_SELECT_MAIN BIT(0) 44 45 #define ASP_TX_ANALYTICS_OFFSET 0x4c000 46 #define ASP_TX_ANALYTICS_CTRL 0x0 47 48 #define ASP_RX_ANALYTICS_OFFSET 0x98000 49 #define ASP_RX_ANALYTICS_CTRL 0x0 50 51 #define ASP_RX_CTRL_OFFSET 0x9f000 52 #define ASP_RX_CTRL_UMAC_0_FRAME_COUNT 0x8 53 #define ASP_RX_CTRL_UMAC_1_FRAME_COUNT 0xc 54 #define ASP_RX_CTRL_FB_0_FRAME_COUNT 0x14 55 #define ASP_RX_CTRL_FB_1_FRAME_COUNT 0x18 56 #define ASP_RX_CTRL_FB_8_FRAME_COUNT 0x1c 57 #define ASP_RX_CTRL_FB_9_FRAME_COUNT 0x20 58 #define ASP_RX_CTRL_FB_10_FRAME_COUNT 0x24 59 #define ASP_RX_CTRL_FB_OUT_FRAME_COUNT 0x28 60 #define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT 0x2c 61 #define ASP_RX_CTRL_FLUSH 0x30 62 #define ASP_CTRL_UMAC0_FLUSH_MASK (BIT(0) | BIT(12)) 63 #define ASP_CTRL_UMAC1_FLUSH_MASK (BIT(1) | BIT(13)) 64 #define ASP_CTRL_SPB_FLUSH_MASK (BIT(8) | BIT(20)) 65 #define ASP_RX_CTRL_FB_RX_FIFO_DEPTH 0x38 66 67 #define ASP_RX_FILTER_OFFSET 0x80000 68 #define ASP_RX_FILTER_BLK_CTRL 0x0 69 #define ASP_RX_FILTER_OPUT_EN BIT(0) 70 #define ASP_RX_FILTER_MDA_EN BIT(1) 71 #define ASP_RX_FILTER_LNR_MD BIT(2) 72 #define ASP_RX_FILTER_GEN_WK_EN BIT(3) 73 #define ASP_RX_FILTER_GEN_WK_CLR BIT(4) 74 #define ASP_RX_FILTER_NT_FLT_EN BIT(5) 75 #define ASP_RX_FILTER_MDA_CFG(sel) (((sel) * 0x14) + 0x100) 76 #define ASP_RX_FILTER_MDA_CFG_EN_SHIFT 8 77 #define ASP_RX_FILTER_MDA_CFG_UMC_SEL(sel) ((sel) > 1 ? BIT(17) : \ 78 BIT((sel) + 9)) 79 #define ASP_RX_FILTER_MDA_PAT_H(sel) (((sel) * 0x14) + 0x104) 80 #define ASP_RX_FILTER_MDA_PAT_L(sel) (((sel) * 0x14) + 0x108) 81 #define ASP_RX_FILTER_MDA_MSK_H(sel) (((sel) * 0x14) + 0x10c) 82 #define ASP_RX_FILTER_MDA_MSK_L(sel) (((sel) * 0x14) + 0x110) 83 #define ASP_RX_FILTER_MDA_CFG(sel) (((sel) * 0x14) + 0x100) 84 #define ASP_RX_FILTER_MDA_PAT_H(sel) (((sel) * 0x14) + 0x104) 85 #define ASP_RX_FILTER_MDA_PAT_L(sel) (((sel) * 0x14) + 0x108) 86 #define ASP_RX_FILTER_MDA_MSK_H(sel) (((sel) * 0x14) + 0x10c) 87 #define ASP_RX_FILTER_MDA_MSK_L(sel) (((sel) * 0x14) + 0x110) 88 #define ASP_RX_FILTER_NET_CFG(sel) (((sel) * 0xa04) + 0x400) 89 #define ASP_RX_FILTER_NET_CFG_CH(sel) ((sel) << 0) 90 #define ASP_RX_FILTER_NET_CFG_EN BIT(9) 91 #define ASP_RX_FILTER_NET_CFG_L2_EN BIT(10) 92 #define ASP_RX_FILTER_NET_CFG_L3_EN BIT(11) 93 #define ASP_RX_FILTER_NET_CFG_L4_EN BIT(12) 94 #define ASP_RX_FILTER_NET_CFG_L3_FRM(sel) ((sel) << 13) 95 #define ASP_RX_FILTER_NET_CFG_L4_FRM(sel) ((sel) << 15) 96 #define ASP_RX_FILTER_NET_CFG_UMC(sel) BIT((sel) + 19) 97 #define ASP_RX_FILTER_NET_CFG_DMA_EN BIT(27) 98 99 #define ASP_RX_FILTER_NET_OFFSET_MAX 32 100 #define ASP_RX_FILTER_NET_PAT(sel, block, off) \ 101 (((sel) * 0xa04) + ((block) * 0x200) + (off) + 0x600) 102 #define ASP_RX_FILTER_NET_MASK(sel, block, off) \ 103 (((sel) * 0xa04) + ((block) * 0x200) + (off) + 0x700) 104 105 #define ASP_RX_FILTER_NET_OFFSET(sel) (((sel) * 0xa04) + 0xe00) 106 #define ASP_RX_FILTER_NET_OFFSET_L2(val) ((val) << 0) 107 #define ASP_RX_FILTER_NET_OFFSET_L3_0(val) ((val) << 8) 108 #define ASP_RX_FILTER_NET_OFFSET_L3_1(val) ((val) << 16) 109 #define ASP_RX_FILTER_NET_OFFSET_L4(val) ((val) << 24) 110 111 enum asp_rx_net_filter_block { 112 ASP_RX_FILTER_NET_L2 = 0, 113 ASP_RX_FILTER_NET_L3_0, 114 ASP_RX_FILTER_NET_L3_1, 115 ASP_RX_FILTER_NET_L4, 116 ASP_RX_FILTER_NET_BLOCK_MAX 117 }; 118 119 #define ASP_EDPKT_OFFSET 0x9c000 120 #define ASP_EDPKT_ENABLE 0x4 121 #define ASP_EDPKT_ENABLE_EN BIT(0) 122 #define ASP_EDPKT_HDR_CFG 0xc 123 #define ASP_EDPKT_HDR_SZ_SHIFT 2 124 #define ASP_EDPKT_HDR_SZ_32 0 125 #define ASP_EDPKT_HDR_SZ_64 1 126 #define ASP_EDPKT_HDR_SZ_96 2 127 #define ASP_EDPKT_HDR_SZ_128 3 128 #define ASP_EDPKT_BURST_BUF_PSCAL_TOUT 0x10 129 #define ASP_EDPKT_BURST_BUF_WRITE_TOUT 0x14 130 #define ASP_EDPKT_BURST_BUF_READ_TOUT 0x18 131 #define ASP_EDPKT_RX_TS_COUNTER 0x38 132 #define ASP_EDPKT_ENDI 0x48 133 #define ASP_EDPKT_ENDI_DESC_SHIFT 8 134 #define ASP_EDPKT_ENDI_NO_BT_SWP 0 135 #define ASP_EDPKT_ENDI_BT_SWP_WD 1 136 #define ASP_EDPKT_RX_PKT_CNT 0x138 137 #define ASP_EDPKT_HDR_EXTR_CNT 0x13c 138 #define ASP_EDPKT_HDR_OUT_CNT 0x140 139 #define ASP_EDPKT_SPARE_REG 0x174 140 #define ASP_EDPKT_SPARE_REG_EPHY_LPI BIT(4) 141 #define ASP_EDPKT_SPARE_REG_GPHY_LPI BIT(3) 142 143 #define ASP_CTRL_OFFSET 0x101000 144 #define ASP_CTRL_ASP_SW_INIT 0x04 145 #define ASP_CTRL_ASP_SW_INIT_ACPUSS_CORE BIT(0) 146 #define ASP_CTRL_ASP_SW_INIT_ASP_TX BIT(1) 147 #define ASP_CTRL_ASP_SW_INIT_AS_RX BIT(2) 148 #define ASP_CTRL_ASP_SW_INIT_ASP_RGMII_UMAC0 BIT(3) 149 #define ASP_CTRL_ASP_SW_INIT_ASP_RGMII_UMAC1 BIT(4) 150 #define ASP_CTRL_ASP_SW_INIT_ASP_XMEMIF BIT(5) 151 #define ASP_CTRL_CLOCK_CTRL 0x04 152 #define ASP_CTRL_CLOCK_CTRL_ASP_TX_DISABLE BIT(0) 153 #define ASP_CTRL_CLOCK_CTRL_ASP_RX_DISABLE BIT(1) 154 #define ASP_CTRL_CLOCK_CTRL_ASP_RGMII_SHIFT 2 155 #define ASP_CTRL_CLOCK_CTRL_ASP_RGMII_MASK (0x7 << ASP_CTRL_CLOCK_CTRL_ASP_RGMII_SHIFT) 156 #define ASP_CTRL_CLOCK_CTRL_ASP_RGMII_DIS(x) BIT(ASP_CTRL_CLOCK_CTRL_ASP_RGMII_SHIFT + (x)) 157 #define ASP_CTRL_CLOCK_CTRL_ASP_ALL_DISABLE GENMASK(4, 0) 158 #define ASP_CTRL_CORE_CLOCK_SELECT 0x08 159 #define ASP_CTRL_CORE_CLOCK_SELECT_MAIN BIT(0) 160 #define ASP_CTRL_SCRATCH_0 0x0c 161 162 struct bcmasp_tx_cb { 163 struct sk_buff *skb; 164 unsigned int bytes_sent; 165 bool last; 166 167 DEFINE_DMA_UNMAP_ADDR(dma_addr); 168 DEFINE_DMA_UNMAP_LEN(dma_len); 169 }; 170 171 struct bcmasp_res { 172 /* Per interface resources */ 173 /* Port */ 174 void __iomem *umac; 175 void __iomem *umac2fb; 176 void __iomem *rgmii; 177 178 /* TX slowpath/configuration */ 179 void __iomem *tx_spb_ctrl; 180 void __iomem *tx_spb_top; 181 void __iomem *tx_epkt_core; 182 void __iomem *tx_pause_ctrl; 183 }; 184 185 #define DESC_ADDR(x) ((x) & GENMASK_ULL(39, 0)) 186 #define DESC_FLAGS(x) ((x) & GENMASK_ULL(63, 40)) 187 188 struct bcmasp_desc { 189 u64 buf; 190 #define DESC_CHKSUM BIT_ULL(40) 191 #define DESC_CRC_ERR BIT_ULL(41) 192 #define DESC_RX_SYM_ERR BIT_ULL(42) 193 #define DESC_NO_OCT_ALN BIT_ULL(43) 194 #define DESC_PKT_TRUC BIT_ULL(44) 195 /* 39:0 (TX/RX) bits 0-39 of buf addr 196 * 40 (RX) checksum 197 * 41 (RX) crc_error 198 * 42 (RX) rx_symbol_error 199 * 43 (RX) non_octet_aligned 200 * 44 (RX) pkt_truncated 201 * 45 Reserved 202 * 56:46 (RX) mac_filter_id 203 * 60:57 (RX) rx_port_num (0-unicmac0, 1-unimac1) 204 * 61 Reserved 205 * 63:62 (TX) forward CRC, overwrite CRC 206 */ 207 u32 size; 208 u32 flags; 209 #define DESC_INT_EN BIT(0) 210 #define DESC_SOF BIT(1) 211 #define DESC_EOF BIT(2) 212 #define DESC_EPKT_CMD BIT(3) 213 #define DESC_SCRAM_ST BIT(8) 214 #define DESC_SCRAM_END BIT(9) 215 #define DESC_PCPP BIT(10) 216 #define DESC_PPPP BIT(11) 217 /* 0 (TX) tx_int_en 218 * 1 (TX/RX) SOF 219 * 2 (TX/RX) EOF 220 * 3 (TX) epkt_command 221 * 6:4 (TX) PA 222 * 7 (TX) pause at desc end 223 * 8 (TX) scram_start 224 * 9 (TX) scram_end 225 * 10 (TX) PCPP 226 * 11 (TX) PPPP 227 * 14:12 Reserved 228 * 15 (TX) pid ch Valid 229 * 19:16 (TX) data_pkt_type 230 * 32:20 (TX) pid_channel (RX) nw_filter_id 231 */ 232 }; 233 234 struct bcmasp_intf; 235 236 struct bcmasp_intf_stats64 { 237 /* Rx Stats */ 238 u64_stats_t rx_packets; 239 u64_stats_t rx_bytes; 240 u64_stats_t rx_errors; 241 u64_stats_t rx_dropped; 242 u64_stats_t rx_crc_errs; 243 u64_stats_t rx_sym_errs; 244 245 /* Tx Stats*/ 246 u64_stats_t tx_packets; 247 u64_stats_t tx_bytes; 248 249 struct u64_stats_sync syncp; 250 }; 251 252 struct bcmasp_mib_counters { 253 u32 edpkt_ts; 254 u32 edpkt_rx_pkt_cnt; 255 u32 edpkt_hdr_ext_cnt; 256 u32 edpkt_hdr_out_cnt; 257 u32 umac_frm_cnt; 258 u32 fb_frm_cnt; 259 u32 fb_rx_fifo_depth; 260 u32 fb_out_frm_cnt; 261 u32 fb_filt_out_frm_cnt; 262 u32 alloc_rx_skb_failed; 263 u32 tx_dma_failed; 264 u32 mc_filters_full_cnt; 265 u32 uc_filters_full_cnt; 266 u32 filters_combine_cnt; 267 u32 promisc_filters_cnt; 268 u32 tx_realloc_offload_failed; 269 u32 tx_timeout_cnt; 270 }; 271 272 273 struct bcmasp_priv; 274 275 struct bcmasp_intf { 276 struct list_head list; 277 struct net_device *ndev; 278 struct bcmasp_priv *parent; 279 280 /* ASP Ch */ 281 int channel; 282 int port; 283 284 /* Used for splitting shared resources */ 285 int index; 286 287 struct napi_struct tx_napi; 288 /* TX ring, starts on a new cacheline boundary */ 289 void __iomem *tx_spb_dma; 290 int tx_spb_index; 291 int tx_spb_clean_index; 292 struct bcmasp_desc *tx_spb_cpu; 293 dma_addr_t tx_spb_dma_addr; 294 dma_addr_t tx_spb_dma_valid; 295 dma_addr_t tx_spb_dma_read; 296 struct bcmasp_tx_cb *tx_cbs; 297 298 /* RX ring, starts on a new cacheline boundary */ 299 void __iomem *rx_edpkt_cfg; 300 void __iomem *rx_edpkt_dma; 301 int rx_edpkt_index; 302 struct bcmasp_desc *rx_edpkt_cpu; 303 dma_addr_t rx_edpkt_dma_addr; 304 dma_addr_t rx_edpkt_dma_read; 305 dma_addr_t rx_edpkt_dma_valid; 306 307 /* Streaming RX data ring (RBUF_4K mode) */ 308 void *rx_ring_cpu; 309 dma_addr_t rx_ring_dma; 310 dma_addr_t rx_ring_dma_valid; 311 int rx_buf_order; 312 313 /* Page pool for recycling RX SKB data pages */ 314 struct page_pool *rx_page_pool; 315 struct napi_struct rx_napi; 316 317 struct bcmasp_res res; 318 unsigned int crc_fwd; 319 320 /* PHY device */ 321 struct device_node *phy_dn; 322 struct device_node *ndev_dn; 323 phy_interface_t phy_interface; 324 bool internal_phy; 325 int old_pause; 326 int old_link; 327 int old_duplex; 328 329 u32 msg_enable; 330 331 /* Statistics */ 332 struct bcmasp_intf_stats64 stats64; 333 struct bcmasp_mib_counters mib; 334 335 u32 wolopts; 336 u8 sopass[SOPASS_MAX]; 337 }; 338 339 #define NUM_NET_FILTERS 32 340 struct bcmasp_net_filter { 341 struct ethtool_rx_flow_spec fs; 342 343 bool claimed; 344 bool wake_filter; 345 346 int port; 347 int ch; 348 unsigned int hw_index; 349 }; 350 351 #define NUM_MDA_FILTERS 32 352 struct bcmasp_mda_filter { 353 /* Current owner of this filter */ 354 int port; 355 bool en; 356 u8 addr[ETH_ALEN]; 357 u8 mask[ETH_ALEN]; 358 }; 359 360 struct bcmasp_plat_data { 361 void (*core_clock_select)(struct bcmasp_priv *priv, bool slow); 362 void (*eee_fixup)(struct bcmasp_intf *priv, bool en); 363 unsigned int num_mda_filters; 364 unsigned int num_net_filters; 365 unsigned int tx_chan_offset; 366 unsigned int rx_ctrl_offset; 367 }; 368 369 struct bcmasp_priv { 370 struct platform_device *pdev; 371 struct clk *clk; 372 373 int irq; 374 u32 irq_mask; 375 376 /* Used if shared wol irq */ 377 struct mutex wol_lock; 378 int wol_irq; 379 unsigned long wol_irq_enabled_mask; 380 381 void (*core_clock_select)(struct bcmasp_priv *priv, bool slow); 382 void (*eee_fixup)(struct bcmasp_intf *intf, bool en); 383 unsigned int num_mda_filters; 384 unsigned int num_net_filters; 385 unsigned int tx_chan_offset; 386 unsigned int rx_ctrl_offset; 387 388 void __iomem *base; 389 390 struct list_head intfs; 391 392 struct bcmasp_mda_filter *mda_filters; 393 394 /* MAC destination address filters lock */ 395 spinlock_t mda_lock; 396 397 /* Protects accesses to ASP_CTRL_CLOCK_CTRL */ 398 spinlock_t clk_lock; 399 400 struct bcmasp_net_filter *net_filters; 401 402 /* Network filter lock */ 403 struct mutex net_lock; 404 }; 405 406 #define __BCMASP_IO_MACRO(name, m) \ 407 static inline u32 name##_rl(struct bcmasp_intf *intf, u32 off) \ 408 { \ 409 u32 reg = readl_relaxed(intf->m + off); \ 410 return reg; \ 411 } \ 412 static inline void name##_wl(struct bcmasp_intf *intf, u32 val, u32 off)\ 413 { \ 414 writel_relaxed(val, intf->m + off); \ 415 } 416 417 #define BCMASP_IO_MACRO(name) __BCMASP_IO_MACRO(name, res.name) 418 #define BCMASP_FP_IO_MACRO(name) __BCMASP_IO_MACRO(name, name) 419 420 BCMASP_IO_MACRO(umac); 421 BCMASP_IO_MACRO(umac2fb); 422 BCMASP_IO_MACRO(rgmii); 423 BCMASP_FP_IO_MACRO(tx_spb_dma); 424 BCMASP_IO_MACRO(tx_spb_ctrl); 425 BCMASP_IO_MACRO(tx_spb_top); 426 BCMASP_IO_MACRO(tx_epkt_core); 427 BCMASP_IO_MACRO(tx_pause_ctrl); 428 BCMASP_FP_IO_MACRO(rx_edpkt_dma); 429 BCMASP_FP_IO_MACRO(rx_edpkt_cfg); 430 431 #define __BCMASP_FP_IO_MACRO_Q(name, m) \ 432 static inline u64 name##_rq(struct bcmasp_intf *intf, u32 off) \ 433 { \ 434 u64 reg = readq_relaxed(intf->m + off); \ 435 return reg; \ 436 } \ 437 static inline void name##_wq(struct bcmasp_intf *intf, u64 val, u32 off)\ 438 { \ 439 writeq_relaxed(val, intf->m + off); \ 440 } 441 442 #define BCMASP_FP_IO_MACRO_Q(name) __BCMASP_FP_IO_MACRO_Q(name, name) 443 444 BCMASP_FP_IO_MACRO_Q(tx_spb_dma); 445 BCMASP_FP_IO_MACRO_Q(rx_edpkt_dma); 446 BCMASP_FP_IO_MACRO_Q(rx_edpkt_cfg); 447 448 #define PKT_OFFLOAD_NOP (0 << 28) 449 #define PKT_OFFLOAD_HDR_OP (1 << 28) 450 #define PKT_OFFLOAD_HDR_WRBACK BIT(19) 451 #define PKT_OFFLOAD_HDR_COUNT(x) ((x) << 16) 452 #define PKT_OFFLOAD_HDR_SIZE_1(x) ((x) << 4) 453 #define PKT_OFFLOAD_HDR_SIZE_2(x) (x) 454 #define PKT_OFFLOAD_HDR2_SIZE_2(x) ((x) << 24) 455 #define PKT_OFFLOAD_HDR2_SIZE_3(x) ((x) << 12) 456 #define PKT_OFFLOAD_HDR2_SIZE_4(x) (x) 457 #define PKT_OFFLOAD_EPKT_OP (2 << 28) 458 #define PKT_OFFLOAD_EPKT_WRBACK BIT(23) 459 #define PKT_OFFLOAD_EPKT_IP(x) ((x) << 21) 460 #define PKT_OFFLOAD_EPKT_TP(x) ((x) << 19) 461 #define PKT_OFFLOAD_EPKT_LEN(x) ((x) << 16) 462 #define PKT_OFFLOAD_EPKT_CSUM_L4 BIT(15) 463 #define PKT_OFFLOAD_EPKT_CSUM_L3 BIT(14) 464 #define PKT_OFFLOAD_EPKT_ID(x) ((x) << 12) 465 #define PKT_OFFLOAD_EPKT_SEQ(x) ((x) << 10) 466 #define PKT_OFFLOAD_EPKT_TS(x) ((x) << 8) 467 #define PKT_OFFLOAD_EPKT_BLOC(x) (x) 468 #define PKT_OFFLOAD_END_OP (7 << 28) 469 470 struct bcmasp_pkt_offload { 471 __be32 nop; 472 __be32 header; 473 __be32 header2; 474 __be32 epkt; 475 __be32 end; 476 }; 477 478 #define BCMASP_CORE_IO_MACRO(name, offset) \ 479 static inline u32 name##_core_rl(struct bcmasp_priv *priv, \ 480 u32 off) \ 481 { \ 482 u32 reg = readl_relaxed(priv->base + (offset) + off); \ 483 return reg; \ 484 } \ 485 static inline void name##_core_wl(struct bcmasp_priv *priv, \ 486 u32 val, u32 off) \ 487 { \ 488 writel_relaxed(val, priv->base + (offset) + off); \ 489 } 490 491 BCMASP_CORE_IO_MACRO(intr2, ASP_INTR2_OFFSET); 492 BCMASP_CORE_IO_MACRO(wakeup_intr2, ASP_WAKEUP_INTR2_OFFSET); 493 BCMASP_CORE_IO_MACRO(tx_analytics, ASP_TX_ANALYTICS_OFFSET); 494 BCMASP_CORE_IO_MACRO(rx_analytics, ASP_RX_ANALYTICS_OFFSET); 495 BCMASP_CORE_IO_MACRO(rx_filter, ASP_RX_FILTER_OFFSET); 496 BCMASP_CORE_IO_MACRO(rx_edpkt, ASP_EDPKT_OFFSET); 497 BCMASP_CORE_IO_MACRO(ctrl, ASP_CTRL_OFFSET); 498 BCMASP_CORE_IO_MACRO(ctrl2, ASP_CTRL2_OFFSET); 499 500 #define BCMASP_CORE_IO_MACRO_OFFSET(name, offset) \ 501 static inline u32 name##_core_rl(struct bcmasp_priv *priv, \ 502 u32 off) \ 503 { \ 504 u32 reg = readl_relaxed(priv->base + priv->name##_offset + \ 505 (offset) + off); \ 506 return reg; \ 507 } \ 508 static inline void name##_core_wl(struct bcmasp_priv *priv, \ 509 u32 val, u32 off) \ 510 { \ 511 writel_relaxed(val, priv->base + priv->name##_offset + \ 512 (offset) + off); \ 513 } 514 BCMASP_CORE_IO_MACRO_OFFSET(rx_ctrl, ASP_RX_CTRL_OFFSET); 515 516 struct bcmasp_intf *bcmasp_interface_create(struct bcmasp_priv *priv, 517 struct device_node *ndev_dn, int i); 518 519 void bcmasp_interface_destroy(struct bcmasp_intf *intf); 520 521 void bcmasp_enable_tx_irq(struct bcmasp_intf *intf, int en); 522 523 void bcmasp_enable_rx_irq(struct bcmasp_intf *intf, int en); 524 525 void bcmasp_enable_phy_irq(struct bcmasp_intf *intf, int en); 526 527 void bcmasp_flush_rx_port(struct bcmasp_intf *intf); 528 529 extern const struct ethtool_ops bcmasp_ethtool_ops; 530 531 int bcmasp_interface_suspend(struct bcmasp_intf *intf); 532 533 int bcmasp_interface_resume(struct bcmasp_intf *intf); 534 535 void bcmasp_set_promisc(struct bcmasp_intf *intf, bool en); 536 537 void bcmasp_set_allmulti(struct bcmasp_intf *intf, bool en); 538 539 void bcmasp_set_broad(struct bcmasp_intf *intf, bool en); 540 541 void bcmasp_set_oaddr(struct bcmasp_intf *intf, const unsigned char *addr, 542 bool en); 543 544 int bcmasp_set_en_mda_filter(struct bcmasp_intf *intf, unsigned char *addr, 545 unsigned char *mask); 546 547 void bcmasp_disable_all_filters(struct bcmasp_intf *intf); 548 549 void bcmasp_core_clock_set_intf(struct bcmasp_intf *intf, bool en); 550 551 struct bcmasp_net_filter *bcmasp_netfilt_get_init(struct bcmasp_intf *intf, 552 u32 loc, bool wake_filter, 553 bool init); 554 555 bool bcmasp_netfilt_check_dup(struct bcmasp_intf *intf, 556 struct ethtool_rx_flow_spec *fs); 557 558 void bcmasp_netfilt_release(struct bcmasp_intf *intf, 559 struct bcmasp_net_filter *nfilt); 560 561 int bcmasp_netfilt_get_active(struct bcmasp_intf *intf); 562 563 int bcmasp_netfilt_get_all_active(struct bcmasp_intf *intf, u32 *rule_locs, 564 u32 *rule_cnt); 565 566 void bcmasp_netfilt_suspend(struct bcmasp_intf *intf); 567 568 void bcmasp_enable_wol(struct bcmasp_intf *intf, bool en); 569 #endif 570