xref: /qemu/target/riscv/th_csr.c (revision f0737158b483e7ec2b2512145aeab888b85cc1f7)
1 /*
2  * T-Head-specific CSRs.
3  *
4  * Copyright (c) 2024 VRULL GmbH
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2 or later, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18 
19 #include "qemu/osdep.h"
20 #include "cpu.h"
21 #include "cpu_vendorid.h"
22 
23 #define CSR_TH_SXSTATUS 0x5c0
24 
25 /* TH_SXSTATUS bits */
26 #define TH_SXSTATUS_UCME        BIT(16)
27 #define TH_SXSTATUS_MAEE        BIT(21)
28 #define TH_SXSTATUS_THEADISAEE  BIT(22)
29 
smode(CPURISCVState * env,int csrno)30 static RISCVException smode(CPURISCVState *env, int csrno)
31 {
32     if (riscv_has_ext(env, RVS)) {
33         return RISCV_EXCP_NONE;
34     }
35 
36     return RISCV_EXCP_ILLEGAL_INST;
37 }
38 
test_thead_mvendorid(RISCVCPU * cpu)39 static bool test_thead_mvendorid(RISCVCPU *cpu)
40 {
41     return cpu->cfg.mvendorid == THEAD_VENDOR_ID;
42 }
43 
read_th_sxstatus(CPURISCVState * env,int csrno,target_ulong * val)44 static RISCVException read_th_sxstatus(CPURISCVState *env, int csrno,
45                                        target_ulong *val)
46 {
47     /* We don't set MAEE here, because QEMU does not implement MAEE. */
48     *val = TH_SXSTATUS_UCME | TH_SXSTATUS_THEADISAEE;
49     return RISCV_EXCP_NONE;
50 }
51 
52 const RISCVCSR th_csr_list[] = {
53     {
54         .csrno = CSR_TH_SXSTATUS,
55         .insertion_test = test_thead_mvendorid,
56         .csr_ops = { "th.sxstatus", smode, read_th_sxstatus }
57     },
58     { }
59 };
60