1 /*
2 * Allwinner sun5i SoCs pinctrl driver.
3 *
4 * Copyright (C) 2014-2016 Maxime Ripard <maxime.ripard@free-electrons.com>
5 * Copyright (C) 2016 Mylene Josserand <mylene.josserand@free-electrons.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/of.h>
15 #include <linux/pinctrl/pinctrl.h>
16
17 #include "pinctrl-sunxi.h"
18
19 #define PINCTRL_SUN5I_A10S BIT(0)
20 #define PINCTRL_SUN5I_A13 BIT(1)
21 #define PINCTRL_SUN5I_GR8 BIT(2)
22
23 static const struct sunxi_desc_pin sun5i_pins[] = {
24 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 0),
25 PINCTRL_SUN5I_A10S,
26 SUNXI_FUNCTION(0x0, "gpio_in"),
27 SUNXI_FUNCTION(0x1, "gpio_out"),
28 SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
29 SUNXI_FUNCTION(0x3, "ts0"), /* CLK */
30 SUNXI_FUNCTION(0x5, "keypad")), /* IN0 */
31 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 1),
32 PINCTRL_SUN5I_A10S,
33 SUNXI_FUNCTION(0x0, "gpio_in"),
34 SUNXI_FUNCTION(0x1, "gpio_out"),
35 SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */
36 SUNXI_FUNCTION(0x3, "ts0"), /* ERR */
37 SUNXI_FUNCTION(0x5, "keypad")), /* IN1 */
38 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 2),
39 PINCTRL_SUN5I_A10S,
40 SUNXI_FUNCTION(0x0, "gpio_in"),
41 SUNXI_FUNCTION(0x1, "gpio_out"),
42 SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */
43 SUNXI_FUNCTION(0x3, "ts0"), /* SYNC */
44 SUNXI_FUNCTION(0x5, "keypad")), /* IN2 */
45 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 3),
46 PINCTRL_SUN5I_A10S,
47 SUNXI_FUNCTION(0x0, "gpio_in"),
48 SUNXI_FUNCTION(0x1, "gpio_out"),
49 SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */
50 SUNXI_FUNCTION(0x3, "ts0"), /* DLVD */
51 SUNXI_FUNCTION(0x5, "keypad")), /* IN3 */
52 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 4),
53 PINCTRL_SUN5I_A10S,
54 SUNXI_FUNCTION(0x0, "gpio_in"),
55 SUNXI_FUNCTION(0x1, "gpio_out"),
56 SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */
57 SUNXI_FUNCTION(0x3, "ts0"), /* D0 */
58 SUNXI_FUNCTION(0x5, "keypad")), /* IN4 */
59 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 5),
60 PINCTRL_SUN5I_A10S,
61 SUNXI_FUNCTION(0x0, "gpio_in"),
62 SUNXI_FUNCTION(0x1, "gpio_out"),
63 SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */
64 SUNXI_FUNCTION(0x3, "ts0"), /* D1 */
65 SUNXI_FUNCTION(0x5, "keypad")), /* IN5 */
66 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 6),
67 PINCTRL_SUN5I_A10S,
68 SUNXI_FUNCTION(0x0, "gpio_in"),
69 SUNXI_FUNCTION(0x1, "gpio_out"),
70 SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */
71 SUNXI_FUNCTION(0x3, "ts0"), /* D2 */
72 SUNXI_FUNCTION(0x5, "keypad")), /* IN6 */
73 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 7),
74 PINCTRL_SUN5I_A10S,
75 SUNXI_FUNCTION(0x0, "gpio_in"),
76 SUNXI_FUNCTION(0x1, "gpio_out"),
77 SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */
78 SUNXI_FUNCTION(0x3, "ts0"), /* D3 */
79 SUNXI_FUNCTION(0x5, "keypad")), /* IN7 */
80 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 8),
81 PINCTRL_SUN5I_A10S,
82 SUNXI_FUNCTION(0x0, "gpio_in"),
83 SUNXI_FUNCTION(0x1, "gpio_out"),
84 SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */
85 SUNXI_FUNCTION(0x3, "ts0"), /* D4 */
86 SUNXI_FUNCTION(0x4, "uart1"), /* DTR */
87 SUNXI_FUNCTION(0x5, "keypad")), /* OUT0 */
88 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 9),
89 PINCTRL_SUN5I_A10S,
90 SUNXI_FUNCTION(0x0, "gpio_in"),
91 SUNXI_FUNCTION(0x1, "gpio_out"),
92 SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */
93 SUNXI_FUNCTION(0x3, "ts0"), /* D5 */
94 SUNXI_FUNCTION(0x4, "uart1"), /* DSR */
95 SUNXI_FUNCTION(0x5, "keypad")), /* OUT1 */
96 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 10),
97 PINCTRL_SUN5I_A10S,
98 SUNXI_FUNCTION(0x0, "gpio_in"),
99 SUNXI_FUNCTION(0x1, "gpio_out"),
100 SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */
101 SUNXI_FUNCTION(0x3, "ts0"), /* D6 */
102 SUNXI_FUNCTION(0x4, "uart1"), /* DCD */
103 SUNXI_FUNCTION(0x5, "keypad")), /* OUT2 */
104 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 11),
105 PINCTRL_SUN5I_A10S,
106 SUNXI_FUNCTION(0x0, "gpio_in"),
107 SUNXI_FUNCTION(0x1, "gpio_out"),
108 SUNXI_FUNCTION(0x2, "emac"), /* EMDC */
109 SUNXI_FUNCTION(0x3, "ts0"), /* D7 */
110 SUNXI_FUNCTION(0x4, "uart1"), /* RING */
111 SUNXI_FUNCTION(0x5, "keypad")), /* OUT3 */
112 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 12),
113 PINCTRL_SUN5I_A10S,
114 SUNXI_FUNCTION(0x0, "gpio_in"),
115 SUNXI_FUNCTION(0x1, "gpio_out"),
116 SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */
117 SUNXI_FUNCTION(0x3, "uart1"), /* TX */
118 SUNXI_FUNCTION(0x5, "keypad")), /* OUT4 */
119 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 13),
120 PINCTRL_SUN5I_A10S,
121 SUNXI_FUNCTION(0x0, "gpio_in"),
122 SUNXI_FUNCTION(0x1, "gpio_out"),
123 SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */
124 SUNXI_FUNCTION(0x3, "uart1"), /* RX */
125 SUNXI_FUNCTION(0x5, "keypad")), /* OUT5 */
126 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 14),
127 PINCTRL_SUN5I_A10S,
128 SUNXI_FUNCTION(0x0, "gpio_in"),
129 SUNXI_FUNCTION(0x1, "gpio_out"),
130 SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */
131 SUNXI_FUNCTION(0x3, "uart1"), /* CTS */
132 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
133 SUNXI_FUNCTION(0x5, "keypad")), /* OUT6 */
134 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 15),
135 PINCTRL_SUN5I_A10S,
136 SUNXI_FUNCTION(0x0, "gpio_in"),
137 SUNXI_FUNCTION(0x1, "gpio_out"),
138 SUNXI_FUNCTION(0x2, "emac"), /* ECRS */
139 SUNXI_FUNCTION(0x3, "uart1"), /* RTS */
140 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
141 SUNXI_FUNCTION(0x5, "keypad")), /* OUT7 */
142 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 16),
143 PINCTRL_SUN5I_A10S,
144 SUNXI_FUNCTION(0x0, "gpio_in"),
145 SUNXI_FUNCTION(0x1, "gpio_out"),
146 SUNXI_FUNCTION(0x2, "emac"), /* ECOL */
147 SUNXI_FUNCTION(0x3, "uart2")), /* TX */
148 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 17),
149 PINCTRL_SUN5I_A10S,
150 SUNXI_FUNCTION(0x0, "gpio_in"),
151 SUNXI_FUNCTION(0x1, "gpio_out"),
152 SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */
153 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
154 SUNXI_FUNCTION_IRQ(0x6, 31)), /* EINT31 */
155 /* Hole */
156 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
157 SUNXI_FUNCTION(0x0, "gpio_in"),
158 SUNXI_FUNCTION(0x1, "gpio_out"),
159 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
160 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
161 SUNXI_FUNCTION(0x0, "gpio_in"),
162 SUNXI_FUNCTION(0x1, "gpio_out"),
163 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
164 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
165 SUNXI_FUNCTION(0x0, "gpio_in"),
166 SUNXI_FUNCTION(0x1, "gpio_out"),
167 SUNXI_FUNCTION(0x2, "pwm"), /* PWM0 */
168 SUNXI_FUNCTION_VARIANT(0x3,
169 "spdif", /* DO */
170 PINCTRL_SUN5I_GR8),
171 SUNXI_FUNCTION_IRQ(0x6, 16)), /* EINT16 */
172 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
173 SUNXI_FUNCTION(0x0, "gpio_in"),
174 SUNXI_FUNCTION(0x1, "gpio_out"),
175 SUNXI_FUNCTION(0x2, "ir0"), /* TX */
176 SUNXI_FUNCTION_IRQ(0x6, 17)), /* EINT17 */
177 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
178 SUNXI_FUNCTION(0x0, "gpio_in"),
179 SUNXI_FUNCTION(0x1, "gpio_out"),
180 SUNXI_FUNCTION(0x2, "ir0"), /* RX */
181 SUNXI_FUNCTION_IRQ(0x6, 18)), /* EINT18 */
182 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 5),
183 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
184 SUNXI_FUNCTION(0x0, "gpio_in"),
185 SUNXI_FUNCTION(0x1, "gpio_out"),
186 SUNXI_FUNCTION(0x2, "i2s"), /* MCLK */
187 SUNXI_FUNCTION_IRQ(0x6, 19)), /* EINT19 */
188 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 6),
189 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
190 SUNXI_FUNCTION(0x0, "gpio_in"),
191 SUNXI_FUNCTION(0x1, "gpio_out"),
192 SUNXI_FUNCTION(0x2, "i2s"), /* BCLK */
193 SUNXI_FUNCTION_IRQ(0x6, 20)), /* EINT20 */
194 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 7),
195 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
196 SUNXI_FUNCTION(0x0, "gpio_in"),
197 SUNXI_FUNCTION(0x1, "gpio_out"),
198 SUNXI_FUNCTION(0x2, "i2s"), /* LRCK */
199 SUNXI_FUNCTION_IRQ(0x6, 21)), /* EINT21 */
200 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 8),
201 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
202 SUNXI_FUNCTION(0x0, "gpio_in"),
203 SUNXI_FUNCTION(0x1, "gpio_out"),
204 SUNXI_FUNCTION(0x2, "i2s"), /* DO */
205 SUNXI_FUNCTION_IRQ(0x6, 22)), /* EINT22 */
206 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 9),
207 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
208 SUNXI_FUNCTION(0x0, "gpio_in"),
209 SUNXI_FUNCTION(0x1, "gpio_out"),
210 SUNXI_FUNCTION(0x2, "i2s"), /* DI */
211 SUNXI_FUNCTION_VARIANT(0x3,
212 "spdif", /* DI */
213 PINCTRL_SUN5I_GR8),
214 SUNXI_FUNCTION_IRQ(0x6, 23)), /* EINT23 */
215 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
216 SUNXI_FUNCTION(0x0, "gpio_in"),
217 SUNXI_FUNCTION(0x1, "gpio_out"),
218 SUNXI_FUNCTION(0x2, "spi2"), /* CS1 */
219 SUNXI_FUNCTION_VARIANT(0x3,
220 "spdif", /* DO */
221 PINCTRL_SUN5I_GR8),
222 SUNXI_FUNCTION_IRQ(0x6, 24)), /* EINT24 */
223 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 11),
224 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
225 SUNXI_FUNCTION(0x0, "gpio_in"),
226 SUNXI_FUNCTION(0x1, "gpio_out"),
227 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
228 SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
229 SUNXI_FUNCTION_IRQ(0x6, 25)), /* EINT25 */
230 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 12),
231 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
232 SUNXI_FUNCTION(0x0, "gpio_in"),
233 SUNXI_FUNCTION(0x1, "gpio_out"),
234 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
235 SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */
236 SUNXI_FUNCTION_IRQ(0x6, 26)), /* EINT26 */
237 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 13),
238 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
239 SUNXI_FUNCTION(0x0, "gpio_in"),
240 SUNXI_FUNCTION(0x1, "gpio_out"),
241 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
242 SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */
243 SUNXI_FUNCTION_IRQ(0x6, 27)), /* EINT27 */
244 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 14),
245 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
246 SUNXI_FUNCTION(0x0, "gpio_in"),
247 SUNXI_FUNCTION(0x1, "gpio_out"),
248 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
249 SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */
250 SUNXI_FUNCTION_IRQ(0x6, 28)), /* EINT28 */
251 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
252 SUNXI_FUNCTION(0x0, "gpio_in"),
253 SUNXI_FUNCTION(0x1, "gpio_out"),
254 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
255 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
256 SUNXI_FUNCTION(0x0, "gpio_in"),
257 SUNXI_FUNCTION(0x1, "gpio_out"),
258 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
259 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
260 SUNXI_FUNCTION(0x0, "gpio_in"),
261 SUNXI_FUNCTION(0x1, "gpio_out"),
262 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
263 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
264 SUNXI_FUNCTION(0x0, "gpio_in"),
265 SUNXI_FUNCTION(0x1, "gpio_out"),
266 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
267 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 19),
268 PINCTRL_SUN5I_A10S,
269 SUNXI_FUNCTION(0x0, "gpio_in"),
270 SUNXI_FUNCTION(0x1, "gpio_out"),
271 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
272 SUNXI_FUNCTION_IRQ(0x6, 29)), /* EINT29 */
273 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 20),
274 PINCTRL_SUN5I_A10S,
275 SUNXI_FUNCTION(0x0, "gpio_in"),
276 SUNXI_FUNCTION(0x1, "gpio_out"),
277 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
278 SUNXI_FUNCTION_IRQ(0x6, 30)), /* EINT30 */
279 /* Hole */
280 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
281 SUNXI_FUNCTION(0x0, "gpio_in"),
282 SUNXI_FUNCTION(0x1, "gpio_out"),
283 SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
284 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
285 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
286 SUNXI_FUNCTION(0x0, "gpio_in"),
287 SUNXI_FUNCTION(0x1, "gpio_out"),
288 SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
289 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
290 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
291 SUNXI_FUNCTION(0x0, "gpio_in"),
292 SUNXI_FUNCTION(0x1, "gpio_out"),
293 SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
294 SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
295 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
296 SUNXI_FUNCTION(0x0, "gpio_in"),
297 SUNXI_FUNCTION(0x1, "gpio_out"),
298 SUNXI_FUNCTION(0x2, "nand0"), /* NCE1 */
299 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
300 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
301 SUNXI_FUNCTION(0x0, "gpio_in"),
302 SUNXI_FUNCTION(0x1, "gpio_out"),
303 SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
304 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
305 SUNXI_FUNCTION(0x0, "gpio_in"),
306 SUNXI_FUNCTION(0x1, "gpio_out"),
307 SUNXI_FUNCTION(0x2, "nand0")), /* NRE */
308 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
309 SUNXI_FUNCTION(0x0, "gpio_in"),
310 SUNXI_FUNCTION(0x1, "gpio_out"),
311 SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
312 SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
313 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
314 SUNXI_FUNCTION(0x0, "gpio_in"),
315 SUNXI_FUNCTION(0x1, "gpio_out"),
316 SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */
317 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
318 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
319 SUNXI_FUNCTION(0x0, "gpio_in"),
320 SUNXI_FUNCTION(0x1, "gpio_out"),
321 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
322 SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
323 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
324 SUNXI_FUNCTION(0x0, "gpio_in"),
325 SUNXI_FUNCTION(0x1, "gpio_out"),
326 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
327 SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
328 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
329 SUNXI_FUNCTION(0x0, "gpio_in"),
330 SUNXI_FUNCTION(0x1, "gpio_out"),
331 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
332 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
333 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
334 SUNXI_FUNCTION(0x0, "gpio_in"),
335 SUNXI_FUNCTION(0x1, "gpio_out"),
336 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
337 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
338 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
339 SUNXI_FUNCTION(0x0, "gpio_in"),
340 SUNXI_FUNCTION(0x1, "gpio_out"),
341 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */
342 SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */
343 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
344 SUNXI_FUNCTION(0x0, "gpio_in"),
345 SUNXI_FUNCTION(0x1, "gpio_out"),
346 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */
347 SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */
348 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
349 SUNXI_FUNCTION(0x0, "gpio_in"),
350 SUNXI_FUNCTION(0x1, "gpio_out"),
351 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */
352 SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
353 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
354 SUNXI_FUNCTION(0x0, "gpio_in"),
355 SUNXI_FUNCTION(0x1, "gpio_out"),
356 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */
357 SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */
358 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 16),
359 PINCTRL_SUN5I_A10S,
360 SUNXI_FUNCTION(0x0, "gpio_in"),
361 SUNXI_FUNCTION(0x1, "gpio_out"),
362 SUNXI_FUNCTION(0x2, "nand0"), /* NWP */
363 SUNXI_FUNCTION(0x4, "uart3")), /* TX */
364 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 17),
365 PINCTRL_SUN5I_A10S,
366 SUNXI_FUNCTION(0x0, "gpio_in"),
367 SUNXI_FUNCTION(0x1, "gpio_out"),
368 SUNXI_FUNCTION(0x2, "nand0"), /* NCE2 */
369 SUNXI_FUNCTION(0x4, "uart3")), /* RX */
370 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 18),
371 PINCTRL_SUN5I_A10S,
372 SUNXI_FUNCTION(0x0, "gpio_in"),
373 SUNXI_FUNCTION(0x1, "gpio_out"),
374 SUNXI_FUNCTION(0x2, "nand0"), /* NCE3 */
375 SUNXI_FUNCTION(0x3, "uart2"), /* TX */
376 SUNXI_FUNCTION(0x4, "uart3")), /* CTS */
377 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
378 SUNXI_FUNCTION(0x0, "gpio_in"),
379 SUNXI_FUNCTION(0x1, "gpio_out"),
380 SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */
381 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
382 SUNXI_FUNCTION(0x4, "uart3")), /* RTS */
383 /* Hole */
384 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 0),
385 PINCTRL_SUN5I_A10S,
386 SUNXI_FUNCTION(0x0, "gpio_in"),
387 SUNXI_FUNCTION(0x1, "gpio_out"),
388 SUNXI_FUNCTION(0x2, "lcd0")), /* D0 */
389 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 1),
390 PINCTRL_SUN5I_A10S,
391 SUNXI_FUNCTION(0x0, "gpio_in"),
392 SUNXI_FUNCTION(0x1, "gpio_out"),
393 SUNXI_FUNCTION(0x2, "lcd0")), /* D1 */
394 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
395 SUNXI_FUNCTION(0x0, "gpio_in"),
396 SUNXI_FUNCTION(0x1, "gpio_out"),
397 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
398 SUNXI_FUNCTION(0x3, "uart2")), /* TX */
399 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
400 SUNXI_FUNCTION(0x0, "gpio_in"),
401 SUNXI_FUNCTION(0x1, "gpio_out"),
402 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
403 SUNXI_FUNCTION(0x3, "uart2")), /* RX */
404 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
405 SUNXI_FUNCTION(0x0, "gpio_in"),
406 SUNXI_FUNCTION(0x1, "gpio_out"),
407 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
408 SUNXI_FUNCTION(0x3, "uart2")), /* CTS */
409 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
410 SUNXI_FUNCTION(0x0, "gpio_in"),
411 SUNXI_FUNCTION(0x1, "gpio_out"),
412 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
413 SUNXI_FUNCTION(0x3, "uart2")), /* RTS */
414 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
415 SUNXI_FUNCTION(0x0, "gpio_in"),
416 SUNXI_FUNCTION(0x1, "gpio_out"),
417 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
418 SUNXI_FUNCTION(0x3, "emac")), /* ECRS */
419 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
420 SUNXI_FUNCTION(0x0, "gpio_in"),
421 SUNXI_FUNCTION(0x1, "gpio_out"),
422 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
423 SUNXI_FUNCTION(0x3, "emac")), /* ECOL */
424 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 8),
425 PINCTRL_SUN5I_A10S,
426 SUNXI_FUNCTION(0x0, "gpio_in"),
427 SUNXI_FUNCTION(0x1, "gpio_out"),
428 SUNXI_FUNCTION(0x2, "lcd0")), /* D8 */
429 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 9),
430 PINCTRL_SUN5I_A10S,
431 SUNXI_FUNCTION(0x0, "gpio_in"),
432 SUNXI_FUNCTION(0x1, "gpio_out"),
433 SUNXI_FUNCTION(0x2, "lcd0")), /* D9 */
434 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
435 SUNXI_FUNCTION(0x0, "gpio_in"),
436 SUNXI_FUNCTION(0x1, "gpio_out"),
437 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
438 SUNXI_FUNCTION(0x3, "emac")), /* ERXD0 */
439 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
440 SUNXI_FUNCTION(0x0, "gpio_in"),
441 SUNXI_FUNCTION(0x1, "gpio_out"),
442 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
443 SUNXI_FUNCTION(0x3, "emac")), /* ERXD1 */
444 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
445 SUNXI_FUNCTION(0x0, "gpio_in"),
446 SUNXI_FUNCTION(0x1, "gpio_out"),
447 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
448 SUNXI_FUNCTION(0x3, "emac")), /* ERXD2 */
449 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
450 SUNXI_FUNCTION(0x0, "gpio_in"),
451 SUNXI_FUNCTION(0x1, "gpio_out"),
452 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
453 SUNXI_FUNCTION(0x3, "emac")), /* ERXD3 */
454 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
455 SUNXI_FUNCTION(0x0, "gpio_in"),
456 SUNXI_FUNCTION(0x1, "gpio_out"),
457 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
458 SUNXI_FUNCTION(0x3, "emac")), /* ERXCK */
459 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
460 SUNXI_FUNCTION(0x0, "gpio_in"),
461 SUNXI_FUNCTION(0x1, "gpio_out"),
462 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
463 SUNXI_FUNCTION(0x3, "emac")), /* ERXERR */
464 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 16),
465 PINCTRL_SUN5I_A10S,
466 SUNXI_FUNCTION(0x0, "gpio_in"),
467 SUNXI_FUNCTION(0x1, "gpio_out"),
468 SUNXI_FUNCTION(0x2, "lcd0")), /* D16 */
469 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 17),
470 PINCTRL_SUN5I_A10S,
471 SUNXI_FUNCTION(0x0, "gpio_in"),
472 SUNXI_FUNCTION(0x1, "gpio_out"),
473 SUNXI_FUNCTION(0x2, "lcd0")), /* D17 */
474 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
475 SUNXI_FUNCTION(0x0, "gpio_in"),
476 SUNXI_FUNCTION(0x1, "gpio_out"),
477 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
478 SUNXI_FUNCTION(0x3, "emac")), /* ERXDV */
479 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
480 SUNXI_FUNCTION(0x0, "gpio_in"),
481 SUNXI_FUNCTION(0x1, "gpio_out"),
482 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
483 SUNXI_FUNCTION(0x3, "emac")), /* ETXD0 */
484 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
485 SUNXI_FUNCTION(0x0, "gpio_in"),
486 SUNXI_FUNCTION(0x1, "gpio_out"),
487 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
488 SUNXI_FUNCTION(0x3, "emac")), /* ETXD1 */
489 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
490 SUNXI_FUNCTION(0x0, "gpio_in"),
491 SUNXI_FUNCTION(0x1, "gpio_out"),
492 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
493 SUNXI_FUNCTION(0x3, "emac")), /* ETXD2 */
494 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
495 SUNXI_FUNCTION(0x0, "gpio_in"),
496 SUNXI_FUNCTION(0x1, "gpio_out"),
497 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
498 SUNXI_FUNCTION(0x3, "emac")), /* ETXD3 */
499 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
500 SUNXI_FUNCTION(0x0, "gpio_in"),
501 SUNXI_FUNCTION(0x1, "gpio_out"),
502 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
503 SUNXI_FUNCTION(0x3, "emac")), /* ETXEN */
504 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
505 SUNXI_FUNCTION(0x0, "gpio_in"),
506 SUNXI_FUNCTION(0x1, "gpio_out"),
507 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
508 SUNXI_FUNCTION(0x3, "emac")), /* ETXCK */
509 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
510 SUNXI_FUNCTION(0x0, "gpio_in"),
511 SUNXI_FUNCTION(0x1, "gpio_out"),
512 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
513 SUNXI_FUNCTION(0x3, "emac")), /* ETXERR */
514 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
515 SUNXI_FUNCTION(0x0, "gpio_in"),
516 SUNXI_FUNCTION(0x1, "gpio_out"),
517 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
518 SUNXI_FUNCTION(0x3, "emac")), /* EMDC */
519 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
520 SUNXI_FUNCTION(0x0, "gpio_in"),
521 SUNXI_FUNCTION(0x1, "gpio_out"),
522 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
523 SUNXI_FUNCTION(0x3, "emac")), /* EMDIO */
524 /* Hole */
525 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
526 SUNXI_FUNCTION(0x0, "gpio_in"),
527 SUNXI_FUNCTION(0x2, "ts0"), /* CLK */
528 SUNXI_FUNCTION(0x3, "csi0"), /* PCK */
529 SUNXI_FUNCTION(0x4, "spi2"), /* CS0 */
530 SUNXI_FUNCTION_IRQ(0x6, 14)), /* EINT14 */
531 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
532 SUNXI_FUNCTION(0x0, "gpio_in"),
533 SUNXI_FUNCTION(0x2, "ts0"), /* ERR */
534 SUNXI_FUNCTION(0x3, "csi0"), /* CK */
535 SUNXI_FUNCTION(0x4, "spi2"), /* CLK */
536 SUNXI_FUNCTION_IRQ(0x6, 15)), /* EINT15 */
537 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
538 SUNXI_FUNCTION(0x0, "gpio_in"),
539 SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */
540 SUNXI_FUNCTION(0x3, "csi0"), /* HSYNC */
541 SUNXI_FUNCTION(0x4, "spi2")), /* MOSI */
542 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
543 SUNXI_FUNCTION(0x0, "gpio_in"),
544 SUNXI_FUNCTION(0x1, "gpio_out"),
545 SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */
546 SUNXI_FUNCTION(0x3, "csi0"), /* VSYNC */
547 SUNXI_FUNCTION(0x4, "spi2")), /* MISO */
548 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
549 SUNXI_FUNCTION(0x0, "gpio_in"),
550 SUNXI_FUNCTION(0x1, "gpio_out"),
551 SUNXI_FUNCTION(0x2, "ts0"), /* D0 */
552 SUNXI_FUNCTION(0x3, "csi0"), /* D0 */
553 SUNXI_FUNCTION(0x4, "mmc2")), /* D0 */
554 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
555 SUNXI_FUNCTION(0x0, "gpio_in"),
556 SUNXI_FUNCTION(0x1, "gpio_out"),
557 SUNXI_FUNCTION(0x2, "ts0"), /* D1 */
558 SUNXI_FUNCTION(0x3, "csi0"), /* D1 */
559 SUNXI_FUNCTION(0x4, "mmc2")), /* D1 */
560 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
561 SUNXI_FUNCTION(0x0, "gpio_in"),
562 SUNXI_FUNCTION(0x1, "gpio_out"),
563 SUNXI_FUNCTION(0x2, "ts0"), /* D2 */
564 SUNXI_FUNCTION(0x3, "csi0"), /* D2 */
565 SUNXI_FUNCTION(0x4, "mmc2")), /* D2 */
566 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
567 SUNXI_FUNCTION(0x0, "gpio_in"),
568 SUNXI_FUNCTION(0x1, "gpio_out"),
569 SUNXI_FUNCTION(0x2, "ts0"), /* D3 */
570 SUNXI_FUNCTION(0x3, "csi0"), /* D3 */
571 SUNXI_FUNCTION(0x4, "mmc2")), /* D3 */
572 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
573 SUNXI_FUNCTION(0x0, "gpio_in"),
574 SUNXI_FUNCTION(0x1, "gpio_out"),
575 SUNXI_FUNCTION(0x2, "ts0"), /* D4 */
576 SUNXI_FUNCTION(0x3, "csi0"), /* D4 */
577 SUNXI_FUNCTION(0x4, "mmc2")), /* CMD */
578 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
579 SUNXI_FUNCTION(0x0, "gpio_in"),
580 SUNXI_FUNCTION(0x1, "gpio_out"),
581 SUNXI_FUNCTION(0x2, "ts0"), /* D5 */
582 SUNXI_FUNCTION(0x3, "csi0"), /* D5 */
583 SUNXI_FUNCTION(0x4, "mmc2")), /* CLK */
584 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
585 SUNXI_FUNCTION(0x0, "gpio_in"),
586 SUNXI_FUNCTION(0x1, "gpio_out"),
587 SUNXI_FUNCTION(0x2, "ts0"), /* D6 */
588 SUNXI_FUNCTION(0x3, "csi0"), /* D6 */
589 SUNXI_FUNCTION(0x4, "uart1")), /* TX */
590 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
591 SUNXI_FUNCTION(0x0, "gpio_in"),
592 SUNXI_FUNCTION(0x1, "gpio_out"),
593 SUNXI_FUNCTION(0x2, "ts0"), /* D7 */
594 SUNXI_FUNCTION(0x3, "csi0"), /* D7 */
595 SUNXI_FUNCTION(0x4, "uart1")), /* RX */
596 /* Hole */
597 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
598 SUNXI_FUNCTION(0x0, "gpio_in"),
599 SUNXI_FUNCTION(0x1, "gpio_out"),
600 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
601 SUNXI_FUNCTION(0x4, "jtag")), /* MS1 */
602 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
603 SUNXI_FUNCTION(0x0, "gpio_in"),
604 SUNXI_FUNCTION(0x1, "gpio_out"),
605 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
606 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
607 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
608 SUNXI_FUNCTION(0x0, "gpio_in"),
609 SUNXI_FUNCTION(0x1, "gpio_out"),
610 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
611 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
612 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
613 SUNXI_FUNCTION(0x0, "gpio_in"),
614 SUNXI_FUNCTION(0x1, "gpio_out"),
615 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
616 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
617 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
618 SUNXI_FUNCTION(0x0, "gpio_in"),
619 SUNXI_FUNCTION(0x1, "gpio_out"),
620 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
621 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
622 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
623 SUNXI_FUNCTION(0x0, "gpio_in"),
624 SUNXI_FUNCTION(0x1, "gpio_out"),
625 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
626 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
627 /* Hole */
628 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
629 SUNXI_FUNCTION(0x0, "gpio_in"),
630 SUNXI_FUNCTION(0x2, "gps"), /* CLK */
631 SUNXI_FUNCTION_IRQ(0x6, 0)), /* EINT0 */
632 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
633 SUNXI_FUNCTION(0x0, "gpio_in"),
634 SUNXI_FUNCTION(0x2, "gps"), /* SIGN */
635 SUNXI_FUNCTION_IRQ(0x6, 1)), /* EINT1 */
636 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
637 SUNXI_FUNCTION(0x0, "gpio_in"),
638 SUNXI_FUNCTION(0x2, "gps"), /* MAG */
639 SUNXI_FUNCTION_IRQ(0x6, 2)), /* EINT2 */
640 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
641 SUNXI_FUNCTION(0x0, "gpio_in"),
642 SUNXI_FUNCTION(0x1, "gpio_out"),
643 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
644 SUNXI_FUNCTION(0x4, "uart1"), /* TX */
645 SUNXI_FUNCTION_IRQ(0x6, 3)), /* EINT3 */
646 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
647 SUNXI_FUNCTION(0x0, "gpio_in"),
648 SUNXI_FUNCTION(0x1, "gpio_out"),
649 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
650 SUNXI_FUNCTION(0x4, "uart1"), /* RX */
651 SUNXI_FUNCTION_IRQ(0x6, 4)), /* EINT4 */
652 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 5),
653 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
654 SUNXI_FUNCTION(0x0, "gpio_in"),
655 SUNXI_FUNCTION(0x1, "gpio_out"),
656 SUNXI_FUNCTION(0x2, "mmc1"), /* DO */
657 SUNXI_FUNCTION(0x4, "uart1"), /* CTS */
658 SUNXI_FUNCTION_IRQ(0x6, 5)), /* EINT5 */
659 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 6),
660 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
661 SUNXI_FUNCTION(0x0, "gpio_in"),
662 SUNXI_FUNCTION(0x1, "gpio_out"),
663 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
664 SUNXI_FUNCTION(0x4, "uart1"), /* RTS */
665 SUNXI_FUNCTION(0x5, "uart2"), /* RTS */
666 SUNXI_FUNCTION_IRQ(0x6, 6)), /* EINT6 */
667 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 7),
668 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
669 SUNXI_FUNCTION(0x0, "gpio_in"),
670 SUNXI_FUNCTION(0x1, "gpio_out"),
671 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
672 SUNXI_FUNCTION(0x5, "uart2"), /* TX */
673 SUNXI_FUNCTION_IRQ(0x6, 7)), /* EINT7 */
674 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 8),
675 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
676 SUNXI_FUNCTION(0x0, "gpio_in"),
677 SUNXI_FUNCTION(0x1, "gpio_out"),
678 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
679 SUNXI_FUNCTION(0x5, "uart2"), /* RX */
680 SUNXI_FUNCTION_IRQ(0x6, 8)), /* EINT8 */
681 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
682 SUNXI_FUNCTION(0x0, "gpio_in"),
683 SUNXI_FUNCTION(0x1, "gpio_out"),
684 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
685 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
686 SUNXI_FUNCTION_IRQ(0x6, 9)), /* EINT9 */
687 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
688 SUNXI_FUNCTION(0x0, "gpio_in"),
689 SUNXI_FUNCTION(0x1, "gpio_out"),
690 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
691 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
692 SUNXI_FUNCTION_IRQ(0x6, 10)), /* EINT10 */
693 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
694 SUNXI_FUNCTION(0x0, "gpio_in"),
695 SUNXI_FUNCTION(0x1, "gpio_out"),
696 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
697 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
698 SUNXI_FUNCTION_IRQ(0x6, 11)), /* EINT11 */
699 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
700 SUNXI_FUNCTION(0x0, "gpio_in"),
701 SUNXI_FUNCTION(0x1, "gpio_out"),
702 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
703 SUNXI_FUNCTION(0x3, "uart3"), /* RTS */
704 SUNXI_FUNCTION_IRQ(0x6, 12)), /* EINT12 */
705 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 13),
706 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
707 SUNXI_FUNCTION(0x0, "gpio_in"),
708 SUNXI_FUNCTION(0x1, "gpio_out"),
709 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
710 SUNXI_FUNCTION(0x3, "pwm"), /* PWM1 */
711 SUNXI_FUNCTION(0x5, "uart2"), /* CTS */
712 SUNXI_FUNCTION_IRQ(0x6, 13)), /* EINT13 */
713 };
714
715 static const struct sunxi_pinctrl_desc sun5i_pinctrl_data = {
716 .pins = sun5i_pins,
717 .npins = ARRAY_SIZE(sun5i_pins),
718 .irq_banks = 1,
719 .disable_strict_mode = true,
720 };
721
sun5i_pinctrl_probe(struct platform_device * pdev)722 static int sun5i_pinctrl_probe(struct platform_device *pdev)
723 {
724 unsigned long variant = (unsigned long)of_device_get_match_data(&pdev->dev);
725
726 return sunxi_pinctrl_init_with_flags(pdev, &sun5i_pinctrl_data,
727 variant);
728 }
729
730 static const struct of_device_id sun5i_pinctrl_match[] = {
731 {
732 .compatible = "allwinner,sun5i-a10s-pinctrl",
733 .data = (void *)PINCTRL_SUN5I_A10S
734 },
735 {
736 .compatible = "allwinner,sun5i-a13-pinctrl",
737 .data = (void *)PINCTRL_SUN5I_A13
738 },
739 {
740 .compatible = "nextthing,gr8-pinctrl",
741 .data = (void *)PINCTRL_SUN5I_GR8
742 },
743 { },
744 };
745
746 static struct platform_driver sun5i_pinctrl_driver = {
747 .probe = sun5i_pinctrl_probe,
748 .driver = {
749 .name = "sun5i-pinctrl",
750 .of_match_table = sun5i_pinctrl_match,
751 },
752 };
753 builtin_platform_driver(sun5i_pinctrl_driver);
754