1 // SPDX-License-Identifier: GPL-2.0-only
2 /*******************************************************************************
3 This contains the functions to handle the platform driver.
4
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
6
7
8 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
9 *******************************************************************************/
10
11 #include <linux/device.h>
12 #include <linux/platform_device.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/module.h>
15 #include <linux/io.h>
16 #include <linux/of.h>
17 #include <linux/of_net.h>
18 #include <linux/of_mdio.h>
19
20 #include "stmmac.h"
21 #include "stmmac_platform.h"
22
23 #ifdef CONFIG_OF
24
25 /**
26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
27 * @dev: struct device of the platform device
28 * @mcast_bins: Multicast filtering bins
29 * Description:
30 * this function validates the number of Multicast filtering bins specified
31 * by the configuration through the device tree. The Synopsys GMAC supports
32 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
33 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
34 * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
35 * invalid and will cause the filtering algorithm to use Multicast
36 * promiscuous mode.
37 */
dwmac1000_validate_mcast_bins(struct device * dev,int mcast_bins)38 static int dwmac1000_validate_mcast_bins(struct device *dev, int mcast_bins)
39 {
40 int x = mcast_bins;
41
42 switch (x) {
43 case HASH_TABLE_SIZE:
44 case 128:
45 case 256:
46 break;
47 default:
48 x = 0;
49 dev_info(dev, "Hash table entries set to unexpected value %d\n",
50 mcast_bins);
51 break;
52 }
53 return x;
54 }
55
56 /**
57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
58 * @dev: struct device of the platform device
59 * @ucast_entries: number of Unicast address entries
60 * Description:
61 * This function validates the number of Unicast address entries supported
62 * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
63 * supports 1..32, 64, or 128 Unicast filter entries for its Unicast filter
64 * logic. This function validates a valid, supported configuration is
65 * selected, and defaults to 1 Unicast address if an unsupported
66 * configuration is selected.
67 */
dwmac1000_validate_ucast_entries(struct device * dev,int ucast_entries)68 static int dwmac1000_validate_ucast_entries(struct device *dev,
69 int ucast_entries)
70 {
71 int x = ucast_entries;
72
73 switch (x) {
74 case 1 ... 32:
75 case 64:
76 case 128:
77 break;
78 default:
79 x = 1;
80 dev_info(dev, "Unicast table entries set to unexpected value %d\n",
81 ucast_entries);
82 break;
83 }
84 return x;
85 }
86
87 /**
88 * stmmac_axi_setup - parse DT parameters for programming the AXI register
89 * @pdev: platform device
90 * Description:
91 * if required, from device-tree the AXI internal register can be tuned
92 * by using platform parameters.
93 */
stmmac_axi_setup(struct platform_device * pdev)94 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
95 {
96 struct device_node *np;
97 struct stmmac_axi *axi;
98
99 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
100 if (!np)
101 return NULL;
102
103 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
104 if (!axi) {
105 of_node_put(np);
106 return ERR_PTR(-ENOMEM);
107 }
108
109 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
110 axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
111 axi->axi_kbbe = of_property_read_bool(np, "snps,kbbe");
112 axi->axi_fb = of_property_read_bool(np, "snps,fb");
113 axi->axi_mb = of_property_read_bool(np, "snps,mb");
114 axi->axi_rb = of_property_read_bool(np, "snps,rb");
115
116 if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
117 axi->axi_wr_osr_lmt = 1;
118 if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
119 axi->axi_rd_osr_lmt = 1;
120 of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
121 of_node_put(np);
122
123 return axi;
124 }
125
126 /**
127 * stmmac_mtl_setup - parse DT parameters for multiple queues configuration
128 * @pdev: platform device
129 * @plat: enet data
130 */
stmmac_mtl_setup(struct platform_device * pdev,struct plat_stmmacenet_data * plat)131 static int stmmac_mtl_setup(struct platform_device *pdev,
132 struct plat_stmmacenet_data *plat)
133 {
134 struct device_node *q_node;
135 struct device_node *rx_node;
136 struct device_node *tx_node;
137 u8 queue = 0;
138 int ret = 0;
139
140 /* For backwards-compatibility with device trees that don't have any
141 * snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
142 * to one RX and TX queues each.
143 */
144 plat->rx_queues_to_use = 1;
145 plat->tx_queues_to_use = 1;
146
147 /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need
148 * to always set this, otherwise Queue will be classified as AVB
149 * (because MTL_QUEUE_AVB = 0).
150 */
151 plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
152 plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
153
154 rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
155 if (!rx_node)
156 return ret;
157
158 tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
159 if (!tx_node) {
160 of_node_put(rx_node);
161 return ret;
162 }
163
164 /* Processing RX queues common config */
165 if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
166 &plat->rx_queues_to_use))
167 plat->rx_queues_to_use = 1;
168
169 if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
170 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
171 else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
172 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
173 else
174 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
175
176 /* Processing individual RX queue config */
177 for_each_child_of_node(rx_node, q_node) {
178 if (queue >= plat->rx_queues_to_use)
179 break;
180
181 if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
182 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
183 else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
184 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
185 else
186 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
187
188 if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
189 &plat->rx_queues_cfg[queue].chan))
190 plat->rx_queues_cfg[queue].chan = queue;
191 /* TODO: Dynamic mapping to be included in the future */
192
193 if (of_property_read_u32(q_node, "snps,priority",
194 &plat->rx_queues_cfg[queue].prio)) {
195 plat->rx_queues_cfg[queue].prio = 0;
196 plat->rx_queues_cfg[queue].use_prio = false;
197 } else {
198 plat->rx_queues_cfg[queue].use_prio = true;
199 }
200
201 /* RX queue specific packet type routing */
202 if (of_property_read_bool(q_node, "snps,route-avcp"))
203 plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
204 else if (of_property_read_bool(q_node, "snps,route-ptp"))
205 plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
206 else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
207 plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
208 else if (of_property_read_bool(q_node, "snps,route-up"))
209 plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
210 else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
211 plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
212 else
213 plat->rx_queues_cfg[queue].pkt_route = 0x0;
214
215 queue++;
216 }
217 if (queue != plat->rx_queues_to_use) {
218 ret = -EINVAL;
219 dev_err(&pdev->dev, "Not all RX queues were configured\n");
220 goto out;
221 }
222
223 /* Processing TX queues common config */
224 if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
225 &plat->tx_queues_to_use))
226 plat->tx_queues_to_use = 1;
227
228 if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
229 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
230 else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
231 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
232 else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
233 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
234 else
235 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
236
237 queue = 0;
238
239 /* Processing individual TX queue config */
240 for_each_child_of_node(tx_node, q_node) {
241 if (queue >= plat->tx_queues_to_use)
242 break;
243
244 if (of_property_read_u32(q_node, "snps,weight",
245 &plat->tx_queues_cfg[queue].weight))
246 plat->tx_queues_cfg[queue].weight = 0x10 + queue;
247
248 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
249 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
250 } else if (of_property_read_bool(q_node,
251 "snps,avb-algorithm")) {
252 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
253
254 /* Credit Base Shaper parameters used by AVB */
255 if (of_property_read_u32(q_node, "snps,send_slope",
256 &plat->tx_queues_cfg[queue].send_slope))
257 plat->tx_queues_cfg[queue].send_slope = 0x0;
258 if (of_property_read_u32(q_node, "snps,idle_slope",
259 &plat->tx_queues_cfg[queue].idle_slope))
260 plat->tx_queues_cfg[queue].idle_slope = 0x0;
261 if (of_property_read_u32(q_node, "snps,high_credit",
262 &plat->tx_queues_cfg[queue].high_credit))
263 plat->tx_queues_cfg[queue].high_credit = 0x0;
264 if (of_property_read_u32(q_node, "snps,low_credit",
265 &plat->tx_queues_cfg[queue].low_credit))
266 plat->tx_queues_cfg[queue].low_credit = 0x0;
267 } else {
268 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
269 }
270
271 if (of_property_read_u32(q_node, "snps,priority",
272 &plat->tx_queues_cfg[queue].prio)) {
273 plat->tx_queues_cfg[queue].prio = 0;
274 plat->tx_queues_cfg[queue].use_prio = false;
275 } else {
276 plat->tx_queues_cfg[queue].use_prio = true;
277 }
278
279 plat->tx_queues_cfg[queue].coe_unsupported =
280 of_property_read_bool(q_node, "snps,coe-unsupported");
281
282 queue++;
283 }
284 if (queue != plat->tx_queues_to_use) {
285 ret = -EINVAL;
286 dev_err(&pdev->dev, "Not all TX queues were configured\n");
287 goto out;
288 }
289
290 out:
291 of_node_put(rx_node);
292 of_node_put(tx_node);
293 of_node_put(q_node);
294
295 return ret;
296 }
297
298 /**
299 * stmmac_of_get_mdio() - Gets the MDIO bus from the devicetree.
300 * @np: devicetree node
301 *
302 * The MDIO bus will be searched for in the following ways:
303 * 1. The compatible is "snps,dwc-qos-ethernet-4.10" && a "mdio" named
304 * child node exists
305 * 2. A child node with the "snps,dwmac-mdio" compatible is present
306 *
307 * Return: The MDIO node if present otherwise NULL
308 */
stmmac_of_get_mdio(struct device_node * np)309 static struct device_node *stmmac_of_get_mdio(struct device_node *np)
310 {
311 static const struct of_device_id need_mdio_ids[] = {
312 { .compatible = "snps,dwc-qos-ethernet-4.10" },
313 {},
314 };
315 struct device_node *mdio_node = NULL;
316
317 if (of_match_node(need_mdio_ids, np)) {
318 mdio_node = of_get_child_by_name(np, "mdio");
319 } else {
320 /**
321 * If snps,dwmac-mdio is passed from DT, always register
322 * the MDIO
323 */
324 for_each_child_of_node(np, mdio_node) {
325 if (of_device_is_compatible(mdio_node,
326 "snps,dwmac-mdio"))
327 break;
328 }
329 }
330
331 return mdio_node;
332 }
333
334 /**
335 * stmmac_mdio_setup() - Populate platform related MDIO structures.
336 * @plat: driver data platform structure
337 * @np: devicetree node
338 * @dev: device pointer
339 *
340 * This searches for MDIO information from the devicetree.
341 * If an MDIO node is found, it's assigned to plat->mdio_node and
342 * plat->mdio_bus_data is allocated.
343 * If no connection can be determined, just plat->mdio_bus_data is allocated
344 * to indicate a bus should be created and scanned for a phy.
345 * If it's determined there's no MDIO bus needed, both are left NULL.
346 *
347 * This expects that plat->phy_node has already been searched for.
348 *
349 * Return: 0 on success, errno otherwise.
350 */
stmmac_mdio_setup(struct plat_stmmacenet_data * plat,struct device_node * np,struct device * dev)351 static int stmmac_mdio_setup(struct plat_stmmacenet_data *plat,
352 struct device_node *np, struct device *dev)
353 {
354 bool legacy_mdio;
355
356 plat->mdio_node = stmmac_of_get_mdio(np);
357 if (plat->mdio_node)
358 dev_dbg(dev, "Found MDIO subnode\n");
359
360 /* Legacy devicetrees allowed for no MDIO bus description and expect
361 * the bus to be scanned for devices. If there's no phy or fixed-link
362 * described assume this is the case since there must be something
363 * connected to the MAC.
364 */
365 legacy_mdio = !of_phy_is_fixed_link(np) && !plat->phy_node;
366 if (legacy_mdio)
367 dev_info(dev, "Deprecated MDIO bus assumption used\n");
368
369 if (plat->mdio_node || legacy_mdio) {
370 plat->mdio_bus_data = devm_kzalloc(dev,
371 sizeof(*plat->mdio_bus_data),
372 GFP_KERNEL);
373 if (!plat->mdio_bus_data)
374 return -ENOMEM;
375
376 plat->mdio_bus_data->needs_reset = true;
377 }
378
379 return 0;
380 }
381
382 /**
383 * stmmac_of_get_mac_mode - retrieves the interface of the MAC
384 * @np: - device-tree node
385 * Description:
386 * Similar to `of_get_phy_mode()`, this function will retrieve (from
387 * the device-tree) the interface mode on the MAC side. This assumes
388 * that there is mode converter in-between the MAC & PHY
389 * (e.g. GMII-to-RGMII).
390 */
stmmac_of_get_mac_mode(struct device_node * np)391 static int stmmac_of_get_mac_mode(struct device_node *np)
392 {
393 const char *pm;
394 int err, i;
395
396 err = of_property_read_string(np, "mac-mode", &pm);
397 if (err < 0)
398 return err;
399
400 for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) {
401 if (!strcasecmp(pm, phy_modes(i)))
402 return i;
403 }
404
405 return -ENODEV;
406 }
407
408 /* Compatible string array for all gmac4 devices */
409 static const char * const stmmac_gmac4_compats[] = {
410 "snps,dwmac-4.00",
411 "snps,dwmac-4.10a",
412 "snps,dwmac-4.20a",
413 "snps,dwmac-5.00a",
414 "snps,dwmac-5.10a",
415 "snps,dwmac-5.20",
416 "snps,dwmac-5.30a",
417 NULL
418 };
419
420 /**
421 * stmmac_probe_config_dt - parse device-tree driver parameters
422 * @pdev: platform_device structure
423 * @mac: MAC address to use
424 * Description:
425 * this function is to read the driver parameters from device-tree and
426 * set some private fields that will be used by the main at runtime.
427 */
428 static struct plat_stmmacenet_data *
stmmac_probe_config_dt(struct platform_device * pdev,u8 * mac)429 stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
430 {
431 struct device_node *np = pdev->dev.of_node;
432 struct plat_stmmacenet_data *plat;
433 struct stmmac_dma_cfg *dma_cfg;
434 static int bus_id = -ENODEV;
435 int phy_mode;
436 void *ret;
437 int rc;
438
439 plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
440 if (!plat)
441 return ERR_PTR(-ENOMEM);
442
443 rc = of_get_mac_address(np, mac);
444 if (rc) {
445 if (rc == -EPROBE_DEFER)
446 return ERR_PTR(rc);
447
448 eth_zero_addr(mac);
449 }
450
451 phy_mode = device_get_phy_mode(&pdev->dev);
452 if (phy_mode < 0)
453 return ERR_PTR(phy_mode);
454
455 plat->phy_interface = phy_mode;
456
457 rc = stmmac_of_get_mac_mode(np);
458 if (rc >= 0 && rc != phy_mode)
459 dev_warn(&pdev->dev,
460 "\"mac-mode\" property used for %s but differs to \"phy-mode\" of %s, and will be ignored. Please report.\n",
461 phy_modes(rc), phy_modes(phy_mode));
462
463 /* Some wrapper drivers still rely on phy_node. Let's save it while
464 * they are not converted to phylink. */
465 plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
466
467 /* PHYLINK automatically parses the phy-handle property */
468 plat->port_node = of_fwnode_handle(np);
469
470 /* Get max speed of operation from device tree */
471 of_property_read_u32(np, "max-speed", &plat->max_speed);
472
473 plat->bus_id = of_alias_get_id(np, "ethernet");
474 if (plat->bus_id < 0) {
475 if (bus_id < 0)
476 bus_id = of_alias_get_highest_id("ethernet");
477 /* No ethernet alias found, init at -1 so first bus_id is 0 */
478 if (bus_id < 0)
479 bus_id = -1;
480 plat->bus_id = ++bus_id;
481 }
482
483 /* Default to phy auto-detection */
484 plat->phy_addr = -1;
485
486 /* Default to get clk_csr from stmmac_clk_csr_set(),
487 * or get clk_csr from device tree.
488 */
489 plat->clk_csr = -1;
490 if (of_property_read_u32(np, "snps,clk-csr", &plat->clk_csr))
491 of_property_read_u32(np, "clk_csr", &plat->clk_csr);
492
493 /* "snps,phy-addr" is not a standard property. Mark it as deprecated
494 * and warn of its use. Remove this when phy node support is added.
495 */
496 if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
497 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
498
499 rc = stmmac_mdio_setup(plat, np, &pdev->dev);
500 if (rc) {
501 ret = ERR_PTR(rc);
502 goto error_put_phy;
503 }
504
505 of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
506
507 of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
508
509 plat->force_sf_dma_mode =
510 of_property_read_bool(np, "snps,force_sf_dma_mode");
511
512 if (of_property_read_bool(np, "snps,en-tx-lpi-clockgating")) {
513 dev_warn(&pdev->dev,
514 "OF property snps,en-tx-lpi-clockgating is deprecated, please convert driver to use STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP\n");
515 plat->flags |= STMMAC_FLAG_EN_TX_LPI_CLOCKGATING;
516 }
517
518 /* Set the maxmtu to a default of JUMBO_LEN in case the
519 * parameter is not present in the device tree.
520 */
521 plat->maxmtu = JUMBO_LEN;
522
523 /* Set default value for multicast hash bins */
524 plat->multicast_filter_bins = HASH_TABLE_SIZE;
525
526 /* Set default value for unicast filter entries */
527 plat->unicast_filter_entries = 1;
528
529 /*
530 * Currently only the properties needed on SPEAr600
531 * are provided. All other properties should be added
532 * once needed on other platforms.
533 */
534 if (of_device_is_compatible(np, "st,spear600-gmac") ||
535 of_device_is_compatible(np, "snps,dwmac-3.50a") ||
536 of_device_is_compatible(np, "snps,dwmac-3.70a") ||
537 of_device_is_compatible(np, "snps,dwmac-3.72a") ||
538 of_device_is_compatible(np, "snps,dwmac")) {
539 /* Note that the max-frame-size parameter as defined in the
540 * ePAPR v1.1 spec is defined as max-frame-size, it's
541 * actually used as the IEEE definition of MAC Client
542 * data, or MTU. The ePAPR specification is confusing as
543 * the definition is max-frame-size, but usage examples
544 * are clearly MTUs
545 */
546 of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
547 of_property_read_u32(np, "snps,multicast-filter-bins",
548 &plat->multicast_filter_bins);
549 of_property_read_u32(np, "snps,perfect-filter-entries",
550 &plat->unicast_filter_entries);
551 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
552 &pdev->dev, plat->unicast_filter_entries);
553 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
554 &pdev->dev, plat->multicast_filter_bins);
555 plat->has_gmac = 1;
556 plat->pmt = 1;
557 }
558
559 if (of_device_is_compatible(np, "snps,dwmac-3.40a")) {
560 plat->has_gmac = 1;
561 plat->enh_desc = 1;
562 plat->tx_coe = 1;
563 plat->bugged_jumbo = 1;
564 plat->pmt = 1;
565 }
566
567 if (of_device_compatible_match(np, stmmac_gmac4_compats)) {
568 plat->has_gmac4 = 1;
569 plat->has_gmac = 0;
570 plat->pmt = 1;
571 if (of_property_read_bool(np, "snps,tso"))
572 plat->flags |= STMMAC_FLAG_TSO_EN;
573 }
574
575 if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
576 of_device_is_compatible(np, "snps,dwmac-3.710")) {
577 plat->enh_desc = 1;
578 plat->bugged_jumbo = 1;
579 plat->force_sf_dma_mode = 1;
580 }
581
582 if (of_device_is_compatible(np, "snps,dwxgmac")) {
583 plat->has_xgmac = 1;
584 plat->pmt = 1;
585 if (of_property_read_bool(np, "snps,tso"))
586 plat->flags |= STMMAC_FLAG_TSO_EN;
587 of_property_read_u32(np, "snps,multicast-filter-bins",
588 &plat->multicast_filter_bins);
589 }
590
591 dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
592 GFP_KERNEL);
593 if (!dma_cfg) {
594 ret = ERR_PTR(-ENOMEM);
595 goto error_put_mdio;
596 }
597 plat->dma_cfg = dma_cfg;
598
599 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
600 if (!dma_cfg->pbl)
601 dma_cfg->pbl = DEFAULT_DMA_PBL;
602 of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
603 of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
604 dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
605
606 dma_cfg->aal = of_property_read_bool(np, "snps,aal");
607 dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
608 dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
609
610 plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
611 if (plat->force_thresh_dma_mode && plat->force_sf_dma_mode) {
612 plat->force_sf_dma_mode = 0;
613 dev_warn(&pdev->dev,
614 "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n");
615 }
616
617 of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
618
619 plat->axi = stmmac_axi_setup(pdev);
620
621 rc = stmmac_mtl_setup(pdev, plat);
622 if (rc) {
623 ret = ERR_PTR(rc);
624 goto error_put_mdio;
625 }
626
627 /* clock setup */
628 if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
629 plat->stmmac_clk = devm_clk_get(&pdev->dev,
630 STMMAC_RESOURCE_NAME);
631 if (IS_ERR(plat->stmmac_clk)) {
632 dev_warn(&pdev->dev, "Cannot get CSR clock\n");
633 plat->stmmac_clk = NULL;
634 }
635 clk_prepare_enable(plat->stmmac_clk);
636 }
637
638 plat->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
639 if (IS_ERR(plat->pclk)) {
640 ret = plat->pclk;
641 goto error_pclk_get;
642 }
643 clk_prepare_enable(plat->pclk);
644
645 /* Fall-back to main clock in case of no PTP ref is passed */
646 plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
647 if (IS_ERR(plat->clk_ptp_ref)) {
648 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
649 plat->clk_ptp_ref = NULL;
650 dev_info(&pdev->dev, "PTP uses main clock\n");
651 } else {
652 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
653 dev_dbg(&pdev->dev, "PTP rate %lu\n", plat->clk_ptp_rate);
654 }
655
656 plat->stmmac_rst = devm_reset_control_get_optional(&pdev->dev,
657 STMMAC_RESOURCE_NAME);
658 if (IS_ERR(plat->stmmac_rst)) {
659 ret = plat->stmmac_rst;
660 goto error_hw_init;
661 }
662
663 plat->stmmac_ahb_rst = devm_reset_control_get_optional_shared(
664 &pdev->dev, "ahb");
665 if (IS_ERR(plat->stmmac_ahb_rst)) {
666 ret = plat->stmmac_ahb_rst;
667 goto error_hw_init;
668 }
669
670 return plat;
671
672 error_hw_init:
673 clk_disable_unprepare(plat->pclk);
674 error_pclk_get:
675 clk_disable_unprepare(plat->stmmac_clk);
676 error_put_mdio:
677 of_node_put(plat->mdio_node);
678 error_put_phy:
679 of_node_put(plat->phy_node);
680
681 return ret;
682 }
683
devm_stmmac_remove_config_dt(void * data)684 static void devm_stmmac_remove_config_dt(void *data)
685 {
686 struct plat_stmmacenet_data *plat = data;
687
688 clk_disable_unprepare(plat->stmmac_clk);
689 clk_disable_unprepare(plat->pclk);
690 of_node_put(plat->mdio_node);
691 of_node_put(plat->phy_node);
692 }
693
694 /**
695 * devm_stmmac_probe_config_dt
696 * @pdev: platform_device structure
697 * @mac: MAC address to use
698 * Description: Devres variant of stmmac_probe_config_dt().
699 */
700 struct plat_stmmacenet_data *
devm_stmmac_probe_config_dt(struct platform_device * pdev,u8 * mac)701 devm_stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
702 {
703 struct plat_stmmacenet_data *plat;
704 int ret;
705
706 plat = stmmac_probe_config_dt(pdev, mac);
707 if (IS_ERR(plat))
708 return plat;
709
710 ret = devm_add_action_or_reset(&pdev->dev,
711 devm_stmmac_remove_config_dt, plat);
712 if (ret)
713 return ERR_PTR(ret);
714
715 return plat;
716 }
717 #else
718 struct plat_stmmacenet_data *
devm_stmmac_probe_config_dt(struct platform_device * pdev,u8 * mac)719 devm_stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
720 {
721 return ERR_PTR(-EINVAL);
722 }
723 #endif /* CONFIG_OF */
724 EXPORT_SYMBOL_GPL(devm_stmmac_probe_config_dt);
725
stmmac_pltfr_find_clk(struct plat_stmmacenet_data * plat_dat,const char * name)726 struct clk *stmmac_pltfr_find_clk(struct plat_stmmacenet_data *plat_dat,
727 const char *name)
728 {
729 for (int i = 0; i < plat_dat->num_clks; i++)
730 if (strcmp(plat_dat->clks[i].id, name) == 0)
731 return plat_dat->clks[i].clk;
732
733 return NULL;
734 }
735 EXPORT_SYMBOL_GPL(stmmac_pltfr_find_clk);
736
stmmac_get_platform_resources(struct platform_device * pdev,struct stmmac_resources * stmmac_res)737 int stmmac_get_platform_resources(struct platform_device *pdev,
738 struct stmmac_resources *stmmac_res)
739 {
740 memset(stmmac_res, 0, sizeof(*stmmac_res));
741
742 /* Get IRQ information early to have an ability to ask for deferred
743 * probe if needed before we went too far with resource allocation.
744 */
745 stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
746 if (stmmac_res->irq < 0)
747 return stmmac_res->irq;
748
749 /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
750 * The external wake up irq can be passed through the platform code
751 * named as "eth_wake_irq"
752 *
753 * In case the wake up interrupt is not passed from the platform
754 * so the driver will continue to use the mac irq (ndev->irq)
755 */
756 stmmac_res->wol_irq =
757 platform_get_irq_byname_optional(pdev, "eth_wake_irq");
758 if (stmmac_res->wol_irq < 0) {
759 if (stmmac_res->wol_irq == -EPROBE_DEFER)
760 return -EPROBE_DEFER;
761 dev_info(&pdev->dev, "IRQ eth_wake_irq not found\n");
762 stmmac_res->wol_irq = stmmac_res->irq;
763 }
764
765 stmmac_res->lpi_irq =
766 platform_get_irq_byname_optional(pdev, "eth_lpi");
767 if (stmmac_res->lpi_irq < 0) {
768 if (stmmac_res->lpi_irq == -EPROBE_DEFER)
769 return -EPROBE_DEFER;
770 dev_info(&pdev->dev, "IRQ eth_lpi not found\n");
771 }
772
773 stmmac_res->sfty_irq =
774 platform_get_irq_byname_optional(pdev, "sfty");
775 if (stmmac_res->sfty_irq < 0) {
776 if (stmmac_res->sfty_irq == -EPROBE_DEFER)
777 return -EPROBE_DEFER;
778 dev_info(&pdev->dev, "IRQ sfty not found\n");
779 }
780
781 stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0);
782
783 return PTR_ERR_OR_ZERO(stmmac_res->addr);
784 }
785 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
786
787 /**
788 * stmmac_pltfr_init
789 * @pdev: pointer to the platform device
790 * @plat: driver data platform structure
791 * Description: Call the platform's init callback (if any) and propagate
792 * the return value.
793 */
stmmac_pltfr_init(struct platform_device * pdev,struct plat_stmmacenet_data * plat)794 static int stmmac_pltfr_init(struct platform_device *pdev,
795 struct plat_stmmacenet_data *plat)
796 {
797 int ret = 0;
798
799 if (plat->init)
800 ret = plat->init(pdev, plat->bsp_priv);
801
802 return ret;
803 }
804
805 /**
806 * stmmac_pltfr_exit
807 * @pdev: pointer to the platform device
808 * @plat: driver data platform structure
809 * Description: Call the platform's exit callback (if any).
810 */
stmmac_pltfr_exit(struct platform_device * pdev,struct plat_stmmacenet_data * plat)811 static void stmmac_pltfr_exit(struct platform_device *pdev,
812 struct plat_stmmacenet_data *plat)
813 {
814 if (plat->exit)
815 plat->exit(pdev, plat->bsp_priv);
816 }
817
stmmac_plat_suspend(struct device * dev,void * bsp_priv)818 static int stmmac_plat_suspend(struct device *dev, void *bsp_priv)
819 {
820 struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dev));
821
822 stmmac_pltfr_exit(to_platform_device(dev), priv->plat);
823
824 return 0;
825 }
826
stmmac_plat_resume(struct device * dev,void * bsp_priv)827 static int stmmac_plat_resume(struct device *dev, void *bsp_priv)
828 {
829 struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dev));
830
831 return stmmac_pltfr_init(to_platform_device(dev), priv->plat);
832 }
833
834 /**
835 * stmmac_pltfr_probe
836 * @pdev: platform device pointer
837 * @plat: driver data platform structure
838 * @res: stmmac resources structure
839 * Description: This calls the platform's init() callback and probes the
840 * stmmac driver.
841 */
stmmac_pltfr_probe(struct platform_device * pdev,struct plat_stmmacenet_data * plat,struct stmmac_resources * res)842 int stmmac_pltfr_probe(struct platform_device *pdev,
843 struct plat_stmmacenet_data *plat,
844 struct stmmac_resources *res)
845 {
846 int ret;
847
848 if (!plat->suspend && plat->exit)
849 plat->suspend = stmmac_plat_suspend;
850 if (!plat->resume && plat->init)
851 plat->resume = stmmac_plat_resume;
852
853 ret = stmmac_pltfr_init(pdev, plat);
854 if (ret)
855 return ret;
856
857 ret = stmmac_dvr_probe(&pdev->dev, plat, res);
858 if (ret) {
859 stmmac_pltfr_exit(pdev, plat);
860 return ret;
861 }
862
863 return ret;
864 }
865 EXPORT_SYMBOL_GPL(stmmac_pltfr_probe);
866
devm_stmmac_pltfr_remove(void * data)867 static void devm_stmmac_pltfr_remove(void *data)
868 {
869 struct platform_device *pdev = data;
870
871 stmmac_pltfr_remove(pdev);
872 }
873
874 /**
875 * devm_stmmac_pltfr_probe
876 * @pdev: pointer to the platform device
877 * @plat: driver data platform structure
878 * @res: stmmac resources
879 * Description: Devres variant of stmmac_pltfr_probe(). Allows users to skip
880 * calling stmmac_pltfr_remove() on driver detach.
881 */
devm_stmmac_pltfr_probe(struct platform_device * pdev,struct plat_stmmacenet_data * plat,struct stmmac_resources * res)882 int devm_stmmac_pltfr_probe(struct platform_device *pdev,
883 struct plat_stmmacenet_data *plat,
884 struct stmmac_resources *res)
885 {
886 int ret;
887
888 ret = stmmac_pltfr_probe(pdev, plat, res);
889 if (ret)
890 return ret;
891
892 return devm_add_action_or_reset(&pdev->dev, devm_stmmac_pltfr_remove,
893 pdev);
894 }
895 EXPORT_SYMBOL_GPL(devm_stmmac_pltfr_probe);
896
897 /**
898 * stmmac_pltfr_remove
899 * @pdev: pointer to the platform device
900 * Description: This undoes the effects of stmmac_pltfr_probe() by removing the
901 * driver and calling the platform's exit() callback.
902 */
stmmac_pltfr_remove(struct platform_device * pdev)903 void stmmac_pltfr_remove(struct platform_device *pdev)
904 {
905 struct net_device *ndev = platform_get_drvdata(pdev);
906 struct stmmac_priv *priv = netdev_priv(ndev);
907 struct plat_stmmacenet_data *plat = priv->plat;
908
909 stmmac_dvr_remove(&pdev->dev);
910 stmmac_pltfr_exit(pdev, plat);
911 }
912 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
913
stmmac_bus_clks_config(struct stmmac_priv * priv,bool enabled)914 static int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled)
915 {
916 struct plat_stmmacenet_data *plat_dat = priv->plat;
917 int ret;
918
919 if (enabled) {
920 ret = clk_prepare_enable(plat_dat->stmmac_clk);
921 if (ret)
922 return ret;
923 ret = clk_prepare_enable(plat_dat->pclk);
924 if (ret) {
925 clk_disable_unprepare(plat_dat->stmmac_clk);
926 return ret;
927 }
928 if (plat_dat->clks_config) {
929 ret = plat_dat->clks_config(plat_dat->bsp_priv, enabled);
930 if (ret) {
931 clk_disable_unprepare(plat_dat->stmmac_clk);
932 clk_disable_unprepare(plat_dat->pclk);
933 return ret;
934 }
935 }
936 } else {
937 clk_disable_unprepare(plat_dat->stmmac_clk);
938 clk_disable_unprepare(plat_dat->pclk);
939 if (plat_dat->clks_config)
940 plat_dat->clks_config(plat_dat->bsp_priv, enabled);
941 }
942
943 return 0;
944 }
945
stmmac_runtime_suspend(struct device * dev)946 static int __maybe_unused stmmac_runtime_suspend(struct device *dev)
947 {
948 struct net_device *ndev = dev_get_drvdata(dev);
949 struct stmmac_priv *priv = netdev_priv(ndev);
950
951 stmmac_bus_clks_config(priv, false);
952
953 return 0;
954 }
955
stmmac_runtime_resume(struct device * dev)956 static int __maybe_unused stmmac_runtime_resume(struct device *dev)
957 {
958 struct net_device *ndev = dev_get_drvdata(dev);
959 struct stmmac_priv *priv = netdev_priv(ndev);
960
961 return stmmac_bus_clks_config(priv, true);
962 }
963
stmmac_pltfr_noirq_suspend(struct device * dev)964 static int __maybe_unused stmmac_pltfr_noirq_suspend(struct device *dev)
965 {
966 struct net_device *ndev = dev_get_drvdata(dev);
967 struct stmmac_priv *priv = netdev_priv(ndev);
968 int ret;
969
970 if (!netif_running(ndev))
971 return 0;
972
973 if (!stmmac_wol_enabled_mac(priv)) {
974 /* Disable clock in case of PWM is off */
975 clk_disable_unprepare(priv->plat->clk_ptp_ref);
976
977 ret = pm_runtime_force_suspend(dev);
978 if (ret)
979 return ret;
980 }
981
982 return 0;
983 }
984
stmmac_pltfr_noirq_resume(struct device * dev)985 static int __maybe_unused stmmac_pltfr_noirq_resume(struct device *dev)
986 {
987 struct net_device *ndev = dev_get_drvdata(dev);
988 struct stmmac_priv *priv = netdev_priv(ndev);
989 int ret;
990
991 if (!netif_running(ndev))
992 return 0;
993
994 if (!stmmac_wol_enabled_mac(priv)) {
995 /* enable the clk previously disabled */
996 ret = pm_runtime_force_resume(dev);
997 if (ret)
998 return ret;
999
1000 ret = clk_prepare_enable(priv->plat->clk_ptp_ref);
1001 if (ret < 0) {
1002 netdev_warn(priv->dev,
1003 "failed to enable PTP reference clock: %pe\n",
1004 ERR_PTR(ret));
1005 return ret;
1006 }
1007 }
1008
1009 return 0;
1010 }
1011
1012 const struct dev_pm_ops stmmac_pltfr_pm_ops = {
1013 SET_SYSTEM_SLEEP_PM_OPS(stmmac_suspend, stmmac_resume)
1014 SET_RUNTIME_PM_OPS(stmmac_runtime_suspend, stmmac_runtime_resume, NULL)
1015 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_noirq_suspend, stmmac_pltfr_noirq_resume)
1016 };
1017 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
1018
1019 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
1020 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
1021 MODULE_LICENSE("GPL");
1022