1 /*- 2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB 3 * 4 * Copyright (c) 2015 - 2026 Intel Corporation 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenFabrics.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35 #ifndef IRDMA_PUDA_H 36 #define IRDMA_PUDA_H 37 38 #define IRDMA_IEQ_MPA_FRAMING 6 39 #define IRDMA_TCP_OFFSET 40 40 #define IRDMA_IPV4_PAD 20 41 #define IRDMA_MRK_BLK_SZ 512 42 43 enum puda_rsrc_type { 44 IRDMA_PUDA_RSRC_TYPE_ILQ = 1, 45 IRDMA_PUDA_RSRC_TYPE_IEQ, 46 IRDMA_PUDA_RSRC_TYPE_MAX, /* Must be last entry */ 47 }; 48 49 enum puda_rsrc_complete { 50 PUDA_CQ_CREATED = 1, 51 PUDA_QP_CREATED, 52 PUDA_TX_COMPLETE, 53 PUDA_RX_COMPLETE, 54 PUDA_HASH_CRC_COMPLETE, 55 }; 56 57 struct irdma_sc_dev; 58 struct irdma_sc_qp; 59 struct irdma_sc_cq; 60 61 struct irdma_puda_cmpl_info { 62 struct irdma_qp_uk *qp; 63 u8 q_type; 64 u8 l3proto; 65 u8 l4proto; 66 u16 vlan; 67 u32 payload_len; 68 u32 compl_error; /* No_err=0, else major and minor err code */ 69 u32 qp_id; 70 u32 wqe_idx; 71 bool ipv4:1; 72 bool smac_valid:1; 73 bool vlan_valid:1; 74 u8 smac[ETHER_ADDR_LEN]; 75 }; 76 77 struct irdma_puda_send_info { 78 u64 paddr; /* Physical address */ 79 u32 len; 80 u32 ah_id; 81 u8 tcplen; 82 u8 maclen; 83 bool ipv4:1; 84 bool do_lpb:1; 85 void *scratch; 86 }; 87 88 struct irdma_puda_buf { 89 struct list_head list; /* MUST be first entry */ 90 struct irdma_dma_mem mem; /* DMA memory for the buffer */ 91 struct irdma_puda_buf *next; /* for alloclist in rsrc struct */ 92 struct irdma_virt_mem buf_mem; /* Buffer memory for this buffer */ 93 void *scratch; 94 u8 *iph; 95 u8 *tcph; 96 u8 *data; 97 u32 seqnum; 98 u32 ah_id; 99 u32 totallen; /* machlen+iphlen+tcphlen+datalen */ 100 u16 datalen; 101 u16 vlan_id; 102 u8 tcphlen; /* tcp length in bytes */ 103 u8 maclen; /* mac length in bytes */ 104 atomic_t pb_refcount; 105 u8 hdrlen; 106 bool virtdma:1; 107 bool ipv4:1; 108 bool vlan_valid:1; 109 bool do_lpb:1; /* Loopback buffer */ 110 bool smac_valid:1; 111 bool queued:1; 112 struct irdma_sc_ah *ah; 113 u8 smac[ETHER_ADDR_LEN]; 114 struct irdma_sc_vsi *vsi; 115 }; 116 117 struct irdma_puda_rsrc_info { 118 void (*receive)(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *buf); 119 void (*xmit_complete)(struct irdma_sc_vsi *vsi, void *sqwrid); 120 enum puda_rsrc_type type; /* ILQ or IEQ */ 121 u32 count; 122 u32 pd_id; 123 u32 cq_id; 124 u32 qp_id; 125 u32 sq_size; 126 u32 rq_size; 127 u32 tx_buf_cnt; /* total bufs allocated will be rq_size + tx_buf_cnt */ 128 u16 buf_size; 129 u16 mss; /* FIXME: Windows driver still using this */ 130 u16 stats_idx; 131 bool stats_idx_valid:1; 132 int abi_ver; 133 }; 134 135 struct irdma_puda_rsrc { 136 struct irdma_sc_cq cq; 137 struct irdma_sc_qp qp; 138 struct irdma_sc_pd sc_pd; 139 struct irdma_sc_dev *dev; 140 struct irdma_sc_vsi *vsi; 141 struct irdma_dma_mem cqmem; 142 struct irdma_dma_mem qpmem; 143 struct irdma_virt_mem ilq_mem; 144 enum puda_rsrc_complete cmpl; 145 enum puda_rsrc_type type; 146 u16 buf_size; /*buf must be max datalen + tcpip hdr + mac */ 147 u32 cq_id; 148 u32 qp_id; 149 u32 sq_size; 150 u32 rq_size; 151 u32 cq_size; 152 struct irdma_sq_uk_wr_trk_info *sq_wrtrk_array; 153 u64 *rq_wrid_array; 154 u32 compl_rxwqe_idx; 155 u32 rx_wqe_idx; 156 u32 rxq_invalid_cnt; 157 u32 tx_wqe_avail_cnt; 158 void *hash_desc; 159 struct list_head txpend; 160 struct list_head bufpool; /* free buffers pool list for recv and xmit */ 161 u32 alloc_buf_count; 162 u32 avail_buf_count; /* snapshot of currently available buffers */ 163 spinlock_t bufpool_lock; 164 struct irdma_puda_buf *alloclist; 165 void (*receive)(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *buf); 166 void (*xmit_complete)(struct irdma_sc_vsi *vsi, void *sqwrid); 167 /* puda stats */ 168 u64 stats_buf_alloc_fail; 169 u64 stats_pkt_rcvd; 170 u64 stats_pkt_sent; 171 u64 stats_rcvd_pkt_err; 172 u64 stats_sent_pkt_q; 173 u64 stats_bad_qp_id; 174 /* IEQ stats */ 175 u64 fpdu_processed; 176 u64 bad_seq_num; 177 u64 crc_err; 178 u64 pmode_count; 179 u64 partials_handled; 180 u16 mss; /* FIXME: Windows driver still using this */ 181 u16 stats_idx; 182 bool check_crc:1; 183 bool stats_idx_valid:1; 184 }; 185 186 struct irdma_puda_buf *irdma_puda_get_bufpool(struct irdma_puda_rsrc *rsrc); 187 void irdma_puda_ret_bufpool(struct irdma_puda_rsrc *rsrc, 188 struct irdma_puda_buf *buf); 189 int irdma_puda_send_buf(struct irdma_puda_rsrc *rsrc, 190 struct irdma_puda_buf *buf); 191 int irdma_puda_send(struct irdma_sc_qp *qp, struct irdma_puda_send_info *info); 192 int irdma_puda_create_rsrc(struct irdma_sc_vsi *vsi, 193 struct irdma_puda_rsrc_info *info); 194 void irdma_puda_dele_rsrc(struct irdma_sc_vsi *vsi, enum puda_rsrc_type type, 195 bool reset); 196 int irdma_puda_poll_cmpl(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq, 197 u32 *compl_err); 198 199 struct irdma_sc_qp *irdma_ieq_get_qp(struct irdma_sc_dev *dev, 200 struct irdma_puda_buf *buf); 201 int irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info, 202 struct irdma_puda_buf *buf); 203 int irdma_ieq_check_mpacrc(void *desc, void *addr, u32 len, u32 val); 204 int irdma_init_hash_desc(void **desc); 205 void irdma_ieq_mpa_crc_ae(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp); 206 void irdma_free_hash_desc(void *desc); 207 void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len, u32 seqnum); 208 int irdma_cqp_qp_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp); 209 int irdma_cqp_cq_create_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq); 210 int irdma_cqp_qp_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp); 211 void irdma_cqp_cq_destroy_cmd(struct irdma_sc_dev *dev, struct irdma_sc_cq *cq); 212 void irdma_puda_ieq_get_ah_info(struct irdma_sc_qp *qp, 213 struct irdma_ah_info *ah_info); 214 int irdma_puda_create_ah(struct irdma_sc_dev *dev, 215 struct irdma_ah_info *ah_info, bool wait, 216 enum puda_rsrc_type type, void *cb_param, 217 struct irdma_sc_ah **ah); 218 void irdma_puda_free_ah(struct irdma_sc_dev *dev, struct irdma_sc_ah *ah); 219 void irdma_ieq_process_fpdus(struct irdma_sc_qp *qp, 220 struct irdma_puda_rsrc *ieq); 221 void irdma_ieq_cleanup_qp(struct irdma_puda_rsrc *ieq, struct irdma_sc_qp *qp); 222 #endif /*IRDMA_PROTOS_H */ 223