1 // SPDX-License-Identifier: GPL-2.0
2
3 /***************************************************************************
4 * copyright : (C) 2002, 2004 by Frank Mori Hess *
5 ***************************************************************************/
6
7 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8 #define dev_fmt pr_fmt
9 #define DRV_NAME KBUILD_MODNAME
10
11 #include "agilent_82350b.h"
12 #include <linux/delay.h>
13 #include <linux/ioport.h>
14 #include <linux/sched.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <asm/dma.h>
18 #include <linux/pci.h>
19 #include <linux/pci_ids.h>
20 #include <linux/string.h>
21 #include <linux/init.h>
22 #include <linux/wait.h>
23
24 MODULE_LICENSE("GPL");
25 MODULE_DESCRIPTION("GPIB driver for Agilent 82350b");
26
27 static int read_transfer_counter(struct agilent_82350b_priv *a_priv);
28 static unsigned short read_and_clear_event_status(struct gpib_board *board);
29 static void set_transfer_counter(struct agilent_82350b_priv *a_priv, int count);
30 static int agilent_82350b_write(struct gpib_board *board, uint8_t *buffer,
31 size_t length, int send_eoi, size_t *bytes_written);
32
agilent_82350b_accel_read(struct gpib_board * board,uint8_t * buffer,size_t length,int * end,size_t * bytes_read)33 static int agilent_82350b_accel_read(struct gpib_board *board, uint8_t *buffer,
34 size_t length, int *end, size_t *bytes_read)
35
36 {
37 struct agilent_82350b_priv *a_priv = board->private_data;
38 struct tms9914_priv *tms_priv = &a_priv->tms9914_priv;
39 int retval = 0;
40 unsigned short event_status;
41 int i, num_fifo_bytes;
42 //hardware doesn't support checking for end-of-string character when using fifo
43 if (tms_priv->eos_flags & REOS)
44 return tms9914_read(board, tms_priv, buffer, length, end, bytes_read);
45
46 clear_bit(DEV_CLEAR_BN, &tms_priv->state);
47
48 read_and_clear_event_status(board);
49 *end = 0;
50 *bytes_read = 0;
51 if (length == 0)
52 return 0;
53 //disable fifo for the moment
54 writeb(DIRECTION_GPIB_TO_HOST, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
55 // handle corner case of board not in holdoff and one byte might slip in early
56 if (tms_priv->holdoff_active == 0 && length > 1) {
57 size_t num_bytes;
58
59 retval = tms9914_read(board, tms_priv, buffer, 1, end, &num_bytes);
60 *bytes_read += num_bytes;
61 if (retval < 0 || *end)
62 return retval;
63 ++buffer;
64 --length;
65 }
66 tms9914_set_holdoff_mode(tms_priv, TMS9914_HOLDOFF_EOI);
67 tms9914_release_holdoff(tms_priv);
68 i = 0;
69 num_fifo_bytes = length - 1;
70 write_byte(tms_priv, tms_priv->imr0_bits & ~HR_BIIE, IMR0); // disable BI interrupts
71 while (i < num_fifo_bytes && *end == 0) {
72 int block_size;
73 int j;
74 int count;
75
76 block_size = min(num_fifo_bytes - i, agilent_82350b_fifo_size);
77 set_transfer_counter(a_priv, block_size);
78 writeb(ENABLE_TI_TO_SRAM | DIRECTION_GPIB_TO_HOST,
79 a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
80 if (agilent_82350b_fifo_is_halted(a_priv))
81 writeb(RESTART_STREAM_BIT, a_priv->gpib_base + STREAM_STATUS_REG);
82
83 clear_bit(READ_READY_BN, &tms_priv->state);
84
85 retval = wait_event_interruptible(board->wait,
86 ((event_status =
87 read_and_clear_event_status(board)) &
88 (TERM_COUNT_STATUS_BIT |
89 BUFFER_END_STATUS_BIT)) ||
90 test_bit(DEV_CLEAR_BN, &tms_priv->state) ||
91 test_bit(TIMO_NUM, &board->status));
92 if (retval) {
93 retval = -ERESTARTSYS;
94 break;
95 }
96 count = block_size - read_transfer_counter(a_priv);
97 for (j = 0; j < count && i < num_fifo_bytes; ++j)
98 buffer[i++] = readb(a_priv->sram_base + j);
99 if (event_status & BUFFER_END_STATUS_BIT) {
100 clear_bit(RECEIVED_END_BN, &tms_priv->state);
101
102 tms_priv->holdoff_active = 1;
103 *end = 1;
104 }
105 if (test_bit(TIMO_NUM, &board->status)) {
106 retval = -ETIMEDOUT;
107 break;
108 }
109 if (test_bit(DEV_CLEAR_BN, &tms_priv->state)) {
110 retval = -EINTR;
111 break;
112 }
113 }
114 write_byte(tms_priv, tms_priv->imr0_bits, IMR0); // re-enable BI interrupts
115 *bytes_read += i;
116 buffer += i;
117 length -= i;
118 writeb(DIRECTION_GPIB_TO_HOST, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
119 if (retval < 0)
120 return retval;
121 // read last bytes if we havn't received an END yet
122 if (*end == 0) {
123 size_t num_bytes;
124 // try to make sure we holdoff after last byte read
125 retval = tms9914_read(board, tms_priv, buffer, length, end, &num_bytes);
126 *bytes_read += num_bytes;
127 if (retval < 0)
128 return retval;
129 }
130 return 0;
131 }
132
translate_wait_return_value(struct gpib_board * board,int retval)133 static int translate_wait_return_value(struct gpib_board *board, int retval)
134
135 {
136 struct agilent_82350b_priv *a_priv = board->private_data;
137 struct tms9914_priv *tms_priv = &a_priv->tms9914_priv;
138
139 if (retval)
140 return -ERESTARTSYS;
141 if (test_bit(TIMO_NUM, &board->status))
142 return -ETIMEDOUT;
143 if (test_bit(DEV_CLEAR_BN, &tms_priv->state))
144 return -EINTR;
145 return 0;
146 }
147
agilent_82350b_accel_write(struct gpib_board * board,uint8_t * buffer,size_t length,int send_eoi,size_t * bytes_written)148 static int agilent_82350b_accel_write(struct gpib_board *board, uint8_t *buffer,
149 size_t length, int send_eoi,
150 size_t *bytes_written)
151 {
152 struct agilent_82350b_priv *a_priv = board->private_data;
153 struct tms9914_priv *tms_priv = &a_priv->tms9914_priv;
154 int i, j;
155 unsigned short event_status;
156 int retval = 0;
157 int fifotransferlength = length;
158 int block_size = 0;
159 size_t num_bytes;
160
161 *bytes_written = 0;
162 if (send_eoi)
163 --fifotransferlength;
164
165 clear_bit(DEV_CLEAR_BN, &tms_priv->state);
166
167 writeb(0, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
168
169 event_status = read_and_clear_event_status(board);
170
171 #ifdef EXPERIMENTAL
172 // wait for previous BO to complete if any
173 retval = wait_event_interruptible(board->wait,
174 test_bit(DEV_CLEAR_BN, &tms_priv->state) ||
175 test_bit(WRITE_READY_BN, &tms_priv->state) ||
176 test_bit(TIMO_NUM, &board->status));
177 retval = translate_wait_return_value(board, retval);
178
179 if (retval)
180 return retval;
181 #endif
182
183 retval = agilent_82350b_write(board, buffer, 1, 0, &num_bytes);
184 *bytes_written += num_bytes;
185 if (retval < 0)
186 return retval;
187
188 write_byte(tms_priv, tms_priv->imr0_bits & ~HR_BOIE, IMR0);
189 for (i = 1; i < fifotransferlength;) {
190 clear_bit(WRITE_READY_BN, &tms_priv->state);
191
192 block_size = min(fifotransferlength - i, agilent_82350b_fifo_size);
193 set_transfer_counter(a_priv, block_size);
194 for (j = 0; j < block_size; ++j, ++i) {
195 // load data into board's sram
196 writeb(buffer[i], a_priv->sram_base + j);
197 }
198 writeb(ENABLE_TI_TO_SRAM, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
199
200 if (agilent_82350b_fifo_is_halted(a_priv))
201 writeb(RESTART_STREAM_BIT, a_priv->gpib_base + STREAM_STATUS_REG);
202
203 retval = wait_event_interruptible(board->wait,
204 ((event_status =
205 read_and_clear_event_status(board)) &
206 TERM_COUNT_STATUS_BIT) ||
207 test_bit(DEV_CLEAR_BN, &tms_priv->state) ||
208 test_bit(TIMO_NUM, &board->status));
209 writeb(0, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
210 num_bytes = block_size - read_transfer_counter(a_priv);
211
212 *bytes_written += num_bytes;
213 retval = translate_wait_return_value(board, retval);
214 if (retval)
215 break;
216 }
217 write_byte(tms_priv, tms_priv->imr0_bits, IMR0);
218 if (retval)
219 return retval;
220
221 if (send_eoi) {
222 retval = agilent_82350b_write(board, buffer + fifotransferlength, 1, send_eoi,
223 &num_bytes);
224 *bytes_written += num_bytes;
225 if (retval < 0)
226 return retval;
227 }
228 return 0;
229 }
230
read_and_clear_event_status(struct gpib_board * board)231 static unsigned short read_and_clear_event_status(struct gpib_board *board)
232 {
233 struct agilent_82350b_priv *a_priv = board->private_data;
234 unsigned long flags;
235 unsigned short status;
236
237 spin_lock_irqsave(&board->spinlock, flags);
238 status = a_priv->event_status_bits;
239 a_priv->event_status_bits = 0;
240 spin_unlock_irqrestore(&board->spinlock, flags);
241 return status;
242 }
243
agilent_82350b_interrupt(int irq,void * arg)244 static irqreturn_t agilent_82350b_interrupt(int irq, void *arg)
245
246 {
247 int tms9914_status1 = 0, tms9914_status2 = 0;
248 int event_status;
249 struct gpib_board *board = arg;
250 struct agilent_82350b_priv *a_priv = board->private_data;
251 unsigned long flags;
252 irqreturn_t retval = IRQ_NONE;
253
254 spin_lock_irqsave(&board->spinlock, flags);
255 event_status = readb(a_priv->gpib_base + EVENT_STATUS_REG);
256 if (event_status & IRQ_STATUS_BIT)
257 retval = IRQ_HANDLED;
258
259 if (event_status & TMS9914_IRQ_STATUS_BIT) {
260 tms9914_status1 = read_byte(&a_priv->tms9914_priv, ISR0);
261 tms9914_status2 = read_byte(&a_priv->tms9914_priv, ISR1);
262 tms9914_interrupt_have_status(board, &a_priv->tms9914_priv, tms9914_status1,
263 tms9914_status2);
264 }
265 //write-clear status bits
266 if (event_status & (BUFFER_END_STATUS_BIT | TERM_COUNT_STATUS_BIT)) {
267 writeb(event_status & (BUFFER_END_STATUS_BIT | TERM_COUNT_STATUS_BIT),
268 a_priv->gpib_base + EVENT_STATUS_REG);
269 a_priv->event_status_bits |= event_status;
270 wake_up_interruptible(&board->wait);
271 }
272 spin_unlock_irqrestore(&board->spinlock, flags);
273 return retval;
274 }
275
276 static void agilent_82350b_detach(struct gpib_board *board);
277
read_transfer_counter(struct agilent_82350b_priv * a_priv)278 static int read_transfer_counter(struct agilent_82350b_priv *a_priv)
279 {
280 int lo, mid, value;
281
282 lo = readb(a_priv->gpib_base + XFER_COUNT_LO_REG);
283 mid = readb(a_priv->gpib_base + XFER_COUNT_MID_REG);
284 value = (lo & 0xff) | ((mid << 8) & 0x7f00);
285 value = ~(value - 1) & 0x7fff;
286 return value;
287 }
288
set_transfer_counter(struct agilent_82350b_priv * a_priv,int count)289 static void set_transfer_counter(struct agilent_82350b_priv *a_priv, int count)
290 {
291 int complement = -count;
292
293 writeb(complement & 0xff, a_priv->gpib_base + XFER_COUNT_LO_REG);
294 writeb((complement >> 8) & 0xff, a_priv->gpib_base + XFER_COUNT_MID_REG);
295 //I don't think the hi count reg is even used, but oh well
296 writeb((complement >> 16) & 0xf, a_priv->gpib_base + XFER_COUNT_HI_REG);
297 }
298
299 // wrappers for interface functions
agilent_82350b_read(struct gpib_board * board,uint8_t * buffer,size_t length,int * end,size_t * bytes_read)300 static int agilent_82350b_read(struct gpib_board *board, uint8_t *buffer,
301 size_t length, int *end, size_t *bytes_read)
302 {
303 struct agilent_82350b_priv *priv = board->private_data;
304
305 return tms9914_read(board, &priv->tms9914_priv, buffer, length, end, bytes_read);
306 }
307
agilent_82350b_write(struct gpib_board * board,uint8_t * buffer,size_t length,int send_eoi,size_t * bytes_written)308 static int agilent_82350b_write(struct gpib_board *board, uint8_t *buffer,
309 size_t length, int send_eoi, size_t *bytes_written)
310
311 {
312 struct agilent_82350b_priv *priv = board->private_data;
313
314 return tms9914_write(board, &priv->tms9914_priv, buffer, length, send_eoi, bytes_written);
315 }
316
agilent_82350b_command(struct gpib_board * board,uint8_t * buffer,size_t length,size_t * bytes_written)317 static int agilent_82350b_command(struct gpib_board *board, uint8_t *buffer,
318 size_t length, size_t *bytes_written)
319
320 {
321 struct agilent_82350b_priv *priv = board->private_data;
322
323 return tms9914_command(board, &priv->tms9914_priv, buffer, length, bytes_written);
324 }
325
agilent_82350b_take_control(struct gpib_board * board,int synchronous)326 static int agilent_82350b_take_control(struct gpib_board *board, int synchronous)
327
328 {
329 struct agilent_82350b_priv *priv = board->private_data;
330
331 return tms9914_take_control_workaround(board, &priv->tms9914_priv, synchronous);
332 }
333
agilent_82350b_go_to_standby(struct gpib_board * board)334 static int agilent_82350b_go_to_standby(struct gpib_board *board)
335
336 {
337 struct agilent_82350b_priv *priv = board->private_data;
338
339 return tms9914_go_to_standby(board, &priv->tms9914_priv);
340 }
341
agilent_82350b_request_system_control(struct gpib_board * board,int request_control)342 static void agilent_82350b_request_system_control(struct gpib_board *board,
343 int request_control)
344
345 {
346 struct agilent_82350b_priv *a_priv = board->private_data;
347
348 if (request_control) {
349 a_priv->card_mode_bits |= CM_SYSTEM_CONTROLLER_BIT;
350 if (a_priv->model != MODEL_82350A)
351 writeb(IC_SYSTEM_CONTROLLER_BIT, a_priv->gpib_base + INTERNAL_CONFIG_REG);
352 } else {
353 a_priv->card_mode_bits &= ~CM_SYSTEM_CONTROLLER_BIT;
354 if (a_priv->model != MODEL_82350A)
355 writeb(0, a_priv->gpib_base + INTERNAL_CONFIG_REG);
356 }
357 writeb(a_priv->card_mode_bits, a_priv->gpib_base + CARD_MODE_REG);
358 tms9914_request_system_control(board, &a_priv->tms9914_priv, request_control);
359 }
360
agilent_82350b_interface_clear(struct gpib_board * board,int assert)361 static void agilent_82350b_interface_clear(struct gpib_board *board, int assert)
362
363 {
364 struct agilent_82350b_priv *priv = board->private_data;
365
366 tms9914_interface_clear(board, &priv->tms9914_priv, assert);
367 }
368
agilent_82350b_remote_enable(struct gpib_board * board,int enable)369 static void agilent_82350b_remote_enable(struct gpib_board *board, int enable)
370 {
371 struct agilent_82350b_priv *priv = board->private_data;
372
373 tms9914_remote_enable(board, &priv->tms9914_priv, enable);
374 }
375
agilent_82350b_enable_eos(struct gpib_board * board,uint8_t eos_byte,int compare_8_bits)376 static int agilent_82350b_enable_eos(struct gpib_board *board, uint8_t eos_byte,
377 int compare_8_bits)
378 {
379 struct agilent_82350b_priv *priv = board->private_data;
380
381 return tms9914_enable_eos(board, &priv->tms9914_priv, eos_byte, compare_8_bits);
382 }
383
agilent_82350b_disable_eos(struct gpib_board * board)384 static void agilent_82350b_disable_eos(struct gpib_board *board)
385 {
386 struct agilent_82350b_priv *priv = board->private_data;
387
388 tms9914_disable_eos(board, &priv->tms9914_priv);
389 }
390
agilent_82350b_update_status(struct gpib_board * board,unsigned int clear_mask)391 static unsigned int agilent_82350b_update_status(struct gpib_board *board,
392 unsigned int clear_mask)
393 {
394 struct agilent_82350b_priv *priv = board->private_data;
395
396 return tms9914_update_status(board, &priv->tms9914_priv, clear_mask);
397 }
398
agilent_82350b_primary_address(struct gpib_board * board,unsigned int address)399 static int agilent_82350b_primary_address(struct gpib_board *board,
400 unsigned int address)
401 {
402 struct agilent_82350b_priv *priv = board->private_data;
403
404 return tms9914_primary_address(board, &priv->tms9914_priv, address);
405 }
406
agilent_82350b_secondary_address(struct gpib_board * board,unsigned int address,int enable)407 static int agilent_82350b_secondary_address(struct gpib_board *board,
408 unsigned int address, int enable)
409 {
410 struct agilent_82350b_priv *priv = board->private_data;
411
412 return tms9914_secondary_address(board, &priv->tms9914_priv, address, enable);
413 }
414
agilent_82350b_parallel_poll(struct gpib_board * board,uint8_t * result)415 static int agilent_82350b_parallel_poll(struct gpib_board *board, uint8_t *result)
416 {
417 struct agilent_82350b_priv *priv = board->private_data;
418
419 return tms9914_parallel_poll(board, &priv->tms9914_priv, result);
420 }
421
agilent_82350b_parallel_poll_configure(struct gpib_board * board,uint8_t config)422 static void agilent_82350b_parallel_poll_configure(struct gpib_board *board,
423 uint8_t config)
424 {
425 struct agilent_82350b_priv *priv = board->private_data;
426
427 tms9914_parallel_poll_configure(board, &priv->tms9914_priv, config);
428 }
429
agilent_82350b_parallel_poll_response(struct gpib_board * board,int ist)430 static void agilent_82350b_parallel_poll_response(struct gpib_board *board, int ist)
431 {
432 struct agilent_82350b_priv *priv = board->private_data;
433
434 tms9914_parallel_poll_response(board, &priv->tms9914_priv, ist);
435 }
436
agilent_82350b_serial_poll_response(struct gpib_board * board,uint8_t status)437 static void agilent_82350b_serial_poll_response(struct gpib_board *board, uint8_t status)
438 {
439 struct agilent_82350b_priv *priv = board->private_data;
440
441 tms9914_serial_poll_response(board, &priv->tms9914_priv, status);
442 }
443
agilent_82350b_serial_poll_status(struct gpib_board * board)444 static uint8_t agilent_82350b_serial_poll_status(struct gpib_board *board)
445 {
446 struct agilent_82350b_priv *priv = board->private_data;
447
448 return tms9914_serial_poll_status(board, &priv->tms9914_priv);
449 }
450
agilent_82350b_line_status(const struct gpib_board * board)451 static int agilent_82350b_line_status(const struct gpib_board *board)
452 {
453 struct agilent_82350b_priv *priv = board->private_data;
454
455 return tms9914_line_status(board, &priv->tms9914_priv);
456 }
457
agilent_82350b_t1_delay(struct gpib_board * board,unsigned int nanosec)458 static int agilent_82350b_t1_delay(struct gpib_board *board, unsigned int nanosec)
459 {
460 struct agilent_82350b_priv *a_priv = board->private_data;
461 static const int nanosec_per_clock = 30;
462 unsigned int value;
463
464 tms9914_t1_delay(board, &a_priv->tms9914_priv, nanosec);
465
466 value = (nanosec + nanosec_per_clock - 1) / nanosec_per_clock;
467 if (value > 0xff)
468 value = 0xff;
469 writeb(value, a_priv->gpib_base + T1_DELAY_REG);
470 return value * nanosec_per_clock;
471 }
472
agilent_82350b_return_to_local(struct gpib_board * board)473 static void agilent_82350b_return_to_local(struct gpib_board *board)
474 {
475 struct agilent_82350b_priv *priv = board->private_data;
476
477 tms9914_return_to_local(board, &priv->tms9914_priv);
478 }
479
agilent_82350b_allocate_private(struct gpib_board * board)480 static int agilent_82350b_allocate_private(struct gpib_board *board)
481 {
482 board->private_data = kzalloc(sizeof(struct agilent_82350b_priv), GFP_KERNEL);
483 if (!board->private_data)
484 return -ENOMEM;
485 return 0;
486 }
487
agilent_82350b_free_private(struct gpib_board * board)488 static void agilent_82350b_free_private(struct gpib_board *board)
489 {
490 kfree(board->private_data);
491 board->private_data = NULL;
492 }
493
init_82350a_hardware(struct gpib_board * board,const gpib_board_config_t * config)494 static int init_82350a_hardware(struct gpib_board *board,
495 const gpib_board_config_t *config)
496 {
497 struct agilent_82350b_priv *a_priv = board->private_data;
498 static const unsigned int firmware_length = 5302;
499 unsigned int borg_status;
500 static const unsigned int timeout = 1000;
501 int i, j;
502 const char *firmware_data = config->init_data;
503 const unsigned int plx_cntrl_static_bits = PLX9050_WAITO_NOT_USER0_SELECT_BIT |
504 PLX9050_USER0_OUTPUT_BIT |
505 PLX9050_LLOCK_NOT_USER1_SELECT_BIT |
506 PLX9050_USER1_OUTPUT_BIT |
507 PLX9050_USER2_OUTPUT_BIT |
508 PLX9050_USER3_OUTPUT_BIT |
509 PLX9050_PCI_READ_MODE_BIT |
510 PLX9050_PCI_WRITE_MODE_BIT |
511 PLX9050_PCI_RETRY_DELAY_BITS(64) |
512 PLX9050_DIRECT_SLAVE_LOCK_ENABLE_BIT;
513
514 // load borg data
515 borg_status = readb(a_priv->borg_base);
516 if ((borg_status & BORG_DONE_BIT))
517 return 0;
518 // need to programme borg
519 if (!config->init_data || config->init_data_length != firmware_length) {
520 dev_err(board->gpib_dev, "the 82350A board requires firmware after powering on.\n");
521 return -EIO;
522 }
523 dev_dbg(board->gpib_dev, "Loading firmware...\n");
524
525 // tickle the borg
526 writel(plx_cntrl_static_bits | PLX9050_USER3_DATA_BIT,
527 a_priv->plx_base + PLX9050_CNTRL_REG);
528 usleep_range(1000, 2000);
529 writel(plx_cntrl_static_bits, a_priv->plx_base + PLX9050_CNTRL_REG);
530 usleep_range(1000, 2000);
531 writel(plx_cntrl_static_bits | PLX9050_USER3_DATA_BIT,
532 a_priv->plx_base + PLX9050_CNTRL_REG);
533 usleep_range(1000, 2000);
534
535 for (i = 0; i < config->init_data_length; ++i) {
536 for (j = 0; j < timeout && (readb(a_priv->borg_base) & BORG_READY_BIT) == 0; ++j) {
537 if (need_resched())
538 schedule();
539 usleep_range(10, 20);
540 }
541 if (j == timeout) {
542 dev_err(board->gpib_dev, "timed out loading firmware.\n");
543 return -ETIMEDOUT;
544 }
545 writeb(firmware_data[i], a_priv->gpib_base + CONFIG_DATA_REG);
546 }
547 for (j = 0; j < timeout && (readb(a_priv->borg_base) & BORG_DONE_BIT) == 0; ++j) {
548 if (need_resched())
549 schedule();
550 usleep_range(10, 20);
551 }
552 if (j == timeout) {
553 dev_err(board->gpib_dev, "timed out waiting for firmware load to complete.\n");
554 return -ETIMEDOUT;
555 }
556 dev_dbg(board->gpib_dev, " ...done.\n");
557 return 0;
558 }
559
test_sram(struct gpib_board * board)560 static int test_sram(struct gpib_board *board)
561
562 {
563 struct agilent_82350b_priv *a_priv = board->private_data;
564 unsigned int i;
565 const unsigned int sram_length = pci_resource_len(a_priv->pci_device, SRAM_82350A_REGION);
566 // test SRAM
567 const unsigned int byte_mask = 0xff;
568
569 for (i = 0; i < sram_length; ++i) {
570 writeb(i & byte_mask, a_priv->sram_base + i);
571 if (need_resched())
572 schedule();
573 }
574 for (i = 0; i < sram_length; ++i) {
575 unsigned int read_value = readb(a_priv->sram_base + i);
576
577 if ((i & byte_mask) != read_value) {
578 dev_err(board->gpib_dev, "SRAM test failed at %d wanted %d got %d\n",
579 i, (i & byte_mask), read_value);
580 return -EIO;
581 }
582 if (need_resched())
583 schedule();
584 }
585 dev_dbg(board->gpib_dev, "SRAM test passed 0x%x bytes checked\n", sram_length);
586 return 0;
587 }
588
agilent_82350b_generic_attach(struct gpib_board * board,const gpib_board_config_t * config,int use_fifos)589 static int agilent_82350b_generic_attach(struct gpib_board *board,
590 const gpib_board_config_t *config,
591 int use_fifos)
592
593 {
594 struct agilent_82350b_priv *a_priv;
595 struct tms9914_priv *tms_priv;
596 int retval;
597
598 board->status = 0;
599
600 if (agilent_82350b_allocate_private(board))
601 return -ENOMEM;
602 a_priv = board->private_data;
603 a_priv->using_fifos = use_fifos;
604 tms_priv = &a_priv->tms9914_priv;
605 tms_priv->read_byte = tms9914_iomem_read_byte;
606 tms_priv->write_byte = tms9914_iomem_write_byte;
607 tms_priv->offset = 1;
608
609 // find board
610 a_priv->pci_device = gpib_pci_get_device(config, PCI_VENDOR_ID_AGILENT,
611 PCI_DEVICE_ID_82350B, NULL);
612 if (a_priv->pci_device) {
613 a_priv->model = MODEL_82350B;
614 dev_dbg(board->gpib_dev, "Agilent 82350B board found\n");
615
616 } else {
617 a_priv->pci_device = gpib_pci_get_device(config, PCI_VENDOR_ID_AGILENT,
618 PCI_DEVICE_ID_82351A, NULL);
619 if (a_priv->pci_device) {
620 a_priv->model = MODEL_82351A;
621 dev_dbg(board->gpib_dev, "Agilent 82351B board found\n");
622
623 } else {
624 a_priv->pci_device = gpib_pci_get_subsys(config, PCI_VENDOR_ID_PLX,
625 PCI_DEVICE_ID_PLX_9050,
626 PCI_VENDOR_ID_HP,
627 PCI_SUBDEVICE_ID_82350A,
628 a_priv->pci_device);
629 if (a_priv->pci_device) {
630 a_priv->model = MODEL_82350A;
631 dev_dbg(board->gpib_dev, "HP/Agilent 82350A board found\n");
632 } else {
633 dev_err(board->gpib_dev, "no 82350/82351 board found\n");
634 return -ENODEV;
635 }
636 }
637 }
638 if (pci_enable_device(a_priv->pci_device)) {
639 dev_err(board->gpib_dev, "error enabling pci device\n");
640 return -EIO;
641 }
642 if (pci_request_regions(a_priv->pci_device, DRV_NAME))
643 return -ENOMEM;
644 switch (a_priv->model) {
645 case MODEL_82350A:
646 a_priv->plx_base = ioremap(pci_resource_start(a_priv->pci_device, PLX_MEM_REGION),
647 pci_resource_len(a_priv->pci_device, PLX_MEM_REGION));
648 dev_dbg(board->gpib_dev, "plx base address remapped to 0x%p\n", a_priv->plx_base);
649 a_priv->gpib_base = ioremap(pci_resource_start(a_priv->pci_device,
650 GPIB_82350A_REGION),
651 pci_resource_len(a_priv->pci_device,
652 GPIB_82350A_REGION));
653 dev_dbg(board->gpib_dev, "chip base address remapped to 0x%p\n", a_priv->gpib_base);
654 tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG;
655 a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device,
656 SRAM_82350A_REGION),
657 pci_resource_len(a_priv->pci_device,
658 SRAM_82350A_REGION));
659 dev_dbg(board->gpib_dev, "sram base address remapped to 0x%p\n", a_priv->sram_base);
660 a_priv->borg_base = ioremap(pci_resource_start(a_priv->pci_device,
661 BORG_82350A_REGION),
662 pci_resource_len(a_priv->pci_device,
663 BORG_82350A_REGION));
664 dev_dbg(board->gpib_dev, "borg base address remapped to 0x%p\n", a_priv->borg_base);
665
666 retval = init_82350a_hardware(board, config);
667 if (retval < 0)
668 return retval;
669 break;
670 case MODEL_82350B:
671 case MODEL_82351A:
672 a_priv->gpib_base = ioremap(pci_resource_start(a_priv->pci_device, GPIB_REGION),
673 pci_resource_len(a_priv->pci_device, GPIB_REGION));
674 dev_dbg(board->gpib_dev, "chip base address remapped to 0x%p\n", a_priv->gpib_base);
675 tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG;
676 a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device, SRAM_REGION),
677 pci_resource_len(a_priv->pci_device, SRAM_REGION));
678 dev_dbg(board->gpib_dev, "sram base address remapped to 0x%p\n", a_priv->sram_base);
679 a_priv->misc_base = ioremap(pci_resource_start(a_priv->pci_device, MISC_REGION),
680 pci_resource_len(a_priv->pci_device, MISC_REGION));
681 dev_dbg(board->gpib_dev, "misc base address remapped to 0x%p\n", a_priv->misc_base);
682 break;
683 default:
684 dev_err(board->gpib_dev, "invalid board\n");
685 return -ENODEV;
686 }
687
688 retval = test_sram(board);
689 if (retval < 0)
690 return retval;
691
692 if (request_irq(a_priv->pci_device->irq, agilent_82350b_interrupt,
693 IRQF_SHARED, DRV_NAME, board)) {
694 dev_err(board->gpib_dev, "failed to obtain irq %d\n", a_priv->pci_device->irq);
695 return -EIO;
696 }
697 a_priv->irq = a_priv->pci_device->irq;
698 dev_dbg(board->gpib_dev, " IRQ %d\n", a_priv->irq);
699
700 writeb(0, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG);
701 a_priv->card_mode_bits = ENABLE_PCI_IRQ_BIT;
702 writeb(a_priv->card_mode_bits, a_priv->gpib_base + CARD_MODE_REG);
703
704 if (a_priv->model == MODEL_82350A) {
705 // enable PCI interrupts for 82350a
706 writel(PLX9050_LINTR1_EN_BIT | PLX9050_LINTR2_POLARITY_BIT |
707 PLX9050_PCI_INTR_EN_BIT,
708 a_priv->plx_base + PLX9050_INTCSR_REG);
709 }
710
711 if (use_fifos) {
712 writeb(ENABLE_BUFFER_END_EVENTS_BIT | ENABLE_TERM_COUNT_EVENTS_BIT,
713 a_priv->gpib_base + EVENT_ENABLE_REG);
714 writeb(ENABLE_TERM_COUNT_INTERRUPT_BIT | ENABLE_BUFFER_END_INTERRUPT_BIT |
715 ENABLE_TMS9914_INTERRUPTS_BIT, a_priv->gpib_base + INTERRUPT_ENABLE_REG);
716 //write-clear event status bits
717 writeb(BUFFER_END_STATUS_BIT | TERM_COUNT_STATUS_BIT,
718 a_priv->gpib_base + EVENT_STATUS_REG);
719 } else {
720 writeb(0, a_priv->gpib_base + EVENT_ENABLE_REG);
721 writeb(ENABLE_TMS9914_INTERRUPTS_BIT,
722 a_priv->gpib_base + INTERRUPT_ENABLE_REG);
723 }
724 board->t1_nano_sec = agilent_82350b_t1_delay(board, 2000);
725 tms9914_board_reset(tms_priv);
726
727 tms9914_online(board, tms_priv);
728
729 return 0;
730 }
731
agilent_82350b_unaccel_attach(struct gpib_board * board,const gpib_board_config_t * config)732 static int agilent_82350b_unaccel_attach(struct gpib_board *board,
733 const gpib_board_config_t *config)
734 {
735 return agilent_82350b_generic_attach(board, config, 0);
736 }
737
agilent_82350b_accel_attach(struct gpib_board * board,const gpib_board_config_t * config)738 static int agilent_82350b_accel_attach(struct gpib_board *board,
739 const gpib_board_config_t *config)
740 {
741 return agilent_82350b_generic_attach(board, config, 1);
742 }
743
agilent_82350b_detach(struct gpib_board * board)744 static void agilent_82350b_detach(struct gpib_board *board)
745 {
746 struct agilent_82350b_priv *a_priv = board->private_data;
747 struct tms9914_priv *tms_priv;
748
749 if (a_priv) {
750 if (a_priv->plx_base) // disable interrupts
751 writel(0, a_priv->plx_base + PLX9050_INTCSR_REG);
752
753 tms_priv = &a_priv->tms9914_priv;
754 if (a_priv->irq)
755 free_irq(a_priv->irq, board);
756 if (a_priv->gpib_base) {
757 tms9914_board_reset(tms_priv);
758 if (a_priv->misc_base)
759 iounmap(a_priv->misc_base);
760 if (a_priv->borg_base)
761 iounmap(a_priv->borg_base);
762 if (a_priv->sram_base)
763 iounmap(a_priv->sram_base);
764 if (a_priv->gpib_base)
765 iounmap(a_priv->gpib_base);
766 if (a_priv->plx_base)
767 iounmap(a_priv->plx_base);
768 pci_release_regions(a_priv->pci_device);
769 }
770 if (a_priv->pci_device)
771 pci_dev_put(a_priv->pci_device);
772 }
773 agilent_82350b_free_private(board);
774 }
775
776 static gpib_interface_t agilent_82350b_unaccel_interface = {
777 .name = "agilent_82350b_unaccel",
778 .attach = agilent_82350b_unaccel_attach,
779 .detach = agilent_82350b_detach,
780 .read = agilent_82350b_read,
781 .write = agilent_82350b_write,
782 .command = agilent_82350b_command,
783 .request_system_control = agilent_82350b_request_system_control,
784 .take_control = agilent_82350b_take_control,
785 .go_to_standby = agilent_82350b_go_to_standby,
786 .interface_clear = agilent_82350b_interface_clear,
787 .remote_enable = agilent_82350b_remote_enable,
788 .enable_eos = agilent_82350b_enable_eos,
789 .disable_eos = agilent_82350b_disable_eos,
790 .parallel_poll = agilent_82350b_parallel_poll,
791 .parallel_poll_configure = agilent_82350b_parallel_poll_configure,
792 .parallel_poll_response = agilent_82350b_parallel_poll_response,
793 .local_parallel_poll_mode = NULL, // XXX
794 .line_status = agilent_82350b_line_status,
795 .update_status = agilent_82350b_update_status,
796 .primary_address = agilent_82350b_primary_address,
797 .secondary_address = agilent_82350b_secondary_address,
798 .serial_poll_response = agilent_82350b_serial_poll_response,
799 .serial_poll_status = agilent_82350b_serial_poll_status,
800 .t1_delay = agilent_82350b_t1_delay,
801 .return_to_local = agilent_82350b_return_to_local,
802 };
803
804 static gpib_interface_t agilent_82350b_interface = {
805 .name = "agilent_82350b",
806 .attach = agilent_82350b_accel_attach,
807 .detach = agilent_82350b_detach,
808 .read = agilent_82350b_accel_read,
809 .write = agilent_82350b_accel_write,
810 .command = agilent_82350b_command,
811 .request_system_control = agilent_82350b_request_system_control,
812 .take_control = agilent_82350b_take_control,
813 .go_to_standby = agilent_82350b_go_to_standby,
814 .interface_clear = agilent_82350b_interface_clear,
815 .remote_enable = agilent_82350b_remote_enable,
816 .enable_eos = agilent_82350b_enable_eos,
817 .disable_eos = agilent_82350b_disable_eos,
818 .parallel_poll = agilent_82350b_parallel_poll,
819 .parallel_poll_configure = agilent_82350b_parallel_poll_configure,
820 .parallel_poll_response = agilent_82350b_parallel_poll_response,
821 .local_parallel_poll_mode = NULL, // XXX
822 .line_status = agilent_82350b_line_status,
823 .update_status = agilent_82350b_update_status,
824 .primary_address = agilent_82350b_primary_address,
825 .secondary_address = agilent_82350b_secondary_address,
826 .serial_poll_response = agilent_82350b_serial_poll_response,
827 .serial_poll_status = agilent_82350b_serial_poll_status,
828 .t1_delay = agilent_82350b_t1_delay,
829 .return_to_local = agilent_82350b_return_to_local,
830 };
831
agilent_82350b_pci_probe(struct pci_dev * dev,const struct pci_device_id * id)832 static int agilent_82350b_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
833
834 {
835 return 0;
836 }
837
838 static const struct pci_device_id agilent_82350b_pci_table[] = {
839 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_HP,
840 PCI_SUBDEVICE_ID_82350A, 0, 0, 0 },
841 { PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_82350B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
842 { PCI_VENDOR_ID_AGILENT, PCI_DEVICE_ID_82351A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
843 { 0 }
844 };
845 MODULE_DEVICE_TABLE(pci, agilent_82350b_pci_table);
846
847 static struct pci_driver agilent_82350b_pci_driver = {
848 .name = DRV_NAME,
849 .id_table = agilent_82350b_pci_table,
850 .probe = &agilent_82350b_pci_probe
851 };
852
agilent_82350b_init_module(void)853 static int __init agilent_82350b_init_module(void)
854 {
855 int result;
856
857 result = pci_register_driver(&agilent_82350b_pci_driver);
858 if (result) {
859 pr_err("pci_register_driver failed: error = %d\n", result);
860 return result;
861 }
862
863 result = gpib_register_driver(&agilent_82350b_unaccel_interface, THIS_MODULE);
864 if (result) {
865 pr_err("gpib_register_driver failed: error = %d\n", result);
866 goto err_unaccel;
867 }
868
869 result = gpib_register_driver(&agilent_82350b_interface, THIS_MODULE);
870 if (result) {
871 pr_err("gpib_register_driver failed: error = %d\n", result);
872 goto err_interface;
873 }
874
875 return 0;
876
877 err_interface:
878 gpib_unregister_driver(&agilent_82350b_unaccel_interface);
879 err_unaccel:
880 pci_unregister_driver(&agilent_82350b_pci_driver);
881
882 return result;
883 }
884
agilent_82350b_exit_module(void)885 static void __exit agilent_82350b_exit_module(void)
886 {
887 gpib_unregister_driver(&agilent_82350b_interface);
888 gpib_unregister_driver(&agilent_82350b_unaccel_interface);
889
890 pci_unregister_driver(&agilent_82350b_pci_driver);
891 }
892
893 module_init(agilent_82350b_init_module);
894 module_exit(agilent_82350b_exit_module);
895