1 /*
2 * arch/arm/mach-spear6xx/spear6xx.c
3 *
4 * SPEAr6XX machines common source file
5 *
6 * Copyright (C) 2009 ST Microelectronics
7 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14 #include <linux/types.h>
15 #include <linux/amba/pl061.h>
16 #include <linux/ptrace.h>
17 #include <linux/io.h>
18 #include <asm/hardware/vic.h>
19 #include <asm/irq.h>
20 #include <asm/mach/arch.h>
21 #include <mach/generic.h>
22 #include <mach/hardware.h>
23 #include <mach/irqs.h>
24
25 /* Add spear6xx machines common devices here */
26 /* uart device registration */
27 struct amba_device uart_device[] = {
28 {
29 .dev = {
30 .init_name = "uart0",
31 },
32 .res = {
33 .start = SPEAR6XX_ICM1_UART0_BASE,
34 .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
35 .flags = IORESOURCE_MEM,
36 },
37 .irq = {IRQ_UART_0, NO_IRQ},
38 }, {
39 .dev = {
40 .init_name = "uart1",
41 },
42 .res = {
43 .start = SPEAR6XX_ICM1_UART1_BASE,
44 .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
45 .flags = IORESOURCE_MEM,
46 },
47 .irq = {IRQ_UART_1, NO_IRQ},
48 }
49 };
50
51 /* gpio device registration */
52 static struct pl061_platform_data gpio_plat_data[] = {
53 {
54 .gpio_base = 0,
55 .irq_base = SPEAR_GPIO0_INT_BASE,
56 }, {
57 .gpio_base = 8,
58 .irq_base = SPEAR_GPIO1_INT_BASE,
59 }, {
60 .gpio_base = 16,
61 .irq_base = SPEAR_GPIO2_INT_BASE,
62 },
63 };
64
65 struct amba_device gpio_device[] = {
66 {
67 .dev = {
68 .init_name = "gpio0",
69 .platform_data = &gpio_plat_data[0],
70 },
71 .res = {
72 .start = SPEAR6XX_CPU_GPIO_BASE,
73 .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
74 .flags = IORESOURCE_MEM,
75 },
76 .irq = {IRQ_LOCAL_GPIO, NO_IRQ},
77 }, {
78 .dev = {
79 .init_name = "gpio1",
80 .platform_data = &gpio_plat_data[1],
81 },
82 .res = {
83 .start = SPEAR6XX_ICM3_GPIO_BASE,
84 .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
85 .flags = IORESOURCE_MEM,
86 },
87 .irq = {IRQ_BASIC_GPIO, NO_IRQ},
88 }, {
89 .dev = {
90 .init_name = "gpio2",
91 .platform_data = &gpio_plat_data[2],
92 },
93 .res = {
94 .start = SPEAR6XX_ICM2_GPIO_BASE,
95 .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
96 .flags = IORESOURCE_MEM,
97 },
98 .irq = {IRQ_APPL_GPIO, NO_IRQ},
99 }
100 };
101
102 /* This will add devices, and do machine specific tasks */
spear6xx_init(void)103 void __init spear6xx_init(void)
104 {
105 /* nothing to do for now */
106 }
107
108 /* This will initialize vic */
spear6xx_init_irq(void)109 void __init spear6xx_init_irq(void)
110 {
111 vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_PRI_BASE, 0, ~0, 0);
112 vic_init((void __iomem *)VA_SPEAR6XX_CPU_VIC_SEC_BASE, 32, ~0, 0);
113 }
114
115 /* Following will create static virtual/physical mappings */
116 static struct map_desc spear6xx_io_desc[] __initdata = {
117 {
118 .virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
119 .pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
120 .length = SZ_4K,
121 .type = MT_DEVICE
122 }, {
123 .virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
124 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
125 .length = SZ_4K,
126 .type = MT_DEVICE
127 }, {
128 .virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
129 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
130 .length = SZ_4K,
131 .type = MT_DEVICE
132 }, {
133 .virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
134 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
135 .length = SZ_4K,
136 .type = MT_DEVICE
137 }, {
138 .virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
139 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
140 .length = SZ_4K,
141 .type = MT_DEVICE
142 },
143 };
144
145 /* This will create static memory mapping for selected devices */
spear6xx_map_io(void)146 void __init spear6xx_map_io(void)
147 {
148 iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
149
150 /* This will initialize clock framework */
151 spear6xx_clk_init();
152 }
153
spear6xx_timer_init(void)154 static void __init spear6xx_timer_init(void)
155 {
156 char pclk_name[] = "pll3_48m_clk";
157 struct clk *gpt_clk, *pclk;
158
159 /* get the system timer clock */
160 gpt_clk = clk_get_sys("gpt0", NULL);
161 if (IS_ERR(gpt_clk)) {
162 pr_err("%s:couldn't get clk for gpt\n", __func__);
163 BUG();
164 }
165
166 /* get the suitable parent clock for timer*/
167 pclk = clk_get(NULL, pclk_name);
168 if (IS_ERR(pclk)) {
169 pr_err("%s:couldn't get %s as parent for gpt\n",
170 __func__, pclk_name);
171 BUG();
172 }
173
174 clk_set_parent(gpt_clk, pclk);
175 clk_put(gpt_clk);
176 clk_put(pclk);
177
178 spear_setup_timer();
179 }
180
181 struct sys_timer spear6xx_timer = {
182 .init = spear6xx_timer_init,
183 };
184