1 /*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * Hypercall based emulated RTAS
5 *
6 * Copyright (c) 2010-2011 David Gibson, IBM Corporation.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 *
26 */
27
28 #include "qemu/osdep.h"
29 #include "qemu/log.h"
30 #include "qemu/error-report.h"
31 #include "system/system.h"
32 #include "system/device_tree.h"
33 #include "system/cpus.h"
34 #include "system/hw_accel.h"
35 #include "system/runstate.h"
36 #include "system/qtest.h"
37 #include "kvm_ppc.h"
38
39 #include "hw/ppc/spapr.h"
40 #include "hw/ppc/spapr_vio.h"
41 #include "hw/ppc/spapr_cpu_core.h"
42 #include "hw/ppc/ppc.h"
43
44 #include <libfdt.h>
45 #include "hw/ppc/spapr_drc.h"
46 #include "qemu/cutils.h"
47 #include "trace.h"
48 #include "hw/ppc/fdt.h"
49 #include "target/ppc/mmu-hash64.h"
50 #include "target/ppc/mmu-book3s-v3.h"
51 #include "migration/blocker.h"
52 #include "helper_regs.h"
53
rtas_display_character(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)54 static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr,
55 uint32_t token, uint32_t nargs,
56 target_ulong args,
57 uint32_t nret, target_ulong rets)
58 {
59 uint8_t c = rtas_ld(args, 0);
60 SpaprVioDevice *sdev = vty_lookup(spapr, 0);
61
62 if (!sdev) {
63 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
64 } else {
65 vty_putchars(sdev, &c, sizeof(c));
66 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
67 }
68 }
69
rtas_power_off(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)70 static void rtas_power_off(PowerPCCPU *cpu, SpaprMachineState *spapr,
71 uint32_t token, uint32_t nargs, target_ulong args,
72 uint32_t nret, target_ulong rets)
73 {
74 if (nargs != 2 || nret != 1) {
75 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
76 return;
77 }
78 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
79 cpu_stop_current();
80 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
81 }
82
rtas_system_reboot(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)83 static void rtas_system_reboot(PowerPCCPU *cpu, SpaprMachineState *spapr,
84 uint32_t token, uint32_t nargs,
85 target_ulong args,
86 uint32_t nret, target_ulong rets)
87 {
88 if (nargs != 0 || nret != 1) {
89 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
90 return;
91 }
92 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
93 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
94 }
95
rtas_query_cpu_stopped_state(PowerPCCPU * cpu_,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)96 static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_,
97 SpaprMachineState *spapr,
98 uint32_t token, uint32_t nargs,
99 target_ulong args,
100 uint32_t nret, target_ulong rets)
101 {
102 target_ulong id;
103 PowerPCCPU *cpu;
104
105 if (nargs != 1 || nret != 2) {
106 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
107 return;
108 }
109
110 id = rtas_ld(args, 0);
111 cpu = spapr_find_cpu(id);
112 if (cpu != NULL) {
113 CPUPPCState *env = &cpu->env;
114 if (env->quiesced) {
115 rtas_st(rets, 1, 0);
116 } else {
117 rtas_st(rets, 1, 2);
118 }
119
120 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
121 return;
122 }
123
124 /* Didn't find a matching cpu */
125 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
126 }
127
rtas_start_cpu(PowerPCCPU * callcpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)128 static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr,
129 uint32_t token, uint32_t nargs,
130 target_ulong args,
131 uint32_t nret, target_ulong rets)
132 {
133 target_ulong id, start, r3;
134 PowerPCCPU *newcpu;
135 CPUPPCState *env;
136 target_ulong lpcr;
137 target_ulong caller_lpcr;
138
139 if (nargs != 3 || nret != 1) {
140 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
141 return;
142 }
143
144 id = rtas_ld(args, 0);
145 start = rtas_ld(args, 1);
146 r3 = rtas_ld(args, 2);
147
148 newcpu = spapr_find_cpu(id);
149 if (!newcpu) {
150 /* Didn't find a matching cpu */
151 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
152 return;
153 }
154
155 env = &newcpu->env;
156
157 if (!CPU(newcpu)->halted) {
158 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
159 return;
160 }
161
162 cpu_synchronize_state(CPU(newcpu));
163
164 env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
165 hreg_compute_hflags(env);
166
167 caller_lpcr = callcpu->env.spr[SPR_LPCR];
168 lpcr = env->spr[SPR_LPCR];
169
170 /* Set ILE the same way */
171 lpcr = (lpcr & ~LPCR_ILE) | (caller_lpcr & LPCR_ILE);
172
173 /* Set AIL the same way */
174 lpcr = (lpcr & ~LPCR_AIL) | (caller_lpcr & LPCR_AIL);
175
176 if (env->mmu_model == POWERPC_MMU_3_00) {
177 /*
178 * New cpus are expected to start in the same radix/hash mode
179 * as the existing CPUs
180 */
181 if (ppc64_v3_radix(callcpu)) {
182 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
183 } else {
184 lpcr &= ~(LPCR_UPRT | LPCR_GTSE | LPCR_HR);
185 }
186 env->spr[SPR_PSSCR] &= ~PSSCR_EC;
187 }
188 ppc_store_lpcr(newcpu, lpcr);
189
190 /*
191 * Set the timebase offset of the new CPU to that of the invoking
192 * CPU. This helps hotplugged CPU to have the correct timebase
193 * offset.
194 */
195 newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset;
196
197 spapr_cpu_set_entry_state(newcpu, start, 0, r3, 0);
198
199 qemu_cpu_kick(CPU(newcpu));
200
201 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
202 }
203
rtas_stop_self(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)204 static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr,
205 uint32_t token, uint32_t nargs,
206 target_ulong args,
207 uint32_t nret, target_ulong rets)
208 {
209 CPUState *cs = CPU(cpu);
210 CPUPPCState *env = &cpu->env;
211 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
212
213 /* Disable Power-saving mode Exit Cause exceptions for the CPU.
214 * This could deliver an interrupt on a dying CPU and crash the
215 * guest.
216 * For the same reason, set PSSCR_EC.
217 */
218 env->spr[SPR_PSSCR] |= PSSCR_EC;
219 env->quiesced = true; /* set "RTAS stopped" state. */
220 ppc_maybe_interrupt(env);
221 cs->halted = 1;
222 ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm);
223 kvmppc_set_reg_ppc_online(cpu, 0);
224 qemu_cpu_kick(cs);
225 }
226
rtas_ibm_suspend_me(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)227 static void rtas_ibm_suspend_me(PowerPCCPU *cpu, SpaprMachineState *spapr,
228 uint32_t token, uint32_t nargs,
229 target_ulong args,
230 uint32_t nret, target_ulong rets)
231 {
232 CPUState *cs;
233
234 if (nargs != 0 || nret != 1) {
235 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
236 return;
237 }
238
239 CPU_FOREACH(cs) {
240 PowerPCCPU *c = POWERPC_CPU(cs);
241 CPUPPCState *e = &c->env;
242 if (c == cpu) {
243 continue;
244 }
245
246 /* See h_join */
247 if (!cs->halted || (e->msr & (1ULL << MSR_EE))) {
248 rtas_st(rets, 0, H_MULTI_THREADS_ACTIVE);
249 return;
250 }
251 }
252
253 qemu_system_suspend_request();
254 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
255 }
256
sysparm_st(target_ulong addr,target_ulong len,const void * val,uint16_t vallen)257 static inline int sysparm_st(target_ulong addr, target_ulong len,
258 const void *val, uint16_t vallen)
259 {
260 hwaddr phys = ppc64_phys_to_real(addr);
261
262 if (len < 2) {
263 return RTAS_OUT_SYSPARM_PARAM_ERROR;
264 }
265 stw_be_phys(&address_space_memory, phys, vallen);
266 cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen));
267 return RTAS_OUT_SUCCESS;
268 }
269
rtas_ibm_get_system_parameter(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)270 static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
271 SpaprMachineState *spapr,
272 uint32_t token, uint32_t nargs,
273 target_ulong args,
274 uint32_t nret, target_ulong rets)
275 {
276 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
277 MachineState *ms = MACHINE(spapr);
278 target_ulong parameter = rtas_ld(args, 0);
279 target_ulong buffer = rtas_ld(args, 1);
280 target_ulong length = rtas_ld(args, 2);
281 target_ulong ret;
282
283 switch (parameter) {
284 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
285 g_autofree char *param_val = g_strdup_printf("MaxEntCap=%d,"
286 "DesMem=%" PRIu64 ","
287 "DesProcs=%d,"
288 "MaxPlatProcs=%d",
289 ms->smp.max_cpus,
290 ms->ram_size / MiB,
291 ms->smp.cpus,
292 ms->smp.max_cpus);
293 if (pcc->n_host_threads > 0) {
294 /*
295 * Add HostThrs property. This property is not present in PAPR but
296 * is expected by some guests to communicate the number of physical
297 * host threads per core on the system so that they can scale
298 * information which varies based on the thread configuration.
299 */
300 g_autofree char *hostthr_val = g_strdup_printf(",HostThrs=%d",
301 pcc->n_host_threads);
302 char *old = param_val;
303
304 param_val = g_strconcat(param_val, hostthr_val, NULL);
305 g_free(old);
306 }
307 ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
308 break;
309 }
310 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: {
311 uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED;
312
313 ret = sysparm_st(buffer, length, ¶m_val, sizeof(param_val));
314 break;
315 }
316 case RTAS_SYSPARM_UUID:
317 ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid,
318 (qemu_uuid_set ? 16 : 0));
319 break;
320 default:
321 ret = RTAS_OUT_NOT_SUPPORTED;
322 }
323
324 rtas_st(rets, 0, ret);
325 }
326
rtas_ibm_set_system_parameter(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)327 static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu,
328 SpaprMachineState *spapr,
329 uint32_t token, uint32_t nargs,
330 target_ulong args,
331 uint32_t nret, target_ulong rets)
332 {
333 target_ulong parameter = rtas_ld(args, 0);
334 target_ulong ret = RTAS_OUT_NOT_SUPPORTED;
335
336 switch (parameter) {
337 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS:
338 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE:
339 case RTAS_SYSPARM_UUID:
340 ret = RTAS_OUT_NOT_AUTHORIZED;
341 break;
342 }
343
344 rtas_st(rets, 0, ret);
345 }
346
rtas_ibm_os_term(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)347 static void rtas_ibm_os_term(PowerPCCPU *cpu,
348 SpaprMachineState *spapr,
349 uint32_t token, uint32_t nargs,
350 target_ulong args,
351 uint32_t nret, target_ulong rets)
352 {
353 target_ulong msgaddr = rtas_ld(args, 0);
354 char msg[512];
355
356 cpu_physical_memory_read(msgaddr, msg, sizeof(msg) - 1);
357 msg[sizeof(msg) - 1] = 0;
358
359 error_report("OS terminated: %s", msg);
360 qemu_system_guest_panicked(NULL);
361
362 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
363 }
364
rtas_set_power_level(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)365 static void rtas_set_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
366 uint32_t token, uint32_t nargs,
367 target_ulong args, uint32_t nret,
368 target_ulong rets)
369 {
370 int32_t power_domain;
371
372 if (nargs != 2 || nret != 2) {
373 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
374 return;
375 }
376
377 /* we currently only use a single, "live insert" powerdomain for
378 * hotplugged/dlpar'd resources, so the power is always live/full (100)
379 */
380 power_domain = rtas_ld(args, 0);
381 if (power_domain != -1) {
382 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
383 return;
384 }
385
386 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
387 rtas_st(rets, 1, 100);
388 }
389
rtas_get_power_level(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)390 static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
391 uint32_t token, uint32_t nargs,
392 target_ulong args, uint32_t nret,
393 target_ulong rets)
394 {
395 int32_t power_domain;
396
397 if (nargs != 1 || nret != 2) {
398 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
399 return;
400 }
401
402 /* we currently only use a single, "live insert" powerdomain for
403 * hotplugged/dlpar'd resources, so the power is always live/full (100)
404 */
405 power_domain = rtas_ld(args, 0);
406 if (power_domain != -1) {
407 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
408 return;
409 }
410
411 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
412 rtas_st(rets, 1, 100);
413 }
414
rtas_ibm_nmi_register(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)415 static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
416 SpaprMachineState *spapr,
417 uint32_t token, uint32_t nargs,
418 target_ulong args,
419 uint32_t nret, target_ulong rets)
420 {
421 hwaddr rtas_addr;
422 target_ulong sreset_addr, mce_addr;
423
424 if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) {
425 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
426 return;
427 }
428
429 rtas_addr = spapr_get_rtas_addr();
430 if (!rtas_addr) {
431 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
432 return;
433 }
434
435 sreset_addr = rtas_ld(args, 0);
436 mce_addr = rtas_ld(args, 1);
437
438 /* PAPR requires these are in the first 32M of memory and within RMA */
439 if (sreset_addr >= 32 * MiB || sreset_addr >= spapr->rma_size ||
440 mce_addr >= 32 * MiB || mce_addr >= spapr->rma_size) {
441 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
442 return;
443 }
444
445 if (kvm_enabled()) {
446 if (kvmppc_set_fwnmi(cpu) < 0) {
447 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
448 return;
449 }
450 }
451
452 spapr->fwnmi_system_reset_addr = sreset_addr;
453 spapr->fwnmi_machine_check_addr = mce_addr;
454
455 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
456 }
457
rtas_ibm_nmi_interlock(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)458 static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
459 SpaprMachineState *spapr,
460 uint32_t token, uint32_t nargs,
461 target_ulong args,
462 uint32_t nret, target_ulong rets)
463 {
464 if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) {
465 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
466 return;
467 }
468
469 if (spapr->fwnmi_machine_check_addr == -1) {
470 qemu_log_mask(LOG_GUEST_ERROR,
471 "FWNMI: ibm,nmi-interlock RTAS called with FWNMI not registered.\n");
472
473 /* NMI register not called */
474 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
475 return;
476 }
477
478 if (spapr->fwnmi_machine_check_interlock != cpu->vcpu_id) {
479 /*
480 * The vCPU that hit the NMI should invoke "ibm,nmi-interlock"
481 * This should be PARAM_ERROR, but Linux calls "ibm,nmi-interlock"
482 * for system reset interrupts, despite them not being interlocked.
483 * PowerVM silently ignores this and returns success here. Returning
484 * failure causes Linux to print the error "FWNMI: nmi-interlock
485 * failed: -3", although no other apparent ill effects, this is a
486 * regression for the user when enabling FWNMI. So for now, match
487 * PowerVM. When most Linux clients are fixed, this could be
488 * changed.
489 */
490 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
491 return;
492 }
493
494 /*
495 * vCPU issuing "ibm,nmi-interlock" is done with NMI handling,
496 * hence unset fwnmi_machine_check_interlock.
497 */
498 spapr->fwnmi_machine_check_interlock = -1;
499 qemu_cond_signal(&spapr->fwnmi_machine_check_interlock_cond);
500 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
501 migrate_del_blocker(&spapr->fwnmi_migration_blocker);
502 }
503
504 static struct rtas_call {
505 const char *name;
506 spapr_rtas_fn fn;
507 } rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE];
508
spapr_rtas_call(PowerPCCPU * cpu,SpaprMachineState * spapr,uint32_t token,uint32_t nargs,target_ulong args,uint32_t nret,target_ulong rets)509 target_ulong spapr_rtas_call(PowerPCCPU *cpu, SpaprMachineState *spapr,
510 uint32_t token, uint32_t nargs, target_ulong args,
511 uint32_t nret, target_ulong rets)
512 {
513 if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) {
514 struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE);
515
516 if (call->fn) {
517 call->fn(cpu, spapr, token, nargs, args, nret, rets);
518 return H_SUCCESS;
519 }
520 }
521
522 /* HACK: Some Linux early debug code uses RTAS display-character,
523 * but assumes the token value is 0xa (which it is on some real
524 * machines) without looking it up in the device tree. This
525 * special case makes this work */
526 if (token == 0xa) {
527 rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets);
528 return H_SUCCESS;
529 }
530
531 hcall_dprintf("Unknown RTAS token 0x%x\n", token);
532 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
533 return H_PARAMETER;
534 }
535
qtest_rtas_call(char * cmd,uint32_t nargs,uint64_t args,uint32_t nret,uint64_t rets)536 static uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args,
537 uint32_t nret, uint64_t rets)
538 {
539 int token;
540
541 for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) {
542 if (strcmp(cmd, rtas_table[token].name) == 0) {
543 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
544 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
545
546 rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE,
547 nargs, args, nret, rets);
548 return H_SUCCESS;
549 }
550 }
551 return H_PARAMETER;
552 }
553
spapr_qtest_callback(CharBackend * chr,gchar ** words)554 static bool spapr_qtest_callback(CharBackend *chr, gchar **words)
555 {
556 if (strcmp(words[0], "rtas") == 0) {
557 uint64_t res, args, ret;
558 unsigned long nargs, nret;
559 int rc;
560
561 rc = qemu_strtoul(words[2], NULL, 0, &nargs);
562 g_assert(rc == 0);
563 rc = qemu_strtou64(words[3], NULL, 0, &args);
564 g_assert(rc == 0);
565 rc = qemu_strtoul(words[4], NULL, 0, &nret);
566 g_assert(rc == 0);
567 rc = qemu_strtou64(words[5], NULL, 0, &ret);
568 g_assert(rc == 0);
569 res = qtest_rtas_call(words[1], nargs, args, nret, ret);
570
571 qtest_sendf(chr, "OK %"PRIu64"\n", res);
572
573 return true;
574 }
575
576 return false;
577 }
578
spapr_rtas_register(int token,const char * name,spapr_rtas_fn fn)579 void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn)
580 {
581 assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX));
582
583 token -= RTAS_TOKEN_BASE;
584
585 assert(!name || !rtas_table[token].name);
586
587 rtas_table[token].name = name;
588 rtas_table[token].fn = fn;
589 }
590
spapr_dt_rtas_tokens(void * fdt,int rtas)591 void spapr_dt_rtas_tokens(void *fdt, int rtas)
592 {
593 int i;
594
595 for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) {
596 struct rtas_call *call = &rtas_table[i];
597
598 if (!call->name) {
599 continue;
600 }
601
602 _FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE));
603 }
604 }
605
spapr_get_rtas_addr(void)606 hwaddr spapr_get_rtas_addr(void)
607 {
608 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
609 int rtas_node;
610 const fdt32_t *rtas_data;
611 void *fdt = spapr->fdt_blob;
612
613 /* fetch rtas addr from fdt */
614 rtas_node = fdt_path_offset(fdt, "/rtas");
615 if (rtas_node < 0) {
616 return 0;
617 }
618
619 rtas_data = fdt_getprop(fdt, rtas_node, "linux,rtas-base", NULL);
620 if (!rtas_data) {
621 return 0;
622 }
623
624 /*
625 * We assume that the OS called RTAS instantiate-rtas, but some other
626 * OS might call RTAS instantiate-rtas-64 instead. This fine as of now
627 * as SLOF only supports 32-bit variant.
628 */
629 return (hwaddr)fdt32_to_cpu(*rtas_data);
630 }
631
core_rtas_register_types(void)632 static void core_rtas_register_types(void)
633 {
634 spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character",
635 rtas_display_character);
636 spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off);
637 spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot",
638 rtas_system_reboot);
639 spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state",
640 rtas_query_cpu_stopped_state);
641 spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu);
642 spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self);
643 spapr_rtas_register(RTAS_IBM_SUSPEND_ME, "ibm,suspend-me",
644 rtas_ibm_suspend_me);
645 spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER,
646 "ibm,get-system-parameter",
647 rtas_ibm_get_system_parameter);
648 spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER,
649 "ibm,set-system-parameter",
650 rtas_ibm_set_system_parameter);
651 spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term",
652 rtas_ibm_os_term);
653 spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level",
654 rtas_set_power_level);
655 spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
656 rtas_get_power_level);
657 spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
658 rtas_ibm_nmi_register);
659 spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
660 rtas_ibm_nmi_interlock);
661
662 qtest_set_command_cb(spapr_qtest_callback);
663 }
664
665 type_init(core_rtas_register_types)
666