xref: /linux/drivers/macintosh/smu.c (revision 1260ed77798502de9c98020040d2995008de10cc)
1  // SPDX-License-Identifier: GPL-2.0-only
2  /*
3   * PowerMac G5 SMU driver
4   *
5   * Copyright 2004 J. Mayer <l_indien@magic.fr>
6   * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
7   */
8  
9  /*
10   * TODO:
11   *  - maybe add timeout to commands ?
12   *  - blocking version of time functions
13   *  - polling version of i2c commands (including timer that works with
14   *    interrupts off)
15   *  - maybe avoid some data copies with i2c by directly using the smu cmd
16   *    buffer and a lower level internal interface
17   *  - understand SMU -> CPU events and implement reception of them via
18   *    the userland interface
19   */
20  
21  #include <linux/types.h>
22  #include <linux/kernel.h>
23  #include <linux/device.h>
24  #include <linux/dmapool.h>
25  #include <linux/memblock.h>
26  #include <linux/vmalloc.h>
27  #include <linux/highmem.h>
28  #include <linux/jiffies.h>
29  #include <linux/interrupt.h>
30  #include <linux/rtc.h>
31  #include <linux/completion.h>
32  #include <linux/miscdevice.h>
33  #include <linux/delay.h>
34  #include <linux/poll.h>
35  #include <linux/mutex.h>
36  #include <linux/of.h>
37  #include <linux/of_address.h>
38  #include <linux/of_irq.h>
39  #include <linux/of_platform.h>
40  #include <linux/platform_device.h>
41  #include <linux/slab.h>
42  #include <linux/sched/signal.h>
43  
44  #include <asm/byteorder.h>
45  #include <asm/io.h>
46  #include <asm/machdep.h>
47  #include <asm/pmac_feature.h>
48  #include <asm/smu.h>
49  #include <asm/sections.h>
50  #include <linux/uaccess.h>
51  
52  #define VERSION "0.7"
53  #define AUTHOR  "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
54  
55  #undef DEBUG_SMU
56  
57  #ifdef DEBUG_SMU
58  #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
59  #else
60  #define DPRINTK(fmt, args...) do { } while (0)
61  #endif
62  
63  /*
64   * This is the command buffer passed to the SMU hardware
65   */
66  #define SMU_MAX_DATA	254
67  
68  struct smu_cmd_buf {
69  	u8 cmd;
70  	u8 length;
71  	u8 data[SMU_MAX_DATA];
72  };
73  
74  struct smu_device {
75  	spinlock_t		lock;
76  	struct device_node	*of_node;
77  	struct platform_device	*of_dev;
78  	int			doorbell;	/* doorbell gpio */
79  	u32 __iomem		*db_buf;	/* doorbell buffer */
80  	struct device_node	*db_node;
81  	unsigned int		db_irq;
82  	int			msg;
83  	struct device_node	*msg_node;
84  	unsigned int		msg_irq;
85  	struct smu_cmd_buf	*cmd_buf;	/* command buffer virtual */
86  	u32			cmd_buf_abs;	/* command buffer absolute */
87  	struct list_head	cmd_list;
88  	struct smu_cmd		*cmd_cur;	/* pending command */
89  	int			broken_nap;
90  	struct list_head	cmd_i2c_list;
91  	struct smu_i2c_cmd	*cmd_i2c_cur;	/* pending i2c command */
92  	struct timer_list	i2c_timer;
93  };
94  
95  /*
96   * I don't think there will ever be more than one SMU, so
97   * for now, just hard code that
98   */
99  static DEFINE_MUTEX(smu_mutex);
100  static struct smu_device	*smu;
101  static DEFINE_MUTEX(smu_part_access);
102  static int smu_irq_inited;
103  static unsigned long smu_cmdbuf_abs;
104  
105  static void smu_i2c_retry(struct timer_list *t);
106  
107  /*
108   * SMU driver low level stuff
109   */
110  
smu_start_cmd(void)111  static void smu_start_cmd(void)
112  {
113  	unsigned long faddr, fend;
114  	struct smu_cmd *cmd;
115  
116  	if (list_empty(&smu->cmd_list))
117  		return;
118  
119  	/* Fetch first command in queue */
120  	cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
121  	smu->cmd_cur = cmd;
122  	list_del(&cmd->link);
123  
124  	DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
125  		cmd->data_len);
126  	DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf);
127  
128  	/* Fill the SMU command buffer */
129  	smu->cmd_buf->cmd = cmd->cmd;
130  	smu->cmd_buf->length = cmd->data_len;
131  	memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
132  
133  	/* Flush command and data to RAM */
134  	faddr = (unsigned long)smu->cmd_buf;
135  	fend = faddr + smu->cmd_buf->length + 2;
136  	flush_dcache_range(faddr, fend);
137  
138  
139  	/* We also disable NAP mode for the duration of the command
140  	 * on U3 based machines.
141  	 * This is slightly racy as it can be written back to 1 by a sysctl
142  	 * but that never happens in practice. There seem to be an issue with
143  	 * U3 based machines such as the iMac G5 where napping for the
144  	 * whole duration of the command prevents the SMU from fetching it
145  	 * from memory. This might be related to the strange i2c based
146  	 * mechanism the SMU uses to access memory.
147  	 */
148  	if (smu->broken_nap)
149  		powersave_nap = 0;
150  
151  	/* This isn't exactly a DMA mapping here, I suspect
152  	 * the SMU is actually communicating with us via i2c to the
153  	 * northbridge or the CPU to access RAM.
154  	 */
155  	writel(smu->cmd_buf_abs, smu->db_buf);
156  
157  	/* Ring the SMU doorbell */
158  	pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
159  }
160  
161  
smu_db_intr(int irq,void * arg)162  static irqreturn_t smu_db_intr(int irq, void *arg)
163  {
164  	unsigned long flags;
165  	struct smu_cmd *cmd;
166  	void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
167  	void *misc = NULL;
168  	u8 gpio;
169  	int rc = 0;
170  
171  	/* SMU completed the command, well, we hope, let's make sure
172  	 * of it
173  	 */
174  	spin_lock_irqsave(&smu->lock, flags);
175  
176  	gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
177  	if ((gpio & 7) != 7) {
178  		spin_unlock_irqrestore(&smu->lock, flags);
179  		return IRQ_HANDLED;
180  	}
181  
182  	cmd = smu->cmd_cur;
183  	smu->cmd_cur = NULL;
184  	if (cmd == NULL)
185  		goto bail;
186  
187  	if (rc == 0) {
188  		unsigned long faddr;
189  		int reply_len;
190  		u8 ack;
191  
192  		/* CPU might have brought back the cache line, so we need
193  		 * to flush again before peeking at the SMU response. We
194  		 * flush the entire buffer for now as we haven't read the
195  		 * reply length (it's only 2 cache lines anyway)
196  		 */
197  		faddr = (unsigned long)smu->cmd_buf;
198  		flush_dcache_range(faddr, faddr + 256);
199  
200  		/* Now check ack */
201  		ack = (~cmd->cmd) & 0xff;
202  		if (ack != smu->cmd_buf->cmd) {
203  			DPRINTK("SMU: incorrect ack, want %x got %x\n",
204  				ack, smu->cmd_buf->cmd);
205  			rc = -EIO;
206  		}
207  		reply_len = rc == 0 ? smu->cmd_buf->length : 0;
208  		DPRINTK("SMU: reply len: %d\n", reply_len);
209  		if (reply_len > cmd->reply_len) {
210  			printk(KERN_WARNING "SMU: reply buffer too small,"
211  			       "got %d bytes for a %d bytes buffer\n",
212  			       reply_len, cmd->reply_len);
213  			reply_len = cmd->reply_len;
214  		}
215  		cmd->reply_len = reply_len;
216  		if (cmd->reply_buf && reply_len)
217  			memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
218  	}
219  
220  	/* Now complete the command. Write status last in order as we lost
221  	 * ownership of the command structure as soon as it's no longer -1
222  	 */
223  	done = cmd->done;
224  	misc = cmd->misc;
225  	mb();
226  	cmd->status = rc;
227  
228  	/* Re-enable NAP mode */
229  	if (smu->broken_nap)
230  		powersave_nap = 1;
231   bail:
232  	/* Start next command if any */
233  	smu_start_cmd();
234  	spin_unlock_irqrestore(&smu->lock, flags);
235  
236  	/* Call command completion handler if any */
237  	if (done)
238  		done(cmd, misc);
239  
240  	/* It's an edge interrupt, nothing to do */
241  	return IRQ_HANDLED;
242  }
243  
244  
smu_msg_intr(int irq,void * arg)245  static irqreturn_t smu_msg_intr(int irq, void *arg)
246  {
247  	/* I don't quite know what to do with this one, we seem to never
248  	 * receive it, so I suspect we have to arm it someway in the SMU
249  	 * to start getting events that way.
250  	 */
251  
252  	printk(KERN_INFO "SMU: message interrupt !\n");
253  
254  	/* It's an edge interrupt, nothing to do */
255  	return IRQ_HANDLED;
256  }
257  
258  
259  /*
260   * Queued command management.
261   *
262   */
263  
smu_queue_cmd(struct smu_cmd * cmd)264  int smu_queue_cmd(struct smu_cmd *cmd)
265  {
266  	unsigned long flags;
267  
268  	if (smu == NULL)
269  		return -ENODEV;
270  	if (cmd->data_len > SMU_MAX_DATA ||
271  	    cmd->reply_len > SMU_MAX_DATA)
272  		return -EINVAL;
273  
274  	cmd->status = 1;
275  	spin_lock_irqsave(&smu->lock, flags);
276  	list_add_tail(&cmd->link, &smu->cmd_list);
277  	if (smu->cmd_cur == NULL)
278  		smu_start_cmd();
279  	spin_unlock_irqrestore(&smu->lock, flags);
280  
281  	/* Workaround for early calls when irq isn't available */
282  	if (!smu_irq_inited || !smu->db_irq)
283  		smu_spinwait_cmd(cmd);
284  
285  	return 0;
286  }
287  EXPORT_SYMBOL(smu_queue_cmd);
288  
289  
smu_queue_simple(struct smu_simple_cmd * scmd,u8 command,unsigned int data_len,void (* done)(struct smu_cmd * cmd,void * misc),void * misc,...)290  int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
291  		     unsigned int data_len,
292  		     void (*done)(struct smu_cmd *cmd, void *misc),
293  		     void *misc, ...)
294  {
295  	struct smu_cmd *cmd = &scmd->cmd;
296  	va_list list;
297  	int i;
298  
299  	if (data_len > sizeof(scmd->buffer))
300  		return -EINVAL;
301  
302  	memset(scmd, 0, sizeof(*scmd));
303  	cmd->cmd = command;
304  	cmd->data_len = data_len;
305  	cmd->data_buf = scmd->buffer;
306  	cmd->reply_len = sizeof(scmd->buffer);
307  	cmd->reply_buf = scmd->buffer;
308  	cmd->done = done;
309  	cmd->misc = misc;
310  
311  	va_start(list, misc);
312  	for (i = 0; i < data_len; ++i)
313  		scmd->buffer[i] = (u8)va_arg(list, int);
314  	va_end(list);
315  
316  	return smu_queue_cmd(cmd);
317  }
318  EXPORT_SYMBOL(smu_queue_simple);
319  
320  
smu_poll(void)321  void smu_poll(void)
322  {
323  	u8 gpio;
324  
325  	if (smu == NULL)
326  		return;
327  
328  	gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
329  	if ((gpio & 7) == 7)
330  		smu_db_intr(smu->db_irq, smu);
331  }
332  EXPORT_SYMBOL(smu_poll);
333  
334  
smu_done_complete(struct smu_cmd * cmd,void * misc)335  void smu_done_complete(struct smu_cmd *cmd, void *misc)
336  {
337  	struct completion *comp = misc;
338  
339  	complete(comp);
340  }
341  EXPORT_SYMBOL(smu_done_complete);
342  
343  
smu_spinwait_cmd(struct smu_cmd * cmd)344  void smu_spinwait_cmd(struct smu_cmd *cmd)
345  {
346  	while(cmd->status == 1)
347  		smu_poll();
348  }
349  EXPORT_SYMBOL(smu_spinwait_cmd);
350  
351  
352  /* RTC low level commands */
bcd2hex(int n)353  static inline int bcd2hex (int n)
354  {
355  	return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
356  }
357  
358  
hex2bcd(int n)359  static inline int hex2bcd (int n)
360  {
361  	return ((n / 10) << 4) + (n % 10);
362  }
363  
364  
smu_fill_set_rtc_cmd(struct smu_cmd_buf * cmd_buf,struct rtc_time * time)365  static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
366  					struct rtc_time *time)
367  {
368  	cmd_buf->cmd = 0x8e;
369  	cmd_buf->length = 8;
370  	cmd_buf->data[0] = 0x80;
371  	cmd_buf->data[1] = hex2bcd(time->tm_sec);
372  	cmd_buf->data[2] = hex2bcd(time->tm_min);
373  	cmd_buf->data[3] = hex2bcd(time->tm_hour);
374  	cmd_buf->data[4] = time->tm_wday;
375  	cmd_buf->data[5] = hex2bcd(time->tm_mday);
376  	cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
377  	cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
378  }
379  
380  
smu_get_rtc_time(struct rtc_time * time,int spinwait)381  int smu_get_rtc_time(struct rtc_time *time, int spinwait)
382  {
383  	struct smu_simple_cmd cmd;
384  	int rc;
385  
386  	if (smu == NULL)
387  		return -ENODEV;
388  
389  	memset(time, 0, sizeof(struct rtc_time));
390  	rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
391  			      SMU_CMD_RTC_GET_DATETIME);
392  	if (rc)
393  		return rc;
394  	smu_spinwait_simple(&cmd);
395  
396  	time->tm_sec = bcd2hex(cmd.buffer[0]);
397  	time->tm_min = bcd2hex(cmd.buffer[1]);
398  	time->tm_hour = bcd2hex(cmd.buffer[2]);
399  	time->tm_wday = bcd2hex(cmd.buffer[3]);
400  	time->tm_mday = bcd2hex(cmd.buffer[4]);
401  	time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
402  	time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
403  
404  	return 0;
405  }
406  
407  
smu_set_rtc_time(struct rtc_time * time,int spinwait)408  int smu_set_rtc_time(struct rtc_time *time, int spinwait)
409  {
410  	struct smu_simple_cmd cmd;
411  	int rc;
412  
413  	if (smu == NULL)
414  		return -ENODEV;
415  
416  	rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
417  			      SMU_CMD_RTC_SET_DATETIME,
418  			      hex2bcd(time->tm_sec),
419  			      hex2bcd(time->tm_min),
420  			      hex2bcd(time->tm_hour),
421  			      time->tm_wday,
422  			      hex2bcd(time->tm_mday),
423  			      hex2bcd(time->tm_mon) + 1,
424  			      hex2bcd(time->tm_year - 100));
425  	if (rc)
426  		return rc;
427  	smu_spinwait_simple(&cmd);
428  
429  	return 0;
430  }
431  
432  
smu_shutdown(void)433  void smu_shutdown(void)
434  {
435  	struct smu_simple_cmd cmd;
436  
437  	if (smu == NULL)
438  		return;
439  
440  	if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
441  			     'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
442  		return;
443  	smu_spinwait_simple(&cmd);
444  	for (;;)
445  		;
446  }
447  
448  
smu_restart(void)449  void smu_restart(void)
450  {
451  	struct smu_simple_cmd cmd;
452  
453  	if (smu == NULL)
454  		return;
455  
456  	if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
457  			     'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
458  		return;
459  	smu_spinwait_simple(&cmd);
460  	for (;;)
461  		;
462  }
463  
464  
smu_present(void)465  int smu_present(void)
466  {
467  	return smu != NULL;
468  }
469  EXPORT_SYMBOL(smu_present);
470  
471  
smu_init(void)472  int __init smu_init (void)
473  {
474  	struct device_node *np;
475  	u64 data;
476  	int ret = 0;
477  
478          np = of_find_node_by_type(NULL, "smu");
479          if (np == NULL)
480  		return -ENODEV;
481  
482  	printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
483  
484  	/*
485  	 * SMU based G5s need some memory below 2Gb. Thankfully this is
486  	 * called at a time where memblock is still available.
487  	 */
488  	smu_cmdbuf_abs = memblock_phys_alloc_range(4096, 4096, 0, 0x80000000UL);
489  	if (smu_cmdbuf_abs == 0) {
490  		printk(KERN_ERR "SMU: Command buffer allocation failed !\n");
491  		ret = -EINVAL;
492  		goto fail_np;
493  	}
494  
495  	smu = memblock_alloc_or_panic(sizeof(struct smu_device), SMP_CACHE_BYTES);
496  	spin_lock_init(&smu->lock);
497  	INIT_LIST_HEAD(&smu->cmd_list);
498  	INIT_LIST_HEAD(&smu->cmd_i2c_list);
499  	smu->of_node = np;
500  	smu->db_irq = 0;
501  	smu->msg_irq = 0;
502  
503  	/* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
504  	 * 32 bits value safely
505  	 */
506  	smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
507  	smu->cmd_buf = __va(smu_cmdbuf_abs);
508  
509  	smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
510  	if (smu->db_node == NULL) {
511  		printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
512  		ret = -ENXIO;
513  		goto fail_bootmem;
514  	}
515  	if (of_property_read_reg(smu->db_node, 0, &data, NULL)) {
516  		printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
517  		ret = -ENXIO;
518  		goto fail_db_node;
519  	}
520  
521  	/* Current setup has one doorbell GPIO that does both doorbell
522  	 * and ack. GPIOs are at 0x50, best would be to find that out
523  	 * in the device-tree though.
524  	 */
525  	smu->doorbell = data;
526  	if (smu->doorbell < 0x50)
527  		smu->doorbell += 0x50;
528  
529  	/* Now look for the smu-interrupt GPIO */
530  	do {
531  		smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
532  		if (smu->msg_node == NULL)
533  			break;
534  		if (of_property_read_reg(smu->msg_node, 0, &data, NULL)) {
535  			of_node_put(smu->msg_node);
536  			smu->msg_node = NULL;
537  			break;
538  		}
539  		smu->msg = data;
540  		if (smu->msg < 0x50)
541  			smu->msg += 0x50;
542  	} while(0);
543  
544  	/* Doorbell buffer is currently hard-coded, I didn't find a proper
545  	 * device-tree entry giving the address. Best would probably to use
546  	 * an offset for K2 base though, but let's do it that way for now.
547  	 */
548  	smu->db_buf = ioremap(0x8000860c, 0x1000);
549  	if (smu->db_buf == NULL) {
550  		printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
551  		ret = -ENXIO;
552  		goto fail_msg_node;
553  	}
554  
555  	/* U3 has an issue with NAP mode when issuing SMU commands */
556  	smu->broken_nap = pmac_get_uninorth_variant() < 4;
557  	if (smu->broken_nap)
558  		printk(KERN_INFO "SMU: using NAP mode workaround\n");
559  
560  	sys_ctrler = SYS_CTRLER_SMU;
561  	return 0;
562  
563  fail_msg_node:
564  	of_node_put(smu->msg_node);
565  fail_db_node:
566  	of_node_put(smu->db_node);
567  fail_bootmem:
568  	memblock_free(smu, sizeof(struct smu_device));
569  	smu = NULL;
570  fail_np:
571  	of_node_put(np);
572  	return ret;
573  }
574  
575  
smu_late_init(void)576  static int smu_late_init(void)
577  {
578  	if (!smu)
579  		return 0;
580  
581  	timer_setup(&smu->i2c_timer, smu_i2c_retry, 0);
582  
583  	if (smu->db_node) {
584  		smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
585  		if (!smu->db_irq)
586  			printk(KERN_ERR "smu: failed to map irq for node %pOF\n",
587  			       smu->db_node);
588  	}
589  	if (smu->msg_node) {
590  		smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
591  		if (!smu->msg_irq)
592  			printk(KERN_ERR "smu: failed to map irq for node %pOF\n",
593  			       smu->msg_node);
594  	}
595  
596  	/*
597  	 * Try to request the interrupts
598  	 */
599  
600  	if (smu->db_irq) {
601  		if (request_irq(smu->db_irq, smu_db_intr,
602  				IRQF_SHARED, "SMU doorbell", smu) < 0) {
603  			printk(KERN_WARNING "SMU: can't "
604  			       "request interrupt %d\n",
605  			       smu->db_irq);
606  			smu->db_irq = 0;
607  		}
608  	}
609  
610  	if (smu->msg_irq) {
611  		if (request_irq(smu->msg_irq, smu_msg_intr,
612  				IRQF_SHARED, "SMU message", smu) < 0) {
613  			printk(KERN_WARNING "SMU: can't "
614  			       "request interrupt %d\n",
615  			       smu->msg_irq);
616  			smu->msg_irq = 0;
617  		}
618  	}
619  
620  	smu_irq_inited = 1;
621  	return 0;
622  }
623  /* This has to be before arch_initcall as the low i2c stuff relies on the
624   * above having been done before we reach arch_initcalls
625   */
626  core_initcall(smu_late_init);
627  
628  /*
629   * sysfs visibility
630   */
631  
smu_expose_childs(struct work_struct * unused)632  static void smu_expose_childs(struct work_struct *unused)
633  {
634  	struct device_node *np;
635  
636  	for_each_child_of_node(smu->of_node, np)
637  		if (of_device_is_compatible(np, "smu-sensors"))
638  			of_platform_device_create(np, "smu-sensors",
639  						  &smu->of_dev->dev);
640  }
641  
642  static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
643  
smu_platform_probe(struct platform_device * dev)644  static int smu_platform_probe(struct platform_device* dev)
645  {
646  	if (!smu)
647  		return -ENODEV;
648  	smu->of_dev = dev;
649  
650  	/*
651  	 * Ok, we are matched, now expose all i2c busses. We have to defer
652  	 * that unfortunately or it would deadlock inside the device model
653  	 */
654  	schedule_work(&smu_expose_childs_work);
655  
656  	return 0;
657  }
658  
659  static const struct of_device_id smu_platform_match[] =
660  {
661  	{
662  		.type		= "smu",
663  	},
664  	{},
665  };
666  
667  static struct platform_driver smu_of_platform_driver =
668  {
669  	.driver = {
670  		.name = "smu",
671  		.of_match_table = smu_platform_match,
672  	},
673  	.probe		= smu_platform_probe,
674  };
675  
smu_init_sysfs(void)676  static int __init smu_init_sysfs(void)
677  {
678  	/*
679  	 * For now, we don't power manage machines with an SMU chip,
680  	 * I'm a bit too far from figuring out how that works with those
681  	 * new chipsets, but that will come back and bite us
682  	 */
683  	platform_driver_register(&smu_of_platform_driver);
684  	return 0;
685  }
686  
687  device_initcall(smu_init_sysfs);
688  
smu_get_ofdev(void)689  struct platform_device *smu_get_ofdev(void)
690  {
691  	if (!smu)
692  		return NULL;
693  	return smu->of_dev;
694  }
695  
696  EXPORT_SYMBOL_GPL(smu_get_ofdev);
697  
698  /*
699   * i2c interface
700   */
701  
smu_i2c_complete_command(struct smu_i2c_cmd * cmd,int fail)702  static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
703  {
704  	void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
705  	void *misc = cmd->misc;
706  	unsigned long flags;
707  
708  	/* Check for read case */
709  	if (!fail && cmd->read) {
710  		if (cmd->pdata[0] < 1)
711  			fail = 1;
712  		else
713  			memcpy(cmd->info.data, &cmd->pdata[1],
714  			       cmd->info.datalen);
715  	}
716  
717  	DPRINTK("SMU: completing, success: %d\n", !fail);
718  
719  	/* Update status and mark no pending i2c command with lock
720  	 * held so nobody comes in while we dequeue an eventual
721  	 * pending next i2c command
722  	 */
723  	spin_lock_irqsave(&smu->lock, flags);
724  	smu->cmd_i2c_cur = NULL;
725  	wmb();
726  	cmd->status = fail ? -EIO : 0;
727  
728  	/* Is there another i2c command waiting ? */
729  	if (!list_empty(&smu->cmd_i2c_list)) {
730  		struct smu_i2c_cmd *newcmd;
731  
732  		/* Fetch it, new current, remove from list */
733  		newcmd = list_entry(smu->cmd_i2c_list.next,
734  				    struct smu_i2c_cmd, link);
735  		smu->cmd_i2c_cur = newcmd;
736  		list_del(&cmd->link);
737  
738  		/* Queue with low level smu */
739  		list_add_tail(&cmd->scmd.link, &smu->cmd_list);
740  		if (smu->cmd_cur == NULL)
741  			smu_start_cmd();
742  	}
743  	spin_unlock_irqrestore(&smu->lock, flags);
744  
745  	/* Call command completion handler if any */
746  	if (done)
747  		done(cmd, misc);
748  
749  }
750  
751  
smu_i2c_retry(struct timer_list * unused)752  static void smu_i2c_retry(struct timer_list *unused)
753  {
754  	struct smu_i2c_cmd	*cmd = smu->cmd_i2c_cur;
755  
756  	DPRINTK("SMU: i2c failure, requeuing...\n");
757  
758  	/* requeue command simply by resetting reply_len */
759  	cmd->pdata[0] = 0xff;
760  	cmd->scmd.reply_len = sizeof(cmd->pdata);
761  	smu_queue_cmd(&cmd->scmd);
762  }
763  
764  
smu_i2c_low_completion(struct smu_cmd * scmd,void * misc)765  static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
766  {
767  	struct smu_i2c_cmd	*cmd = misc;
768  	int			fail = 0;
769  
770  	DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
771  		cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
772  
773  	/* Check for possible status */
774  	if (scmd->status < 0)
775  		fail = 1;
776  	else if (cmd->read) {
777  		if (cmd->stage == 0)
778  			fail = cmd->pdata[0] != 0;
779  		else
780  			fail = cmd->pdata[0] >= 0x80;
781  	} else {
782  		fail = cmd->pdata[0] != 0;
783  	}
784  
785  	/* Handle failures by requeuing command, after 5ms interval
786  	 */
787  	if (fail && --cmd->retries > 0) {
788  		DPRINTK("SMU: i2c failure, starting timer...\n");
789  		BUG_ON(cmd != smu->cmd_i2c_cur);
790  		if (!smu_irq_inited) {
791  			mdelay(5);
792  			smu_i2c_retry(NULL);
793  			return;
794  		}
795  		mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
796  		return;
797  	}
798  
799  	/* If failure or stage 1, command is complete */
800  	if (fail || cmd->stage != 0) {
801  		smu_i2c_complete_command(cmd, fail);
802  		return;
803  	}
804  
805  	DPRINTK("SMU: going to stage 1\n");
806  
807  	/* Ok, initial command complete, now poll status */
808  	scmd->reply_buf = cmd->pdata;
809  	scmd->reply_len = sizeof(cmd->pdata);
810  	scmd->data_buf = cmd->pdata;
811  	scmd->data_len = 1;
812  	cmd->pdata[0] = 0;
813  	cmd->stage = 1;
814  	cmd->retries = 20;
815  	smu_queue_cmd(scmd);
816  }
817  
818  
smu_queue_i2c(struct smu_i2c_cmd * cmd)819  int smu_queue_i2c(struct smu_i2c_cmd *cmd)
820  {
821  	unsigned long flags;
822  
823  	if (smu == NULL)
824  		return -ENODEV;
825  
826  	/* Fill most fields of scmd */
827  	cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
828  	cmd->scmd.done = smu_i2c_low_completion;
829  	cmd->scmd.misc = cmd;
830  	cmd->scmd.reply_buf = cmd->pdata;
831  	cmd->scmd.reply_len = sizeof(cmd->pdata);
832  	cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
833  	cmd->scmd.status = 1;
834  	cmd->stage = 0;
835  	cmd->pdata[0] = 0xff;
836  	cmd->retries = 20;
837  	cmd->status = 1;
838  
839  	/* Check transfer type, sanitize some "info" fields
840  	 * based on transfer type and do more checking
841  	 */
842  	cmd->info.caddr = cmd->info.devaddr;
843  	cmd->read = cmd->info.devaddr & 0x01;
844  	switch(cmd->info.type) {
845  	case SMU_I2C_TRANSFER_SIMPLE:
846  		cmd->info.sublen = 0;
847  		memset(cmd->info.subaddr, 0, sizeof(cmd->info.subaddr));
848  		break;
849  	case SMU_I2C_TRANSFER_COMBINED:
850  		cmd->info.devaddr &= 0xfe;
851  		fallthrough;
852  	case SMU_I2C_TRANSFER_STDSUB:
853  		if (cmd->info.sublen > 3)
854  			return -EINVAL;
855  		break;
856  	default:
857  		return -EINVAL;
858  	}
859  
860  	/* Finish setting up command based on transfer direction
861  	 */
862  	if (cmd->read) {
863  		if (cmd->info.datalen > SMU_I2C_READ_MAX)
864  			return -EINVAL;
865  		memset(cmd->info.data, 0xff, cmd->info.datalen);
866  		cmd->scmd.data_len = 9;
867  	} else {
868  		if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
869  			return -EINVAL;
870  		cmd->scmd.data_len = 9 + cmd->info.datalen;
871  	}
872  
873  	DPRINTK("SMU: i2c enqueuing command\n");
874  	DPRINTK("SMU:   %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
875  		cmd->read ? "read" : "write", cmd->info.datalen,
876  		cmd->info.bus, cmd->info.caddr,
877  		cmd->info.subaddr[0], cmd->info.type);
878  
879  
880  	/* Enqueue command in i2c list, and if empty, enqueue also in
881  	 * main command list
882  	 */
883  	spin_lock_irqsave(&smu->lock, flags);
884  	if (smu->cmd_i2c_cur == NULL) {
885  		smu->cmd_i2c_cur = cmd;
886  		list_add_tail(&cmd->scmd.link, &smu->cmd_list);
887  		if (smu->cmd_cur == NULL)
888  			smu_start_cmd();
889  	} else
890  		list_add_tail(&cmd->link, &smu->cmd_i2c_list);
891  	spin_unlock_irqrestore(&smu->lock, flags);
892  
893  	return 0;
894  }
895  
896  /*
897   * Handling of "partitions"
898   */
899  
smu_read_datablock(u8 * dest,unsigned int addr,unsigned int len)900  static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
901  {
902  	DECLARE_COMPLETION_ONSTACK(comp);
903  	unsigned int chunk;
904  	struct smu_cmd cmd;
905  	int rc;
906  	u8 params[8];
907  
908  	/* We currently use a chunk size of 0xe. We could check the
909  	 * SMU firmware version and use bigger sizes though
910  	 */
911  	chunk = 0xe;
912  
913  	while (len) {
914  		unsigned int clen = min(len, chunk);
915  
916  		cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
917  		cmd.data_len = 7;
918  		cmd.data_buf = params;
919  		cmd.reply_len = chunk;
920  		cmd.reply_buf = dest;
921  		cmd.done = smu_done_complete;
922  		cmd.misc = &comp;
923  		params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
924  		params[1] = 0x4;
925  		*((u32 *)&params[2]) = addr;
926  		params[6] = clen;
927  
928  		rc = smu_queue_cmd(&cmd);
929  		if (rc)
930  			return rc;
931  		wait_for_completion(&comp);
932  		if (cmd.status != 0)
933  			return rc;
934  		if (cmd.reply_len != clen) {
935  			printk(KERN_DEBUG "SMU: short read in "
936  			       "smu_read_datablock, got: %d, want: %d\n",
937  			       cmd.reply_len, clen);
938  			return -EIO;
939  		}
940  		len -= clen;
941  		addr += clen;
942  		dest += clen;
943  	}
944  	return 0;
945  }
946  
smu_create_sdb_partition(int id)947  static struct smu_sdbp_header *smu_create_sdb_partition(int id)
948  {
949  	DECLARE_COMPLETION_ONSTACK(comp);
950  	struct smu_simple_cmd cmd;
951  	unsigned int addr, len, tlen;
952  	struct smu_sdbp_header *hdr;
953  	struct property *prop;
954  
955  	/* First query the partition info */
956  	DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
957  	smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
958  			 smu_done_complete, &comp,
959  			 SMU_CMD_PARTITION_LATEST, id);
960  	wait_for_completion(&comp);
961  	DPRINTK("SMU: done, status: %d, reply_len: %d\n",
962  		cmd.cmd.status, cmd.cmd.reply_len);
963  
964  	/* Partition doesn't exist (or other error) */
965  	if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
966  		return NULL;
967  
968  	/* Fetch address and length from reply */
969  	addr = *((u16 *)cmd.buffer);
970  	len = cmd.buffer[3] << 2;
971  	/* Calucluate total length to allocate, including the 17 bytes
972  	 * for "sdb-partition-XX" that we append at the end of the buffer
973  	 */
974  	tlen = sizeof(struct property) + len + 18;
975  
976  	prop = kzalloc(tlen, GFP_KERNEL);
977  	if (prop == NULL)
978  		return NULL;
979  	hdr = (struct smu_sdbp_header *)(prop + 1);
980  	prop->name = ((char *)prop) + tlen - 18;
981  	sprintf(prop->name, "sdb-partition-%02x", id);
982  	prop->length = len;
983  	prop->value = hdr;
984  	prop->next = NULL;
985  
986  	/* Read the datablock */
987  	if (smu_read_datablock((u8 *)hdr, addr, len)) {
988  		printk(KERN_DEBUG "SMU: datablock read failed while reading "
989  		       "partition %02x !\n", id);
990  		goto failure;
991  	}
992  
993  	/* Got it, check a few things and create the property */
994  	if (hdr->id != id) {
995  		printk(KERN_DEBUG "SMU: Reading partition %02x and got "
996  		       "%02x !\n", id, hdr->id);
997  		goto failure;
998  	}
999  	if (of_add_property(smu->of_node, prop)) {
1000  		printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
1001  		       "property !\n", id);
1002  		goto failure;
1003  	}
1004  
1005  	return hdr;
1006   failure:
1007  	kfree(prop);
1008  	return NULL;
1009  }
1010  
1011  /* Note: Only allowed to return error code in pointers (using ERR_PTR)
1012   * when interruptible is 1
1013   */
__smu_get_sdb_partition(int id,unsigned int * size,int interruptible)1014  static const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
1015  		unsigned int *size, int interruptible)
1016  {
1017  	char pname[32];
1018  	const struct smu_sdbp_header *part;
1019  
1020  	if (!smu)
1021  		return NULL;
1022  
1023  	sprintf(pname, "sdb-partition-%02x", id);
1024  
1025  	DPRINTK("smu_get_sdb_partition(%02x)\n", id);
1026  
1027  	if (interruptible) {
1028  		int rc;
1029  		rc = mutex_lock_interruptible(&smu_part_access);
1030  		if (rc)
1031  			return ERR_PTR(rc);
1032  	} else
1033  		mutex_lock(&smu_part_access);
1034  
1035  	part = of_get_property(smu->of_node, pname, size);
1036  	if (part == NULL) {
1037  		DPRINTK("trying to extract from SMU ...\n");
1038  		part = smu_create_sdb_partition(id);
1039  		if (part != NULL && size)
1040  			*size = part->len << 2;
1041  	}
1042  	mutex_unlock(&smu_part_access);
1043  	return part;
1044  }
1045  
smu_get_sdb_partition(int id,unsigned int * size)1046  const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
1047  {
1048  	return __smu_get_sdb_partition(id, size, 0);
1049  }
1050  EXPORT_SYMBOL(smu_get_sdb_partition);
1051  
1052  
1053  /*
1054   * Userland driver interface
1055   */
1056  
1057  
1058  static LIST_HEAD(smu_clist);
1059  static DEFINE_SPINLOCK(smu_clist_lock);
1060  
1061  enum smu_file_mode {
1062  	smu_file_commands,
1063  	smu_file_events,
1064  	smu_file_closing
1065  };
1066  
1067  struct smu_private
1068  {
1069  	struct list_head	list;
1070  	enum smu_file_mode	mode;
1071  	int			busy;
1072  	struct smu_cmd		cmd;
1073  	spinlock_t		lock;
1074  	wait_queue_head_t	wait;
1075  	u8			buffer[SMU_MAX_DATA];
1076  };
1077  
1078  
smu_open(struct inode * inode,struct file * file)1079  static int smu_open(struct inode *inode, struct file *file)
1080  {
1081  	struct smu_private *pp;
1082  	unsigned long flags;
1083  
1084  	pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
1085  	if (!pp)
1086  		return -ENOMEM;
1087  	spin_lock_init(&pp->lock);
1088  	pp->mode = smu_file_commands;
1089  	init_waitqueue_head(&pp->wait);
1090  
1091  	mutex_lock(&smu_mutex);
1092  	spin_lock_irqsave(&smu_clist_lock, flags);
1093  	list_add(&pp->list, &smu_clist);
1094  	spin_unlock_irqrestore(&smu_clist_lock, flags);
1095  	file->private_data = pp;
1096  	mutex_unlock(&smu_mutex);
1097  
1098  	return 0;
1099  }
1100  
1101  
smu_user_cmd_done(struct smu_cmd * cmd,void * misc)1102  static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
1103  {
1104  	struct smu_private *pp = misc;
1105  
1106  	wake_up_all(&pp->wait);
1107  }
1108  
1109  
smu_write(struct file * file,const char __user * buf,size_t count,loff_t * ppos)1110  static ssize_t smu_write(struct file *file, const char __user *buf,
1111  			 size_t count, loff_t *ppos)
1112  {
1113  	struct smu_private *pp = file->private_data;
1114  	unsigned long flags;
1115  	struct smu_user_cmd_hdr hdr;
1116  	int rc = 0;
1117  
1118  	if (pp->busy)
1119  		return -EBUSY;
1120  	else if (copy_from_user(&hdr, buf, sizeof(hdr)))
1121  		return -EFAULT;
1122  	else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
1123  		pp->mode = smu_file_events;
1124  		return 0;
1125  	} else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
1126  		const struct smu_sdbp_header *part;
1127  		part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
1128  		if (part == NULL)
1129  			return -EINVAL;
1130  		else if (IS_ERR(part))
1131  			return PTR_ERR(part);
1132  		return 0;
1133  	} else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
1134  		return -EINVAL;
1135  	else if (pp->mode != smu_file_commands)
1136  		return -EBADFD;
1137  	else if (hdr.data_len > SMU_MAX_DATA)
1138  		return -EINVAL;
1139  
1140  	spin_lock_irqsave(&pp->lock, flags);
1141  	if (pp->busy) {
1142  		spin_unlock_irqrestore(&pp->lock, flags);
1143  		return -EBUSY;
1144  	}
1145  	pp->busy = 1;
1146  	pp->cmd.status = 1;
1147  	spin_unlock_irqrestore(&pp->lock, flags);
1148  
1149  	if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
1150  		pp->busy = 0;
1151  		return -EFAULT;
1152  	}
1153  
1154  	pp->cmd.cmd = hdr.cmd;
1155  	pp->cmd.data_len = hdr.data_len;
1156  	pp->cmd.reply_len = SMU_MAX_DATA;
1157  	pp->cmd.data_buf = pp->buffer;
1158  	pp->cmd.reply_buf = pp->buffer;
1159  	pp->cmd.done = smu_user_cmd_done;
1160  	pp->cmd.misc = pp;
1161  	rc = smu_queue_cmd(&pp->cmd);
1162  	if (rc < 0)
1163  		return rc;
1164  	return count;
1165  }
1166  
1167  
smu_read_command(struct file * file,struct smu_private * pp,char __user * buf,size_t count)1168  static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
1169  				char __user *buf, size_t count)
1170  {
1171  	DECLARE_WAITQUEUE(wait, current);
1172  	struct smu_user_reply_hdr hdr;
1173  	unsigned long flags;
1174  	int size, rc = 0;
1175  
1176  	if (!pp->busy)
1177  		return 0;
1178  	if (count < sizeof(struct smu_user_reply_hdr))
1179  		return -EOVERFLOW;
1180  	spin_lock_irqsave(&pp->lock, flags);
1181  	if (pp->cmd.status == 1) {
1182  		if (file->f_flags & O_NONBLOCK) {
1183  			spin_unlock_irqrestore(&pp->lock, flags);
1184  			return -EAGAIN;
1185  		}
1186  		add_wait_queue(&pp->wait, &wait);
1187  		for (;;) {
1188  			set_current_state(TASK_INTERRUPTIBLE);
1189  			rc = 0;
1190  			if (pp->cmd.status != 1)
1191  				break;
1192  			rc = -ERESTARTSYS;
1193  			if (signal_pending(current))
1194  				break;
1195  			spin_unlock_irqrestore(&pp->lock, flags);
1196  			schedule();
1197  			spin_lock_irqsave(&pp->lock, flags);
1198  		}
1199  		set_current_state(TASK_RUNNING);
1200  		remove_wait_queue(&pp->wait, &wait);
1201  	}
1202  	spin_unlock_irqrestore(&pp->lock, flags);
1203  	if (rc)
1204  		return rc;
1205  	if (pp->cmd.status != 0)
1206  		pp->cmd.reply_len = 0;
1207  	size = sizeof(hdr) + pp->cmd.reply_len;
1208  	if (count < size)
1209  		size = count;
1210  	rc = size;
1211  	hdr.status = pp->cmd.status;
1212  	hdr.reply_len = pp->cmd.reply_len;
1213  	if (copy_to_user(buf, &hdr, sizeof(hdr)))
1214  		return -EFAULT;
1215  	size -= sizeof(hdr);
1216  	if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
1217  		return -EFAULT;
1218  	pp->busy = 0;
1219  
1220  	return rc;
1221  }
1222  
1223  
smu_read_events(struct file * file,struct smu_private * pp,char __user * buf,size_t count)1224  static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
1225  			       char __user *buf, size_t count)
1226  {
1227  	/* Not implemented */
1228  	msleep_interruptible(1000);
1229  	return 0;
1230  }
1231  
1232  
smu_read(struct file * file,char __user * buf,size_t count,loff_t * ppos)1233  static ssize_t smu_read(struct file *file, char __user *buf,
1234  			size_t count, loff_t *ppos)
1235  {
1236  	struct smu_private *pp = file->private_data;
1237  
1238  	if (pp->mode == smu_file_commands)
1239  		return smu_read_command(file, pp, buf, count);
1240  	if (pp->mode == smu_file_events)
1241  		return smu_read_events(file, pp, buf, count);
1242  
1243  	return -EBADFD;
1244  }
1245  
smu_fpoll(struct file * file,poll_table * wait)1246  static __poll_t smu_fpoll(struct file *file, poll_table *wait)
1247  {
1248  	struct smu_private *pp = file->private_data;
1249  	__poll_t mask = 0;
1250  	unsigned long flags;
1251  
1252  	if (!pp)
1253  		return 0;
1254  
1255  	if (pp->mode == smu_file_commands) {
1256  		poll_wait(file, &pp->wait, wait);
1257  
1258  		spin_lock_irqsave(&pp->lock, flags);
1259  		if (pp->busy && pp->cmd.status != 1)
1260  			mask |= EPOLLIN;
1261  		spin_unlock_irqrestore(&pp->lock, flags);
1262  	}
1263  	if (pp->mode == smu_file_events) {
1264  		/* Not yet implemented */
1265  	}
1266  	return mask;
1267  }
1268  
smu_release(struct inode * inode,struct file * file)1269  static int smu_release(struct inode *inode, struct file *file)
1270  {
1271  	struct smu_private *pp = file->private_data;
1272  	unsigned long flags;
1273  	unsigned int busy;
1274  
1275  	if (!pp)
1276  		return 0;
1277  
1278  	file->private_data = NULL;
1279  
1280  	/* Mark file as closing to avoid races with new request */
1281  	spin_lock_irqsave(&pp->lock, flags);
1282  	pp->mode = smu_file_closing;
1283  	busy = pp->busy;
1284  
1285  	/* Wait for any pending request to complete */
1286  	if (busy && pp->cmd.status == 1) {
1287  		DECLARE_WAITQUEUE(wait, current);
1288  
1289  		add_wait_queue(&pp->wait, &wait);
1290  		for (;;) {
1291  			set_current_state(TASK_UNINTERRUPTIBLE);
1292  			if (pp->cmd.status != 1)
1293  				break;
1294  			spin_unlock_irqrestore(&pp->lock, flags);
1295  			schedule();
1296  			spin_lock_irqsave(&pp->lock, flags);
1297  		}
1298  		set_current_state(TASK_RUNNING);
1299  		remove_wait_queue(&pp->wait, &wait);
1300  	}
1301  	spin_unlock_irqrestore(&pp->lock, flags);
1302  
1303  	spin_lock_irqsave(&smu_clist_lock, flags);
1304  	list_del(&pp->list);
1305  	spin_unlock_irqrestore(&smu_clist_lock, flags);
1306  	kfree(pp);
1307  
1308  	return 0;
1309  }
1310  
1311  
1312  static const struct file_operations smu_device_fops = {
1313  	.read		= smu_read,
1314  	.write		= smu_write,
1315  	.poll		= smu_fpoll,
1316  	.open		= smu_open,
1317  	.release	= smu_release,
1318  };
1319  
1320  static struct miscdevice pmu_device = {
1321  	MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
1322  };
1323  
smu_device_init(void)1324  static int smu_device_init(void)
1325  {
1326  	if (!smu)
1327  		return -ENODEV;
1328  	if (misc_register(&pmu_device) < 0)
1329  		printk(KERN_ERR "via-pmu: cannot register misc device.\n");
1330  	return 0;
1331  }
1332  device_initcall(smu_device_init);
1333