1 /* $Id: teles0.c,v 2.15.2.4 2004/01/13 23:48:39 keil Exp $
2 *
3 * low level stuff for Teles Memory IO isdn cards
4 *
5 * Author Karsten Keil
6 * based on the teles driver from Jan den Ouden
7 * Copyright by Karsten Keil <keil@isdn4linux.de>
8 *
9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference.
11 *
12 * Thanks to Jan den Ouden
13 * Fritz Elfert
14 * Beat Doebeli
15 *
16 */
17
18 #include <linux/init.h>
19 #include "hisax.h"
20 #include "isdnl1.h"
21 #include "isac.h"
22 #include "hscx.h"
23
24 static const char *teles0_revision = "$Revision: 2.15.2.4 $";
25
26 #define TELES_IOMEM_SIZE 0x400
27 #define byteout(addr,val) outb(val,addr)
28 #define bytein(addr) inb(addr)
29
30 static inline u_char
readisac(void __iomem * adr,u_char off)31 readisac(void __iomem *adr, u_char off)
32 {
33 return readb(adr + ((off & 1) ? 0x2ff : 0x100) + off);
34 }
35
36 static inline void
writeisac(void __iomem * adr,u_char off,u_char data)37 writeisac(void __iomem *adr, u_char off, u_char data)
38 {
39 writeb(data, adr + ((off & 1) ? 0x2ff : 0x100) + off); mb();
40 }
41
42
43 static inline u_char
readhscx(void __iomem * adr,int hscx,u_char off)44 readhscx(void __iomem *adr, int hscx, u_char off)
45 {
46 return readb(adr + (hscx ? 0x1c0 : 0x180) +
47 ((off & 1) ? 0x1ff : 0) + off);
48 }
49
50 static inline void
writehscx(void __iomem * adr,int hscx,u_char off,u_char data)51 writehscx(void __iomem *adr, int hscx, u_char off, u_char data)
52 {
53 writeb(data, adr + (hscx ? 0x1c0 : 0x180) +
54 ((off & 1) ? 0x1ff : 0) + off); mb();
55 }
56
57 static inline void
read_fifo_isac(void __iomem * adr,u_char * data,int size)58 read_fifo_isac(void __iomem *adr, u_char * data, int size)
59 {
60 register int i;
61 register u_char __iomem *ad = adr + 0x100;
62 for (i = 0; i < size; i++)
63 data[i] = readb(ad);
64 }
65
66 static inline void
write_fifo_isac(void __iomem * adr,u_char * data,int size)67 write_fifo_isac(void __iomem *adr, u_char * data, int size)
68 {
69 register int i;
70 register u_char __iomem *ad = adr + 0x100;
71 for (i = 0; i < size; i++) {
72 writeb(data[i], ad); mb();
73 }
74 }
75
76 static inline void
read_fifo_hscx(void __iomem * adr,int hscx,u_char * data,int size)77 read_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
78 {
79 register int i;
80 register u_char __iomem *ad = adr + (hscx ? 0x1c0 : 0x180);
81 for (i = 0; i < size; i++)
82 data[i] = readb(ad);
83 }
84
85 static inline void
write_fifo_hscx(void __iomem * adr,int hscx,u_char * data,int size)86 write_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
87 {
88 int i;
89 register u_char __iomem *ad = adr + (hscx ? 0x1c0 : 0x180);
90 for (i = 0; i < size; i++) {
91 writeb(data[i], ad); mb();
92 }
93 }
94
95 /* Interface functions */
96
97 static u_char
ReadISAC(struct IsdnCardState * cs,u_char offset)98 ReadISAC(struct IsdnCardState *cs, u_char offset)
99 {
100 return (readisac(cs->hw.teles0.membase, offset));
101 }
102
103 static void
WriteISAC(struct IsdnCardState * cs,u_char offset,u_char value)104 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
105 {
106 writeisac(cs->hw.teles0.membase, offset, value);
107 }
108
109 static void
ReadISACfifo(struct IsdnCardState * cs,u_char * data,int size)110 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
111 {
112 read_fifo_isac(cs->hw.teles0.membase, data, size);
113 }
114
115 static void
WriteISACfifo(struct IsdnCardState * cs,u_char * data,int size)116 WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
117 {
118 write_fifo_isac(cs->hw.teles0.membase, data, size);
119 }
120
121 static u_char
ReadHSCX(struct IsdnCardState * cs,int hscx,u_char offset)122 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
123 {
124 return (readhscx(cs->hw.teles0.membase, hscx, offset));
125 }
126
127 static void
WriteHSCX(struct IsdnCardState * cs,int hscx,u_char offset,u_char value)128 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
129 {
130 writehscx(cs->hw.teles0.membase, hscx, offset, value);
131 }
132
133 /*
134 * fast interrupt HSCX stuff goes here
135 */
136
137 #define READHSCX(cs, nr, reg) readhscx(cs->hw.teles0.membase, nr, reg)
138 #define WRITEHSCX(cs, nr, reg, data) writehscx(cs->hw.teles0.membase, nr, reg, data)
139 #define READHSCXFIFO(cs, nr, ptr, cnt) read_fifo_hscx(cs->hw.teles0.membase, nr, ptr, cnt)
140 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) write_fifo_hscx(cs->hw.teles0.membase, nr, ptr, cnt)
141
142 #include "hscx_irq.c"
143
144 static irqreturn_t
teles0_interrupt(int intno,void * dev_id)145 teles0_interrupt(int intno, void *dev_id)
146 {
147 struct IsdnCardState *cs = dev_id;
148 u_char val;
149 u_long flags;
150 int count = 0;
151
152 spin_lock_irqsave(&cs->lock, flags);
153 val = readhscx(cs->hw.teles0.membase, 1, HSCX_ISTA);
154 Start_HSCX:
155 if (val)
156 hscx_int_main(cs, val);
157 val = readisac(cs->hw.teles0.membase, ISAC_ISTA);
158 Start_ISAC:
159 if (val)
160 isac_interrupt(cs, val);
161 count++;
162 val = readhscx(cs->hw.teles0.membase, 1, HSCX_ISTA);
163 if (val && count < 5) {
164 if (cs->debug & L1_DEB_HSCX)
165 debugl1(cs, "HSCX IntStat after IntRoutine");
166 goto Start_HSCX;
167 }
168 val = readisac(cs->hw.teles0.membase, ISAC_ISTA);
169 if (val && count < 5) {
170 if (cs->debug & L1_DEB_ISAC)
171 debugl1(cs, "ISAC IntStat after IntRoutine");
172 goto Start_ISAC;
173 }
174 writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0xFF);
175 writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0xFF);
176 writeisac(cs->hw.teles0.membase, ISAC_MASK, 0xFF);
177 writeisac(cs->hw.teles0.membase, ISAC_MASK, 0x0);
178 writehscx(cs->hw.teles0.membase, 0, HSCX_MASK, 0x0);
179 writehscx(cs->hw.teles0.membase, 1, HSCX_MASK, 0x0);
180 spin_unlock_irqrestore(&cs->lock, flags);
181 return IRQ_HANDLED;
182 }
183
184 static void
release_io_teles0(struct IsdnCardState * cs)185 release_io_teles0(struct IsdnCardState *cs)
186 {
187 if (cs->hw.teles0.cfg_reg)
188 release_region(cs->hw.teles0.cfg_reg, 8);
189 iounmap(cs->hw.teles0.membase);
190 release_mem_region(cs->hw.teles0.phymem, TELES_IOMEM_SIZE);
191 }
192
193 static int
reset_teles0(struct IsdnCardState * cs)194 reset_teles0(struct IsdnCardState *cs)
195 {
196 u_char cfval;
197
198 if (cs->hw.teles0.cfg_reg) {
199 switch (cs->irq) {
200 case 2:
201 case 9:
202 cfval = 0x00;
203 break;
204 case 3:
205 cfval = 0x02;
206 break;
207 case 4:
208 cfval = 0x04;
209 break;
210 case 5:
211 cfval = 0x06;
212 break;
213 case 10:
214 cfval = 0x08;
215 break;
216 case 11:
217 cfval = 0x0A;
218 break;
219 case 12:
220 cfval = 0x0C;
221 break;
222 case 15:
223 cfval = 0x0E;
224 break;
225 default:
226 return(1);
227 }
228 cfval |= ((cs->hw.teles0.phymem >> 9) & 0xF0);
229 byteout(cs->hw.teles0.cfg_reg + 4, cfval);
230 HZDELAY(HZ / 10 + 1);
231 byteout(cs->hw.teles0.cfg_reg + 4, cfval | 1);
232 HZDELAY(HZ / 10 + 1);
233 }
234 writeb(0, cs->hw.teles0.membase + 0x80); mb();
235 HZDELAY(HZ / 5 + 1);
236 writeb(1, cs->hw.teles0.membase + 0x80); mb();
237 HZDELAY(HZ / 5 + 1);
238 return(0);
239 }
240
241 static int
Teles_card_msg(struct IsdnCardState * cs,int mt,void * arg)242 Teles_card_msg(struct IsdnCardState *cs, int mt, void *arg)
243 {
244 u_long flags;
245
246 switch (mt) {
247 case CARD_RESET:
248 spin_lock_irqsave(&cs->lock, flags);
249 reset_teles0(cs);
250 spin_unlock_irqrestore(&cs->lock, flags);
251 return(0);
252 case CARD_RELEASE:
253 release_io_teles0(cs);
254 return(0);
255 case CARD_INIT:
256 spin_lock_irqsave(&cs->lock, flags);
257 inithscxisac(cs, 3);
258 spin_unlock_irqrestore(&cs->lock, flags);
259 return(0);
260 case CARD_TEST:
261 return(0);
262 }
263 return(0);
264 }
265
266 int __devinit
setup_teles0(struct IsdnCard * card)267 setup_teles0(struct IsdnCard *card)
268 {
269 u_char val;
270 struct IsdnCardState *cs = card->cs;
271 char tmp[64];
272
273 strcpy(tmp, teles0_revision);
274 printk(KERN_INFO "HiSax: Teles 8.0/16.0 driver Rev. %s\n", HiSax_getrev(tmp));
275 if ((cs->typ != ISDN_CTYPE_16_0) && (cs->typ != ISDN_CTYPE_8_0))
276 return (0);
277
278 if (cs->typ == ISDN_CTYPE_16_0)
279 cs->hw.teles0.cfg_reg = card->para[2];
280 else /* 8.0 */
281 cs->hw.teles0.cfg_reg = 0;
282
283 if (card->para[1] < 0x10000) {
284 card->para[1] <<= 4;
285 printk(KERN_INFO
286 "Teles0: membase configured DOSish, assuming 0x%lx\n",
287 (unsigned long) card->para[1]);
288 }
289 cs->irq = card->para[0];
290 if (cs->hw.teles0.cfg_reg) {
291 if (!request_region(cs->hw.teles0.cfg_reg, 8, "teles cfg")) {
292 printk(KERN_WARNING
293 "HiSax: %s config port %x-%x already in use\n",
294 CardType[card->typ],
295 cs->hw.teles0.cfg_reg,
296 cs->hw.teles0.cfg_reg + 8);
297 return (0);
298 }
299 }
300 if (cs->hw.teles0.cfg_reg) {
301 if ((val = bytein(cs->hw.teles0.cfg_reg + 0)) != 0x51) {
302 printk(KERN_WARNING "Teles0: 16.0 Byte at %x is %x\n",
303 cs->hw.teles0.cfg_reg + 0, val);
304 release_region(cs->hw.teles0.cfg_reg, 8);
305 return (0);
306 }
307 if ((val = bytein(cs->hw.teles0.cfg_reg + 1)) != 0x93) {
308 printk(KERN_WARNING "Teles0: 16.0 Byte at %x is %x\n",
309 cs->hw.teles0.cfg_reg + 1, val);
310 release_region(cs->hw.teles0.cfg_reg, 8);
311 return (0);
312 }
313 val = bytein(cs->hw.teles0.cfg_reg + 2); /* 0x1e=without AB
314 * 0x1f=with AB
315 * 0x1c 16.3 ???
316 */
317 if (val != 0x1e && val != 0x1f) {
318 printk(KERN_WARNING "Teles0: 16.0 Byte at %x is %x\n",
319 cs->hw.teles0.cfg_reg + 2, val);
320 release_region(cs->hw.teles0.cfg_reg, 8);
321 return (0);
322 }
323 }
324 /* 16.0 and 8.0 designed for IOM1 */
325 test_and_set_bit(HW_IOM1, &cs->HW_Flags);
326 cs->hw.teles0.phymem = card->para[1];
327 if (!request_mem_region(cs->hw.teles0.phymem, TELES_IOMEM_SIZE, "teles iomem")) {
328 printk(KERN_WARNING
329 "HiSax: %s memory region %lx-%lx already in use\n",
330 CardType[card->typ],
331 cs->hw.teles0.phymem,
332 cs->hw.teles0.phymem + TELES_IOMEM_SIZE);
333 if (cs->hw.teles0.cfg_reg)
334 release_region(cs->hw.teles0.cfg_reg, 8);
335 return (0);
336 }
337 cs->hw.teles0.membase = ioremap(cs->hw.teles0.phymem, TELES_IOMEM_SIZE);
338 printk(KERN_INFO
339 "HiSax: %s config irq:%d mem:%p cfg:0x%X\n",
340 CardType[cs->typ], cs->irq,
341 cs->hw.teles0.membase, cs->hw.teles0.cfg_reg);
342 if (reset_teles0(cs)) {
343 printk(KERN_WARNING "Teles0: wrong IRQ\n");
344 release_io_teles0(cs);
345 return (0);
346 }
347 setup_isac(cs);
348 cs->readisac = &ReadISAC;
349 cs->writeisac = &WriteISAC;
350 cs->readisacfifo = &ReadISACfifo;
351 cs->writeisacfifo = &WriteISACfifo;
352 cs->BC_Read_Reg = &ReadHSCX;
353 cs->BC_Write_Reg = &WriteHSCX;
354 cs->BC_Send_Data = &hscx_fill_fifo;
355 cs->cardmsg = &Teles_card_msg;
356 cs->irq_func = &teles0_interrupt;
357 ISACVersion(cs, "Teles0:");
358 if (HscxVersion(cs, "Teles0:")) {
359 printk(KERN_WARNING
360 "Teles0: wrong HSCX versions check IO/MEM addresses\n");
361 release_io_teles0(cs);
362 return (0);
363 }
364 return (1);
365 }
366