1 /* 2 * Copyright 2012-2026 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 /** 27 * DOC: overview 28 * 29 * Multiple Pipe/Plane Combiner (MPC) is a component in the hardware pipeline 30 * that performs blending of multiple planes, using global and per-pixel alpha. 31 * It also performs post-blending color correction operations according to the 32 * hardware capabilities, such as color transformation matrix and gamma 1D and 33 * 3D LUT. 34 * 35 * MPC receives output from all DPP pipes and combines them to multiple outputs 36 * supporting "M MPC inputs -> N MPC outputs" flexible composition 37 * architecture. It features: 38 * 39 * - Programmable blending structure to allow software controlled blending and 40 * cascading; 41 * - Programmable window location of each DPP in active region of display; 42 * - Combining multiple DPP pipes in one active region when a single DPP pipe 43 * cannot process very large surface; 44 * - Combining multiple DPP from different SLS with blending; 45 * - Stereo formats from single DPP in top-bottom or side-by-side modes; 46 * - Stereo formats from 2 DPPs; 47 * - Alpha blending of multiple layers from different DPP pipes; 48 * - Programmable background color; 49 */ 50 51 #ifndef __DC_MPCC_H__ 52 #define __DC_MPCC_H__ 53 54 #include "dc_hw_types.h" 55 #include "hw_shared.h" 56 #include "transform.h" 57 #include "dc_types.h" 58 59 #define MAX_MPCC 6 60 #define MAX_OPP 6 61 62 #define MAX_DWB 2 63 64 enum mpc_output_csc_mode { 65 MPC_OUTPUT_CSC_DISABLE = 0, 66 MPC_OUTPUT_CSC_COEF_A, 67 MPC_OUTPUT_CSC_COEF_B 68 }; 69 70 enum mpcc_blend_mode { 71 MPCC_BLEND_MODE_BYPASS, 72 MPCC_BLEND_MODE_TOP_LAYER_PASSTHROUGH, 73 MPCC_BLEND_MODE_TOP_LAYER_ONLY, 74 MPCC_BLEND_MODE_TOP_BOT_BLENDING 75 }; 76 77 /** 78 * enum mpcc_alpha_blend_mode - define the alpha blend mode regarding pixel 79 * alpha and plane alpha values 80 */ 81 enum mpcc_alpha_blend_mode { 82 /** 83 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA: per pixel alpha using DPP 84 * alpha value 85 */ 86 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA, 87 /** 88 * @MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN: per 89 * pixel alpha using DPP alpha value multiplied by a global gain (plane 90 * alpha) 91 */ 92 MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN, 93 /** 94 * @MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA: global alpha value, ignores 95 * pixel alpha and consider only plane alpha 96 */ 97 MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA 98 }; 99 100 enum mpcc_movable_cm_location { 101 MPCC_MOVABLE_CM_LOCATION_BEFORE, 102 MPCC_MOVABLE_CM_LOCATION_AFTER, 103 }; 104 105 enum MCM_LUT_ID { 106 MCM_LUT_3DLUT, 107 MCM_LUT_1DLUT, 108 MCM_LUT_SHAPER 109 }; 110 111 struct mpc_fl_3dlut_config { 112 bool enabled; 113 enum dc_cm_lut_size size; 114 bool select_lut_bank_a; 115 uint16_t bit_depth; 116 int hubp_index; 117 uint16_t bias; 118 uint16_t scale; 119 }; 120 121 union mcm_lut_params { 122 const struct pwl_params *pwl; 123 const struct tetrahedral_params *lut3d; 124 }; 125 126 /** 127 * struct mpcc_blnd_cfg - MPCC blending configuration 128 */ 129 struct mpcc_blnd_cfg { 130 /** 131 * @black_color: background color. 132 */ 133 struct tg_color black_color; 134 135 /** 136 * @alpha_mode: alpha blend mode (MPCC_ALPHA_BLND_MODE). 137 */ 138 enum mpcc_alpha_blend_mode alpha_mode; 139 140 /** 141 * @pre_multiplied_alpha: 142 * Whether pixel color values were pre-multiplied by the alpha channel 143 * (MPCC_ALPHA_MULTIPLIED_MODE). 144 */ 145 bool pre_multiplied_alpha; 146 147 /** 148 * @global_gain: Used when blend mode considers both pixel alpha and plane. 149 */ 150 int global_gain; 151 152 /** 153 * @global_alpha: Plane alpha value. 154 */ 155 int global_alpha; 156 157 /** 158 * @overlap_only: Whether overlapping of different planes is allowed. 159 */ 160 bool overlap_only; 161 162 /* MPCC top/bottom gain settings */ 163 164 /** 165 * @bottom_gain_mode: Blend mode for bottom gain setting. 166 */ 167 int bottom_gain_mode; 168 169 /** 170 * @background_color_bpc: Background color for bpc. 171 */ 172 int background_color_bpc; 173 174 /** 175 * @top_gain: Top gain setting. 176 */ 177 int top_gain; 178 179 /** 180 * @bottom_inside_gain: Blend mode for bottom inside. 181 */ 182 int bottom_inside_gain; 183 184 /** 185 * @bottom_outside_gain: Blend mode for bottom outside. 186 */ 187 int bottom_outside_gain; 188 }; 189 190 struct mpc_grph_gamut_adjustment { 191 struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE]; 192 enum graphics_gamut_adjust_type gamut_adjust_type; 193 enum mpcc_gamut_remap_id mpcc_gamut_remap_block_id; 194 }; 195 196 struct mpc_rmcm_regs { 197 uint32_t rmcm_3dlut_mem_pwr_state; 198 uint32_t rmcm_3dlut_mem_pwr_force; 199 uint32_t rmcm_3dlut_mem_pwr_dis; 200 uint32_t rmcm_3dlut_mem_pwr_mode; 201 uint32_t rmcm_3dlut_size; 202 uint32_t rmcm_3dlut_mode; 203 uint32_t rmcm_3dlut_mode_cur; 204 uint32_t rmcm_3dlut_read_sel; 205 uint32_t rmcm_3dlut_30bit_en; 206 uint32_t rmcm_3dlut_wr_en_mask; 207 uint32_t rmcm_3dlut_ram_sel; 208 uint32_t rmcm_3dlut_out_norm_factor; 209 uint32_t rmcm_3dlut_fl_sel; 210 uint32_t rmcm_3dlut_out_offset_r; 211 uint32_t rmcm_3dlut_out_scale_r; 212 uint32_t rmcm_3dlut_fl_done; 213 uint32_t rmcm_3dlut_fl_soft_underflow; 214 uint32_t rmcm_3dlut_fl_hard_underflow; 215 uint32_t rmcm_cntl; 216 uint32_t rmcm_shaper_mem_pwr_state; 217 uint32_t rmcm_shaper_mem_pwr_force; 218 uint32_t rmcm_shaper_mem_pwr_dis; 219 uint32_t rmcm_shaper_mem_pwr_mode; 220 uint32_t rmcm_shaper_lut_mode; 221 uint32_t rmcm_shaper_mode_cur; 222 uint32_t rmcm_shaper_lut_write_en_mask; 223 uint32_t rmcm_shaper_lut_write_sel; 224 uint32_t rmcm_shaper_offset_b; 225 uint32_t rmcm_shaper_scale_b; 226 uint32_t rmcm_shaper_rama_exp_region_start_b; 227 uint32_t rmcm_shaper_rama_exp_region_start_seg_b; 228 uint32_t rmcm_shaper_rama_exp_region_end_b; 229 uint32_t rmcm_shaper_rama_exp_region_end_base_b; 230 }; 231 232 struct mpcc_sm_cfg { 233 bool enable; 234 /* 0-single plane,2-row subsampling,4-column subsampling,6-checkboard subsampling */ 235 int sm_mode; 236 /* 0- disable frame alternate, 1- enable frame alternate */ 237 bool frame_alt; 238 /* 0- disable field alternate, 1- enable field alternate */ 239 bool field_alt; 240 /* 0-no force,2-force frame polarity from top,3-force frame polarity from bottom */ 241 int force_next_frame_porlarity; 242 /* 0-no force,2-force field polarity from top,3-force field polarity from bottom */ 243 int force_next_field_polarity; 244 }; 245 246 struct mpc_denorm_clamp { 247 int clamp_max_r_cr; 248 int clamp_min_r_cr; 249 int clamp_max_g_y; 250 int clamp_min_g_y; 251 int clamp_max_b_cb; 252 int clamp_min_b_cb; 253 }; 254 255 struct mpc_dwb_flow_control { 256 int flow_ctrl_mode; 257 int flow_ctrl_cnt0; 258 int flow_ctrl_cnt1; 259 }; 260 261 /** 262 * struct mpcc - MPCC connection and blending configuration for a single MPCC instance. 263 * 264 * This struct is used as a node in an MPC tree. 265 */ 266 struct mpcc { 267 /** 268 * @mpcc_id: MPCC physical instance. 269 */ 270 int mpcc_id; 271 272 /** 273 * @dpp_id: DPP input to this MPCC 274 */ 275 int dpp_id; 276 277 /** 278 * @mpcc_bot: Pointer to bottom layer MPCC. NULL when not connected. 279 */ 280 struct mpcc *mpcc_bot; 281 282 /** 283 * @blnd_cfg: The blending configuration for this MPCC. 284 */ 285 struct mpcc_blnd_cfg blnd_cfg; 286 287 /** 288 * @sm_cfg: stereo mix setting for this MPCC 289 */ 290 struct mpcc_sm_cfg sm_cfg; 291 292 /** 293 * @shared_bottom: 294 * 295 * If MPCC output to both OPP and DWB endpoints, true. Otherwise, false. 296 */ 297 bool shared_bottom; 298 }; 299 300 /** 301 * struct mpc_tree - MPC tree represents all MPCC connections for a pipe. 302 * 303 * 304 */ 305 struct mpc_tree { 306 /** 307 * @opp_id: The OPP instance that owns this MPC tree. 308 */ 309 int opp_id; 310 311 /** 312 * @opp_list: the top MPCC layer of the MPC tree that outputs to OPP endpoint 313 */ 314 struct mpcc *opp_list; 315 }; 316 317 struct mpc { 318 const struct mpc_funcs *funcs; 319 struct dc_context *ctx; 320 321 struct mpcc mpcc_array[MAX_MPCC]; 322 struct pwl_params blender_params; 323 bool cm_bypass_mode; 324 }; 325 326 struct mpcc_state { 327 uint32_t opp_id; 328 uint32_t dpp_id; 329 uint32_t bot_mpcc_id; 330 uint32_t mode; 331 uint32_t alpha_mode; 332 uint32_t pre_multiplied_alpha; 333 uint32_t overlap_only; 334 uint32_t idle; 335 uint32_t busy; 336 uint32_t shaper_lut_mode; 337 uint32_t lut3d_mode; 338 uint32_t lut3d_bit_depth; 339 uint32_t lut3d_size; 340 uint32_t rgam_mode; 341 uint32_t rgam_lut; 342 struct mpc_grph_gamut_adjustment gamut_remap; 343 struct mpc_rmcm_regs rmcm_regs; 344 }; 345 346 struct dcn_mpc_reg_state { 347 uint32_t mpcc_bot_sel; 348 uint32_t mpcc_control; 349 uint32_t mpcc_status; 350 uint32_t mpcc_top_sel; 351 uint32_t mpcc_opp_id; 352 uint32_t mpcc_ogam_control; 353 }; 354 355 /** 356 * struct mpc_funcs - funcs 357 */ 358 struct mpc_funcs { 359 /** 360 * @read_mpcc_state: 361 * 362 * Read register content from given MPCC physical instance. 363 * 364 * Parameters: 365 * 366 * - [in/out] mpc - MPC context 367 * - [in] mpcc_instance - MPC context instance 368 * - [in] mpcc_state - MPC context state 369 * 370 * Return: 371 * 372 * void 373 */ 374 void (*read_mpcc_state)( 375 struct mpc *mpc, 376 int mpcc_inst, 377 struct mpcc_state *s); 378 /** 379 * @mpc_read_reg_state: 380 * 381 * Read MPC register state for debugging underflow purposes. 382 * 383 * Parameters: 384 * 385 * - [in] mpc - MPC context 386 * - [out] reg_state - MPC register state structure 387 * 388 * Return: 389 * 390 * void 391 */ 392 void (*mpc_read_reg_state)( 393 struct mpc *mpc, 394 int mpcc_inst, 395 struct dcn_mpc_reg_state *mpc_reg_state); 396 397 /** 398 * @insert_plane: 399 * 400 * Insert DPP into MPC tree based on specified blending position. 401 * Only used for planes that are part of blending chain for OPP output 402 * 403 * Parameters: 404 * 405 * - [in/out] mpc - MPC context. 406 * - [in/out] tree - MPC tree structure that plane will be added to. 407 * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. 408 * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. 409 * stereo mix must disable for the very bottom layer of the tree config. 410 * - [in] insert_above_mpcc - Insert new plane above this MPCC. 411 * If NULL, insert as bottom plane. 412 * - [in] dpp_id - DPP instance for the plane to be added. 413 * - [in] mpcc_id - The MPCC physical instance to use for blending. 414 * 415 * Return: 416 * 417 * struct mpcc* - MPCC that was added. 418 */ 419 struct mpcc* (*insert_plane)( 420 struct mpc *mpc, 421 struct mpc_tree *tree, 422 struct mpcc_blnd_cfg *blnd_cfg, 423 struct mpcc_sm_cfg *sm_cfg, 424 struct mpcc *insert_above_mpcc, 425 int dpp_id, 426 int mpcc_id); 427 428 /** 429 * @remove_mpcc: 430 * 431 * Remove a specified MPCC from the MPC tree. 432 * 433 * Parameters: 434 * 435 * - [in/out] mpc - MPC context. 436 * - [in/out] tree - MPC tree structure that plane will be removed from. 437 * - [in/out] mpcc - MPCC to be removed from tree. 438 * 439 * Return: 440 * 441 * void 442 */ 443 void (*remove_mpcc)( 444 struct mpc *mpc, 445 struct mpc_tree *tree, 446 struct mpcc *mpcc); 447 448 /** 449 * @mpc_init: 450 * 451 * Reset the MPCC HW status by disconnecting all muxes. 452 * 453 * Parameters: 454 * 455 * - [in/out] mpc - MPC context. 456 * 457 * Return: 458 * 459 * void 460 */ 461 void (*mpc_init)(struct mpc *mpc); 462 463 /** 464 * @mpc_init_single_inst: 465 * 466 * Initialize given MPCC physical instance. 467 * 468 * Parameters: 469 * - [in/out] mpc - MPC context. 470 * - [in] mpcc_id - The MPCC physical instance to be initialized. 471 */ 472 void (*mpc_init_single_inst)( 473 struct mpc *mpc, 474 unsigned int mpcc_id); 475 476 /** 477 * @update_blending: 478 * 479 * Update the blending configuration for a specified MPCC. 480 * 481 * Parameters: 482 * 483 * - [in/out] mpc - MPC context. 484 * - [in] blnd_cfg - MPCC blending configuration. 485 * - [in] mpcc_id - The MPCC physical instance. 486 * 487 * Return: 488 * 489 * void 490 */ 491 void (*update_blending)( 492 struct mpc *mpc, 493 struct mpcc_blnd_cfg *blnd_cfg, 494 int mpcc_id); 495 496 /** 497 * @cursor_lock: 498 * 499 * Lock cursor updates for the specified OPP. OPP defines the set of 500 * MPCC that are locked together for cursor. 501 * 502 * Parameters: 503 * 504 * - [in] mpc - MPC context. 505 * - [in] opp_id - The OPP to lock cursor updates on 506 * - [in] lock - lock/unlock the OPP 507 * 508 * Return: 509 * 510 * void 511 */ 512 void (*cursor_lock)( 513 struct mpc *mpc, 514 int opp_id, 515 bool lock); 516 517 /** 518 * @insert_plane_to_secondary: 519 * 520 * Add DPP into secondary MPC tree based on specified blending 521 * position. Only used for planes that are part of blending chain for 522 * DWB output 523 * 524 * Parameters: 525 * 526 * - [in/out] mpc - MPC context. 527 * - [in/out] tree - MPC tree structure that plane will be added to. 528 * - [in] blnd_cfg - MPCC blending configuration for the new blending layer. 529 * - [in] sm_cfg - MPCC stereo mix configuration for the new blending layer. 530 * stereo mix must disable for the very bottom layer of the tree config. 531 * - [in] insert_above_mpcc - Insert new plane above this MPCC. If 532 * NULL, insert as bottom plane. 533 * - [in] dpp_id - DPP instance for the plane to be added. 534 * - [in] mpcc_id - The MPCC physical instance to use for blending. 535 * 536 * Return: 537 * 538 * struct mpcc* - MPCC that was added. 539 */ 540 struct mpcc* (*insert_plane_to_secondary)( 541 struct mpc *mpc, 542 struct mpc_tree *tree, 543 struct mpcc_blnd_cfg *blnd_cfg, 544 struct mpcc_sm_cfg *sm_cfg, 545 struct mpcc *insert_above_mpcc, 546 int dpp_id, 547 int mpcc_id); 548 549 /** 550 * @remove_mpcc_from_secondary: 551 * 552 * Remove a specified DPP from the 'secondary' MPC tree. 553 * 554 * Parameters: 555 * 556 * - [in/out] mpc - MPC context. 557 * - [in/out] tree - MPC tree structure that plane will be removed from. 558 * - [in] mpcc - MPCC to be removed from tree. 559 * 560 * Return: 561 * 562 * void 563 */ 564 void (*remove_mpcc_from_secondary)( 565 struct mpc *mpc, 566 struct mpc_tree *tree, 567 struct mpcc *mpcc); 568 569 /** 570 * @get_mpcc_for_dpp_from_secondary: 571 * 572 * Find, if it exists, a MPCC from a given 'secondary' MPC tree that 573 * is associated with specified plane. 574 * 575 * Parameters: 576 * - [in/out] tree - MPC tree structure to search for plane. 577 * - [in] dpp_id - DPP to be searched. 578 * 579 * Return: 580 * 581 * struct mpcc* - pointer to plane or NULL if no plane found. 582 */ 583 struct mpcc* (*get_mpcc_for_dpp_from_secondary)( 584 struct mpc_tree *tree, 585 int dpp_id); 586 587 /** 588 * @get_mpcc_for_dpp: 589 * 590 * Find, if it exists, a MPCC from a given MPC tree that 591 * is associated with specified plane. 592 * 593 * Parameters: 594 * - [in/out] tree - MPC tree structure to search for plane. 595 * - [in] dpp_id - DPP to be searched. 596 * 597 * Return: 598 * 599 * struct mpcc* - pointer to plane or NULL if no plane found. 600 */ 601 struct mpcc* (*get_mpcc_for_dpp)( 602 struct mpc_tree *tree, 603 int dpp_id); 604 605 /** 606 * @wait_for_idle: 607 * 608 * Wait for a MPCC in MPC context to enter idle state. 609 * 610 * Parameters: 611 * - [in/out] mpc - MPC Context. 612 * - [in] id - MPCC to wait for idle state. 613 * 614 * Return: 615 * 616 * void 617 */ 618 void (*wait_for_idle)(struct mpc *mpc, int id); 619 620 /** 621 * @assert_mpcc_idle_before_connect: 622 * 623 * Assert if MPCC in MPC context is in idle state. 624 * 625 * Parameters: 626 * - [in/out] mpc - MPC context. 627 * - [in] id - MPCC to assert idle state. 628 * 629 * Return: 630 * 631 * void 632 */ 633 void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id); 634 635 /** 636 * @init_mpcc_list_from_hw: 637 * 638 * Iterate through the MPCC array from a given MPC context struct 639 * and configure each MPCC according to its registers' values. 640 * 641 * Parameters: 642 * - [in/out] mpc - MPC context to initialize MPCC array. 643 * - [in/out] tree - MPC tree structure containing MPCC contexts to initialize. 644 * 645 * Return: 646 * 647 * void 648 */ 649 void (*init_mpcc_list_from_hw)( 650 struct mpc *mpc, 651 struct mpc_tree *tree); 652 653 /** 654 * @set_denorm: 655 * 656 * Set corresponding OPP DENORM_CONTROL register value to specific denorm_mode 657 * based on given color depth. 658 * 659 * Parameters: 660 * - [in/out] mpc - MPC context. 661 * - [in] opp_id - Corresponding OPP to update register. 662 * - [in] output_depth - Arbitrary color depth to set denorm_mode. 663 * 664 * Return: 665 * 666 * void 667 */ 668 void (*set_denorm)(struct mpc *mpc, 669 int opp_id, 670 enum dc_color_depth output_depth); 671 672 /** 673 * @set_denorm_clamp: 674 * 675 * Set denorm clamp values on corresponding OPP DENORM CONTROL register. 676 * 677 * Parameters: 678 * - [in/out] mpc - MPC context. 679 * - [in] opp_id - Corresponding OPP to update register. 680 * - [in] denorm_clamp - Arbitrary denorm clamp to be set. 681 * 682 * Return: 683 * 684 * void 685 */ 686 void (*set_denorm_clamp)( 687 struct mpc *mpc, 688 int opp_id, 689 struct mpc_denorm_clamp denorm_clamp); 690 691 /** 692 * @set_output_csc: 693 * 694 * Set the Output Color Space Conversion matrix 695 * with given values and mode. 696 * 697 * Parameters: 698 * - [in/out] mpc - MPC context. 699 * - [in] opp_id - Corresponding OPP to update register. 700 * - [in] regval - Values to set in CSC matrix. 701 * - [in] ocsc_mode - Mode to set CSC. 702 * 703 * Return: 704 * 705 * void 706 */ 707 void (*set_output_csc)(struct mpc *mpc, 708 int opp_id, 709 const uint16_t *regval, 710 enum mpc_output_csc_mode ocsc_mode); 711 712 /** 713 * @set_ocsc_default: 714 * 715 * Set the Output Color Space Conversion matrix 716 * to default values according to color space. 717 * 718 * Parameters: 719 * - [in/out] mpc - MPC context. 720 * - [in] opp_id - Corresponding OPP to update register. 721 * - [in] color_space - OCSC color space. 722 * - [in] ocsc_mode - Mode to set CSC. 723 * 724 * Return: 725 * 726 * void 727 * 728 */ 729 void (*set_ocsc_default)(struct mpc *mpc, 730 int opp_id, 731 enum dc_color_space color_space, 732 enum mpc_output_csc_mode ocsc_mode); 733 734 /** 735 * @set_output_gamma: 736 * 737 * Set Output Gamma with given curve parameters. 738 * 739 * Parameters: 740 * - [in/out] mpc - MPC context. 741 * - [in] mpcc_id - Corresponding MPC to update registers. 742 * - [in] params - Parameters. 743 * 744 * Return: 745 * 746 * void 747 * 748 */ 749 void (*set_output_gamma)( 750 struct mpc *mpc, 751 int mpcc_id, 752 const struct pwl_params *params); 753 /** 754 * @power_on_mpc_mem_pwr: 755 * 756 * Power on/off memory LUT for given MPCC. 757 * Powering on enables LUT to be updated. 758 * Powering off allows entering low power mode. 759 * 760 * Parameters: 761 * - [in/out] mpc - MPC context. 762 * - [in] mpcc_id - MPCC to power on. 763 * - [in] power_on 764 * 765 * Return: 766 * 767 * void 768 */ 769 void (*power_on_mpc_mem_pwr)( 770 struct mpc *mpc, 771 int mpcc_id, 772 bool power_on); 773 /** 774 * @set_dwb_mux: 775 * 776 * Set corresponding Display Writeback mux 777 * MPC register field to given MPCC id. 778 * 779 * Parameters: 780 * - [in/out] mpc - MPC context. 781 * - [in] dwb_id - DWB to be set. 782 * - [in] mpcc_id - MPCC id to be stored in DWB mux register. 783 * 784 * Return: 785 * 786 * void 787 */ 788 void (*set_dwb_mux)( 789 struct mpc *mpc, 790 int dwb_id, 791 int mpcc_id); 792 793 /** 794 * @disable_dwb_mux: 795 * 796 * Reset corresponding Display Writeback mux 797 * MPC register field. 798 * 799 * Parameters: 800 * - [in/out] mpc - MPC context. 801 * - [in] dwb_id - DWB to be set. 802 * 803 * Return: 804 * 805 * void 806 */ 807 void (*disable_dwb_mux)( 808 struct mpc *mpc, 809 int dwb_id); 810 811 /** 812 * @is_dwb_idle: 813 * 814 * Check DWB status on MPC_DWB0_MUX_STATUS register field. 815 * Return if it is null. 816 * 817 * Parameters: 818 * - [in/out] mpc - MPC context. 819 * - [in] dwb_id - DWB to be checked. 820 * 821 * Return: 822 * 823 * bool - wheter DWB is idle or not 824 */ 825 bool (*is_dwb_idle)( 826 struct mpc *mpc, 827 int dwb_id); 828 829 /** 830 * @set_out_rate_control: 831 * 832 * Set display output rate control. 833 * 834 * Parameters: 835 * - [in/out] mpc - MPC context. 836 * - [in] opp_id - OPP to be set. 837 * - [in] enable 838 * - [in] rate_2x_mode 839 * - [in] flow_control 840 * 841 * Return: 842 * 843 * void 844 */ 845 void (*set_out_rate_control)( 846 struct mpc *mpc, 847 int opp_id, 848 bool enable, 849 bool rate_2x_mode, 850 struct mpc_dwb_flow_control *flow_control); 851 852 /** 853 * @set_gamut_remap: 854 * 855 * Set post-blending CTM for given MPCC. 856 * 857 * Parameters: 858 * - [in] mpc - MPC context. 859 * - [in] mpcc_id - MPCC to set gamut map. 860 * - [in] adjust 861 * 862 * Return: 863 * 864 * void 865 */ 866 void (*set_gamut_remap)( 867 struct mpc *mpc, 868 int mpcc_id, 869 const struct mpc_grph_gamut_adjustment *adjust); 870 871 /** 872 * @program_1dlut: 873 * 874 * Set 1 dimensional Lookup Table. 875 * 876 * Parameters: 877 * - [in/out] mpc - MPC context 878 * - [in] params - curve parameters for the LUT configuration 879 * - [in] rmu_idx 880 * 881 * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled). 882 */ 883 bool (*program_1dlut)( 884 struct mpc *mpc, 885 const struct pwl_params *params, 886 uint32_t rmu_idx); 887 888 /** 889 * @program_shaper: 890 * 891 * Set shaper. 892 * 893 * Parameters: 894 * - [in/out] mpc - MPC context 895 * - [in] params - curve parameters to be set 896 * - [in] rmu_idx 897 * 898 * Return: 899 * 900 * bool - wheter shaper was set (set with given parameters) or not (params is NULL and LUT is disabled). 901 */ 902 bool (*program_shaper)( 903 struct mpc *mpc, 904 const struct pwl_params *params, 905 uint32_t rmu_idx); 906 907 /** 908 * @acquire_rmu: 909 * 910 * Set given MPCC to be multiplexed to given RMU unit. 911 * 912 * Parameters: 913 * - [in/out] mpc - MPC context 914 * - [in] mpcc_id - MPCC 915 * - [in] rmu_idx - Given RMU unit to set MPCC to be multiplexed to. 916 * 917 * Return: 918 * 919 * unit32_t - rmu_idx if operation was successful, -1 else. 920 */ 921 uint32_t (*acquire_rmu)(struct mpc *mpc, int mpcc_id, int rmu_idx); 922 923 /** 924 * @program_3dlut: 925 * 926 * Set 3 dimensional Lookup Table. 927 * 928 * Parameters: 929 * - [in/out] mpc - MPC context 930 * - [in] params - tetrahedral parameters for the LUT configuration 931 * - [in] rmu_idx 932 * 933 * bool - wheter LUT was set (set with given parameters) or not (params is NULL and LUT is disabled). 934 */ 935 bool (*program_3dlut)( 936 struct mpc *mpc, 937 const struct tetrahedral_params *params, 938 int rmu_idx); 939 940 /** 941 * @release_rmu: 942 * 943 * For a given MPCC, release the RMU unit it muliplexes to. 944 * 945 * Parameters: 946 * - [in/out] mpc - MPC context 947 * - [in] mpcc_id - MPCC 948 * 949 * Return: 950 * 951 * int - a valid rmu_idx representing released RMU unit or -1 if there was no RMU unit to release. 952 */ 953 int (*release_rmu)(struct mpc *mpc, int mpcc_id); 954 955 /** 956 * @get_mpc_out_mux: 957 * 958 * Return MPC out mux. 959 * 960 * Parameters: 961 * - [in] mpc - MPC context. 962 * - [in] opp_id - OPP 963 * 964 * Return: 965 * 966 * unsigned int - Out Mux 967 */ 968 unsigned int (*get_mpc_out_mux)( 969 struct mpc *mpc, 970 int opp_id); 971 972 /** 973 * @set_bg_color: 974 * 975 * Find corresponding bottommost MPCC and 976 * set its bg color. 977 * 978 * Parameters: 979 * - [in/out] mpc - MPC context. 980 * - [in] bg_color - background color to be set. 981 * - [in] mpcc_id 982 * 983 * Return: 984 * 985 * void 986 */ 987 void (*set_bg_color)(struct mpc *mpc, 988 struct tg_color *bg_color, 989 int mpcc_id); 990 991 /** 992 * @set_mpc_mem_lp_mode: 993 * 994 * Set mpc_mem_lp_mode. 995 * 996 * Parameters: 997 * - [in/out] mpc - MPC context. 998 * 999 * Return: 1000 * 1001 * void 1002 */ 1003 1004 void (*set_mpc_mem_lp_mode)(struct mpc *mpc); 1005 /** 1006 * @set_movable_cm_location: 1007 * 1008 * Set Movable CM Location. 1009 * 1010 * Parameters: 1011 * - [in/out] mpc - MPC context. 1012 * - [in] location 1013 * - [in] mpcc_id 1014 * 1015 * Return: 1016 * 1017 * void 1018 */ 1019 1020 void (*set_movable_cm_location)(struct mpc *mpc, enum mpcc_movable_cm_location location, int mpcc_id); 1021 /** 1022 * @update_3dlut_fast_load_select: 1023 * 1024 * Update 3D LUT fast load select. 1025 * 1026 * Parameters: 1027 * - [in/out] mpc - MPC context. 1028 * - [in] mpcc_id 1029 * - [in] hubp_idx 1030 * 1031 * Return: 1032 * 1033 * void 1034 */ 1035 1036 void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx); 1037 1038 /** 1039 * @get_3dlut_fast_load_status: 1040 * 1041 * Get 3D LUT fast load status and reference them with done, soft_underflow and hard_underflow pointers. 1042 * 1043 * Parameters: 1044 * - [in/out] mpc - MPC context. 1045 * - [in] mpcc_id 1046 * - [in/out] done 1047 * - [in/out] soft_underflow 1048 * - [in/out] hard_underflow 1049 * 1050 * Return: 1051 * 1052 * void 1053 */ 1054 void (*get_3dlut_fast_load_status)(struct mpc *mpc, int mpcc_id, uint32_t *done, uint32_t *soft_underflow, uint32_t *hard_underflow); 1055 1056 /** 1057 * @populate_lut: 1058 * 1059 * Populate LUT with given tetrahedral parameters. 1060 * 1061 * Parameters: 1062 * - [in/out] mpc - MPC context. 1063 * - [in] id 1064 * - [in] params 1065 * - [in] lut_bank_a 1066 * - [in] mpcc_id 1067 * 1068 * Return: 1069 * 1070 * void 1071 */ 1072 void (*populate_lut)(struct mpc *mpc, 1073 const enum MCM_LUT_ID id, 1074 const union mcm_lut_params *params, 1075 const bool lut_bank_a, 1076 const int mpcc_id); 1077 1078 /** 1079 * @program_lut_read_write_control: 1080 * 1081 * Program LUT RW control. 1082 * 1083 * Parameters: 1084 * - [in/out] mpc - MPC context. 1085 * - [in] id 1086 * - [in] lut_bank_a 1087 * - [in] bit_depth 1088 * - [in] mpcc_id 1089 * 1090 * Return: 1091 * 1092 * void 1093 */ 1094 void (*program_lut_read_write_control)(struct mpc *mpc, 1095 const enum MCM_LUT_ID id, 1096 const bool lut_bank_a, 1097 const unsigned int bit_depth, 1098 const int mpcc_id); 1099 1100 /** 1101 * @program_lut_mode: 1102 * 1103 * Program LUT mode. 1104 * 1105 * Parameters: 1106 * - [in/out] mpc - MPC context. 1107 * - [in] id 1108 * - [in] enable 1109 * - [in] lut_bank_a 1110 * - [in] size 1111 * - [in] mpcc_id 1112 * 1113 * Return: 1114 * 1115 * void 1116 */ 1117 void (*program_lut_mode)(struct mpc *mpc, 1118 const enum MCM_LUT_ID id, 1119 const bool enable, 1120 const bool lut_bank_a, 1121 const enum dc_cm_lut_size size, 1122 const int mpcc_id); 1123 1124 1125 /** 1126 * @get_lut_mode: 1127 * 1128 * Obtains enablement and ram bank status. 1129 * 1130 * Parameters: 1131 * - [in/out] mpc - MPC context. 1132 * - [in] id 1133 * - [in] mpcc_id 1134 * - [out] enable 1135 * - [out] lut_bank_a 1136 * 1137 * Return: 1138 * 1139 * void 1140 */ 1141 void (*get_lut_mode)(struct mpc *mpc, 1142 const enum MCM_LUT_ID id, 1143 const int mpcc_id, 1144 bool *enable, 1145 bool *lut_bank_a); 1146 1147 /** 1148 * @rmcm: 1149 * 1150 * MPC RMCM new HW sequential programming functions 1151 */ 1152 struct { 1153 void (*fl_3dlut_configure)(struct mpc *mpc, struct mpc_fl_3dlut_config *cfg, int mpcc_id); 1154 void (*enable_3dlut_fl)(struct mpc *mpc, bool enable, int mpcc_id); 1155 void (*update_3dlut_fast_load_select)(struct mpc *mpc, int mpcc_id, int hubp_idx); 1156 void (*program_lut_read_write_control)(struct mpc *mpc, const enum MCM_LUT_ID id, 1157 bool lut_bank_a, bool enabled, int mpcc_id); 1158 void (*program_lut_mode)(struct mpc *mpc, 1159 bool enable, 1160 bool lut_bank_a, 1161 int mpcc_id); 1162 void (*program_3dlut_size)(struct mpc *mpc, const enum dc_cm_lut_size size, int mpcc_id); 1163 void (*program_bias_scale)(struct mpc *mpc, uint16_t bias, uint16_t scale, int mpcc_id); 1164 void (*program_bit_depth)(struct mpc *mpc, uint16_t bit_depth, int mpcc_id); 1165 bool (*is_config_supported)(uint32_t width); 1166 1167 void (*power_on_shaper_3dlut)(struct mpc *mpc, uint32_t mpcc_id, bool power_on); 1168 void (*populate_lut)(struct mpc *mpc, const union mcm_lut_params params, 1169 bool lut_bank_a, int mpcc_id); 1170 } rmcm; 1171 }; 1172 1173 #endif 1174