xref: /linux/include/linux/gpio/gpio-nomadik.h (revision 116a3308e1eb0ea59aa248e22ac29d65eb7cd250)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __LINUX_GPIO_NOMADIK_H
3 #define __LINUX_GPIO_NOMADIK_H
4 
5 struct fwnode_handle;
6 
7 /* Package definitions */
8 #define PINCTRL_NMK_STN8815	0
9 #define PINCTRL_NMK_DB8500	1
10 
11 #define GPIO_BLOCK_SHIFT 5
12 #define NMK_GPIO_PER_CHIP BIT(GPIO_BLOCK_SHIFT)
13 #define NMK_MAX_BANKS DIV_ROUND_UP(512, NMK_GPIO_PER_CHIP)
14 
15 /* Register in the logic block */
16 #define NMK_GPIO_DAT	0x00
17 #define NMK_GPIO_DATS	0x04
18 #define NMK_GPIO_DATC	0x08
19 #define NMK_GPIO_PDIS	0x0c
20 #define NMK_GPIO_DIR	0x10
21 #define NMK_GPIO_DIRS	0x14
22 #define NMK_GPIO_DIRC	0x18
23 #define NMK_GPIO_SLPC	0x1c
24 #define NMK_GPIO_AFSLA	0x20
25 #define NMK_GPIO_AFSLB	0x24
26 #define NMK_GPIO_LOWEMI	0x28
27 
28 #define NMK_GPIO_RIMSC	0x40
29 #define NMK_GPIO_FIMSC	0x44
30 #define NMK_GPIO_IS	0x48
31 #define NMK_GPIO_IC	0x4c
32 #define NMK_GPIO_RWIMSC	0x50
33 #define NMK_GPIO_FWIMSC	0x54
34 #define NMK_GPIO_WKS	0x58
35 /* These appear in DB8540 and later ASICs */
36 #define NMK_GPIO_EDGELEVEL 0x5C
37 #define NMK_GPIO_LEVEL	0x60
38 
39 /* Pull up/down values */
40 enum nmk_gpio_pull {
41 	NMK_GPIO_PULL_NONE,
42 	NMK_GPIO_PULL_UP,
43 	NMK_GPIO_PULL_DOWN,
44 };
45 
46 /* Sleep mode */
47 enum nmk_gpio_slpm {
48 	NMK_GPIO_SLPM_INPUT,
49 	NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
50 	NMK_GPIO_SLPM_NOCHANGE,
51 	NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
52 };
53 
54 struct nmk_gpio_chip {
55 	struct gpio_chip chip;
56 	void __iomem *addr;
57 	struct clk *clk;
58 	unsigned int bank;
59 	void (*set_ioforce)(bool enable);
60 	spinlock_t lock;
61 	bool sleepmode;
62 	bool is_mobileye_soc;
63 	/* Keep track of configured edges */
64 	u32 edge_rising;
65 	u32 edge_falling;
66 	u32 real_wake;
67 	u32 rwimsc;
68 	u32 fwimsc;
69 	u32 rimsc;
70 	u32 fimsc;
71 	u32 pull_up;
72 	u32 lowemi;
73 };
74 
75 /* Alternate functions: function C is set in hw by setting both A and B */
76 #define NMK_GPIO_ALT_GPIO	0
77 #define NMK_GPIO_ALT_A	1
78 #define NMK_GPIO_ALT_B	2
79 #define NMK_GPIO_ALT_C	(NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
80 
81 #define NMK_GPIO_ALT_CX_SHIFT 2
82 #define NMK_GPIO_ALT_C1	((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
83 #define NMK_GPIO_ALT_C2	((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
84 #define NMK_GPIO_ALT_C3	((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
85 #define NMK_GPIO_ALT_C4	((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
86 
87 #define PRCM_GPIOCR_ALTCX(pin_num,\
88 	altc1_used, altc1_ri, altc1_cb,\
89 	altc2_used, altc2_ri, altc2_cb,\
90 	altc3_used, altc3_ri, altc3_cb,\
91 	altc4_used, altc4_ri, altc4_cb)\
92 {\
93 	.pin = pin_num,\
94 	.altcx[PRCM_IDX_GPIOCR_ALTC1] = {\
95 		.used = altc1_used,\
96 		.reg_index = altc1_ri,\
97 		.control_bit = altc1_cb\
98 	},\
99 	.altcx[PRCM_IDX_GPIOCR_ALTC2] = {\
100 		.used = altc2_used,\
101 		.reg_index = altc2_ri,\
102 		.control_bit = altc2_cb\
103 	},\
104 	.altcx[PRCM_IDX_GPIOCR_ALTC3] = {\
105 		.used = altc3_used,\
106 		.reg_index = altc3_ri,\
107 		.control_bit = altc3_cb\
108 	},\
109 	.altcx[PRCM_IDX_GPIOCR_ALTC4] = {\
110 		.used = altc4_used,\
111 		.reg_index = altc4_ri,\
112 		.control_bit = altc4_cb\
113 	},\
114 }
115 
116 /**
117  * enum prcm_gpiocr_reg_index - Used to reference a PRCM GPIOCR register address.
118  */
119 enum prcm_gpiocr_reg_index {
120 	PRCM_IDX_GPIOCR1,
121 	PRCM_IDX_GPIOCR2,
122 	PRCM_IDX_GPIOCR3
123 };
124 /**
125  * enum prcm_gpiocr_altcx_index - Used to reference an Other alternate-C function.
126  */
127 enum prcm_gpiocr_altcx_index {
128 	PRCM_IDX_GPIOCR_ALTC1,
129 	PRCM_IDX_GPIOCR_ALTC2,
130 	PRCM_IDX_GPIOCR_ALTC3,
131 	PRCM_IDX_GPIOCR_ALTC4,
132 	PRCM_IDX_GPIOCR_ALTC_MAX,
133 };
134 
135 /**
136  * struct prcm_gpiocr_altcx - Other alternate-C function
137  * @used: other alternate-C function availability
138  * @reg_index: PRCM GPIOCR register index used to control the function
139  * @control_bit: PRCM GPIOCR bit used to control the function
140  */
141 struct prcm_gpiocr_altcx {
142 	bool used:1;
143 	u8 reg_index:2;
144 	u8 control_bit:5;
145 } __packed;
146 
147 /**
148  * struct prcm_gpiocr_altcx_pin_desc - Other alternate-C pin
149  * @pin: The pin number
150  * @altcx: array of other alternate-C[1-4] functions
151  */
152 struct prcm_gpiocr_altcx_pin_desc {
153 	unsigned short pin;
154 	struct prcm_gpiocr_altcx altcx[PRCM_IDX_GPIOCR_ALTC_MAX];
155 };
156 
157 /**
158  * struct nmk_function - Nomadik pinctrl mux function
159  * @name: The name of the function, exported to pinctrl core.
160  * @groups: An array of pin groups that may select this function.
161  * @ngroups: The number of entries in @groups.
162  */
163 struct nmk_function {
164 	const char *name;
165 	const char * const *groups;
166 	unsigned int ngroups;
167 };
168 
169 /**
170  * struct nmk_pingroup - describes a Nomadik pin group
171  * @grp: Generic data of the pin group (name and pins)
172  * @altsetting: the altsetting to apply to all pins in this group to
173  *	configure them to be used by a function
174  */
175 struct nmk_pingroup {
176 	struct pingroup grp;
177 	int altsetting;
178 };
179 
180 #define NMK_PIN_GROUP(a, b)							\
181 	{									\
182 		.grp = PINCTRL_PINGROUP(#a, a##_pins, ARRAY_SIZE(a##_pins)),	\
183 		.altsetting = b,						\
184 	}
185 
186 /**
187  * struct nmk_pinctrl_soc_data - Nomadik pin controller per-SoC configuration
188  * @pins:	An array describing all pins the pin controller affects.
189  *		All pins which are also GPIOs must be listed first within the
190  *		array, and be numbered identically to the GPIO controller's
191  *		numbering.
192  * @npins:	The number of entries in @pins.
193  * @functions:	The functions supported on this SoC.
194  * @nfunctions:	The number of entries in @functions.
195  * @groups:	An array describing all pin groups the pin SoC supports.
196  * @ngroups:	The number of entries in @groups.
197  * @altcx_pins:	The pins that support Other alternate-C function on this SoC
198  * @npins_altcx: The number of Other alternate-C pins
199  * @prcm_gpiocr_registers: The array of PRCM GPIOCR registers on this SoC
200  */
201 struct nmk_pinctrl_soc_data {
202 	const struct pinctrl_pin_desc *pins;
203 	unsigned int npins;
204 	const struct nmk_function *functions;
205 	unsigned int nfunctions;
206 	const struct nmk_pingroup *groups;
207 	unsigned int ngroups;
208 	const struct prcm_gpiocr_altcx_pin_desc *altcx_pins;
209 	unsigned int npins_altcx;
210 	const u16 *prcm_gpiocr_registers;
211 };
212 
213 #ifdef CONFIG_PINCTRL_STN8815
214 
215 void nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc);
216 
217 #else
218 
219 static inline void
nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data ** soc)220 nmk_pinctrl_stn8815_init(const struct nmk_pinctrl_soc_data **soc)
221 {
222 }
223 
224 #endif
225 
226 #ifdef CONFIG_PINCTRL_DB8500
227 
228 void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc);
229 
230 #else
231 
232 static inline void
nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data ** soc)233 nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
234 {
235 }
236 
237 #endif
238 
239 #ifdef CONFIG_PINCTRL_DB8540
240 
241 void nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc);
242 
243 #else
244 
245 static inline void
nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data ** soc)246 nmk_pinctrl_db8540_init(const struct nmk_pinctrl_soc_data **soc)
247 {
248 }
249 
250 #endif
251 
252 struct platform_device;
253 
254 #ifdef CONFIG_DEBUG_FS
255 
256 /*
257  * Symbols declared in gpio-nomadik used by pinctrl-nomadik. If pinctrl-nomadik
258  * is enabled, then gpio-nomadik is enabled as well; the reverse if not always
259  * true.
260  */
261 void nmk_gpio_dbg_show_one(struct seq_file *s, struct pinctrl_dev *pctldev,
262 			   struct gpio_chip *chip, unsigned int offset);
263 
264 #else
265 
nmk_gpio_dbg_show_one(struct seq_file * s,struct pinctrl_dev * pctldev,struct gpio_chip * chip,unsigned int offset)266 static inline void nmk_gpio_dbg_show_one(struct seq_file *s,
267 					 struct pinctrl_dev *pctldev,
268 					 struct gpio_chip *chip,
269 					 unsigned int offset)
270 {
271 }
272 
273 #endif
274 
275 void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip,
276 			    unsigned int offset, int val);
277 void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip, unsigned int offset,
278 			 enum nmk_gpio_slpm mode);
279 struct nmk_gpio_chip *nmk_gpio_populate_chip(struct fwnode_handle *fwnode,
280 					     struct platform_device *pdev);
281 
282 /* Symbols declared in pinctrl-nomadik used by gpio-nomadik. */
283 #ifdef CONFIG_PINCTRL_NOMADIK
284 extern struct nmk_gpio_chip *nmk_gpio_chips[NMK_MAX_BANKS];
285 extern spinlock_t nmk_gpio_slpm_lock;
286 int __maybe_unused nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev,
287 					    int gpio);
288 #endif
289 
290 #endif /* __LINUX_GPIO_NOMADIK_H */
291