1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-17 Intel Corporation.
3
4 /*
5 * Cadence SoundWire Master module
6 * Used by Master driver
7 */
8
9 #include <linux/cleanup.h>
10 #include <linux/crc8.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/debugfs.h>
14 #include <linux/interrupt.h>
15 #include <linux/io.h>
16 #include <linux/module.h>
17 #include <linux/mod_devicetable.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/soundwire/sdw_registers.h>
20 #include <linux/soundwire/sdw.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <linux/workqueue.h>
24 #include "bus.h"
25 #include "cadence_master.h"
26
27 static int interrupt_mask;
28 module_param_named(cnds_mcp_int_mask, interrupt_mask, int, 0444);
29 MODULE_PARM_DESC(cdns_mcp_int_mask, "Cadence MCP IntMask");
30
31 #define CDNS_MCP_CONFIG 0x0
32 #define CDNS_MCP_CONFIG_BUS_REL BIT(6)
33
34 #define CDNS_IP_MCP_CONFIG 0x0 /* IP offset added at run-time */
35
36 #define CDNS_IP_MCP_CONFIG_MCMD_RETRY GENMASK(27, 24)
37 #define CDNS_IP_MCP_CONFIG_MPREQ_DELAY GENMASK(20, 16)
38 #define CDNS_IP_MCP_CONFIG_MMASTER BIT(7)
39 #define CDNS_IP_MCP_CONFIG_SNIFFER BIT(5)
40 #define CDNS_IP_MCP_CONFIG_CMD BIT(3)
41 #define CDNS_IP_MCP_CONFIG_OP GENMASK(2, 0)
42 #define CDNS_IP_MCP_CONFIG_OP_NORMAL 0
43
44 #define CDNS_MCP_CONTROL 0x4
45
46 #define CDNS_MCP_CONTROL_CMD_RST BIT(7)
47 #define CDNS_MCP_CONTROL_SOFT_RST BIT(6)
48 #define CDNS_MCP_CONTROL_HW_RST BIT(4)
49 #define CDNS_MCP_CONTROL_CLK_STOP_CLR BIT(2)
50
51 #define CDNS_IP_MCP_CONTROL 0x4 /* IP offset added at run-time */
52
53 #define CDNS_IP_MCP_CONTROL_RST_DELAY GENMASK(10, 8)
54 #define CDNS_IP_MCP_CONTROL_SW_RST BIT(5)
55 #define CDNS_IP_MCP_CONTROL_CLK_PAUSE BIT(3)
56 #define CDNS_IP_MCP_CONTROL_CMD_ACCEPT BIT(1)
57 #define CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP BIT(0)
58
59 #define CDNS_IP_MCP_CMDCTRL 0x8 /* IP offset added at run-time */
60
61 #define CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR BIT(2)
62
63 #define CDNS_MCP_SSPSTAT 0xC
64 #define CDNS_MCP_FRAME_SHAPE 0x10
65 #define CDNS_MCP_FRAME_SHAPE_INIT 0x14
66 #define CDNS_MCP_FRAME_SHAPE_COL_MASK GENMASK(2, 0)
67 #define CDNS_MCP_FRAME_SHAPE_ROW_MASK GENMASK(7, 3)
68
69 #define CDNS_MCP_CONFIG_UPDATE 0x18
70 #define CDNS_MCP_CONFIG_UPDATE_BIT BIT(0)
71
72 #define CDNS_MCP_PHYCTRL 0x1C
73 #define CDNS_MCP_SSP_CTRL0 0x20
74 #define CDNS_MCP_SSP_CTRL1 0x28
75 #define CDNS_MCP_CLK_CTRL0 0x30
76 #define CDNS_MCP_CLK_CTRL1 0x38
77 #define CDNS_MCP_CLK_MCLKD_MASK GENMASK(7, 0)
78
79 #define CDNS_MCP_STAT 0x40
80
81 #define CDNS_MCP_STAT_ACTIVE_BANK BIT(20)
82 #define CDNS_MCP_STAT_CLK_STOP BIT(16)
83
84 #define CDNS_MCP_INTSTAT 0x44
85 #define CDNS_MCP_INTMASK 0x48
86
87 #define CDNS_MCP_INT_IRQ BIT(31)
88 #define CDNS_MCP_INT_RESERVED1 GENMASK(30, 17)
89 #define CDNS_MCP_INT_WAKEUP BIT(16)
90 #define CDNS_MCP_INT_SLAVE_RSVD BIT(15)
91 #define CDNS_MCP_INT_SLAVE_ALERT BIT(14)
92 #define CDNS_MCP_INT_SLAVE_ATTACH BIT(13)
93 #define CDNS_MCP_INT_SLAVE_NATTACH BIT(12)
94 #define CDNS_MCP_INT_SLAVE_MASK GENMASK(15, 12)
95 #define CDNS_MCP_INT_DPINT BIT(11)
96 #define CDNS_MCP_INT_CTRL_CLASH BIT(10)
97 #define CDNS_MCP_INT_DATA_CLASH BIT(9)
98 #define CDNS_MCP_INT_PARITY BIT(8)
99 #define CDNS_MCP_INT_CMD_ERR BIT(7)
100 #define CDNS_MCP_INT_RESERVED2 GENMASK(6, 4)
101 #define CDNS_MCP_INT_RX_NE BIT(3)
102 #define CDNS_MCP_INT_RX_WL BIT(2)
103 #define CDNS_MCP_INT_TXE BIT(1)
104 #define CDNS_MCP_INT_TXF BIT(0)
105 #define CDNS_MCP_INT_RESERVED (CDNS_MCP_INT_RESERVED1 | CDNS_MCP_INT_RESERVED2)
106
107 #define CDNS_MCP_INTSET 0x4C
108
109 #define CDNS_MCP_SLAVE_STAT 0x50
110 #define CDNS_MCP_SLAVE_STAT_MASK GENMASK(1, 0)
111
112 #define CDNS_MCP_SLAVE_INTSTAT0 0x54
113 #define CDNS_MCP_SLAVE_INTSTAT1 0x58
114 #define CDNS_MCP_SLAVE_INTSTAT_NPRESENT BIT(0)
115 #define CDNS_MCP_SLAVE_INTSTAT_ATTACHED BIT(1)
116 #define CDNS_MCP_SLAVE_INTSTAT_ALERT BIT(2)
117 #define CDNS_MCP_SLAVE_INTSTAT_RESERVED BIT(3)
118 #define CDNS_MCP_SLAVE_STATUS_BITS GENMASK(3, 0)
119 #define CDNS_MCP_SLAVE_STATUS_NUM 4
120
121 #define CDNS_MCP_SLAVE_INTMASK0 0x5C
122 #define CDNS_MCP_SLAVE_INTMASK1 0x60
123
124 #define CDNS_MCP_SLAVE_INTMASK0_MASK GENMASK(31, 0)
125 #define CDNS_MCP_SLAVE_INTMASK1_MASK GENMASK(15, 0)
126
127 #define CDNS_MCP_PORT_INTSTAT 0x64
128 #define CDNS_MCP_PDI_STAT 0x6C
129
130 #define CDNS_MCP_FIFOLEVEL 0x78
131 #define CDNS_MCP_FIFOSTAT 0x7C
132 #define CDNS_MCP_RX_FIFO_AVAIL GENMASK(5, 0)
133
134 #define CDNS_IP_MCP_CMD_BASE 0x80 /* IP offset added at run-time */
135 #define CDNS_IP_MCP_RESP_BASE 0x80 /* IP offset added at run-time */
136 /* FIFO can hold 8 commands */
137 #define CDNS_MCP_CMD_LEN 8
138 #define CDNS_MCP_CMD_WORD_LEN 0x4
139
140 #define CDNS_MCP_CMD_SSP_TAG BIT(31)
141 #define CDNS_MCP_CMD_COMMAND GENMASK(30, 28)
142 #define CDNS_MCP_CMD_DEV_ADDR GENMASK(27, 24)
143 #define CDNS_MCP_CMD_REG_ADDR GENMASK(23, 8)
144 #define CDNS_MCP_CMD_REG_DATA GENMASK(7, 0)
145
146 #define CDNS_MCP_CMD_READ 2
147 #define CDNS_MCP_CMD_WRITE 3
148
149 #define CDNS_MCP_RESP_RDATA GENMASK(15, 8)
150 #define CDNS_MCP_RESP_ACK BIT(0)
151 #define CDNS_MCP_RESP_NACK BIT(1)
152
153 #define CDNS_DP_SIZE 128
154
155 #define CDNS_DPN_B0_CONFIG(n) (0x100 + CDNS_DP_SIZE * (n))
156 #define CDNS_DPN_B0_CH_EN(n) (0x104 + CDNS_DP_SIZE * (n))
157 #define CDNS_DPN_B0_SAMPLE_CTRL(n) (0x108 + CDNS_DP_SIZE * (n))
158 #define CDNS_DPN_B0_OFFSET_CTRL(n) (0x10C + CDNS_DP_SIZE * (n))
159 #define CDNS_DPN_B0_HCTRL(n) (0x110 + CDNS_DP_SIZE * (n))
160 #define CDNS_DPN_B0_ASYNC_CTRL(n) (0x114 + CDNS_DP_SIZE * (n))
161
162 #define CDNS_DPN_B1_CONFIG(n) (0x118 + CDNS_DP_SIZE * (n))
163 #define CDNS_DPN_B1_CH_EN(n) (0x11C + CDNS_DP_SIZE * (n))
164 #define CDNS_DPN_B1_SAMPLE_CTRL(n) (0x120 + CDNS_DP_SIZE * (n))
165 #define CDNS_DPN_B1_OFFSET_CTRL(n) (0x124 + CDNS_DP_SIZE * (n))
166 #define CDNS_DPN_B1_HCTRL(n) (0x128 + CDNS_DP_SIZE * (n))
167 #define CDNS_DPN_B1_ASYNC_CTRL(n) (0x12C + CDNS_DP_SIZE * (n))
168
169 #define CDNS_DPN_CONFIG_BPM BIT(18)
170 #define CDNS_DPN_CONFIG_BGC GENMASK(17, 16)
171 #define CDNS_DPN_CONFIG_WL GENMASK(12, 8)
172 #define CDNS_DPN_CONFIG_PORT_DAT GENMASK(3, 2)
173 #define CDNS_DPN_CONFIG_PORT_FLOW GENMASK(1, 0)
174
175 #define CDNS_DPN_SAMPLE_CTRL_SI GENMASK(15, 0)
176
177 #define CDNS_DPN_OFFSET_CTRL_1 GENMASK(7, 0)
178 #define CDNS_DPN_OFFSET_CTRL_2 GENMASK(15, 8)
179
180 #define CDNS_DPN_HCTRL_HSTOP GENMASK(3, 0)
181 #define CDNS_DPN_HCTRL_HSTART GENMASK(7, 4)
182 #define CDNS_DPN_HCTRL_LCTRL GENMASK(10, 8)
183
184 #define CDNS_PORTCTRL 0x130
185 #define CDNS_PORTCTRL_TEST_FAILED BIT(1)
186 #define CDNS_PORTCTRL_DIRN BIT(7)
187 #define CDNS_PORTCTRL_BANK_INVERT BIT(8)
188 #define CDNS_PORTCTRL_BULK_ENABLE BIT(16)
189
190 #define CDNS_PORT_OFFSET 0x80
191
192 #define CDNS_PDI_CONFIG(n) (0x1100 + (n) * 16)
193
194 #define CDNS_PDI_CONFIG_SOFT_RESET BIT(24)
195 #define CDNS_PDI_CONFIG_CHANNEL GENMASK(15, 8)
196 #define CDNS_PDI_CONFIG_PORT GENMASK(4, 0)
197
198 /* Driver defaults */
199 #define CDNS_TX_TIMEOUT 500
200
201 #define CDNS_SCP_RX_FIFOLEVEL 0x2
202
203 /*
204 * register accessor helpers
205 */
cdns_readl(struct sdw_cdns * cdns,int offset)206 static inline u32 cdns_readl(struct sdw_cdns *cdns, int offset)
207 {
208 return readl(cdns->registers + offset);
209 }
210
cdns_writel(struct sdw_cdns * cdns,int offset,u32 value)211 static inline void cdns_writel(struct sdw_cdns *cdns, int offset, u32 value)
212 {
213 writel(value, cdns->registers + offset);
214 }
215
cdns_ip_readl(struct sdw_cdns * cdns,int offset)216 static inline u32 cdns_ip_readl(struct sdw_cdns *cdns, int offset)
217 {
218 return cdns_readl(cdns, cdns->ip_offset + offset);
219 }
220
cdns_ip_writel(struct sdw_cdns * cdns,int offset,u32 value)221 static inline void cdns_ip_writel(struct sdw_cdns *cdns, int offset, u32 value)
222 {
223 return cdns_writel(cdns, cdns->ip_offset + offset, value);
224 }
225
cdns_updatel(struct sdw_cdns * cdns,int offset,u32 mask,u32 val)226 static inline void cdns_updatel(struct sdw_cdns *cdns,
227 int offset, u32 mask, u32 val)
228 {
229 u32 tmp;
230
231 tmp = cdns_readl(cdns, offset);
232 tmp = (tmp & ~mask) | val;
233 cdns_writel(cdns, offset, tmp);
234 }
235
cdns_ip_updatel(struct sdw_cdns * cdns,int offset,u32 mask,u32 val)236 static inline void cdns_ip_updatel(struct sdw_cdns *cdns,
237 int offset, u32 mask, u32 val)
238 {
239 cdns_updatel(cdns, cdns->ip_offset + offset, mask, val);
240 }
241
cdns_set_wait(struct sdw_cdns * cdns,int offset,u32 mask,u32 value)242 static int cdns_set_wait(struct sdw_cdns *cdns, int offset, u32 mask, u32 value)
243 {
244 int timeout = 10;
245 u32 reg_read;
246
247 /* Wait for bit to be set */
248 do {
249 reg_read = readl(cdns->registers + offset);
250 if ((reg_read & mask) == value)
251 return 0;
252
253 timeout--;
254 usleep_range(50, 100);
255 } while (timeout != 0);
256
257 return -ETIMEDOUT;
258 }
259
cdns_clear_bit(struct sdw_cdns * cdns,int offset,u32 value)260 static int cdns_clear_bit(struct sdw_cdns *cdns, int offset, u32 value)
261 {
262 writel(value, cdns->registers + offset);
263
264 /* Wait for bit to be self cleared */
265 return cdns_set_wait(cdns, offset, value, 0);
266 }
267
268 /*
269 * all changes to the MCP_CONFIG, MCP_CONTROL, MCP_CMDCTRL and MCP_PHYCTRL
270 * need to be confirmed with a write to MCP_CONFIG_UPDATE
271 */
cdns_config_update(struct sdw_cdns * cdns)272 static int cdns_config_update(struct sdw_cdns *cdns)
273 {
274 int ret;
275
276 if (sdw_cdns_is_clock_stop(cdns)) {
277 dev_err(cdns->dev, "Cannot program MCP_CONFIG_UPDATE in ClockStopMode\n");
278 return -EINVAL;
279 }
280
281 ret = cdns_clear_bit(cdns, CDNS_MCP_CONFIG_UPDATE,
282 CDNS_MCP_CONFIG_UPDATE_BIT);
283 if (ret < 0)
284 dev_err(cdns->dev, "Config update timedout\n");
285
286 return ret;
287 }
288
289 /**
290 * sdw_cdns_config_update() - Update configurations
291 * @cdns: Cadence instance
292 */
sdw_cdns_config_update(struct sdw_cdns * cdns)293 void sdw_cdns_config_update(struct sdw_cdns *cdns)
294 {
295 /* commit changes */
296 cdns_writel(cdns, CDNS_MCP_CONFIG_UPDATE, CDNS_MCP_CONFIG_UPDATE_BIT);
297 }
298 EXPORT_SYMBOL(sdw_cdns_config_update);
299
300 /**
301 * sdw_cdns_config_update_set_wait() - wait until configuration update bit is self-cleared
302 * @cdns: Cadence instance
303 */
sdw_cdns_config_update_set_wait(struct sdw_cdns * cdns)304 int sdw_cdns_config_update_set_wait(struct sdw_cdns *cdns)
305 {
306 /* the hardware recommendation is to wait at least 300us */
307 return cdns_set_wait(cdns, CDNS_MCP_CONFIG_UPDATE,
308 CDNS_MCP_CONFIG_UPDATE_BIT, 0);
309 }
310 EXPORT_SYMBOL(sdw_cdns_config_update_set_wait);
311
312 /*
313 * debugfs
314 */
315 #ifdef CONFIG_DEBUG_FS
316
317 #define RD_BUF (2 * PAGE_SIZE)
318
cdns_sprintf(struct sdw_cdns * cdns,char * buf,size_t pos,unsigned int reg)319 static ssize_t cdns_sprintf(struct sdw_cdns *cdns,
320 char *buf, size_t pos, unsigned int reg)
321 {
322 return scnprintf(buf + pos, RD_BUF - pos,
323 "%4x\t%8x\n", reg, cdns_readl(cdns, reg));
324 }
325
cdns_reg_show(struct seq_file * s,void * data)326 static int cdns_reg_show(struct seq_file *s, void *data)
327 {
328 struct sdw_cdns *cdns = s->private;
329 ssize_t ret;
330 int num_ports;
331 int i, j;
332
333 char *buf __free(kfree) = kzalloc(RD_BUF, GFP_KERNEL);
334 if (!buf)
335 return -ENOMEM;
336
337 ret = scnprintf(buf, RD_BUF, "Register Value\n");
338 ret += scnprintf(buf + ret, RD_BUF - ret, "\nMCP Registers\n");
339 /* 8 MCP registers */
340 for (i = CDNS_MCP_CONFIG; i <= CDNS_MCP_PHYCTRL; i += sizeof(u32))
341 ret += cdns_sprintf(cdns, buf, ret, i);
342
343 ret += scnprintf(buf + ret, RD_BUF - ret,
344 "\nStatus & Intr Registers\n");
345 /* 13 Status & Intr registers (offsets 0x70 and 0x74 not defined) */
346 for (i = CDNS_MCP_STAT; i <= CDNS_MCP_FIFOSTAT; i += sizeof(u32))
347 ret += cdns_sprintf(cdns, buf, ret, i);
348
349 ret += scnprintf(buf + ret, RD_BUF - ret,
350 "\nSSP & Clk ctrl Registers\n");
351 ret += cdns_sprintf(cdns, buf, ret, CDNS_MCP_SSP_CTRL0);
352 ret += cdns_sprintf(cdns, buf, ret, CDNS_MCP_SSP_CTRL1);
353 ret += cdns_sprintf(cdns, buf, ret, CDNS_MCP_CLK_CTRL0);
354 ret += cdns_sprintf(cdns, buf, ret, CDNS_MCP_CLK_CTRL1);
355
356 ret += scnprintf(buf + ret, RD_BUF - ret,
357 "\nDPn B0 Registers\n");
358
359 num_ports = cdns->num_ports;
360
361 for (i = 0; i < num_ports; i++) {
362 ret += scnprintf(buf + ret, RD_BUF - ret,
363 "\nDP-%d\n", i);
364 for (j = CDNS_DPN_B0_CONFIG(i);
365 j < CDNS_DPN_B0_ASYNC_CTRL(i); j += sizeof(u32))
366 ret += cdns_sprintf(cdns, buf, ret, j);
367 }
368
369 ret += scnprintf(buf + ret, RD_BUF - ret,
370 "\nDPn B1 Registers\n");
371 for (i = 0; i < num_ports; i++) {
372 ret += scnprintf(buf + ret, RD_BUF - ret,
373 "\nDP-%d\n", i);
374
375 for (j = CDNS_DPN_B1_CONFIG(i);
376 j < CDNS_DPN_B1_ASYNC_CTRL(i); j += sizeof(u32))
377 ret += cdns_sprintf(cdns, buf, ret, j);
378 }
379
380 ret += scnprintf(buf + ret, RD_BUF - ret,
381 "\nDPn Control Registers\n");
382 for (i = 0; i < num_ports; i++)
383 ret += cdns_sprintf(cdns, buf, ret,
384 CDNS_PORTCTRL + i * CDNS_PORT_OFFSET);
385
386 ret += scnprintf(buf + ret, RD_BUF - ret,
387 "\nPDIn Config Registers\n");
388
389 /* number of PDI and ports is interchangeable */
390 for (i = 0; i < num_ports; i++)
391 ret += cdns_sprintf(cdns, buf, ret, CDNS_PDI_CONFIG(i));
392
393 seq_printf(s, "%s", buf);
394
395 return 0;
396 }
397 DEFINE_SHOW_ATTRIBUTE(cdns_reg);
398
cdns_hw_reset(void * data,u64 value)399 static int cdns_hw_reset(void *data, u64 value)
400 {
401 struct sdw_cdns *cdns = data;
402 int ret;
403
404 if (value != 1)
405 return -EINVAL;
406
407 /* Userspace changed the hardware state behind the kernel's back */
408 add_taint(TAINT_USER, LOCKDEP_STILL_OK);
409
410 ret = sdw_cdns_exit_reset(cdns);
411
412 dev_dbg(cdns->dev, "link hw_reset done: %d\n", ret);
413
414 return ret;
415 }
416
417 DEFINE_DEBUGFS_ATTRIBUTE(cdns_hw_reset_fops, NULL, cdns_hw_reset, "%llu\n");
418
cdns_parity_error_injection(void * data,u64 value)419 static int cdns_parity_error_injection(void *data, u64 value)
420 {
421 struct sdw_cdns *cdns = data;
422 struct sdw_bus *bus;
423 int ret;
424
425 if (value != 1)
426 return -EINVAL;
427
428 bus = &cdns->bus;
429
430 /*
431 * Resume Master device. If this results in a bus reset, the
432 * Slave devices will re-attach and be re-enumerated.
433 */
434 ret = pm_runtime_resume_and_get(bus->dev);
435 if (ret < 0 && ret != -EACCES) {
436 dev_err_ratelimited(cdns->dev,
437 "pm_runtime_resume_and_get failed in %s, ret %d\n",
438 __func__, ret);
439 return ret;
440 }
441
442 /*
443 * wait long enough for Slave(s) to be in steady state. This
444 * does not need to be super precise.
445 */
446 msleep(200);
447
448 /*
449 * Take the bus lock here to make sure that any bus transactions
450 * will be queued while we inject a parity error on a dummy read
451 */
452 mutex_lock(&bus->bus_lock);
453
454 /* program hardware to inject parity error */
455 cdns_ip_updatel(cdns, CDNS_IP_MCP_CMDCTRL,
456 CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR,
457 CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR);
458
459 /* commit changes */
460 ret = cdns_clear_bit(cdns, CDNS_MCP_CONFIG_UPDATE, CDNS_MCP_CONFIG_UPDATE_BIT);
461 if (ret < 0)
462 goto unlock;
463
464 /* do a broadcast dummy read to avoid bus clashes */
465 ret = sdw_bread_no_pm_unlocked(&cdns->bus, 0xf, SDW_SCP_DEVID_0);
466 dev_info(cdns->dev, "parity error injection, read: %d\n", ret);
467
468 /* program hardware to disable parity error */
469 cdns_ip_updatel(cdns, CDNS_IP_MCP_CMDCTRL,
470 CDNS_IP_MCP_CMDCTRL_INSERT_PARITY_ERR,
471 0);
472
473 /* commit changes */
474 ret = cdns_clear_bit(cdns, CDNS_MCP_CONFIG_UPDATE, CDNS_MCP_CONFIG_UPDATE_BIT);
475 if (ret < 0)
476 goto unlock;
477
478 /* Userspace changed the hardware state behind the kernel's back */
479 add_taint(TAINT_USER, LOCKDEP_STILL_OK);
480
481 unlock:
482 /* Continue bus operation with parity error injection disabled */
483 mutex_unlock(&bus->bus_lock);
484
485 /*
486 * allow Master device to enter pm_runtime suspend. This may
487 * also result in Slave devices suspending.
488 */
489 pm_runtime_mark_last_busy(bus->dev);
490 pm_runtime_put_autosuspend(bus->dev);
491
492 return 0;
493 }
494
495 DEFINE_DEBUGFS_ATTRIBUTE(cdns_parity_error_fops, NULL,
496 cdns_parity_error_injection, "%llu\n");
497
cdns_set_pdi_loopback_source(void * data,u64 value)498 static int cdns_set_pdi_loopback_source(void *data, u64 value)
499 {
500 struct sdw_cdns *cdns = data;
501 unsigned int pdi_out_num = cdns->pcm.num_bd + cdns->pcm.num_out;
502
503 if (value > pdi_out_num)
504 return -EINVAL;
505
506 /* Userspace changed the hardware state behind the kernel's back */
507 add_taint(TAINT_USER, LOCKDEP_STILL_OK);
508
509 cdns->pdi_loopback_source = value;
510
511 return 0;
512 }
513 DEFINE_DEBUGFS_ATTRIBUTE(cdns_pdi_loopback_source_fops, NULL, cdns_set_pdi_loopback_source, "%llu\n");
514
cdns_set_pdi_loopback_target(void * data,u64 value)515 static int cdns_set_pdi_loopback_target(void *data, u64 value)
516 {
517 struct sdw_cdns *cdns = data;
518 unsigned int pdi_in_num = cdns->pcm.num_bd + cdns->pcm.num_in;
519
520 if (value > pdi_in_num)
521 return -EINVAL;
522
523 /* Userspace changed the hardware state behind the kernel's back */
524 add_taint(TAINT_USER, LOCKDEP_STILL_OK);
525
526 cdns->pdi_loopback_target = value;
527
528 return 0;
529 }
530 DEFINE_DEBUGFS_ATTRIBUTE(cdns_pdi_loopback_target_fops, NULL, cdns_set_pdi_loopback_target, "%llu\n");
531
532 /**
533 * sdw_cdns_debugfs_init() - Cadence debugfs init
534 * @cdns: Cadence instance
535 * @root: debugfs root
536 */
sdw_cdns_debugfs_init(struct sdw_cdns * cdns,struct dentry * root)537 void sdw_cdns_debugfs_init(struct sdw_cdns *cdns, struct dentry *root)
538 {
539 debugfs_create_file("cdns-registers", 0400, root, cdns, &cdns_reg_fops);
540
541 debugfs_create_file("cdns-hw-reset", 0200, root, cdns,
542 &cdns_hw_reset_fops);
543
544 debugfs_create_file("cdns-parity-error-injection", 0200, root, cdns,
545 &cdns_parity_error_fops);
546
547 cdns->pdi_loopback_source = -1;
548 cdns->pdi_loopback_target = -1;
549
550 debugfs_create_file("cdns-pdi-loopback-source", 0200, root, cdns,
551 &cdns_pdi_loopback_source_fops);
552
553 debugfs_create_file("cdns-pdi-loopback-target", 0200, root, cdns,
554 &cdns_pdi_loopback_target_fops);
555
556 }
557 EXPORT_SYMBOL_GPL(sdw_cdns_debugfs_init);
558
559 #endif /* CONFIG_DEBUG_FS */
560
561 /*
562 * IO Calls
563 */
564 static enum sdw_command_response
cdns_fill_msg_resp(struct sdw_cdns * cdns,struct sdw_msg * msg,int count,int offset)565 cdns_fill_msg_resp(struct sdw_cdns *cdns,
566 struct sdw_msg *msg, int count, int offset)
567 {
568 int nack = 0, no_ack = 0;
569 int i;
570
571 /* check message response */
572 for (i = 0; i < count; i++) {
573 if (!(cdns->response_buf[i] & CDNS_MCP_RESP_ACK)) {
574 no_ack = 1;
575 dev_vdbg(cdns->dev, "Msg Ack not received, cmd %d\n", i);
576 }
577 if (cdns->response_buf[i] & CDNS_MCP_RESP_NACK) {
578 nack = 1;
579 dev_err_ratelimited(cdns->dev, "Msg NACK received, cmd %d\n", i);
580 }
581 }
582
583 if (nack) {
584 dev_err_ratelimited(cdns->dev, "Msg NACKed for Slave %d\n", msg->dev_num);
585 return SDW_CMD_FAIL;
586 }
587
588 if (no_ack) {
589 dev_dbg_ratelimited(cdns->dev, "Msg ignored for Slave %d\n", msg->dev_num);
590 return SDW_CMD_IGNORED;
591 }
592
593 if (msg->flags == SDW_MSG_FLAG_READ) {
594 /* fill response */
595 for (i = 0; i < count; i++)
596 msg->buf[i + offset] = FIELD_GET(CDNS_MCP_RESP_RDATA,
597 cdns->response_buf[i]);
598 }
599
600 return SDW_CMD_OK;
601 }
602
cdns_read_response(struct sdw_cdns * cdns)603 static void cdns_read_response(struct sdw_cdns *cdns)
604 {
605 u32 num_resp, cmd_base;
606 int i;
607
608 /* RX_FIFO_AVAIL can be 2 entries more than the FIFO size */
609 BUILD_BUG_ON(ARRAY_SIZE(cdns->response_buf) < CDNS_MCP_CMD_LEN + 2);
610
611 num_resp = cdns_readl(cdns, CDNS_MCP_FIFOSTAT);
612 num_resp &= CDNS_MCP_RX_FIFO_AVAIL;
613 if (num_resp > ARRAY_SIZE(cdns->response_buf)) {
614 dev_warn(cdns->dev, "RX AVAIL %d too long\n", num_resp);
615 num_resp = ARRAY_SIZE(cdns->response_buf);
616 }
617
618 cmd_base = CDNS_IP_MCP_CMD_BASE;
619
620 for (i = 0; i < num_resp; i++) {
621 cdns->response_buf[i] = cdns_ip_readl(cdns, cmd_base);
622 cmd_base += CDNS_MCP_CMD_WORD_LEN;
623 }
624 }
625
626 static enum sdw_command_response
_cdns_xfer_msg(struct sdw_cdns * cdns,struct sdw_msg * msg,int cmd,int offset,int count,bool defer)627 _cdns_xfer_msg(struct sdw_cdns *cdns, struct sdw_msg *msg, int cmd,
628 int offset, int count, bool defer)
629 {
630 unsigned long time;
631 u32 base, i, data;
632 u16 addr;
633
634 /* Program the watermark level for RX FIFO */
635 if (cdns->msg_count != count) {
636 cdns_writel(cdns, CDNS_MCP_FIFOLEVEL, count);
637 cdns->msg_count = count;
638 }
639
640 base = CDNS_IP_MCP_CMD_BASE;
641 addr = msg->addr + offset;
642
643 for (i = 0; i < count; i++) {
644 data = FIELD_PREP(CDNS_MCP_CMD_DEV_ADDR, msg->dev_num);
645 data |= FIELD_PREP(CDNS_MCP_CMD_COMMAND, cmd);
646 data |= FIELD_PREP(CDNS_MCP_CMD_REG_ADDR, addr);
647 addr++;
648
649 if (msg->flags == SDW_MSG_FLAG_WRITE)
650 data |= msg->buf[i + offset];
651
652 data |= FIELD_PREP(CDNS_MCP_CMD_SSP_TAG, msg->ssp_sync);
653 cdns_ip_writel(cdns, base, data);
654 base += CDNS_MCP_CMD_WORD_LEN;
655 }
656
657 if (defer)
658 return SDW_CMD_OK;
659
660 /* wait for timeout or response */
661 time = wait_for_completion_timeout(&cdns->tx_complete,
662 msecs_to_jiffies(CDNS_TX_TIMEOUT));
663 if (!time) {
664 dev_err(cdns->dev, "IO transfer timed out, cmd %d device %d addr %x len %d\n",
665 cmd, msg->dev_num, msg->addr, msg->len);
666 msg->len = 0;
667
668 /* Drain anything in the RX_FIFO */
669 cdns_read_response(cdns);
670
671 return SDW_CMD_TIMEOUT;
672 }
673
674 return cdns_fill_msg_resp(cdns, msg, count, offset);
675 }
676
677 static enum sdw_command_response
cdns_program_scp_addr(struct sdw_cdns * cdns,struct sdw_msg * msg)678 cdns_program_scp_addr(struct sdw_cdns *cdns, struct sdw_msg *msg)
679 {
680 int nack = 0, no_ack = 0;
681 unsigned long time;
682 u32 data[2], base;
683 int i;
684
685 /* Program the watermark level for RX FIFO */
686 if (cdns->msg_count != CDNS_SCP_RX_FIFOLEVEL) {
687 cdns_writel(cdns, CDNS_MCP_FIFOLEVEL, CDNS_SCP_RX_FIFOLEVEL);
688 cdns->msg_count = CDNS_SCP_RX_FIFOLEVEL;
689 }
690
691 data[0] = FIELD_PREP(CDNS_MCP_CMD_DEV_ADDR, msg->dev_num);
692 data[0] |= FIELD_PREP(CDNS_MCP_CMD_COMMAND, 0x3);
693 data[1] = data[0];
694
695 data[0] |= FIELD_PREP(CDNS_MCP_CMD_REG_ADDR, SDW_SCP_ADDRPAGE1);
696 data[1] |= FIELD_PREP(CDNS_MCP_CMD_REG_ADDR, SDW_SCP_ADDRPAGE2);
697
698 data[0] |= msg->addr_page1;
699 data[1] |= msg->addr_page2;
700
701 base = CDNS_IP_MCP_CMD_BASE;
702 cdns_ip_writel(cdns, base, data[0]);
703 base += CDNS_MCP_CMD_WORD_LEN;
704 cdns_ip_writel(cdns, base, data[1]);
705
706 time = wait_for_completion_timeout(&cdns->tx_complete,
707 msecs_to_jiffies(CDNS_TX_TIMEOUT));
708 if (!time) {
709 dev_err(cdns->dev, "SCP Msg trf timed out\n");
710 msg->len = 0;
711 return SDW_CMD_TIMEOUT;
712 }
713
714 /* check response the writes */
715 for (i = 0; i < 2; i++) {
716 if (!(cdns->response_buf[i] & CDNS_MCP_RESP_ACK)) {
717 no_ack = 1;
718 dev_err(cdns->dev, "Program SCP Ack not received\n");
719 if (cdns->response_buf[i] & CDNS_MCP_RESP_NACK) {
720 nack = 1;
721 dev_err(cdns->dev, "Program SCP NACK received\n");
722 }
723 }
724 }
725
726 /* For NACK, NO ack, don't return err if we are in Broadcast mode */
727 if (nack) {
728 dev_err_ratelimited(cdns->dev,
729 "SCP_addrpage NACKed for Slave %d\n", msg->dev_num);
730 return SDW_CMD_FAIL;
731 }
732
733 if (no_ack) {
734 dev_dbg_ratelimited(cdns->dev,
735 "SCP_addrpage ignored for Slave %d\n", msg->dev_num);
736 return SDW_CMD_IGNORED;
737 }
738
739 return SDW_CMD_OK;
740 }
741
cdns_prep_msg(struct sdw_cdns * cdns,struct sdw_msg * msg,int * cmd)742 static int cdns_prep_msg(struct sdw_cdns *cdns, struct sdw_msg *msg, int *cmd)
743 {
744 int ret;
745
746 if (msg->page) {
747 ret = cdns_program_scp_addr(cdns, msg);
748 if (ret) {
749 msg->len = 0;
750 return ret;
751 }
752 }
753
754 switch (msg->flags) {
755 case SDW_MSG_FLAG_READ:
756 *cmd = CDNS_MCP_CMD_READ;
757 break;
758
759 case SDW_MSG_FLAG_WRITE:
760 *cmd = CDNS_MCP_CMD_WRITE;
761 break;
762
763 default:
764 dev_err(cdns->dev, "Invalid msg cmd: %d\n", msg->flags);
765 return -EINVAL;
766 }
767
768 return 0;
769 }
770
771 enum sdw_command_response
cdns_xfer_msg(struct sdw_bus * bus,struct sdw_msg * msg)772 cdns_xfer_msg(struct sdw_bus *bus, struct sdw_msg *msg)
773 {
774 struct sdw_cdns *cdns = bus_to_cdns(bus);
775 int cmd = 0, ret, i;
776
777 ret = cdns_prep_msg(cdns, msg, &cmd);
778 if (ret)
779 return SDW_CMD_FAIL_OTHER;
780
781 for (i = 0; i < msg->len / CDNS_MCP_CMD_LEN; i++) {
782 ret = _cdns_xfer_msg(cdns, msg, cmd, i * CDNS_MCP_CMD_LEN,
783 CDNS_MCP_CMD_LEN, false);
784 if (ret != SDW_CMD_OK)
785 return ret;
786 }
787
788 if (!(msg->len % CDNS_MCP_CMD_LEN))
789 return SDW_CMD_OK;
790
791 return _cdns_xfer_msg(cdns, msg, cmd, i * CDNS_MCP_CMD_LEN,
792 msg->len % CDNS_MCP_CMD_LEN, false);
793 }
794 EXPORT_SYMBOL(cdns_xfer_msg);
795
796 enum sdw_command_response
cdns_xfer_msg_defer(struct sdw_bus * bus)797 cdns_xfer_msg_defer(struct sdw_bus *bus)
798 {
799 struct sdw_cdns *cdns = bus_to_cdns(bus);
800 struct sdw_defer *defer = &bus->defer_msg;
801 struct sdw_msg *msg = defer->msg;
802 int cmd = 0, ret;
803
804 /* for defer only 1 message is supported */
805 if (msg->len > 1)
806 return -ENOTSUPP;
807
808 ret = cdns_prep_msg(cdns, msg, &cmd);
809 if (ret)
810 return SDW_CMD_FAIL_OTHER;
811
812 return _cdns_xfer_msg(cdns, msg, cmd, 0, msg->len, true);
813 }
814 EXPORT_SYMBOL(cdns_xfer_msg_defer);
815
cdns_read_ping_status(struct sdw_bus * bus)816 u32 cdns_read_ping_status(struct sdw_bus *bus)
817 {
818 struct sdw_cdns *cdns = bus_to_cdns(bus);
819
820 return cdns_readl(cdns, CDNS_MCP_SLAVE_STAT);
821 }
822 EXPORT_SYMBOL(cdns_read_ping_status);
823
824 /*
825 * IRQ handling
826 */
827
cdns_update_slave_status(struct sdw_cdns * cdns,u64 slave_intstat)828 static int cdns_update_slave_status(struct sdw_cdns *cdns,
829 u64 slave_intstat)
830 {
831 enum sdw_slave_status status[SDW_MAX_DEVICES + 1];
832 bool is_slave = false;
833 u32 mask;
834 u32 val;
835 int i, set_status;
836
837 memset(status, 0, sizeof(status));
838
839 for (i = 0; i <= SDW_MAX_DEVICES; i++) {
840 mask = (slave_intstat >> (i * CDNS_MCP_SLAVE_STATUS_NUM)) &
841 CDNS_MCP_SLAVE_STATUS_BITS;
842
843 set_status = 0;
844
845 if (mask) {
846 is_slave = true;
847
848 if (mask & CDNS_MCP_SLAVE_INTSTAT_RESERVED) {
849 status[i] = SDW_SLAVE_RESERVED;
850 set_status++;
851 }
852
853 if (mask & CDNS_MCP_SLAVE_INTSTAT_ATTACHED) {
854 status[i] = SDW_SLAVE_ATTACHED;
855 set_status++;
856 }
857
858 if (mask & CDNS_MCP_SLAVE_INTSTAT_ALERT) {
859 status[i] = SDW_SLAVE_ALERT;
860 set_status++;
861 }
862
863 if (mask & CDNS_MCP_SLAVE_INTSTAT_NPRESENT) {
864 status[i] = SDW_SLAVE_UNATTACHED;
865 set_status++;
866 }
867 }
868
869 /*
870 * check that there was a single reported Slave status and when
871 * there is not use the latest status extracted from PING commands
872 */
873 if (set_status != 1) {
874 val = cdns_readl(cdns, CDNS_MCP_SLAVE_STAT);
875 val >>= (i * 2);
876
877 switch (val & 0x3) {
878 case 0:
879 status[i] = SDW_SLAVE_UNATTACHED;
880 break;
881 case 1:
882 status[i] = SDW_SLAVE_ATTACHED;
883 break;
884 case 2:
885 status[i] = SDW_SLAVE_ALERT;
886 break;
887 case 3:
888 default:
889 status[i] = SDW_SLAVE_RESERVED;
890 break;
891 }
892 }
893 }
894
895 if (is_slave) {
896 int ret;
897
898 mutex_lock(&cdns->status_update_lock);
899 ret = sdw_handle_slave_status(&cdns->bus, status);
900 mutex_unlock(&cdns->status_update_lock);
901 return ret;
902 }
903
904 return 0;
905 }
906
907 /**
908 * sdw_cdns_irq() - Cadence interrupt handler
909 * @irq: irq number
910 * @dev_id: irq context
911 */
sdw_cdns_irq(int irq,void * dev_id)912 irqreturn_t sdw_cdns_irq(int irq, void *dev_id)
913 {
914 struct sdw_cdns *cdns = dev_id;
915 u32 int_status;
916
917 /* Check if the link is up */
918 if (!cdns->link_up)
919 return IRQ_NONE;
920
921 int_status = cdns_readl(cdns, CDNS_MCP_INTSTAT);
922
923 /* check for reserved values read as zero */
924 if (int_status & CDNS_MCP_INT_RESERVED)
925 return IRQ_NONE;
926
927 if (!(int_status & CDNS_MCP_INT_IRQ))
928 return IRQ_NONE;
929
930 if (int_status & CDNS_MCP_INT_RX_WL) {
931 struct sdw_bus *bus = &cdns->bus;
932 struct sdw_defer *defer = &bus->defer_msg;
933
934 cdns_read_response(cdns);
935
936 if (defer && defer->msg) {
937 cdns_fill_msg_resp(cdns, defer->msg,
938 defer->length, 0);
939 complete(&defer->complete);
940 } else {
941 complete(&cdns->tx_complete);
942 }
943 }
944
945 if (int_status & CDNS_MCP_INT_PARITY) {
946 /* Parity error detected by Master */
947 dev_err_ratelimited(cdns->dev, "Parity error\n");
948 }
949
950 if (int_status & CDNS_MCP_INT_CTRL_CLASH) {
951 /* Slave is driving bit slot during control word */
952 dev_err_ratelimited(cdns->dev, "Bus clash for control word\n");
953 }
954
955 if (int_status & CDNS_MCP_INT_DATA_CLASH) {
956 /*
957 * Multiple slaves trying to drive bit slot, or issue with
958 * ownership of data bits or Slave gone bonkers
959 */
960 dev_err_ratelimited(cdns->dev, "Bus clash for data word\n");
961 }
962
963 if (cdns->bus.params.m_data_mode != SDW_PORT_DATA_MODE_NORMAL &&
964 int_status & CDNS_MCP_INT_DPINT) {
965 u32 port_intstat;
966
967 /* just log which ports report an error */
968 port_intstat = cdns_readl(cdns, CDNS_MCP_PORT_INTSTAT);
969 dev_err_ratelimited(cdns->dev, "DP interrupt: PortIntStat %8x\n",
970 port_intstat);
971
972 /* clear status w/ write1 */
973 cdns_writel(cdns, CDNS_MCP_PORT_INTSTAT, port_intstat);
974 }
975
976 if (int_status & CDNS_MCP_INT_SLAVE_MASK) {
977 /* Mask the Slave interrupt and wake thread */
978 cdns_updatel(cdns, CDNS_MCP_INTMASK,
979 CDNS_MCP_INT_SLAVE_MASK, 0);
980
981 int_status &= ~CDNS_MCP_INT_SLAVE_MASK;
982
983 /*
984 * Deal with possible race condition between interrupt
985 * handling and disabling interrupts on suspend.
986 *
987 * If the master is in the process of disabling
988 * interrupts, don't schedule a workqueue
989 */
990 if (cdns->interrupt_enabled)
991 schedule_work(&cdns->work);
992 }
993
994 cdns_writel(cdns, CDNS_MCP_INTSTAT, int_status);
995 return IRQ_HANDLED;
996 }
997 EXPORT_SYMBOL(sdw_cdns_irq);
998
cdns_check_attached_status_dwork(struct work_struct * work)999 static void cdns_check_attached_status_dwork(struct work_struct *work)
1000 {
1001 struct sdw_cdns *cdns =
1002 container_of(work, struct sdw_cdns, attach_dwork.work);
1003 enum sdw_slave_status status[SDW_MAX_DEVICES + 1];
1004 u32 val;
1005 int ret;
1006 int i;
1007
1008 val = cdns_readl(cdns, CDNS_MCP_SLAVE_STAT);
1009
1010 for (i = 0; i <= SDW_MAX_DEVICES; i++) {
1011 status[i] = val & 0x3;
1012 if (status[i])
1013 dev_dbg(cdns->dev, "Peripheral %d status: %d\n", i, status[i]);
1014 val >>= 2;
1015 }
1016
1017 mutex_lock(&cdns->status_update_lock);
1018 ret = sdw_handle_slave_status(&cdns->bus, status);
1019 mutex_unlock(&cdns->status_update_lock);
1020 if (ret < 0)
1021 dev_err(cdns->dev, "%s: sdw_handle_slave_status failed: %d\n", __func__, ret);
1022 }
1023
1024 /**
1025 * cdns_update_slave_status_work - update slave status in a work since we will need to handle
1026 * other interrupts eg. CDNS_MCP_INT_RX_WL during the update slave
1027 * process.
1028 * @work: cdns worker thread
1029 */
cdns_update_slave_status_work(struct work_struct * work)1030 static void cdns_update_slave_status_work(struct work_struct *work)
1031 {
1032 struct sdw_cdns *cdns =
1033 container_of(work, struct sdw_cdns, work);
1034 u32 slave0, slave1;
1035 u64 slave_intstat;
1036 u32 device0_status;
1037 int retry_count = 0;
1038
1039 /*
1040 * Clear main interrupt first so we don't lose any assertions
1041 * that happen during this function.
1042 */
1043 cdns_writel(cdns, CDNS_MCP_INTSTAT, CDNS_MCP_INT_SLAVE_MASK);
1044
1045 slave0 = cdns_readl(cdns, CDNS_MCP_SLAVE_INTSTAT0);
1046 slave1 = cdns_readl(cdns, CDNS_MCP_SLAVE_INTSTAT1);
1047
1048 /*
1049 * Clear the bits before handling so we don't lose any
1050 * bits that re-assert.
1051 */
1052 cdns_writel(cdns, CDNS_MCP_SLAVE_INTSTAT0, slave0);
1053 cdns_writel(cdns, CDNS_MCP_SLAVE_INTSTAT1, slave1);
1054
1055 /* combine the two status */
1056 slave_intstat = ((u64)slave1 << 32) | slave0;
1057
1058 dev_dbg_ratelimited(cdns->dev, "Slave status change: 0x%llx\n", slave_intstat);
1059
1060 update_status:
1061 cdns_update_slave_status(cdns, slave_intstat);
1062
1063 /*
1064 * When there is more than one peripheral per link, it's
1065 * possible that a deviceB becomes attached after we deal with
1066 * the attachment of deviceA. Since the hardware does a
1067 * logical AND, the attachment of the second device does not
1068 * change the status seen by the driver.
1069 *
1070 * In that case, clearing the registers above would result in
1071 * the deviceB never being detected - until a change of status
1072 * is observed on the bus.
1073 *
1074 * To avoid this race condition, re-check if any device0 needs
1075 * attention with PING commands. There is no need to check for
1076 * ALERTS since they are not allowed until a non-zero
1077 * device_number is assigned.
1078 *
1079 * Do not clear the INTSTAT0/1. While looping to enumerate devices on
1080 * #0 there could be status changes on other devices - these must
1081 * be kept in the INTSTAT so they can be handled when all #0 devices
1082 * have been handled.
1083 */
1084
1085 device0_status = cdns_readl(cdns, CDNS_MCP_SLAVE_STAT);
1086 device0_status &= 3;
1087
1088 if (device0_status == SDW_SLAVE_ATTACHED) {
1089 if (retry_count++ < SDW_MAX_DEVICES) {
1090 dev_dbg_ratelimited(cdns->dev,
1091 "Device0 detected after clearing status, iteration %d\n",
1092 retry_count);
1093 slave_intstat = CDNS_MCP_SLAVE_INTSTAT_ATTACHED;
1094 goto update_status;
1095 } else {
1096 dev_err_ratelimited(cdns->dev,
1097 "Device0 detected after %d iterations\n",
1098 retry_count);
1099 }
1100 }
1101
1102 /* unmask Slave interrupt now */
1103 cdns_updatel(cdns, CDNS_MCP_INTMASK,
1104 CDNS_MCP_INT_SLAVE_MASK, CDNS_MCP_INT_SLAVE_MASK);
1105
1106 }
1107
1108 /* paranoia check to make sure self-cleared bits are indeed cleared */
sdw_cdns_check_self_clearing_bits(struct sdw_cdns * cdns,const char * string,bool initial_delay,int reset_iterations)1109 void sdw_cdns_check_self_clearing_bits(struct sdw_cdns *cdns, const char *string,
1110 bool initial_delay, int reset_iterations)
1111 {
1112 u32 ip_mcp_control;
1113 u32 mcp_control;
1114 u32 mcp_config_update;
1115 int i;
1116
1117 if (initial_delay)
1118 usleep_range(1000, 1500);
1119
1120 ip_mcp_control = cdns_ip_readl(cdns, CDNS_IP_MCP_CONTROL);
1121
1122 /* the following bits should be cleared immediately */
1123 if (ip_mcp_control & CDNS_IP_MCP_CONTROL_SW_RST)
1124 dev_err(cdns->dev, "%s failed: IP_MCP_CONTROL_SW_RST is not cleared\n", string);
1125
1126 mcp_control = cdns_readl(cdns, CDNS_MCP_CONTROL);
1127
1128 /* the following bits should be cleared immediately */
1129 if (mcp_control & CDNS_MCP_CONTROL_CMD_RST)
1130 dev_err(cdns->dev, "%s failed: MCP_CONTROL_CMD_RST is not cleared\n", string);
1131 if (mcp_control & CDNS_MCP_CONTROL_SOFT_RST)
1132 dev_err(cdns->dev, "%s failed: MCP_CONTROL_SOFT_RST is not cleared\n", string);
1133 if (mcp_control & CDNS_MCP_CONTROL_CLK_STOP_CLR)
1134 dev_err(cdns->dev, "%s failed: MCP_CONTROL_CLK_STOP_CLR is not cleared\n", string);
1135
1136 mcp_config_update = cdns_readl(cdns, CDNS_MCP_CONFIG_UPDATE);
1137 if (mcp_config_update & CDNS_MCP_CONFIG_UPDATE_BIT)
1138 dev_err(cdns->dev, "%s failed: MCP_CONFIG_UPDATE_BIT is not cleared\n", string);
1139
1140 i = 0;
1141 while (mcp_control & CDNS_MCP_CONTROL_HW_RST) {
1142 if (i == reset_iterations) {
1143 dev_err(cdns->dev, "%s failed: MCP_CONTROL_HW_RST is not cleared\n", string);
1144 break;
1145 }
1146
1147 dev_dbg(cdns->dev, "%s: MCP_CONTROL_HW_RST is not cleared at iteration %d\n", string, i);
1148 i++;
1149
1150 usleep_range(1000, 1500);
1151 mcp_control = cdns_readl(cdns, CDNS_MCP_CONTROL);
1152 }
1153
1154 }
1155 EXPORT_SYMBOL(sdw_cdns_check_self_clearing_bits);
1156
1157 /*
1158 * init routines
1159 */
1160
1161 /**
1162 * sdw_cdns_exit_reset() - Program reset parameters and start bus operations
1163 * @cdns: Cadence instance
1164 */
sdw_cdns_exit_reset(struct sdw_cdns * cdns)1165 int sdw_cdns_exit_reset(struct sdw_cdns *cdns)
1166 {
1167 /* keep reset delay unchanged to 4096 cycles */
1168
1169 /* use hardware generated reset */
1170 cdns_updatel(cdns, CDNS_MCP_CONTROL,
1171 CDNS_MCP_CONTROL_HW_RST,
1172 CDNS_MCP_CONTROL_HW_RST);
1173
1174 /* commit changes */
1175 return cdns_config_update(cdns);
1176 }
1177 EXPORT_SYMBOL(sdw_cdns_exit_reset);
1178
1179 /**
1180 * cdns_enable_slave_interrupts() - Enable SDW slave interrupts
1181 * @cdns: Cadence instance
1182 * @state: boolean for true/false
1183 */
cdns_enable_slave_interrupts(struct sdw_cdns * cdns,bool state)1184 static void cdns_enable_slave_interrupts(struct sdw_cdns *cdns, bool state)
1185 {
1186 u32 mask;
1187
1188 mask = cdns_readl(cdns, CDNS_MCP_INTMASK);
1189 if (state)
1190 mask |= CDNS_MCP_INT_SLAVE_MASK;
1191 else
1192 mask &= ~CDNS_MCP_INT_SLAVE_MASK;
1193
1194 cdns_writel(cdns, CDNS_MCP_INTMASK, mask);
1195 }
1196
1197 /**
1198 * sdw_cdns_enable_interrupt() - Enable SDW interrupts
1199 * @cdns: Cadence instance
1200 * @state: True if we are trying to enable interrupt.
1201 */
sdw_cdns_enable_interrupt(struct sdw_cdns * cdns,bool state)1202 int sdw_cdns_enable_interrupt(struct sdw_cdns *cdns, bool state)
1203 {
1204 u32 slave_intmask0 = 0;
1205 u32 slave_intmask1 = 0;
1206 u32 mask = 0;
1207
1208 if (!state)
1209 goto update_masks;
1210
1211 slave_intmask0 = CDNS_MCP_SLAVE_INTMASK0_MASK;
1212 slave_intmask1 = CDNS_MCP_SLAVE_INTMASK1_MASK;
1213
1214 /* enable detection of all slave state changes */
1215 mask = CDNS_MCP_INT_SLAVE_MASK;
1216
1217 /* enable detection of bus issues */
1218 mask |= CDNS_MCP_INT_CTRL_CLASH | CDNS_MCP_INT_DATA_CLASH |
1219 CDNS_MCP_INT_PARITY;
1220
1221 /* port interrupt limited to test modes for now */
1222 if (cdns->bus.params.m_data_mode != SDW_PORT_DATA_MODE_NORMAL)
1223 mask |= CDNS_MCP_INT_DPINT;
1224
1225 /* enable detection of RX fifo level */
1226 mask |= CDNS_MCP_INT_RX_WL;
1227
1228 /*
1229 * CDNS_MCP_INT_IRQ needs to be set otherwise all previous
1230 * settings are irrelevant
1231 */
1232 mask |= CDNS_MCP_INT_IRQ;
1233
1234 if (interrupt_mask) /* parameter override */
1235 mask = interrupt_mask;
1236
1237 update_masks:
1238 /* clear slave interrupt status before enabling interrupt */
1239 if (state) {
1240 u32 slave_state;
1241
1242 slave_state = cdns_readl(cdns, CDNS_MCP_SLAVE_INTSTAT0);
1243 cdns_writel(cdns, CDNS_MCP_SLAVE_INTSTAT0, slave_state);
1244 slave_state = cdns_readl(cdns, CDNS_MCP_SLAVE_INTSTAT1);
1245 cdns_writel(cdns, CDNS_MCP_SLAVE_INTSTAT1, slave_state);
1246 }
1247 cdns->interrupt_enabled = state;
1248
1249 /*
1250 * Complete any on-going status updates before updating masks,
1251 * and cancel queued status updates.
1252 *
1253 * There could be a race with a new interrupt thrown before
1254 * the 3 mask updates below are complete, so in the interrupt
1255 * we use the 'interrupt_enabled' status to prevent new work
1256 * from being queued.
1257 */
1258 if (!state)
1259 cancel_work_sync(&cdns->work);
1260
1261 cdns_writel(cdns, CDNS_MCP_SLAVE_INTMASK0, slave_intmask0);
1262 cdns_writel(cdns, CDNS_MCP_SLAVE_INTMASK1, slave_intmask1);
1263 cdns_writel(cdns, CDNS_MCP_INTMASK, mask);
1264
1265 return 0;
1266 }
1267 EXPORT_SYMBOL(sdw_cdns_enable_interrupt);
1268
cdns_allocate_pdi(struct sdw_cdns * cdns,struct sdw_cdns_pdi ** stream,u32 num)1269 static int cdns_allocate_pdi(struct sdw_cdns *cdns,
1270 struct sdw_cdns_pdi **stream,
1271 u32 num)
1272 {
1273 struct sdw_cdns_pdi *pdi;
1274 int i;
1275
1276 if (!num)
1277 return 0;
1278
1279 pdi = devm_kcalloc(cdns->dev, num, sizeof(*pdi), GFP_KERNEL);
1280 if (!pdi)
1281 return -ENOMEM;
1282
1283 for (i = 0; i < num; i++) {
1284 pdi[i].num = i;
1285 }
1286
1287 *stream = pdi;
1288 return 0;
1289 }
1290
1291 /**
1292 * sdw_cdns_pdi_init() - PDI initialization routine
1293 *
1294 * @cdns: Cadence instance
1295 * @config: Stream configurations
1296 */
sdw_cdns_pdi_init(struct sdw_cdns * cdns,struct sdw_cdns_stream_config config)1297 int sdw_cdns_pdi_init(struct sdw_cdns *cdns,
1298 struct sdw_cdns_stream_config config)
1299 {
1300 struct sdw_cdns_streams *stream;
1301 int ret;
1302
1303 cdns->pcm.num_bd = config.pcm_bd;
1304 cdns->pcm.num_in = config.pcm_in;
1305 cdns->pcm.num_out = config.pcm_out;
1306
1307 /* Allocate PDIs for PCMs */
1308 stream = &cdns->pcm;
1309
1310 /* we allocate PDI0 and PDI1 which are used for Bulk */
1311 ret = cdns_allocate_pdi(cdns, &stream->bd, stream->num_bd);
1312 if (ret)
1313 return ret;
1314
1315 ret = cdns_allocate_pdi(cdns, &stream->in, stream->num_in);
1316 if (ret)
1317 return ret;
1318
1319 ret = cdns_allocate_pdi(cdns, &stream->out, stream->num_out);
1320 if (ret)
1321 return ret;
1322
1323 /* Update total number of PCM PDIs */
1324 stream->num_pdi = stream->num_bd + stream->num_in + stream->num_out;
1325 cdns->num_ports = stream->num_pdi;
1326
1327 return 0;
1328 }
1329 EXPORT_SYMBOL(sdw_cdns_pdi_init);
1330
cdns_set_initial_frame_shape(int n_rows,int n_cols)1331 static u32 cdns_set_initial_frame_shape(int n_rows, int n_cols)
1332 {
1333 u32 val;
1334 int c;
1335 int r;
1336
1337 r = sdw_find_row_index(n_rows);
1338 c = sdw_find_col_index(n_cols);
1339
1340 val = FIELD_PREP(CDNS_MCP_FRAME_SHAPE_ROW_MASK, r);
1341 val |= FIELD_PREP(CDNS_MCP_FRAME_SHAPE_COL_MASK, c);
1342
1343 return val;
1344 }
1345
cdns_init_clock_ctrl(struct sdw_cdns * cdns)1346 static int cdns_init_clock_ctrl(struct sdw_cdns *cdns)
1347 {
1348 struct sdw_bus *bus = &cdns->bus;
1349 struct sdw_master_prop *prop = &bus->prop;
1350 u32 val;
1351 u32 ssp_interval;
1352 int divider;
1353
1354 dev_dbg(cdns->dev, "mclk %d max %d row %d col %d\n",
1355 prop->mclk_freq,
1356 prop->max_clk_freq,
1357 prop->default_row,
1358 prop->default_col);
1359
1360 if (!prop->default_frame_rate || !prop->default_row) {
1361 dev_err(cdns->dev, "Default frame_rate %d or row %d is invalid\n",
1362 prop->default_frame_rate, prop->default_row);
1363 return -EINVAL;
1364 }
1365
1366 /* Set clock divider */
1367 divider = (prop->mclk_freq * SDW_DOUBLE_RATE_FACTOR /
1368 bus->params.curr_dr_freq) - 1;
1369
1370 cdns_updatel(cdns, CDNS_MCP_CLK_CTRL0,
1371 CDNS_MCP_CLK_MCLKD_MASK, divider);
1372 cdns_updatel(cdns, CDNS_MCP_CLK_CTRL1,
1373 CDNS_MCP_CLK_MCLKD_MASK, divider);
1374
1375 /* Set frame shape base on the actual bus frequency. */
1376 prop->default_col = bus->params.curr_dr_freq /
1377 prop->default_frame_rate / prop->default_row;
1378
1379 /*
1380 * Frame shape changes after initialization have to be done
1381 * with the bank switch mechanism
1382 */
1383 val = cdns_set_initial_frame_shape(prop->default_row,
1384 prop->default_col);
1385 cdns_writel(cdns, CDNS_MCP_FRAME_SHAPE_INIT, val);
1386
1387 /* Set SSP interval to default value */
1388 ssp_interval = prop->default_frame_rate / SDW_CADENCE_GSYNC_HZ;
1389 cdns_writel(cdns, CDNS_MCP_SSP_CTRL0, ssp_interval);
1390 cdns_writel(cdns, CDNS_MCP_SSP_CTRL1, ssp_interval);
1391
1392 return 0;
1393 }
1394
1395 /**
1396 * sdw_cdns_soft_reset() - Cadence soft-reset
1397 * @cdns: Cadence instance
1398 */
sdw_cdns_soft_reset(struct sdw_cdns * cdns)1399 int sdw_cdns_soft_reset(struct sdw_cdns *cdns)
1400 {
1401 int ret;
1402
1403 cdns_updatel(cdns, CDNS_MCP_CONTROL, CDNS_MCP_CONTROL_SOFT_RST,
1404 CDNS_MCP_CONTROL_SOFT_RST);
1405
1406 ret = cdns_config_update(cdns);
1407 if (ret < 0) {
1408 dev_err(cdns->dev, "%s: config update failed\n", __func__);
1409 return ret;
1410 }
1411
1412 ret = cdns_set_wait(cdns, CDNS_MCP_CONTROL, CDNS_MCP_CONTROL_SOFT_RST, 0);
1413 if (ret < 0)
1414 dev_err(cdns->dev, "%s: Soft Reset timed out\n", __func__);
1415
1416 return ret;
1417 }
1418 EXPORT_SYMBOL(sdw_cdns_soft_reset);
1419
1420 /**
1421 * sdw_cdns_init() - Cadence initialization
1422 * @cdns: Cadence instance
1423 */
sdw_cdns_init(struct sdw_cdns * cdns)1424 int sdw_cdns_init(struct sdw_cdns *cdns)
1425 {
1426 int ret;
1427 u32 val;
1428
1429 ret = cdns_init_clock_ctrl(cdns);
1430 if (ret)
1431 return ret;
1432
1433 sdw_cdns_check_self_clearing_bits(cdns, __func__, false, 0);
1434
1435 /* reset msg_count to default value of FIFOLEVEL */
1436 cdns->msg_count = cdns_readl(cdns, CDNS_MCP_FIFOLEVEL);
1437
1438 /* flush command FIFOs */
1439 cdns_updatel(cdns, CDNS_MCP_CONTROL, CDNS_MCP_CONTROL_CMD_RST,
1440 CDNS_MCP_CONTROL_CMD_RST);
1441
1442 /* Set cmd accept mode */
1443 cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL, CDNS_IP_MCP_CONTROL_CMD_ACCEPT,
1444 CDNS_IP_MCP_CONTROL_CMD_ACCEPT);
1445
1446 /* disable wakeup */
1447 cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL,
1448 CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP,
1449 0);
1450
1451 /* Configure mcp config */
1452 val = cdns_readl(cdns, CDNS_MCP_CONFIG);
1453
1454 /* Disable auto bus release */
1455 val &= ~CDNS_MCP_CONFIG_BUS_REL;
1456
1457 cdns_writel(cdns, CDNS_MCP_CONFIG, val);
1458
1459 /* Configure IP mcp config */
1460 val = cdns_ip_readl(cdns, CDNS_IP_MCP_CONFIG);
1461
1462 /* enable bus operations with clock and data */
1463 val &= ~CDNS_IP_MCP_CONFIG_OP;
1464 val |= CDNS_IP_MCP_CONFIG_OP_NORMAL;
1465
1466 /* Set cmd mode for Tx and Rx cmds */
1467 val &= ~CDNS_IP_MCP_CONFIG_CMD;
1468
1469 /* Disable sniffer mode */
1470 val &= ~CDNS_IP_MCP_CONFIG_SNIFFER;
1471
1472 if (cdns->bus.multi_link)
1473 /* Set Multi-master mode to take gsync into account */
1474 val |= CDNS_IP_MCP_CONFIG_MMASTER;
1475
1476 /* leave frame delay to hardware default of 0x1F */
1477
1478 /* leave command retry to hardware default of 0 */
1479
1480 cdns_ip_writel(cdns, CDNS_IP_MCP_CONFIG, val);
1481
1482 /* changes will be committed later */
1483 return 0;
1484 }
1485 EXPORT_SYMBOL(sdw_cdns_init);
1486
cdns_bus_conf(struct sdw_bus * bus,struct sdw_bus_params * params)1487 int cdns_bus_conf(struct sdw_bus *bus, struct sdw_bus_params *params)
1488 {
1489 struct sdw_master_prop *prop = &bus->prop;
1490 struct sdw_cdns *cdns = bus_to_cdns(bus);
1491 int mcp_clkctrl_off;
1492 int divider;
1493
1494 if (!params->curr_dr_freq) {
1495 dev_err(cdns->dev, "NULL curr_dr_freq\n");
1496 return -EINVAL;
1497 }
1498
1499 divider = prop->mclk_freq * SDW_DOUBLE_RATE_FACTOR /
1500 params->curr_dr_freq;
1501 divider--; /* divider is 1/(N+1) */
1502
1503 if (params->next_bank)
1504 mcp_clkctrl_off = CDNS_MCP_CLK_CTRL1;
1505 else
1506 mcp_clkctrl_off = CDNS_MCP_CLK_CTRL0;
1507
1508 cdns_updatel(cdns, mcp_clkctrl_off, CDNS_MCP_CLK_MCLKD_MASK, divider);
1509
1510 return 0;
1511 }
1512 EXPORT_SYMBOL(cdns_bus_conf);
1513
cdns_port_params(struct sdw_bus * bus,struct sdw_port_params * p_params,unsigned int bank)1514 static int cdns_port_params(struct sdw_bus *bus,
1515 struct sdw_port_params *p_params, unsigned int bank)
1516 {
1517 struct sdw_cdns *cdns = bus_to_cdns(bus);
1518 int dpn_config_off_source;
1519 int dpn_config_off_target;
1520 int target_num = p_params->num;
1521 int source_num = p_params->num;
1522 bool override = false;
1523 int dpn_config;
1524
1525 if (target_num == cdns->pdi_loopback_target &&
1526 cdns->pdi_loopback_source != -1) {
1527 source_num = cdns->pdi_loopback_source;
1528 override = true;
1529 }
1530
1531 if (bank) {
1532 dpn_config_off_source = CDNS_DPN_B1_CONFIG(source_num);
1533 dpn_config_off_target = CDNS_DPN_B1_CONFIG(target_num);
1534 } else {
1535 dpn_config_off_source = CDNS_DPN_B0_CONFIG(source_num);
1536 dpn_config_off_target = CDNS_DPN_B0_CONFIG(target_num);
1537 }
1538
1539 dpn_config = cdns_readl(cdns, dpn_config_off_source);
1540
1541 /* use port params if there is no loopback, otherwise use source as is */
1542 if (!override) {
1543 u32p_replace_bits(&dpn_config, p_params->bps - 1, CDNS_DPN_CONFIG_WL);
1544 u32p_replace_bits(&dpn_config, p_params->flow_mode, CDNS_DPN_CONFIG_PORT_FLOW);
1545 u32p_replace_bits(&dpn_config, p_params->data_mode, CDNS_DPN_CONFIG_PORT_DAT);
1546 }
1547
1548 cdns_writel(cdns, dpn_config_off_target, dpn_config);
1549
1550 return 0;
1551 }
1552
cdns_transport_params(struct sdw_bus * bus,struct sdw_transport_params * t_params,enum sdw_reg_bank bank)1553 static int cdns_transport_params(struct sdw_bus *bus,
1554 struct sdw_transport_params *t_params,
1555 enum sdw_reg_bank bank)
1556 {
1557 struct sdw_cdns *cdns = bus_to_cdns(bus);
1558 int dpn_config;
1559 int dpn_config_off_source;
1560 int dpn_config_off_target;
1561 int dpn_hctrl;
1562 int dpn_hctrl_off_source;
1563 int dpn_hctrl_off_target;
1564 int dpn_offsetctrl;
1565 int dpn_offsetctrl_off_source;
1566 int dpn_offsetctrl_off_target;
1567 int dpn_samplectrl;
1568 int dpn_samplectrl_off_source;
1569 int dpn_samplectrl_off_target;
1570 int source_num = t_params->port_num;
1571 int target_num = t_params->port_num;
1572 bool override = false;
1573
1574 if (target_num == cdns->pdi_loopback_target &&
1575 cdns->pdi_loopback_source != -1) {
1576 source_num = cdns->pdi_loopback_source;
1577 override = true;
1578 }
1579
1580 /*
1581 * Note: Only full data port is supported on the Master side for
1582 * both PCM and PDM ports.
1583 */
1584
1585 if (bank) {
1586 dpn_config_off_source = CDNS_DPN_B1_CONFIG(source_num);
1587 dpn_hctrl_off_source = CDNS_DPN_B1_HCTRL(source_num);
1588 dpn_offsetctrl_off_source = CDNS_DPN_B1_OFFSET_CTRL(source_num);
1589 dpn_samplectrl_off_source = CDNS_DPN_B1_SAMPLE_CTRL(source_num);
1590
1591 dpn_config_off_target = CDNS_DPN_B1_CONFIG(target_num);
1592 dpn_hctrl_off_target = CDNS_DPN_B1_HCTRL(target_num);
1593 dpn_offsetctrl_off_target = CDNS_DPN_B1_OFFSET_CTRL(target_num);
1594 dpn_samplectrl_off_target = CDNS_DPN_B1_SAMPLE_CTRL(target_num);
1595
1596 } else {
1597 dpn_config_off_source = CDNS_DPN_B0_CONFIG(source_num);
1598 dpn_hctrl_off_source = CDNS_DPN_B0_HCTRL(source_num);
1599 dpn_offsetctrl_off_source = CDNS_DPN_B0_OFFSET_CTRL(source_num);
1600 dpn_samplectrl_off_source = CDNS_DPN_B0_SAMPLE_CTRL(source_num);
1601
1602 dpn_config_off_target = CDNS_DPN_B0_CONFIG(target_num);
1603 dpn_hctrl_off_target = CDNS_DPN_B0_HCTRL(target_num);
1604 dpn_offsetctrl_off_target = CDNS_DPN_B0_OFFSET_CTRL(target_num);
1605 dpn_samplectrl_off_target = CDNS_DPN_B0_SAMPLE_CTRL(target_num);
1606 }
1607
1608 dpn_config = cdns_readl(cdns, dpn_config_off_source);
1609 if (!override) {
1610 u32p_replace_bits(&dpn_config, t_params->blk_grp_ctrl, CDNS_DPN_CONFIG_BGC);
1611 u32p_replace_bits(&dpn_config, t_params->blk_pkg_mode, CDNS_DPN_CONFIG_BPM);
1612 }
1613 cdns_writel(cdns, dpn_config_off_target, dpn_config);
1614
1615 if (!override) {
1616 dpn_offsetctrl = 0;
1617 u32p_replace_bits(&dpn_offsetctrl, t_params->offset1, CDNS_DPN_OFFSET_CTRL_1);
1618 u32p_replace_bits(&dpn_offsetctrl, t_params->offset2, CDNS_DPN_OFFSET_CTRL_2);
1619 } else {
1620 dpn_offsetctrl = cdns_readl(cdns, dpn_offsetctrl_off_source);
1621 }
1622 cdns_writel(cdns, dpn_offsetctrl_off_target, dpn_offsetctrl);
1623
1624 if (!override) {
1625 dpn_hctrl = 0;
1626 u32p_replace_bits(&dpn_hctrl, t_params->hstart, CDNS_DPN_HCTRL_HSTART);
1627 u32p_replace_bits(&dpn_hctrl, t_params->hstop, CDNS_DPN_HCTRL_HSTOP);
1628 u32p_replace_bits(&dpn_hctrl, t_params->lane_ctrl, CDNS_DPN_HCTRL_LCTRL);
1629 } else {
1630 dpn_hctrl = cdns_readl(cdns, dpn_hctrl_off_source);
1631 }
1632 cdns_writel(cdns, dpn_hctrl_off_target, dpn_hctrl);
1633
1634 if (!override)
1635 dpn_samplectrl = t_params->sample_interval - 1;
1636 else
1637 dpn_samplectrl = cdns_readl(cdns, dpn_samplectrl_off_source);
1638 cdns_writel(cdns, dpn_samplectrl_off_target, dpn_samplectrl);
1639
1640 return 0;
1641 }
1642
cdns_port_enable(struct sdw_bus * bus,struct sdw_enable_ch * enable_ch,unsigned int bank)1643 static int cdns_port_enable(struct sdw_bus *bus,
1644 struct sdw_enable_ch *enable_ch, unsigned int bank)
1645 {
1646 struct sdw_cdns *cdns = bus_to_cdns(bus);
1647 int dpn_chnen_off, ch_mask;
1648
1649 if (bank)
1650 dpn_chnen_off = CDNS_DPN_B1_CH_EN(enable_ch->port_num);
1651 else
1652 dpn_chnen_off = CDNS_DPN_B0_CH_EN(enable_ch->port_num);
1653
1654 ch_mask = enable_ch->ch_mask * enable_ch->enable;
1655 cdns_writel(cdns, dpn_chnen_off, ch_mask);
1656
1657 return 0;
1658 }
1659
1660 static const struct sdw_master_port_ops cdns_port_ops = {
1661 .dpn_set_port_params = cdns_port_params,
1662 .dpn_set_port_transport_params = cdns_transport_params,
1663 .dpn_port_enable_ch = cdns_port_enable,
1664 };
1665
1666 /**
1667 * sdw_cdns_is_clock_stop: Check clock status
1668 *
1669 * @cdns: Cadence instance
1670 */
sdw_cdns_is_clock_stop(struct sdw_cdns * cdns)1671 bool sdw_cdns_is_clock_stop(struct sdw_cdns *cdns)
1672 {
1673 return !!(cdns_readl(cdns, CDNS_MCP_STAT) & CDNS_MCP_STAT_CLK_STOP);
1674 }
1675 EXPORT_SYMBOL(sdw_cdns_is_clock_stop);
1676
1677 /**
1678 * sdw_cdns_clock_stop: Cadence clock stop configuration routine
1679 *
1680 * @cdns: Cadence instance
1681 * @block_wake: prevent wakes if required by the platform
1682 */
sdw_cdns_clock_stop(struct sdw_cdns * cdns,bool block_wake)1683 int sdw_cdns_clock_stop(struct sdw_cdns *cdns, bool block_wake)
1684 {
1685 bool slave_present = false;
1686 struct sdw_slave *slave;
1687 int ret;
1688
1689 sdw_cdns_check_self_clearing_bits(cdns, __func__, false, 0);
1690
1691 /* Check suspend status */
1692 if (sdw_cdns_is_clock_stop(cdns)) {
1693 dev_dbg(cdns->dev, "Clock is already stopped\n");
1694 return 0;
1695 }
1696
1697 /*
1698 * Before entering clock stop we mask the Slave
1699 * interrupts. This helps avoid having to deal with e.g. a
1700 * Slave becoming UNATTACHED while the clock is being stopped
1701 */
1702 cdns_enable_slave_interrupts(cdns, false);
1703
1704 /*
1705 * For specific platforms, it is required to be able to put
1706 * master into a state in which it ignores wake-up trials
1707 * in clock stop state
1708 */
1709 if (block_wake)
1710 cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL,
1711 CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP,
1712 CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP);
1713
1714 list_for_each_entry(slave, &cdns->bus.slaves, node) {
1715 if (slave->status == SDW_SLAVE_ATTACHED ||
1716 slave->status == SDW_SLAVE_ALERT) {
1717 slave_present = true;
1718 break;
1719 }
1720 }
1721
1722 /* commit changes */
1723 ret = cdns_config_update(cdns);
1724 if (ret < 0) {
1725 dev_err(cdns->dev, "%s: config_update failed\n", __func__);
1726 return ret;
1727 }
1728
1729 /* Prepare slaves for clock stop */
1730 if (slave_present) {
1731 ret = sdw_bus_prep_clk_stop(&cdns->bus);
1732 if (ret < 0 && ret != -ENODATA) {
1733 dev_err(cdns->dev, "prepare clock stop failed %d\n", ret);
1734 return ret;
1735 }
1736 }
1737
1738 /*
1739 * Enter clock stop mode and only report errors if there are
1740 * Slave devices present (ALERT or ATTACHED)
1741 */
1742 ret = sdw_bus_clk_stop(&cdns->bus);
1743 if (ret < 0 && slave_present && ret != -ENODATA) {
1744 dev_err(cdns->dev, "bus clock stop failed %d\n", ret);
1745 return ret;
1746 }
1747
1748 ret = cdns_set_wait(cdns, CDNS_MCP_STAT,
1749 CDNS_MCP_STAT_CLK_STOP,
1750 CDNS_MCP_STAT_CLK_STOP);
1751 if (ret < 0)
1752 dev_err(cdns->dev, "Clock stop failed %d\n", ret);
1753
1754 return ret;
1755 }
1756 EXPORT_SYMBOL(sdw_cdns_clock_stop);
1757
1758 /**
1759 * sdw_cdns_clock_restart: Cadence PM clock restart configuration routine
1760 *
1761 * @cdns: Cadence instance
1762 * @bus_reset: context may be lost while in low power modes and the bus
1763 * may require a Severe Reset and re-enumeration after a wake.
1764 */
sdw_cdns_clock_restart(struct sdw_cdns * cdns,bool bus_reset)1765 int sdw_cdns_clock_restart(struct sdw_cdns *cdns, bool bus_reset)
1766 {
1767 int ret;
1768
1769 /* unmask Slave interrupts that were masked when stopping the clock */
1770 cdns_enable_slave_interrupts(cdns, true);
1771
1772 ret = cdns_clear_bit(cdns, CDNS_MCP_CONTROL,
1773 CDNS_MCP_CONTROL_CLK_STOP_CLR);
1774 if (ret < 0) {
1775 dev_err(cdns->dev, "Couldn't exit from clock stop\n");
1776 return ret;
1777 }
1778
1779 ret = cdns_set_wait(cdns, CDNS_MCP_STAT, CDNS_MCP_STAT_CLK_STOP, 0);
1780 if (ret < 0) {
1781 dev_err(cdns->dev, "clock stop exit failed %d\n", ret);
1782 return ret;
1783 }
1784
1785 cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL,
1786 CDNS_IP_MCP_CONTROL_BLOCK_WAKEUP, 0);
1787
1788 cdns_ip_updatel(cdns, CDNS_IP_MCP_CONTROL, CDNS_IP_MCP_CONTROL_CMD_ACCEPT,
1789 CDNS_IP_MCP_CONTROL_CMD_ACCEPT);
1790
1791 if (!bus_reset) {
1792
1793 /* enable bus operations with clock and data */
1794 cdns_ip_updatel(cdns, CDNS_IP_MCP_CONFIG,
1795 CDNS_IP_MCP_CONFIG_OP,
1796 CDNS_IP_MCP_CONFIG_OP_NORMAL);
1797
1798 ret = cdns_config_update(cdns);
1799 if (ret < 0) {
1800 dev_err(cdns->dev, "%s: config_update failed\n", __func__);
1801 return ret;
1802 }
1803
1804 ret = sdw_bus_exit_clk_stop(&cdns->bus);
1805 if (ret < 0)
1806 dev_err(cdns->dev, "bus failed to exit clock stop %d\n", ret);
1807 }
1808
1809 return ret;
1810 }
1811 EXPORT_SYMBOL(sdw_cdns_clock_restart);
1812
1813 /**
1814 * sdw_cdns_probe() - Cadence probe routine
1815 * @cdns: Cadence instance
1816 */
sdw_cdns_probe(struct sdw_cdns * cdns)1817 int sdw_cdns_probe(struct sdw_cdns *cdns)
1818 {
1819 init_completion(&cdns->tx_complete);
1820 cdns->bus.port_ops = &cdns_port_ops;
1821
1822 mutex_init(&cdns->status_update_lock);
1823
1824 INIT_WORK(&cdns->work, cdns_update_slave_status_work);
1825 INIT_DELAYED_WORK(&cdns->attach_dwork, cdns_check_attached_status_dwork);
1826
1827 return 0;
1828 }
1829 EXPORT_SYMBOL(sdw_cdns_probe);
1830
cdns_set_sdw_stream(struct snd_soc_dai * dai,void * stream,int direction)1831 int cdns_set_sdw_stream(struct snd_soc_dai *dai,
1832 void *stream, int direction)
1833 {
1834 struct sdw_cdns *cdns = snd_soc_dai_get_drvdata(dai);
1835 struct sdw_cdns_dai_runtime *dai_runtime;
1836
1837 dai_runtime = cdns->dai_runtime_array[dai->id];
1838
1839 if (stream) {
1840 /* first paranoia check */
1841 if (dai_runtime) {
1842 dev_err(dai->dev,
1843 "dai_runtime already allocated for dai %s\n",
1844 dai->name);
1845 return -EINVAL;
1846 }
1847
1848 /* allocate and set dai_runtime info */
1849 dai_runtime = kzalloc(sizeof(*dai_runtime), GFP_KERNEL);
1850 if (!dai_runtime)
1851 return -ENOMEM;
1852
1853 dai_runtime->stream_type = SDW_STREAM_PCM;
1854
1855 dai_runtime->bus = &cdns->bus;
1856 dai_runtime->link_id = cdns->instance;
1857
1858 dai_runtime->stream = stream;
1859 dai_runtime->direction = direction;
1860
1861 cdns->dai_runtime_array[dai->id] = dai_runtime;
1862 } else {
1863 /* second paranoia check */
1864 if (!dai_runtime) {
1865 dev_err(dai->dev,
1866 "dai_runtime not allocated for dai %s\n",
1867 dai->name);
1868 return -EINVAL;
1869 }
1870
1871 /* for NULL stream we release allocated dai_runtime */
1872 kfree(dai_runtime);
1873 cdns->dai_runtime_array[dai->id] = NULL;
1874 }
1875 return 0;
1876 }
1877 EXPORT_SYMBOL(cdns_set_sdw_stream);
1878
1879 /**
1880 * cdns_find_pdi() - Find a free PDI
1881 *
1882 * @cdns: Cadence instance
1883 * @num: Number of PDIs
1884 * @pdi: PDI instances
1885 * @dai_id: DAI id
1886 *
1887 * Find a PDI for a given PDI array. The PDI num and dai_id are
1888 * expected to match, return NULL otherwise.
1889 */
cdns_find_pdi(struct sdw_cdns * cdns,unsigned int num,struct sdw_cdns_pdi * pdi,int dai_id)1890 static struct sdw_cdns_pdi *cdns_find_pdi(struct sdw_cdns *cdns,
1891 unsigned int num,
1892 struct sdw_cdns_pdi *pdi,
1893 int dai_id)
1894 {
1895 int i;
1896
1897 for (i = 0; i < num; i++)
1898 if (pdi[i].num == dai_id)
1899 return &pdi[i];
1900
1901 return NULL;
1902 }
1903
1904 /**
1905 * sdw_cdns_config_stream: Configure a stream
1906 *
1907 * @cdns: Cadence instance
1908 * @ch: Channel count
1909 * @dir: Data direction
1910 * @pdi: PDI to be used
1911 */
sdw_cdns_config_stream(struct sdw_cdns * cdns,u32 ch,u32 dir,struct sdw_cdns_pdi * pdi)1912 void sdw_cdns_config_stream(struct sdw_cdns *cdns,
1913 u32 ch, u32 dir, struct sdw_cdns_pdi *pdi)
1914 {
1915 u32 offset, val = 0;
1916
1917 if (dir == SDW_DATA_DIR_RX) {
1918 val = CDNS_PORTCTRL_DIRN;
1919
1920 if (cdns->bus.params.m_data_mode != SDW_PORT_DATA_MODE_NORMAL)
1921 val |= CDNS_PORTCTRL_TEST_FAILED;
1922 } else if (pdi->num == 0 || pdi->num == 1) {
1923 val |= CDNS_PORTCTRL_BULK_ENABLE;
1924 }
1925 offset = CDNS_PORTCTRL + pdi->num * CDNS_PORT_OFFSET;
1926 cdns_updatel(cdns, offset,
1927 CDNS_PORTCTRL_DIRN | CDNS_PORTCTRL_TEST_FAILED |
1928 CDNS_PORTCTRL_BULK_ENABLE,
1929 val);
1930
1931 /* The DataPort0 needs to be mapped to both PDI0 and PDI1 ! */
1932 if (pdi->num == 1)
1933 val = 0;
1934 else
1935 val = pdi->num;
1936 val |= CDNS_PDI_CONFIG_SOFT_RESET;
1937 val |= FIELD_PREP(CDNS_PDI_CONFIG_CHANNEL, (1 << ch) - 1);
1938 cdns_writel(cdns, CDNS_PDI_CONFIG(pdi->num), val);
1939 }
1940 EXPORT_SYMBOL(sdw_cdns_config_stream);
1941
1942 /**
1943 * sdw_cdns_alloc_pdi() - Allocate a PDI
1944 *
1945 * @cdns: Cadence instance
1946 * @stream: Stream to be allocated
1947 * @ch: Channel count
1948 * @dir: Data direction
1949 * @dai_id: DAI id
1950 */
sdw_cdns_alloc_pdi(struct sdw_cdns * cdns,struct sdw_cdns_streams * stream,u32 ch,u32 dir,int dai_id)1951 struct sdw_cdns_pdi *sdw_cdns_alloc_pdi(struct sdw_cdns *cdns,
1952 struct sdw_cdns_streams *stream,
1953 u32 ch, u32 dir, int dai_id)
1954 {
1955 struct sdw_cdns_pdi *pdi = NULL;
1956
1957 if (dir == SDW_DATA_DIR_RX)
1958 pdi = cdns_find_pdi(cdns, stream->num_in, stream->in,
1959 dai_id);
1960 else
1961 pdi = cdns_find_pdi(cdns, stream->num_out, stream->out,
1962 dai_id);
1963
1964 /* check if we found a PDI, else find in bi-directional */
1965 if (!pdi)
1966 pdi = cdns_find_pdi(cdns, stream->num_bd, stream->bd,
1967 dai_id);
1968
1969 if (pdi) {
1970 pdi->l_ch_num = 0;
1971 pdi->h_ch_num = ch - 1;
1972 pdi->dir = dir;
1973 pdi->ch_count = ch;
1974 }
1975
1976 return pdi;
1977 }
1978 EXPORT_SYMBOL(sdw_cdns_alloc_pdi);
1979
1980 /*
1981 * the MIPI SoundWire CRC8 polynomial is X^8 + X^6 + X^3 + X^2 + 1, MSB first
1982 * The value is (1)01001101 = 0x4D
1983 *
1984 * the table below was generated with
1985 *
1986 * u8 crc8_lookup_table[CRC8_TABLE_SIZE];
1987 * crc8_populate_msb(crc8_lookup_table, SDW_CRC8_POLY);
1988 *
1989 */
1990 #define SDW_CRC8_SEED 0xFF
1991 #define SDW_CRC8_POLY 0x4D
1992
1993 static const u8 sdw_crc8_lookup_msb[CRC8_TABLE_SIZE] = {
1994 0x00, 0x4d, 0x9a, 0xd7, 0x79, 0x34, 0xe3, 0xae, /* 0 - 7 */
1995 0xf2, 0xbf, 0x68, 0x25, 0x8b, 0xc6, 0x11, 0x5c, /* 8 -15 */
1996 0xa9, 0xe4, 0x33, 0x7e, 0xd0, 0x9d, 0x4a, 0x07, /* 16 - 23 */
1997 0x5b, 0x16, 0xc1, 0x8c, 0x22, 0x6f, 0xb8, 0xf5, /* 24 - 31 */
1998 0x1f, 0x52, 0x85, 0xc8, 0x66, 0x2b, 0xfc, 0xb1, /* 32 - 39 */
1999 0xed, 0xa0, 0x77, 0x3a, 0x94, 0xd9, 0x0e, 0x43, /* 40 - 47 */
2000 0xb6, 0xfb, 0x2c, 0x61, 0xcf, 0x82, 0x55, 0x18, /* 48 - 55 */
2001 0x44, 0x09, 0xde, 0x93, 0x3d, 0x70, 0xa7, 0xea, /* 56 - 63 */
2002 0x3e, 0x73, 0xa4, 0xe9, 0x47, 0x0a, 0xdd, 0x90, /* 64 - 71 */
2003 0xcc, 0x81, 0x56, 0x1b, 0xb5, 0xf8, 0x2f, 0x62, /* 72 - 79 */
2004 0x97, 0xda, 0x0d, 0x40, 0xee, 0xa3, 0x74, 0x39, /* 80 - 87 */
2005 0x65, 0x28, 0xff, 0xb2, 0x1c, 0x51, 0x86, 0xcb, /* 88 - 95 */
2006 0x21, 0x6c, 0xbb, 0xf6, 0x58, 0x15, 0xc2, 0x8f, /* 96 - 103 */
2007 0xd3, 0x9e, 0x49, 0x04, 0xaa, 0xe7, 0x30, 0x7d, /* 104 - 111 */
2008 0x88, 0xc5, 0x12, 0x5f, 0xf1, 0xbc, 0x6b, 0x26, /* 112 - 119 */
2009 0x7a, 0x37, 0xe0, 0xad, 0x03, 0x4e, 0x99, 0xd4, /* 120 - 127 */
2010 0x7c, 0x31, 0xe6, 0xab, 0x05, 0x48, 0x9f, 0xd2, /* 128 - 135 */
2011 0x8e, 0xc3, 0x14, 0x59, 0xf7, 0xba, 0x6d, 0x20, /* 136 - 143 */
2012 0xd5, 0x98, 0x4f, 0x02, 0xac, 0xe1, 0x36, 0x7b, /* 144 - 151 */
2013 0x27, 0x6a, 0xbd, 0xf0, 0x5e, 0x13, 0xc4, 0x89, /* 152 - 159 */
2014 0x63, 0x2e, 0xf9, 0xb4, 0x1a, 0x57, 0x80, 0xcd, /* 160 - 167 */
2015 0x91, 0xdc, 0x0b, 0x46, 0xe8, 0xa5, 0x72, 0x3f, /* 168 - 175 */
2016 0xca, 0x87, 0x50, 0x1d, 0xb3, 0xfe, 0x29, 0x64, /* 176 - 183 */
2017 0x38, 0x75, 0xa2, 0xef, 0x41, 0x0c, 0xdb, 0x96, /* 184 - 191 */
2018 0x42, 0x0f, 0xd8, 0x95, 0x3b, 0x76, 0xa1, 0xec, /* 192 - 199 */
2019 0xb0, 0xfd, 0x2a, 0x67, 0xc9, 0x84, 0x53, 0x1e, /* 200 - 207 */
2020 0xeb, 0xa6, 0x71, 0x3c, 0x92, 0xdf, 0x08, 0x45, /* 208 - 215 */
2021 0x19, 0x54, 0x83, 0xce, 0x60, 0x2d, 0xfa, 0xb7, /* 216 - 223 */
2022 0x5d, 0x10, 0xc7, 0x8a, 0x24, 0x69, 0xbe, 0xf3, /* 224 - 231 */
2023 0xaf, 0xe2, 0x35, 0x78, 0xd6, 0x9b, 0x4c, 0x01, /* 232 - 239 */
2024 0xf4, 0xb9, 0x6e, 0x23, 0x8d, 0xc0, 0x17, 0x5a, /* 240 - 247 */
2025 0x06, 0x4b, 0x9c, 0xd1, 0x7f, 0x32, 0xe5, 0xa8 /* 248 - 255 */
2026 };
2027
2028 /* BPT/BRA helpers */
2029
2030 #define SDW_CDNS_BRA_HDR 6 /* defined by MIPI */
2031 #define SDW_CDNS_BRA_HDR_CRC 1 /* defined by MIPI */
2032 #define SDW_CDNS_BRA_HDR_CRC_PAD 1 /* Cadence only */
2033 #define SDW_CDNS_BRA_HDR_RESP 1 /* defined by MIPI */
2034 #define SDW_CDNS_BRA_HDR_RESP_PAD 1 /* Cadence only */
2035
2036 #define SDW_CDNS_BRA_DATA_PAD 1 /* Cadence only */
2037 #define SDW_CDNS_BRA_DATA_CRC 1 /* defined by MIPI */
2038 #define SDW_CDNS_BRA_DATA_CRC_PAD 1 /* Cadence only */
2039
2040 #define SDW_CDNS_BRA_FOOTER_RESP 1 /* defined by MIPI */
2041 #define SDW_CDNS_BRA_FOOTER_RESP_PAD 1 /* Cadence only */
2042
2043 #define SDW_CDNS_WRITE_PDI1_BUFFER_SIZE \
2044 ((SDW_CDNS_BRA_HDR_RESP + SDW_CDNS_BRA_HDR_RESP_PAD + \
2045 SDW_CDNS_BRA_FOOTER_RESP + SDW_CDNS_BRA_FOOTER_RESP_PAD) * 2)
2046
2047 #define SDW_CDNS_READ_PDI0_BUFFER_SIZE \
2048 ((SDW_CDNS_BRA_HDR + SDW_CDNS_BRA_HDR_CRC + SDW_CDNS_BRA_HDR_CRC_PAD) * 2)
2049
sdw_cdns_bra_actual_data_size(unsigned int allocated_bytes_per_frame)2050 static unsigned int sdw_cdns_bra_actual_data_size(unsigned int allocated_bytes_per_frame)
2051 {
2052 unsigned int total;
2053
2054 if (allocated_bytes_per_frame < (SDW_CDNS_BRA_HDR + SDW_CDNS_BRA_HDR_CRC +
2055 SDW_CDNS_BRA_HDR_RESP + SDW_CDNS_BRA_DATA_CRC +
2056 SDW_CDNS_BRA_FOOTER_RESP))
2057 return 0;
2058
2059 total = allocated_bytes_per_frame - SDW_CDNS_BRA_HDR - SDW_CDNS_BRA_HDR_CRC -
2060 SDW_CDNS_BRA_HDR_RESP - SDW_CDNS_BRA_DATA_CRC - SDW_CDNS_BRA_FOOTER_RESP;
2061
2062 return total;
2063 }
2064
sdw_cdns_write_pdi0_buffer_size(unsigned int actual_data_size)2065 static unsigned int sdw_cdns_write_pdi0_buffer_size(unsigned int actual_data_size)
2066 {
2067 unsigned int total;
2068
2069 total = SDW_CDNS_BRA_HDR + SDW_CDNS_BRA_HDR_CRC + SDW_CDNS_BRA_HDR_CRC_PAD;
2070
2071 total += actual_data_size;
2072 if (actual_data_size & 1)
2073 total += SDW_CDNS_BRA_DATA_PAD;
2074
2075 total += SDW_CDNS_BRA_DATA_CRC + SDW_CDNS_BRA_DATA_CRC_PAD;
2076
2077 return total * 2;
2078 }
2079
sdw_cdns_read_pdi1_buffer_size(unsigned int actual_data_size)2080 static unsigned int sdw_cdns_read_pdi1_buffer_size(unsigned int actual_data_size)
2081 {
2082 unsigned int total;
2083
2084 total = SDW_CDNS_BRA_HDR_RESP + SDW_CDNS_BRA_HDR_RESP_PAD;
2085
2086 total += actual_data_size;
2087 if (actual_data_size & 1)
2088 total += SDW_CDNS_BRA_DATA_PAD;
2089
2090 total += SDW_CDNS_BRA_HDR_CRC + SDW_CDNS_BRA_HDR_CRC_PAD;
2091
2092 total += SDW_CDNS_BRA_FOOTER_RESP + SDW_CDNS_BRA_FOOTER_RESP_PAD;
2093
2094 return total * 2;
2095 }
2096
sdw_cdns_bpt_find_buffer_sizes(int command,int row,int col,unsigned int data_bytes,unsigned int requested_bytes_per_frame,unsigned int * data_per_frame,unsigned int * pdi0_buffer_size,unsigned int * pdi1_buffer_size,unsigned int * num_frames)2097 int sdw_cdns_bpt_find_buffer_sizes(int command, /* 0: write, 1: read */
2098 int row, int col, unsigned int data_bytes,
2099 unsigned int requested_bytes_per_frame,
2100 unsigned int *data_per_frame, unsigned int *pdi0_buffer_size,
2101 unsigned int *pdi1_buffer_size, unsigned int *num_frames)
2102 {
2103 unsigned int bpt_bits = row * (col - 1);
2104 unsigned int bpt_bytes = bpt_bits >> 3;
2105 unsigned int actual_bpt_bytes;
2106 unsigned int pdi0_tx_size;
2107 unsigned int pdi1_rx_size;
2108 unsigned int remainder;
2109
2110 if (!data_bytes)
2111 return -EINVAL;
2112
2113 actual_bpt_bytes = sdw_cdns_bra_actual_data_size(bpt_bytes);
2114 if (!actual_bpt_bytes)
2115 return -EINVAL;
2116
2117 if (data_bytes < actual_bpt_bytes)
2118 actual_bpt_bytes = data_bytes;
2119
2120 /*
2121 * the caller may want to set the number of bytes per frame,
2122 * allow when possible
2123 */
2124 if (requested_bytes_per_frame < actual_bpt_bytes)
2125 actual_bpt_bytes = requested_bytes_per_frame;
2126
2127 *data_per_frame = actual_bpt_bytes;
2128
2129 if (command == 0) {
2130 /*
2131 * for writes we need to send all the data_bytes per frame,
2132 * even for the last frame which may only transport fewer bytes
2133 */
2134
2135 *num_frames = DIV_ROUND_UP(data_bytes, actual_bpt_bytes);
2136
2137 pdi0_tx_size = sdw_cdns_write_pdi0_buffer_size(actual_bpt_bytes);
2138 pdi1_rx_size = SDW_CDNS_WRITE_PDI1_BUFFER_SIZE;
2139
2140 *pdi0_buffer_size = pdi0_tx_size * *num_frames;
2141 *pdi1_buffer_size = pdi1_rx_size * *num_frames;
2142 } else {
2143 /*
2144 * for reads we need to retrieve only what is requested in the BPT
2145 * header, so the last frame needs to be special-cased
2146 */
2147 *num_frames = data_bytes / actual_bpt_bytes;
2148
2149 pdi0_tx_size = SDW_CDNS_READ_PDI0_BUFFER_SIZE;
2150 pdi1_rx_size = sdw_cdns_read_pdi1_buffer_size(actual_bpt_bytes);
2151
2152 *pdi0_buffer_size = pdi0_tx_size * *num_frames;
2153 *pdi1_buffer_size = pdi1_rx_size * *num_frames;
2154
2155 remainder = data_bytes % actual_bpt_bytes;
2156 if (remainder) {
2157 pdi0_tx_size = SDW_CDNS_READ_PDI0_BUFFER_SIZE;
2158 pdi1_rx_size = sdw_cdns_read_pdi1_buffer_size(remainder);
2159
2160 *num_frames = *num_frames + 1;
2161 *pdi0_buffer_size += pdi0_tx_size;
2162 *pdi1_buffer_size += pdi1_rx_size;
2163 }
2164 }
2165
2166 return 0;
2167 }
2168 EXPORT_SYMBOL(sdw_cdns_bpt_find_buffer_sizes);
2169
sdw_cdns_copy_write_data(u8 * data,int data_size,u8 * dma_buffer,int dma_buffer_size)2170 static int sdw_cdns_copy_write_data(u8 *data, int data_size, u8 *dma_buffer, int dma_buffer_size)
2171 {
2172 /*
2173 * the implementation copies the data one byte at a time. Experiments with
2174 * two bytes at a time did not seem to improve the performance
2175 */
2176 int i, j;
2177
2178 /* size check to prevent out of bounds access */
2179 i = data_size - 1;
2180 j = (2 * i) - (i & 1);
2181 if (data_size & 1)
2182 j++;
2183 j += 2;
2184 if (j >= dma_buffer_size)
2185 return -EINVAL;
2186
2187 /* copy data */
2188 for (i = 0; i < data_size; i++) {
2189 j = (2 * i) - (i & 1);
2190 dma_buffer[j] = data[i];
2191 }
2192 /* add required pad */
2193 if (data_size & 1)
2194 dma_buffer[++j] = 0;
2195 /* skip last two bytes */
2196 j += 2;
2197
2198 /* offset and data are off-by-one */
2199 return j + 1;
2200 }
2201
sdw_cdns_prepare_write_pd0_buffer(u8 * header,unsigned int header_size,u8 * data,unsigned int data_size,u8 * dma_buffer,unsigned int dma_buffer_size,unsigned int * dma_data_written,unsigned int frame_counter)2202 static int sdw_cdns_prepare_write_pd0_buffer(u8 *header, unsigned int header_size,
2203 u8 *data, unsigned int data_size,
2204 u8 *dma_buffer, unsigned int dma_buffer_size,
2205 unsigned int *dma_data_written,
2206 unsigned int frame_counter)
2207 {
2208 int data_written;
2209 u8 *last_byte;
2210 u8 crc;
2211
2212 *dma_data_written = 0;
2213
2214 data_written = sdw_cdns_copy_write_data(header, header_size, dma_buffer, dma_buffer_size);
2215 if (data_written < 0)
2216 return data_written;
2217 dma_buffer[3] = BIT(7);
2218 dma_buffer[3] |= frame_counter & GENMASK(3, 0);
2219
2220 dma_buffer += data_written;
2221 dma_buffer_size -= data_written;
2222 *dma_data_written += data_written;
2223
2224 crc = SDW_CRC8_SEED;
2225 crc = crc8(sdw_crc8_lookup_msb, header, header_size, crc);
2226
2227 data_written = sdw_cdns_copy_write_data(&crc, 1, dma_buffer, dma_buffer_size);
2228 if (data_written < 0)
2229 return data_written;
2230 dma_buffer += data_written;
2231 dma_buffer_size -= data_written;
2232 *dma_data_written += data_written;
2233
2234 data_written = sdw_cdns_copy_write_data(data, data_size, dma_buffer, dma_buffer_size);
2235 if (data_written < 0)
2236 return data_written;
2237 dma_buffer += data_written;
2238 dma_buffer_size -= data_written;
2239 *dma_data_written += data_written;
2240
2241 crc = SDW_CRC8_SEED;
2242 crc = crc8(sdw_crc8_lookup_msb, data, data_size, crc);
2243 data_written = sdw_cdns_copy_write_data(&crc, 1, dma_buffer, dma_buffer_size);
2244 if (data_written < 0)
2245 return data_written;
2246 dma_buffer += data_written;
2247 dma_buffer_size -= data_written;
2248 *dma_data_written += data_written;
2249
2250 /* tag last byte */
2251 last_byte = dma_buffer - 1;
2252 last_byte[0] = BIT(6);
2253
2254 return 0;
2255 }
2256
sdw_cdns_prepare_read_pd0_buffer(u8 * header,unsigned int header_size,u8 * dma_buffer,unsigned int dma_buffer_size,unsigned int * dma_data_written,unsigned int frame_counter)2257 static int sdw_cdns_prepare_read_pd0_buffer(u8 *header, unsigned int header_size,
2258 u8 *dma_buffer, unsigned int dma_buffer_size,
2259 unsigned int *dma_data_written,
2260 unsigned int frame_counter)
2261 {
2262 int data_written;
2263 u8 *last_byte;
2264 u8 crc;
2265
2266 *dma_data_written = 0;
2267
2268 data_written = sdw_cdns_copy_write_data(header, header_size, dma_buffer, dma_buffer_size);
2269 if (data_written < 0)
2270 return data_written;
2271 dma_buffer[3] = BIT(7);
2272 dma_buffer[3] |= frame_counter & GENMASK(3, 0);
2273
2274 dma_buffer += data_written;
2275 dma_buffer_size -= data_written;
2276 *dma_data_written += data_written;
2277
2278 crc = SDW_CRC8_SEED;
2279 crc = crc8(sdw_crc8_lookup_msb, header, header_size, crc);
2280
2281 data_written = sdw_cdns_copy_write_data(&crc, 1, dma_buffer, dma_buffer_size);
2282 if (data_written < 0)
2283 return data_written;
2284 dma_buffer += data_written;
2285 dma_buffer_size -= data_written;
2286 *dma_data_written += data_written;
2287
2288 /* tag last byte */
2289 last_byte = dma_buffer - 1;
2290 last_byte[0] = BIT(6);
2291
2292 return 0;
2293 }
2294
2295 #define CDNS_BPT_ROLLING_COUNTER_START 1
2296
sdw_cdns_prepare_write_dma_buffer(u8 dev_num,u32 start_register,u8 * data,int data_size,int data_per_frame,u8 * dma_buffer,int dma_buffer_size,int * dma_buffer_total_bytes)2297 int sdw_cdns_prepare_write_dma_buffer(u8 dev_num, u32 start_register, u8 *data, int data_size,
2298 int data_per_frame, u8 *dma_buffer, int dma_buffer_size,
2299 int *dma_buffer_total_bytes)
2300 {
2301 int total_dma_data_written = 0;
2302 u8 *p_dma_buffer = dma_buffer;
2303 u8 header[SDW_CDNS_BRA_HDR];
2304 int dma_data_written;
2305 u8 *p_data = data;
2306 u8 counter;
2307 int ret;
2308
2309 counter = CDNS_BPT_ROLLING_COUNTER_START;
2310
2311 header[0] = BIT(1); /* write command: BIT(1) set */
2312 header[0] |= GENMASK(7, 6); /* header is active */
2313 header[0] |= (dev_num << 2);
2314
2315 while (data_size >= data_per_frame) {
2316 header[1] = data_per_frame;
2317 header[2] = start_register >> 24 & 0xFF;
2318 header[3] = start_register >> 16 & 0xFF;
2319 header[4] = start_register >> 8 & 0xFF;
2320 header[5] = start_register >> 0 & 0xFF;
2321
2322 ret = sdw_cdns_prepare_write_pd0_buffer(header, SDW_CDNS_BRA_HDR,
2323 p_data, data_per_frame,
2324 p_dma_buffer, dma_buffer_size,
2325 &dma_data_written, counter);
2326 if (ret < 0)
2327 return ret;
2328
2329 counter++;
2330
2331 p_data += data_per_frame;
2332 data_size -= data_per_frame;
2333
2334 p_dma_buffer += dma_data_written;
2335 dma_buffer_size -= dma_data_written;
2336 total_dma_data_written += dma_data_written;
2337
2338 start_register += data_per_frame;
2339 }
2340
2341 if (data_size) {
2342 header[1] = data_size;
2343 header[2] = start_register >> 24 & 0xFF;
2344 header[3] = start_register >> 16 & 0xFF;
2345 header[4] = start_register >> 8 & 0xFF;
2346 header[5] = start_register >> 0 & 0xFF;
2347
2348 ret = sdw_cdns_prepare_write_pd0_buffer(header, SDW_CDNS_BRA_HDR,
2349 p_data, data_size,
2350 p_dma_buffer, dma_buffer_size,
2351 &dma_data_written, counter);
2352 if (ret < 0)
2353 return ret;
2354
2355 total_dma_data_written += dma_data_written;
2356 }
2357
2358 *dma_buffer_total_bytes = total_dma_data_written;
2359
2360 return 0;
2361 }
2362 EXPORT_SYMBOL(sdw_cdns_prepare_write_dma_buffer);
2363
sdw_cdns_prepare_read_dma_buffer(u8 dev_num,u32 start_register,int data_size,int data_per_frame,u8 * dma_buffer,int dma_buffer_size,int * dma_buffer_total_bytes)2364 int sdw_cdns_prepare_read_dma_buffer(u8 dev_num, u32 start_register, int data_size,
2365 int data_per_frame, u8 *dma_buffer, int dma_buffer_size,
2366 int *dma_buffer_total_bytes)
2367 {
2368 int total_dma_data_written = 0;
2369 u8 *p_dma_buffer = dma_buffer;
2370 u8 header[SDW_CDNS_BRA_HDR];
2371 int dma_data_written;
2372 u8 counter;
2373 int ret;
2374
2375 counter = CDNS_BPT_ROLLING_COUNTER_START;
2376
2377 header[0] = 0; /* read command: BIT(1) cleared */
2378 header[0] |= GENMASK(7, 6); /* header is active */
2379 header[0] |= (dev_num << 2);
2380
2381 while (data_size >= data_per_frame) {
2382 header[1] = data_per_frame;
2383 header[2] = start_register >> 24 & 0xFF;
2384 header[3] = start_register >> 16 & 0xFF;
2385 header[4] = start_register >> 8 & 0xFF;
2386 header[5] = start_register >> 0 & 0xFF;
2387
2388 ret = sdw_cdns_prepare_read_pd0_buffer(header, SDW_CDNS_BRA_HDR, p_dma_buffer,
2389 dma_buffer_size, &dma_data_written,
2390 counter);
2391 if (ret < 0)
2392 return ret;
2393
2394 counter++;
2395
2396 data_size -= data_per_frame;
2397
2398 p_dma_buffer += dma_data_written;
2399 dma_buffer_size -= dma_data_written;
2400 total_dma_data_written += dma_data_written;
2401
2402 start_register += data_per_frame;
2403 }
2404
2405 if (data_size) {
2406 header[1] = data_size;
2407 header[2] = start_register >> 24 & 0xFF;
2408 header[3] = start_register >> 16 & 0xFF;
2409 header[4] = start_register >> 8 & 0xFF;
2410 header[5] = start_register >> 0 & 0xFF;
2411
2412 ret = sdw_cdns_prepare_read_pd0_buffer(header, SDW_CDNS_BRA_HDR, p_dma_buffer,
2413 dma_buffer_size, &dma_data_written,
2414 counter);
2415 if (ret < 0)
2416 return ret;
2417
2418 total_dma_data_written += dma_data_written;
2419 }
2420
2421 *dma_buffer_total_bytes = total_dma_data_written;
2422
2423 return 0;
2424 }
2425 EXPORT_SYMBOL(sdw_cdns_prepare_read_dma_buffer);
2426
check_counter(u32 val,u8 counter)2427 static int check_counter(u32 val, u8 counter)
2428 {
2429 u8 frame;
2430
2431 frame = (val >> 24) & GENMASK(3, 0);
2432 if (counter != frame)
2433 return -EIO;
2434 return 0;
2435 }
2436
check_response(u32 val)2437 static int check_response(u32 val)
2438 {
2439 u8 response;
2440
2441 response = (val >> 3) & GENMASK(1, 0);
2442 if (response == 0) /* Ignored */
2443 return -ENODATA;
2444 if (response != 1) /* ACK */
2445 return -EIO;
2446
2447 return 0;
2448 }
2449
check_frame_start(u32 header,u8 counter)2450 static int check_frame_start(u32 header, u8 counter)
2451 {
2452 int ret;
2453
2454 /* check frame_start marker */
2455 if (!(header & BIT(31)))
2456 return -EIO;
2457
2458 ret = check_counter(header, counter);
2459 if (ret < 0)
2460 return ret;
2461
2462 return check_response(header);
2463 }
2464
check_frame_end(u32 footer)2465 static int check_frame_end(u32 footer)
2466 {
2467 /* check frame_end marker */
2468 if (!(footer & BIT(30)))
2469 return -EIO;
2470
2471 return check_response(footer);
2472 }
2473
sdw_cdns_check_write_response(struct device * dev,u8 * dma_buffer,int dma_buffer_size,int num_frames)2474 int sdw_cdns_check_write_response(struct device *dev, u8 *dma_buffer,
2475 int dma_buffer_size, int num_frames)
2476 {
2477 u32 *p_data;
2478 int counter;
2479 u32 header;
2480 u32 footer;
2481 int ret;
2482 int i;
2483
2484 /* paranoia check on buffer size */
2485 if (dma_buffer_size != num_frames * 8)
2486 return -EINVAL;
2487
2488 counter = CDNS_BPT_ROLLING_COUNTER_START;
2489 p_data = (u32 *)dma_buffer;
2490
2491 for (i = 0; i < num_frames; i++) {
2492 header = *p_data++;
2493 footer = *p_data++;
2494
2495 ret = check_frame_start(header, counter);
2496 if (ret < 0) {
2497 dev_err(dev, "%s: bad frame %d/%d start header %x\n",
2498 __func__, i, num_frames, header);
2499 return ret;
2500 }
2501
2502 ret = check_frame_end(footer);
2503 if (ret < 0) {
2504 dev_err(dev, "%s: bad frame %d/%d end footer %x\n",
2505 __func__, i, num_frames, footer);
2506 return ret;
2507 }
2508
2509 counter++;
2510 counter &= GENMASK(3, 0);
2511 }
2512 return 0;
2513 }
2514 EXPORT_SYMBOL(sdw_cdns_check_write_response);
2515
extract_read_data(u32 * data,int num_bytes,u8 * buffer)2516 static u8 extract_read_data(u32 *data, int num_bytes, u8 *buffer)
2517 {
2518 u32 val;
2519 int i;
2520 u8 crc;
2521 u8 b0;
2522 u8 b1;
2523
2524 crc = SDW_CRC8_SEED;
2525
2526 /* process two bytes at a time */
2527 for (i = 0; i < num_bytes / 2; i++) {
2528 val = *data++;
2529
2530 b0 = val & 0xff;
2531 b1 = (val >> 8) & 0xff;
2532
2533 *buffer++ = b0;
2534 crc = crc8(sdw_crc8_lookup_msb, &b0, 1, crc);
2535
2536 *buffer++ = b1;
2537 crc = crc8(sdw_crc8_lookup_msb, &b1, 1, crc);
2538 }
2539 /* handle remaining byte if it exists */
2540 if (num_bytes & 1) {
2541 val = *data;
2542
2543 b0 = val & 0xff;
2544
2545 *buffer++ = b0;
2546 crc = crc8(sdw_crc8_lookup_msb, &b0, 1, crc);
2547 }
2548 return crc;
2549 }
2550
sdw_cdns_check_read_response(struct device * dev,u8 * dma_buffer,int dma_buffer_size,u8 * buffer,int buffer_size,int num_frames,int data_per_frame)2551 int sdw_cdns_check_read_response(struct device *dev, u8 *dma_buffer, int dma_buffer_size,
2552 u8 *buffer, int buffer_size, int num_frames, int data_per_frame)
2553 {
2554 int total_num_bytes = 0;
2555 u32 *p_data;
2556 u8 *p_buf;
2557 int counter;
2558 u32 header;
2559 u32 footer;
2560 u8 expected_crc;
2561 u8 crc;
2562 int len;
2563 int ret;
2564 int i;
2565
2566 counter = CDNS_BPT_ROLLING_COUNTER_START;
2567 p_data = (u32 *)dma_buffer;
2568 p_buf = buffer;
2569
2570 for (i = 0; i < num_frames; i++) {
2571 header = *p_data++;
2572
2573 ret = check_frame_start(header, counter);
2574 if (ret < 0) {
2575 dev_err(dev, "%s: bad frame %d/%d start header %x\n",
2576 __func__, i, num_frames, header);
2577 return ret;
2578 }
2579
2580 len = data_per_frame;
2581 if (total_num_bytes + data_per_frame > buffer_size)
2582 len = buffer_size - total_num_bytes;
2583
2584 crc = extract_read_data(p_data, len, p_buf);
2585
2586 p_data += (len + 1) / 2;
2587 expected_crc = *p_data++ & 0xff;
2588
2589 if (crc != expected_crc) {
2590 dev_err(dev, "%s: bad frame %d/%d crc %#x expected %#x\n",
2591 __func__, i, num_frames, crc, expected_crc);
2592 return -EIO;
2593 }
2594
2595 p_buf += len;
2596 total_num_bytes += len;
2597
2598 footer = *p_data++;
2599 ret = check_frame_end(footer);
2600 if (ret < 0) {
2601 dev_err(dev, "%s: bad frame %d/%d end footer %x\n",
2602 __func__, i, num_frames, footer);
2603 return ret;
2604 }
2605
2606 counter++;
2607 counter &= GENMASK(3, 0);
2608 }
2609 return 0;
2610 }
2611 EXPORT_SYMBOL(sdw_cdns_check_read_response);
2612
2613 MODULE_LICENSE("Dual BSD/GPL");
2614 MODULE_DESCRIPTION("Cadence Soundwire Library");
2615