1// SPDX-License-Identifier: GPL-2.0-only 2/dts-v1/; 3 4#include <dt-bindings/interrupt-controller/arm-gic.h> 5#include <dt-bindings/clock/marvell,pxa1908.h> 6 7/ { 8 model = "Marvell Armada PXA1908"; 9 compatible = "marvell,pxa1908"; 10 #address-cells = <2>; 11 #size-cells = <2>; 12 interrupt-parent = <&gic>; 13 14 cpus { 15 #address-cells = <2>; 16 #size-cells = <0>; 17 18 cpu0: cpu@0 { 19 device_type = "cpu"; 20 compatible = "arm,cortex-a53"; 21 reg = <0 0>; 22 enable-method = "psci"; 23 }; 24 25 cpu1: cpu@1 { 26 device_type = "cpu"; 27 compatible = "arm,cortex-a53"; 28 reg = <0 1>; 29 enable-method = "psci"; 30 }; 31 32 cpu2: cpu@2 { 33 device_type = "cpu"; 34 compatible = "arm,cortex-a53"; 35 reg = <0 2>; 36 enable-method = "psci"; 37 }; 38 39 cpu3: cpu@3 { 40 device_type = "cpu"; 41 compatible = "arm,cortex-a53"; 42 reg = <0 3>; 43 enable-method = "psci"; 44 }; 45 }; 46 47 pmu { 48 compatible = "arm,cortex-a53-pmu"; 49 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 50 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 51 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 52 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 53 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 54 }; 55 56 psci { 57 compatible = "arm,psci-0.2"; 58 method = "smc"; 59 }; 60 61 timer { 62 compatible = "arm,armv8-timer"; 63 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 64 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 65 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 66 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 67 }; 68 69 soc { 70 compatible = "simple-bus"; 71 #address-cells = <2>; 72 #size-cells = <2>; 73 ranges; 74 75 smmu: iommu@c0010000 { 76 compatible = "arm,mmu-400"; 77 reg = <0 0xc0010000 0 0x10000>; 78 #global-interrupts = <1>; 79 #iommu-cells = <1>; 80 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>, 81 <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 82 status = "disabled"; 83 }; 84 85 gic: interrupt-controller@d1df9000 { 86 compatible = "arm,gic-400"; 87 reg = <0 0xd1df9000 0 0x1000>, 88 <0 0xd1dfa000 0 0x2000>, 89 /* The subsequent registers are guesses. */ 90 <0 0xd1dfc000 0 0x2000>, 91 <0 0xd1dfe000 0 0x2000>; 92 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 93 interrupt-controller; 94 #interrupt-cells = <3>; 95 }; 96 97 apb@d4000000 { 98 compatible = "simple-bus"; 99 reg = <0 0xd4000000 0 0x200000>; 100 #address-cells = <1>; 101 #size-cells = <1>; 102 ranges = <0 0 0xd4000000 0x200000>; 103 104 pdma: dma-controller@0 { 105 compatible = "marvell,pdma-1.0"; 106 reg = <0 0x10000>; 107 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 108 dma-channels = <30>; 109 #dma-cells = <2>; 110 }; 111 112 twsi1: i2c@10800 { 113 compatible = "mrvl,mmp-twsi"; 114 #address-cells = <1>; 115 #size-cells = <0>; 116 reg = <0x10800 0x64>; 117 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 118 clocks = <&apbc PXA1908_CLK_TWSI1>; 119 mrvl,i2c-fast-mode; 120 status = "disabled"; 121 }; 122 123 twsi0: i2c@11000 { 124 compatible = "mrvl,mmp-twsi"; 125 #address-cells = <1>; 126 #size-cells = <0>; 127 reg = <0x11000 0x64>; 128 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 129 clocks = <&apbc PXA1908_CLK_TWSI0>; 130 mrvl,i2c-fast-mode; 131 status = "disabled"; 132 }; 133 134 twsi3: i2c@13800 { 135 compatible = "mrvl,mmp-twsi"; 136 #address-cells = <1>; 137 #size-cells = <0>; 138 reg = <0x13800 0x64>; 139 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 140 clocks = <&apbc PXA1908_CLK_TWSI3>; 141 mrvl,i2c-fast-mode; 142 status = "disabled"; 143 }; 144 145 apbc: clock-controller@15000 { 146 compatible = "marvell,pxa1908-apbc"; 147 reg = <0x15000 0x1000>; 148 #clock-cells = <1>; 149 }; 150 151 uart0: serial@17000 { 152 compatible = "mrvl,mmp-uart", "intel,xscale-uart"; 153 reg = <0x17000 0x1000>; 154 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 155 clocks = <&apbc PXA1908_CLK_UART0>; 156 reg-shift = <2>; 157 }; 158 159 uart1: serial@18000 { 160 compatible = "mrvl,mmp-uart", "intel,xscale-uart"; 161 reg = <0x18000 0x1000>; 162 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 163 clocks = <&apbc PXA1908_CLK_UART1>; 164 reg-shift = <2>; 165 }; 166 167 gpio: gpio@19000 { 168 compatible = "marvell,mmp-gpio"; 169 reg = <0x19000 0x800>; 170 #address-cells = <1>; 171 #size-cells = <1>; 172 gpio-controller; 173 #gpio-cells = <2>; 174 clocks = <&apbc PXA1908_CLK_GPIO>; 175 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 176 interrupt-names = "gpio_mux"; 177 interrupt-controller; 178 #interrupt-cells = <2>; 179 ranges = <0 0x19000 0x800>; 180 181 gpio@0 { 182 reg = <0x0 0x4>; 183 }; 184 185 gpio@4 { 186 reg = <0x4 0x4>; 187 }; 188 189 gpio@8 { 190 reg = <0x8 0x4>; 191 }; 192 193 gpio@100 { 194 reg = <0x100 0x4>; 195 }; 196 }; 197 198 pmx: pinmux@1e000 { 199 compatible = "marvell,pxa1908-padconf", "pinconf-single"; 200 reg = <0x1e000 0x330>; 201 202 #pinctrl-cells = <1>; 203 pinctrl-single,register-width = <32>; 204 pinctrl-single,function-mask = <7>; 205 206 range: gpio-range { 207 #pinctrl-single,gpio-range-cells = <3>; 208 }; 209 }; 210 211 uart2: serial@36000 { 212 compatible = "mrvl,mmp-uart", "intel,xscale-uart"; 213 reg = <0x36000 0x1000>; 214 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 215 clocks = <&apbcp PXA1908_CLK_UART2>; 216 reg-shift = <2>; 217 }; 218 219 twsi2: i2c@37000 { 220 compatible = "mrvl,mmp-twsi"; 221 #address-cells = <1>; 222 #size-cells = <0>; 223 reg = <0x37000 0x64>; 224 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 225 clocks = <&apbcp PXA1908_CLK_TWSI2>; 226 mrvl,i2c-fast-mode; 227 status = "disabled"; 228 }; 229 230 apbcp: clock-controller@3b000 { 231 compatible = "marvell,pxa1908-apbcp"; 232 reg = <0x3b000 0x1000>; 233 #clock-cells = <1>; 234 }; 235 236 mpmu: clock-controller@50000 { 237 compatible = "marvell,pxa1908-mpmu"; 238 reg = <0x50000 0x1000>; 239 #clock-cells = <1>; 240 }; 241 }; 242 243 axi@d4200000 { 244 compatible = "simple-bus"; 245 reg = <0 0xd4200000 0 0x200000>; 246 #address-cells = <1>; 247 #size-cells = <1>; 248 ranges = <0 0 0xd4200000 0x200000>; 249 250 usbphy: phy@7000 { 251 compatible = "marvell,pxa1928-usb-phy"; 252 reg = <0x7000 0x200>; 253 clocks = <&apmu PXA1908_CLK_USB>; 254 #phy-cells = <0>; 255 }; 256 257 usb: usb@8000 { 258 compatible = "chipidea,usb2"; 259 reg = <0x8000 0x200>; 260 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 261 clocks = <&apmu PXA1908_CLK_USB>; 262 phys = <&usbphy>; 263 phy-names = "usb-phy"; 264 }; 265 266 sdh0: mmc@80000 { 267 compatible = "mrvl,pxav3-mmc"; 268 reg = <0x80000 0x120>; 269 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 270 clocks = <&apmu PXA1908_CLK_SDH0>; 271 clock-names = "io"; 272 mrvl,clk-delay-cycles = <31>; 273 }; 274 275 sdh1: mmc@80800 { 276 compatible = "mrvl,pxav3-mmc"; 277 reg = <0x80800 0x120>; 278 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 279 clocks = <&apmu PXA1908_CLK_SDH1>; 280 clock-names = "io"; 281 mrvl,clk-delay-cycles = <31>; 282 }; 283 284 sdh2: mmc@81000 { 285 compatible = "mrvl,pxav3-mmc"; 286 reg = <0x81000 0x120>; 287 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 288 clocks = <&apmu PXA1908_CLK_SDH2>; 289 clock-names = "io"; 290 mrvl,clk-delay-cycles = <31>; 291 }; 292 293 apmu: clock-controller@82800 { 294 compatible = "marvell,pxa1908-apmu"; 295 reg = <0x82800 0x400>; 296 #clock-cells = <1>; 297 }; 298 }; 299 }; 300}; 301