1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2010 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 ****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/module.h>
33
34 #include "../wifi.h"
35 #include "../pci.h"
36 #include "../usb.h"
37 #include "../ps.h"
38 #include "../cam.h"
39 #include "reg.h"
40 #include "def.h"
41 #include "phy.h"
42 #include "rf.h"
43 #include "dm.h"
44 #include "mac.h"
45 #include "trx.h"
46
47 /* macro to shorten lines */
48
49 #define LINK_Q ui_link_quality
50 #define RX_EVM rx_evm_percentage
51 #define RX_SIGQ rx_mimo_signalquality
52
53
rtl92c_read_chip_version(struct ieee80211_hw * hw)54 void rtl92c_read_chip_version(struct ieee80211_hw *hw)
55 {
56 struct rtl_priv *rtlpriv = rtl_priv(hw);
57 struct rtl_phy *rtlphy = &(rtlpriv->phy);
58 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
59 enum version_8192c chip_version = VERSION_UNKNOWN;
60 u32 value32;
61
62 value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
63 if (value32 & TRP_VAUX_EN) {
64 chip_version = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C :
65 VERSION_TEST_CHIP_88C;
66 } else {
67 /* Normal mass production chip. */
68 chip_version = NORMAL_CHIP;
69 chip_version |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
70 chip_version |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
71 /* RTL8723 with BT function. */
72 chip_version |= ((value32 & BT_FUNC) ? CHIP_8723 : 0);
73 if (IS_VENDOR_UMC(chip_version))
74 chip_version |= ((value32 & CHIP_VER_RTL_MASK) ?
75 CHIP_VENDOR_UMC_B_CUT : 0);
76 if (IS_92C_SERIAL(chip_version)) {
77 value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM);
78 chip_version |= ((CHIP_BONDING_IDENTIFIER(value32) ==
79 CHIP_BONDING_92C_1T2R) ? CHIP_92C_1T2R : 0);
80 } else if (IS_8723_SERIES(chip_version)) {
81 value32 = rtl_read_dword(rtlpriv, REG_GPIO_OUTSTS);
82 chip_version |= ((value32 & RF_RL_ID) ?
83 CHIP_8723_DRV_REV : 0);
84 }
85 }
86 rtlhal->version = (enum version_8192c)chip_version;
87 pr_info("rtl8192cu: Chip version 0x%x\n", chip_version);
88 switch (rtlhal->version) {
89 case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
90 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
91 ("Chip Version ID: VERSION_B_CHIP_92C.\n"));
92 break;
93 case VERSION_NORMAL_TSMC_CHIP_92C:
94 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
95 ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C.\n"));
96 break;
97 case VERSION_NORMAL_TSMC_CHIP_88C:
98 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
99 ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C.\n"));
100 break;
101 case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
102 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
103 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_i"
104 "92C_1T2R_A_CUT.\n"));
105 break;
106 case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
107 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
108 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_"
109 "92C_A_CUT.\n"));
110 break;
111 case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
112 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
113 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
114 "_88C_A_CUT.\n"));
115 break;
116 case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
117 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
118 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
119 "_92C_1T2R_B_CUT.\n"));
120 break;
121 case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
122 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
123 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
124 "_92C_B_CUT.\n"));
125 break;
126 case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
127 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
128 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
129 "_88C_B_CUT.\n"));
130 break;
131 case VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT:
132 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
133 ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
134 "_8723_1T1R_A_CUT.\n"));
135 break;
136 case VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT:
137 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
138 ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
139 "_8723_1T1R_B_CUT.\n"));
140 break;
141 case VERSION_TEST_CHIP_92C:
142 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
143 ("Chip Version ID: VERSION_TEST_CHIP_92C.\n"));
144 break;
145 case VERSION_TEST_CHIP_88C:
146 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
147 ("Chip Version ID: VERSION_TEST_CHIP_88C.\n"));
148 break;
149 default:
150 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
151 ("Chip Version ID: ???????????????.\n"));
152 break;
153 }
154 if (IS_92C_SERIAL(rtlhal->version))
155 rtlphy->rf_type =
156 (IS_92C_1T2R(rtlhal->version)) ? RF_1T2R : RF_2T2R;
157 else
158 rtlphy->rf_type = RF_1T1R;
159 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
160 ("Chip RF Type: %s\n", (rtlphy->rf_type == RF_2T2R) ?
161 "RF_2T2R" : "RF_1T1R"));
162 if (get_rf_type(rtlphy) == RF_1T1R)
163 rtlpriv->dm.rfpath_rxenable[0] = true;
164 else
165 rtlpriv->dm.rfpath_rxenable[0] =
166 rtlpriv->dm.rfpath_rxenable[1] = true;
167 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("VersionID = 0x%4x\n",
168 rtlhal->version));
169 }
170
171 /**
172 * writeLLT - LLT table write access
173 * @io: io callback
174 * @address: LLT logical address.
175 * @data: LLT data content
176 *
177 * Realtek hardware access function.
178 *
179 */
rtl92c_llt_write(struct ieee80211_hw * hw,u32 address,u32 data)180 bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
181 {
182 struct rtl_priv *rtlpriv = rtl_priv(hw);
183 bool status = true;
184 long count = 0;
185 u32 value = _LLT_INIT_ADDR(address) |
186 _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
187
188 rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
189 do {
190 value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
191 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
192 break;
193 if (count > POLLING_LLT_THRESHOLD) {
194 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
195 ("Failed to polling write LLT done at"
196 " address %d! _LLT_OP_VALUE(%x)\n",
197 address, _LLT_OP_VALUE(value)));
198 status = false;
199 break;
200 }
201 } while (++count);
202 return status;
203 }
204 /**
205 * rtl92c_init_LLT_table - Init LLT table
206 * @io: io callback
207 * @boundary:
208 *
209 * Realtek hardware access function.
210 *
211 */
rtl92c_init_llt_table(struct ieee80211_hw * hw,u32 boundary)212 bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
213 {
214 bool rst = true;
215 u32 i;
216
217 for (i = 0; i < (boundary - 1); i++) {
218 rst = rtl92c_llt_write(hw, i , i + 1);
219 if (true != rst) {
220 pr_err("===> %s #1 fail\n", __func__);
221 return rst;
222 }
223 }
224 /* end of list */
225 rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
226 if (true != rst) {
227 pr_err("===> %s #2 fail\n", __func__);
228 return rst;
229 }
230 /* Make the other pages as ring buffer
231 * This ring buffer is used as beacon buffer if we config this MAC
232 * as two MAC transfer.
233 * Otherwise used as local loopback buffer.
234 */
235 for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
236 rst = rtl92c_llt_write(hw, i, (i + 1));
237 if (true != rst) {
238 pr_err("===> %s #3 fail\n", __func__);
239 return rst;
240 }
241 }
242 /* Let last entry point to the start entry of ring buffer */
243 rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
244 if (true != rst) {
245 pr_err("===> %s #4 fail\n", __func__);
246 return rst;
247 }
248 return rst;
249 }
rtl92c_set_key(struct ieee80211_hw * hw,u32 key_index,u8 * p_macaddr,bool is_group,u8 enc_algo,bool is_wepkey,bool clear_all)250 void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
251 u8 *p_macaddr, bool is_group, u8 enc_algo,
252 bool is_wepkey, bool clear_all)
253 {
254 struct rtl_priv *rtlpriv = rtl_priv(hw);
255 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
256 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
257 u8 *macaddr = p_macaddr;
258 u32 entry_id = 0;
259 bool is_pairwise = false;
260 static u8 cam_const_addr[4][6] = {
261 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
262 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
263 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
264 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
265 };
266 static u8 cam_const_broad[] = {
267 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
268 };
269
270 if (clear_all) {
271 u8 idx = 0;
272 u8 cam_offset = 0;
273 u8 clear_number = 5;
274
275 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, ("clear_all\n"));
276 for (idx = 0; idx < clear_number; idx++) {
277 rtl_cam_mark_invalid(hw, cam_offset + idx);
278 rtl_cam_empty_entry(hw, cam_offset + idx);
279 if (idx < 5) {
280 memset(rtlpriv->sec.key_buf[idx], 0,
281 MAX_KEY_LEN);
282 rtlpriv->sec.key_len[idx] = 0;
283 }
284 }
285 } else {
286 switch (enc_algo) {
287 case WEP40_ENCRYPTION:
288 enc_algo = CAM_WEP40;
289 break;
290 case WEP104_ENCRYPTION:
291 enc_algo = CAM_WEP104;
292 break;
293 case TKIP_ENCRYPTION:
294 enc_algo = CAM_TKIP;
295 break;
296 case AESCCMP_ENCRYPTION:
297 enc_algo = CAM_AES;
298 break;
299 default:
300 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
301 ("iillegal switch case\n"));
302 enc_algo = CAM_TKIP;
303 break;
304 }
305 if (is_wepkey || rtlpriv->sec.use_defaultkey) {
306 macaddr = cam_const_addr[key_index];
307 entry_id = key_index;
308 } else {
309 if (is_group) {
310 macaddr = cam_const_broad;
311 entry_id = key_index;
312 } else {
313 key_index = PAIRWISE_KEYIDX;
314 entry_id = CAM_PAIRWISE_KEY_POSITION;
315 is_pairwise = true;
316 }
317 }
318 if (rtlpriv->sec.key_len[key_index] == 0) {
319 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
320 ("delete one entry\n"));
321 rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
322 } else {
323 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
324 ("The insert KEY length is %d\n",
325 rtlpriv->sec.key_len[PAIRWISE_KEYIDX]));
326 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
327 ("The insert KEY is %x %x\n",
328 rtlpriv->sec.key_buf[0][0],
329 rtlpriv->sec.key_buf[0][1]));
330 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
331 ("add one entry\n"));
332 if (is_pairwise) {
333 RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
334 "Pairwiase Key content :",
335 rtlpriv->sec.pairwise_key,
336 rtlpriv->sec.
337 key_len[PAIRWISE_KEYIDX]);
338 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
339 ("set Pairwiase key\n"));
340
341 rtl_cam_add_one_entry(hw, macaddr, key_index,
342 entry_id, enc_algo,
343 CAM_CONFIG_NO_USEDK,
344 rtlpriv->sec.
345 key_buf[key_index]);
346 } else {
347 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
348 ("set group key\n"));
349 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
350 rtl_cam_add_one_entry(hw,
351 rtlefuse->dev_addr,
352 PAIRWISE_KEYIDX,
353 CAM_PAIRWISE_KEY_POSITION,
354 enc_algo,
355 CAM_CONFIG_NO_USEDK,
356 rtlpriv->sec.key_buf
357 [entry_id]);
358 }
359 rtl_cam_add_one_entry(hw, macaddr, key_index,
360 entry_id, enc_algo,
361 CAM_CONFIG_NO_USEDK,
362 rtlpriv->sec.key_buf[entry_id]);
363 }
364 }
365 }
366 }
367
rtl92c_get_txdma_status(struct ieee80211_hw * hw)368 u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw)
369 {
370 struct rtl_priv *rtlpriv = rtl_priv(hw);
371
372 return rtl_read_dword(rtlpriv, REG_TXDMA_STATUS);
373 }
374
rtl92c_enable_interrupt(struct ieee80211_hw * hw)375 void rtl92c_enable_interrupt(struct ieee80211_hw *hw)
376 {
377 struct rtl_priv *rtlpriv = rtl_priv(hw);
378 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
379 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
380 struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
381
382 if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
383 rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
384 0xFFFFFFFF);
385 rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
386 0xFFFFFFFF);
387 } else {
388 rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
389 0xFFFFFFFF);
390 rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
391 0xFFFFFFFF);
392 }
393 }
394
rtl92c_init_interrupt(struct ieee80211_hw * hw)395 void rtl92c_init_interrupt(struct ieee80211_hw *hw)
396 {
397 rtl92c_enable_interrupt(hw);
398 }
399
rtl92c_disable_interrupt(struct ieee80211_hw * hw)400 void rtl92c_disable_interrupt(struct ieee80211_hw *hw)
401 {
402 struct rtl_priv *rtlpriv = rtl_priv(hw);
403
404 rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
405 rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
406 }
407
rtl92c_set_qos(struct ieee80211_hw * hw,int aci)408 void rtl92c_set_qos(struct ieee80211_hw *hw, int aci)
409 {
410 struct rtl_priv *rtlpriv = rtl_priv(hw);
411 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
412 u32 u4b_ac_param;
413
414 rtl92c_dm_init_edca_turbo(hw);
415 u4b_ac_param = (u32) mac->ac[aci].aifs;
416 u4b_ac_param |=
417 ((u32) le16_to_cpu(mac->ac[aci].cw_min) & 0xF) <<
418 AC_PARAM_ECW_MIN_OFFSET;
419 u4b_ac_param |=
420 ((u32) le16_to_cpu(mac->ac[aci].cw_max) & 0xF) <<
421 AC_PARAM_ECW_MAX_OFFSET;
422 u4b_ac_param |= (u32) le16_to_cpu(mac->ac[aci].tx_op) <<
423 AC_PARAM_TXOP_OFFSET;
424 RT_TRACE(rtlpriv, COMP_QOS, DBG_LOUD,
425 ("queue:%x, ac_param:%x\n", aci, u4b_ac_param));
426 switch (aci) {
427 case AC1_BK:
428 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
429 break;
430 case AC0_BE:
431 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param);
432 break;
433 case AC2_VI:
434 rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param);
435 break;
436 case AC3_VO:
437 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param);
438 break;
439 default:
440 RT_ASSERT(false, ("invalid aci: %d !\n", aci));
441 break;
442 }
443 }
444
445 /*-------------------------------------------------------------------------
446 * HW MAC Address
447 *-------------------------------------------------------------------------*/
rtl92c_set_mac_addr(struct ieee80211_hw * hw,const u8 * addr)448 void rtl92c_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr)
449 {
450 u32 i;
451 struct rtl_priv *rtlpriv = rtl_priv(hw);
452
453 for (i = 0 ; i < ETH_ALEN ; i++)
454 rtl_write_byte(rtlpriv, (REG_MACID + i), *(addr+i));
455
456 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG, ("MAC Address: %02X-%02X-%02X-"
457 "%02X-%02X-%02X\n",
458 rtl_read_byte(rtlpriv, REG_MACID),
459 rtl_read_byte(rtlpriv, REG_MACID+1),
460 rtl_read_byte(rtlpriv, REG_MACID+2),
461 rtl_read_byte(rtlpriv, REG_MACID+3),
462 rtl_read_byte(rtlpriv, REG_MACID+4),
463 rtl_read_byte(rtlpriv, REG_MACID+5)));
464 }
465
rtl92c_init_driver_info_size(struct ieee80211_hw * hw,u8 size)466 void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size)
467 {
468 struct rtl_priv *rtlpriv = rtl_priv(hw);
469 rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, size);
470 }
471
rtl92c_set_network_type(struct ieee80211_hw * hw,enum nl80211_iftype type)472 int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
473 {
474 u8 value;
475 struct rtl_priv *rtlpriv = rtl_priv(hw);
476
477 switch (type) {
478 case NL80211_IFTYPE_UNSPECIFIED:
479 value = NT_NO_LINK;
480 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
481 ("Set Network type to NO LINK!\n"));
482 break;
483 case NL80211_IFTYPE_ADHOC:
484 value = NT_LINK_AD_HOC;
485 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
486 ("Set Network type to Ad Hoc!\n"));
487 break;
488 case NL80211_IFTYPE_STATION:
489 value = NT_LINK_AP;
490 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
491 ("Set Network type to STA!\n"));
492 break;
493 case NL80211_IFTYPE_AP:
494 value = NT_AS_AP;
495 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
496 ("Set Network type to AP!\n"));
497 break;
498 default:
499 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
500 ("Network type %d not support!\n", type));
501 return -EOPNOTSUPP;
502 }
503 rtl_write_byte(rtlpriv, (REG_CR + 2), value);
504 return 0;
505 }
506
rtl92c_init_network_type(struct ieee80211_hw * hw)507 void rtl92c_init_network_type(struct ieee80211_hw *hw)
508 {
509 rtl92c_set_network_type(hw, NL80211_IFTYPE_UNSPECIFIED);
510 }
511
rtl92c_init_adaptive_ctrl(struct ieee80211_hw * hw)512 void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw)
513 {
514 u16 value16;
515 u32 value32;
516 struct rtl_priv *rtlpriv = rtl_priv(hw);
517
518 /* Response Rate Set */
519 value32 = rtl_read_dword(rtlpriv, REG_RRSR);
520 value32 &= ~RATE_BITMAP_ALL;
521 value32 |= RATE_RRSR_CCK_ONLY_1M;
522 rtl_write_dword(rtlpriv, REG_RRSR, value32);
523 /* SIFS (used in NAV) */
524 value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
525 rtl_write_word(rtlpriv, REG_SPEC_SIFS, value16);
526 /* Retry Limit */
527 value16 = _LRL(0x30) | _SRL(0x30);
528 rtl_write_dword(rtlpriv, REG_RL, value16);
529 }
530
rtl92c_init_rate_fallback(struct ieee80211_hw * hw)531 void rtl92c_init_rate_fallback(struct ieee80211_hw *hw)
532 {
533 struct rtl_priv *rtlpriv = rtl_priv(hw);
534
535 /* Set Data Auto Rate Fallback Retry Count register. */
536 rtl_write_dword(rtlpriv, REG_DARFRC, 0x00000000);
537 rtl_write_dword(rtlpriv, REG_DARFRC+4, 0x10080404);
538 rtl_write_dword(rtlpriv, REG_RARFRC, 0x04030201);
539 rtl_write_dword(rtlpriv, REG_RARFRC+4, 0x08070605);
540 }
541
rtl92c_set_cck_sifs(struct ieee80211_hw * hw,u8 trx_sifs,u8 ctx_sifs)542 static void rtl92c_set_cck_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
543 u8 ctx_sifs)
544 {
545 struct rtl_priv *rtlpriv = rtl_priv(hw);
546
547 rtl_write_byte(rtlpriv, REG_SIFS_CCK, trx_sifs);
548 rtl_write_byte(rtlpriv, (REG_SIFS_CCK + 1), ctx_sifs);
549 }
550
rtl92c_set_ofdm_sifs(struct ieee80211_hw * hw,u8 trx_sifs,u8 ctx_sifs)551 static void rtl92c_set_ofdm_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
552 u8 ctx_sifs)
553 {
554 struct rtl_priv *rtlpriv = rtl_priv(hw);
555
556 rtl_write_byte(rtlpriv, REG_SIFS_OFDM, trx_sifs);
557 rtl_write_byte(rtlpriv, (REG_SIFS_OFDM + 1), ctx_sifs);
558 }
559
rtl92c_init_edca_param(struct ieee80211_hw * hw,u16 queue,u16 txop,u8 cw_min,u8 cw_max,u8 aifs)560 void rtl92c_init_edca_param(struct ieee80211_hw *hw,
561 u16 queue, u16 txop, u8 cw_min, u8 cw_max, u8 aifs)
562 {
563 /* sequence: VO, VI, BE, BK ==> the same as 92C hardware design.
564 * referenc : enum nl80211_txq_q or ieee80211_set_wmm_default function.
565 */
566 u32 value;
567 struct rtl_priv *rtlpriv = rtl_priv(hw);
568
569 value = (u32)aifs;
570 value |= ((u32)cw_min & 0xF) << 8;
571 value |= ((u32)cw_max & 0xF) << 12;
572 value |= (u32)txop << 16;
573 /* 92C hardware register sequence is the same as queue number. */
574 rtl_write_dword(rtlpriv, (REG_EDCA_VO_PARAM + (queue * 4)), value);
575 }
576
rtl92c_init_edca(struct ieee80211_hw * hw)577 void rtl92c_init_edca(struct ieee80211_hw *hw)
578 {
579 u16 value16;
580 struct rtl_priv *rtlpriv = rtl_priv(hw);
581
582 /* disable EDCCA count down, to reduce collison and retry */
583 value16 = rtl_read_word(rtlpriv, REG_RD_CTRL);
584 value16 |= DIS_EDCA_CNT_DWN;
585 rtl_write_word(rtlpriv, REG_RD_CTRL, value16);
586 /* Update SIFS timing. ??????????
587 * pHalData->SifsTime = 0x0e0e0a0a; */
588 rtl92c_set_cck_sifs(hw, 0xa, 0xa);
589 rtl92c_set_ofdm_sifs(hw, 0xe, 0xe);
590 /* Set CCK/OFDM SIFS to be 10us. */
591 rtl_write_word(rtlpriv, REG_SIFS_CCK, 0x0a0a);
592 rtl_write_word(rtlpriv, REG_SIFS_OFDM, 0x1010);
593 rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0204);
594 rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x014004);
595 /* TXOP */
596 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, 0x005EA42B);
597 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0x0000A44F);
598 rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x005EA324);
599 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x002FA226);
600 /* PIFS */
601 rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
602 /* AGGR BREAK TIME Register */
603 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
604 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040);
605 rtl_write_byte(rtlpriv, REG_BCNDMATIM, 0x02);
606 rtl_write_byte(rtlpriv, REG_ATIMWND, 0x02);
607 }
608
rtl92c_init_ampdu_aggregation(struct ieee80211_hw * hw)609 void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw)
610 {
611 struct rtl_priv *rtlpriv = rtl_priv(hw);
612
613 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x99997631);
614 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
615 /* init AMPDU aggregation number, tuning for Tx's TP, */
616 rtl_write_word(rtlpriv, 0x4CA, 0x0708);
617 }
618
rtl92c_init_beacon_max_error(struct ieee80211_hw * hw,bool infra_mode)619 void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw, bool infra_mode)
620 {
621 struct rtl_priv *rtlpriv = rtl_priv(hw);
622
623 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
624 }
625
rtl92c_init_rdg_setting(struct ieee80211_hw * hw)626 void rtl92c_init_rdg_setting(struct ieee80211_hw *hw)
627 {
628 struct rtl_priv *rtlpriv = rtl_priv(hw);
629
630 rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xFF);
631 rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200);
632 rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05);
633 }
634
rtl92c_init_retry_function(struct ieee80211_hw * hw)635 void rtl92c_init_retry_function(struct ieee80211_hw *hw)
636 {
637 u8 value8;
638 struct rtl_priv *rtlpriv = rtl_priv(hw);
639
640 value8 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL);
641 value8 |= EN_AMPDU_RTY_NEW;
642 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL, value8);
643 /* Set ACK timeout */
644 rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
645 }
646
rtl92c_init_beacon_parameters(struct ieee80211_hw * hw,enum version_8192c version)647 void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
648 enum version_8192c version)
649 {
650 struct rtl_priv *rtlpriv = rtl_priv(hw);
651 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
652
653 rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);/* ms */
654 rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*ms*/
655 rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
656 if (IS_NORMAL_CHIP(rtlhal->version))
657 rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
658 else
659 rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
660 }
661
rtl92c_disable_fast_edca(struct ieee80211_hw * hw)662 void rtl92c_disable_fast_edca(struct ieee80211_hw *hw)
663 {
664 struct rtl_priv *rtlpriv = rtl_priv(hw);
665
666 rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0);
667 }
668
rtl92c_set_min_space(struct ieee80211_hw * hw,bool is2T)669 void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T)
670 {
671 struct rtl_priv *rtlpriv = rtl_priv(hw);
672 u8 value = is2T ? MAX_MSS_DENSITY_2T : MAX_MSS_DENSITY_1T;
673
674 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, value);
675 }
676
rtl92c_get_mgt_filter(struct ieee80211_hw * hw)677 u16 rtl92c_get_mgt_filter(struct ieee80211_hw *hw)
678 {
679 struct rtl_priv *rtlpriv = rtl_priv(hw);
680
681 return rtl_read_word(rtlpriv, REG_RXFLTMAP0);
682 }
683
rtl92c_set_mgt_filter(struct ieee80211_hw * hw,u16 filter)684 void rtl92c_set_mgt_filter(struct ieee80211_hw *hw, u16 filter)
685 {
686 struct rtl_priv *rtlpriv = rtl_priv(hw);
687
688 rtl_write_word(rtlpriv, REG_RXFLTMAP0, filter);
689 }
690
rtl92c_get_ctrl_filter(struct ieee80211_hw * hw)691 u16 rtl92c_get_ctrl_filter(struct ieee80211_hw *hw)
692 {
693 struct rtl_priv *rtlpriv = rtl_priv(hw);
694
695 return rtl_read_word(rtlpriv, REG_RXFLTMAP1);
696 }
697
rtl92c_set_ctrl_filter(struct ieee80211_hw * hw,u16 filter)698 void rtl92c_set_ctrl_filter(struct ieee80211_hw *hw, u16 filter)
699 {
700 struct rtl_priv *rtlpriv = rtl_priv(hw);
701
702 rtl_write_word(rtlpriv, REG_RXFLTMAP1, filter);
703 }
704
rtl92c_get_data_filter(struct ieee80211_hw * hw)705 u16 rtl92c_get_data_filter(struct ieee80211_hw *hw)
706 {
707 struct rtl_priv *rtlpriv = rtl_priv(hw);
708
709 return rtl_read_word(rtlpriv, REG_RXFLTMAP2);
710 }
711
rtl92c_set_data_filter(struct ieee80211_hw * hw,u16 filter)712 void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter)
713 {
714 struct rtl_priv *rtlpriv = rtl_priv(hw);
715
716 rtl_write_word(rtlpriv, REG_RXFLTMAP2, filter);
717 }
718 /*==============================================================*/
719
_rtl92c_query_rxpwrpercentage(char antpower)720 static u8 _rtl92c_query_rxpwrpercentage(char antpower)
721 {
722 if ((antpower <= -100) || (antpower >= 20))
723 return 0;
724 else if (antpower >= 0)
725 return 100;
726 else
727 return 100 + antpower;
728 }
729
_rtl92c_evm_db_to_percentage(char value)730 static u8 _rtl92c_evm_db_to_percentage(char value)
731 {
732 char ret_val;
733
734 ret_val = value;
735 if (ret_val >= 0)
736 ret_val = 0;
737 if (ret_val <= -33)
738 ret_val = -33;
739 ret_val = 0 - ret_val;
740 ret_val *= 3;
741 if (ret_val == 99)
742 ret_val = 100;
743 return ret_val;
744 }
745
_rtl92c_translate_todbm(struct ieee80211_hw * hw,u8 signal_strength_index)746 static long _rtl92c_translate_todbm(struct ieee80211_hw *hw,
747 u8 signal_strength_index)
748 {
749 long signal_power;
750
751 signal_power = (long)((signal_strength_index + 1) >> 1);
752 signal_power -= 95;
753 return signal_power;
754 }
755
_rtl92c_signal_scale_mapping(struct ieee80211_hw * hw,long currsig)756 static long _rtl92c_signal_scale_mapping(struct ieee80211_hw *hw,
757 long currsig)
758 {
759 long retsig;
760
761 if (currsig >= 61 && currsig <= 100)
762 retsig = 90 + ((currsig - 60) / 4);
763 else if (currsig >= 41 && currsig <= 60)
764 retsig = 78 + ((currsig - 40) / 2);
765 else if (currsig >= 31 && currsig <= 40)
766 retsig = 66 + (currsig - 30);
767 else if (currsig >= 21 && currsig <= 30)
768 retsig = 54 + (currsig - 20);
769 else if (currsig >= 5 && currsig <= 20)
770 retsig = 42 + (((currsig - 5) * 2) / 3);
771 else if (currsig == 4)
772 retsig = 36;
773 else if (currsig == 3)
774 retsig = 27;
775 else if (currsig == 2)
776 retsig = 18;
777 else if (currsig == 1)
778 retsig = 9;
779 else
780 retsig = currsig;
781 return retsig;
782 }
783
_rtl92c_query_rxphystatus(struct ieee80211_hw * hw,struct rtl_stats * pstats,struct rx_desc_92c * pdesc,struct rx_fwinfo_92c * p_drvinfo,bool packet_match_bssid,bool packet_toself,bool packet_beacon)784 static void _rtl92c_query_rxphystatus(struct ieee80211_hw *hw,
785 struct rtl_stats *pstats,
786 struct rx_desc_92c *pdesc,
787 struct rx_fwinfo_92c *p_drvinfo,
788 bool packet_match_bssid,
789 bool packet_toself,
790 bool packet_beacon)
791 {
792 struct rtl_priv *rtlpriv = rtl_priv(hw);
793 struct rtl_phy *rtlphy = &(rtlpriv->phy);
794 struct phy_sts_cck_8192s_t *cck_buf;
795 s8 rx_pwr_all = 0, rx_pwr[4];
796 u8 rf_rx_num = 0, evm, pwdb_all;
797 u8 i, max_spatial_stream;
798 u32 rssi, total_rssi = 0;
799 bool in_powersavemode = false;
800 bool is_cck_rate;
801
802 is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
803 pstats->packet_matchbssid = packet_match_bssid;
804 pstats->packet_toself = packet_toself;
805 pstats->is_cck = is_cck_rate;
806 pstats->packet_beacon = packet_beacon;
807 pstats->is_cck = is_cck_rate;
808 pstats->RX_SIGQ[0] = -1;
809 pstats->RX_SIGQ[1] = -1;
810 if (is_cck_rate) {
811 u8 report, cck_highpwr;
812 cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
813 if (!in_powersavemode)
814 cck_highpwr = rtlphy->cck_high_power;
815 else
816 cck_highpwr = false;
817 if (!cck_highpwr) {
818 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
819 report = cck_buf->cck_agc_rpt & 0xc0;
820 report = report >> 6;
821 switch (report) {
822 case 0x3:
823 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
824 break;
825 case 0x2:
826 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
827 break;
828 case 0x1:
829 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
830 break;
831 case 0x0:
832 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
833 break;
834 }
835 } else {
836 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
837 report = p_drvinfo->cfosho[0] & 0x60;
838 report = report >> 5;
839 switch (report) {
840 case 0x3:
841 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
842 break;
843 case 0x2:
844 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
845 break;
846 case 0x1:
847 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
848 break;
849 case 0x0:
850 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
851 break;
852 }
853 }
854 pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
855 pstats->rx_pwdb_all = pwdb_all;
856 pstats->recvsignalpower = rx_pwr_all;
857 if (packet_match_bssid) {
858 u8 sq;
859 if (pstats->rx_pwdb_all > 40)
860 sq = 100;
861 else {
862 sq = cck_buf->sq_rpt;
863 if (sq > 64)
864 sq = 0;
865 else if (sq < 20)
866 sq = 100;
867 else
868 sq = ((64 - sq) * 100) / 44;
869 }
870 pstats->signalquality = sq;
871 pstats->RX_SIGQ[0] = sq;
872 pstats->RX_SIGQ[1] = -1;
873 }
874 } else {
875 rtlpriv->dm.rfpath_rxenable[0] =
876 rtlpriv->dm.rfpath_rxenable[1] = true;
877 for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
878 if (rtlpriv->dm.rfpath_rxenable[i])
879 rf_rx_num++;
880 rx_pwr[i] =
881 ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
882 rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
883 total_rssi += rssi;
884 rtlpriv->stats.rx_snr_db[i] =
885 (long)(p_drvinfo->rxsnr[i] / 2);
886
887 if (packet_match_bssid)
888 pstats->rx_mimo_signalstrength[i] = (u8) rssi;
889 }
890 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
891 pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
892 pstats->rx_pwdb_all = pwdb_all;
893 pstats->rxpower = rx_pwr_all;
894 pstats->recvsignalpower = rx_pwr_all;
895 if (GET_RX_DESC_RX_MCS(pdesc) &&
896 GET_RX_DESC_RX_MCS(pdesc) >= DESC92_RATEMCS8 &&
897 GET_RX_DESC_RX_MCS(pdesc) <= DESC92_RATEMCS15)
898 max_spatial_stream = 2;
899 else
900 max_spatial_stream = 1;
901 for (i = 0; i < max_spatial_stream; i++) {
902 evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
903 if (packet_match_bssid) {
904 if (i == 0)
905 pstats->signalquality =
906 (u8) (evm & 0xff);
907 pstats->RX_SIGQ[i] =
908 (u8) (evm & 0xff);
909 }
910 }
911 }
912 if (is_cck_rate)
913 pstats->signalstrength =
914 (u8) (_rtl92c_signal_scale_mapping(hw, pwdb_all));
915 else if (rf_rx_num != 0)
916 pstats->signalstrength =
917 (u8) (_rtl92c_signal_scale_mapping
918 (hw, total_rssi /= rf_rx_num));
919 }
920
_rtl92c_process_ui_rssi(struct ieee80211_hw * hw,struct rtl_stats * pstats)921 static void _rtl92c_process_ui_rssi(struct ieee80211_hw *hw,
922 struct rtl_stats *pstats)
923 {
924 struct rtl_priv *rtlpriv = rtl_priv(hw);
925 struct rtl_phy *rtlphy = &(rtlpriv->phy);
926 u8 rfpath;
927 u32 last_rssi, tmpval;
928
929 if (pstats->packet_toself || pstats->packet_beacon) {
930 rtlpriv->stats.rssi_calculate_cnt++;
931 if (rtlpriv->stats.ui_rssi.total_num++ >=
932 PHY_RSSI_SLID_WIN_MAX) {
933 rtlpriv->stats.ui_rssi.total_num =
934 PHY_RSSI_SLID_WIN_MAX;
935 last_rssi =
936 rtlpriv->stats.ui_rssi.elements[rtlpriv->
937 stats.ui_rssi.index];
938 rtlpriv->stats.ui_rssi.total_val -= last_rssi;
939 }
940 rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
941 rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
942 index++] = pstats->signalstrength;
943 if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
944 rtlpriv->stats.ui_rssi.index = 0;
945 tmpval = rtlpriv->stats.ui_rssi.total_val /
946 rtlpriv->stats.ui_rssi.total_num;
947 rtlpriv->stats.signal_strength =
948 _rtl92c_translate_todbm(hw, (u8) tmpval);
949 pstats->rssi = rtlpriv->stats.signal_strength;
950 }
951 if (!pstats->is_cck && pstats->packet_toself) {
952 for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
953 rfpath++) {
954 if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
955 continue;
956 if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
957 rtlpriv->stats.rx_rssi_percentage[rfpath] =
958 pstats->rx_mimo_signalstrength[rfpath];
959 }
960 if (pstats->rx_mimo_signalstrength[rfpath] >
961 rtlpriv->stats.rx_rssi_percentage[rfpath]) {
962 rtlpriv->stats.rx_rssi_percentage[rfpath] =
963 ((rtlpriv->stats.
964 rx_rssi_percentage[rfpath] *
965 (RX_SMOOTH_FACTOR - 1)) +
966 (pstats->rx_mimo_signalstrength[rfpath])) /
967 (RX_SMOOTH_FACTOR);
968
969 rtlpriv->stats.rx_rssi_percentage[rfpath] =
970 rtlpriv->stats.rx_rssi_percentage[rfpath] +
971 1;
972 } else {
973 rtlpriv->stats.rx_rssi_percentage[rfpath] =
974 ((rtlpriv->stats.
975 rx_rssi_percentage[rfpath] *
976 (RX_SMOOTH_FACTOR - 1)) +
977 (pstats->rx_mimo_signalstrength[rfpath])) /
978 (RX_SMOOTH_FACTOR);
979 }
980 }
981 }
982 }
983
_rtl92c_update_rxsignalstatistics(struct ieee80211_hw * hw,struct rtl_stats * pstats)984 static void _rtl92c_update_rxsignalstatistics(struct ieee80211_hw *hw,
985 struct rtl_stats *pstats)
986 {
987 struct rtl_priv *rtlpriv = rtl_priv(hw);
988 int weighting = 0;
989
990 if (rtlpriv->stats.recv_signal_power == 0)
991 rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
992 if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
993 weighting = 5;
994 else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
995 weighting = (-5);
996 rtlpriv->stats.recv_signal_power =
997 (rtlpriv->stats.recv_signal_power * 5 +
998 pstats->recvsignalpower + weighting) / 6;
999 }
1000
_rtl92c_process_pwdb(struct ieee80211_hw * hw,struct rtl_stats * pstats)1001 static void _rtl92c_process_pwdb(struct ieee80211_hw *hw,
1002 struct rtl_stats *pstats)
1003 {
1004 struct rtl_priv *rtlpriv = rtl_priv(hw);
1005 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1006 long undecorated_smoothed_pwdb = 0;
1007
1008 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
1009 return;
1010 } else {
1011 undecorated_smoothed_pwdb =
1012 rtlpriv->dm.undecorated_smoothed_pwdb;
1013 }
1014 if (pstats->packet_toself || pstats->packet_beacon) {
1015 if (undecorated_smoothed_pwdb < 0)
1016 undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
1017 if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
1018 undecorated_smoothed_pwdb =
1019 (((undecorated_smoothed_pwdb) *
1020 (RX_SMOOTH_FACTOR - 1)) +
1021 (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
1022 undecorated_smoothed_pwdb = undecorated_smoothed_pwdb
1023 + 1;
1024 } else {
1025 undecorated_smoothed_pwdb =
1026 (((undecorated_smoothed_pwdb) *
1027 (RX_SMOOTH_FACTOR - 1)) +
1028 (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
1029 }
1030 rtlpriv->dm.undecorated_smoothed_pwdb =
1031 undecorated_smoothed_pwdb;
1032 _rtl92c_update_rxsignalstatistics(hw, pstats);
1033 }
1034 }
1035
_rtl92c_process_LINK_Q(struct ieee80211_hw * hw,struct rtl_stats * pstats)1036 static void _rtl92c_process_LINK_Q(struct ieee80211_hw *hw,
1037 struct rtl_stats *pstats)
1038 {
1039 struct rtl_priv *rtlpriv = rtl_priv(hw);
1040 u32 last_evm = 0, n_stream, tmpval;
1041
1042 if (pstats->signalquality != 0) {
1043 if (pstats->packet_toself || pstats->packet_beacon) {
1044 if (rtlpriv->stats.LINK_Q.total_num++ >=
1045 PHY_LINKQUALITY_SLID_WIN_MAX) {
1046 rtlpriv->stats.LINK_Q.total_num =
1047 PHY_LINKQUALITY_SLID_WIN_MAX;
1048 last_evm =
1049 rtlpriv->stats.LINK_Q.elements
1050 [rtlpriv->stats.LINK_Q.index];
1051 rtlpriv->stats.LINK_Q.total_val -=
1052 last_evm;
1053 }
1054 rtlpriv->stats.LINK_Q.total_val +=
1055 pstats->signalquality;
1056 rtlpriv->stats.LINK_Q.elements
1057 [rtlpriv->stats.LINK_Q.index++] =
1058 pstats->signalquality;
1059 if (rtlpriv->stats.LINK_Q.index >=
1060 PHY_LINKQUALITY_SLID_WIN_MAX)
1061 rtlpriv->stats.LINK_Q.index = 0;
1062 tmpval = rtlpriv->stats.LINK_Q.total_val /
1063 rtlpriv->stats.LINK_Q.total_num;
1064 rtlpriv->stats.signal_quality = tmpval;
1065 rtlpriv->stats.last_sigstrength_inpercent = tmpval;
1066 for (n_stream = 0; n_stream < 2;
1067 n_stream++) {
1068 if (pstats->RX_SIGQ[n_stream] != -1) {
1069 if (!rtlpriv->stats.RX_EVM[n_stream]) {
1070 rtlpriv->stats.RX_EVM[n_stream]
1071 = pstats->RX_SIGQ[n_stream];
1072 }
1073 rtlpriv->stats.RX_EVM[n_stream] =
1074 ((rtlpriv->stats.RX_EVM
1075 [n_stream] *
1076 (RX_SMOOTH_FACTOR - 1)) +
1077 (pstats->RX_SIGQ
1078 [n_stream] * 1)) /
1079 (RX_SMOOTH_FACTOR);
1080 }
1081 }
1082 }
1083 } else {
1084 ;
1085 }
1086 }
1087
_rtl92c_process_phyinfo(struct ieee80211_hw * hw,u8 * buffer,struct rtl_stats * pcurrent_stats)1088 static void _rtl92c_process_phyinfo(struct ieee80211_hw *hw,
1089 u8 *buffer,
1090 struct rtl_stats *pcurrent_stats)
1091 {
1092 if (!pcurrent_stats->packet_matchbssid &&
1093 !pcurrent_stats->packet_beacon)
1094 return;
1095 _rtl92c_process_ui_rssi(hw, pcurrent_stats);
1096 _rtl92c_process_pwdb(hw, pcurrent_stats);
1097 _rtl92c_process_LINK_Q(hw, pcurrent_stats);
1098 }
1099
rtl92c_translate_rx_signal_stuff(struct ieee80211_hw * hw,struct sk_buff * skb,struct rtl_stats * pstats,struct rx_desc_92c * pdesc,struct rx_fwinfo_92c * p_drvinfo)1100 void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
1101 struct sk_buff *skb,
1102 struct rtl_stats *pstats,
1103 struct rx_desc_92c *pdesc,
1104 struct rx_fwinfo_92c *p_drvinfo)
1105 {
1106 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1107 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
1108 struct ieee80211_hdr *hdr;
1109 u8 *tmp_buf;
1110 u8 *praddr;
1111 __le16 fc;
1112 u16 type, cpu_fc;
1113 bool packet_matchbssid, packet_toself, packet_beacon;
1114
1115 tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
1116 hdr = (struct ieee80211_hdr *)tmp_buf;
1117 fc = hdr->frame_control;
1118 cpu_fc = le16_to_cpu(fc);
1119 type = WLAN_FC_GET_TYPE(fc);
1120 praddr = hdr->addr1;
1121 packet_matchbssid =
1122 ((IEEE80211_FTYPE_CTL != type) &&
1123 (!compare_ether_addr(mac->bssid,
1124 (cpu_fc & IEEE80211_FCTL_TODS) ?
1125 hdr->addr1 : (cpu_fc & IEEE80211_FCTL_FROMDS) ?
1126 hdr->addr2 : hdr->addr3)) &&
1127 (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
1128
1129 packet_toself = packet_matchbssid &&
1130 (!compare_ether_addr(praddr, rtlefuse->dev_addr));
1131 if (ieee80211_is_beacon(fc))
1132 packet_beacon = true;
1133 _rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
1134 packet_matchbssid, packet_toself,
1135 packet_beacon);
1136 _rtl92c_process_phyinfo(hw, tmp_buf, pstats);
1137 }
1138