1 // SPDX-License-Identifier: GPL-2.0-only
2 //
3 // rt715-sdca.c -- rt715 ALSA SoC audio driver
4 //
5 // Copyright(c) 2020 Realtek Semiconductor Corp.
6 //
7 //
8 //
9
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/pm.h>
16 #include <linux/soundwire/sdw.h>
17 #include <linux/regmap.h>
18 #include <linux/slab.h>
19 #include <linux/platform_device.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/sdw.h>
24 #include <sound/soc.h>
25 #include <sound/soc-dapm.h>
26 #include <sound/initval.h>
27 #include <sound/tlv.h>
28 #include <linux/soundwire/sdw_registers.h>
29
30 #include "rt715-sdca.h"
31
rt715_sdca_index_write(struct rt715_sdca_priv * rt715,unsigned int nid,unsigned int reg,unsigned int value)32 static int rt715_sdca_index_write(struct rt715_sdca_priv *rt715,
33 unsigned int nid, unsigned int reg, unsigned int value)
34 {
35 struct regmap *regmap = rt715->mbq_regmap;
36 unsigned int addr;
37 int ret;
38
39 addr = (nid << 20) | reg;
40
41 ret = regmap_write(regmap, addr, value);
42 if (ret < 0)
43 dev_err(&rt715->slave->dev,
44 "%s: Failed to set private value: %08x <= %04x %d\n",
45 __func__, addr, value, ret);
46
47 return ret;
48 }
49
rt715_sdca_index_read(struct rt715_sdca_priv * rt715,unsigned int nid,unsigned int reg,unsigned int * value)50 static int rt715_sdca_index_read(struct rt715_sdca_priv *rt715,
51 unsigned int nid, unsigned int reg, unsigned int *value)
52 {
53 struct regmap *regmap = rt715->mbq_regmap;
54 unsigned int addr;
55 int ret;
56
57 addr = (nid << 20) | reg;
58
59 ret = regmap_read(regmap, addr, value);
60 if (ret < 0)
61 dev_err(&rt715->slave->dev,
62 "%s: Failed to get private value: %06x => %04x ret=%d\n",
63 __func__, addr, *value, ret);
64
65 return ret;
66 }
67
rt715_sdca_index_update_bits(struct rt715_sdca_priv * rt715,unsigned int nid,unsigned int reg,unsigned int mask,unsigned int val)68 static int rt715_sdca_index_update_bits(struct rt715_sdca_priv *rt715,
69 unsigned int nid, unsigned int reg, unsigned int mask, unsigned int val)
70 {
71 unsigned int tmp;
72 int ret;
73
74 ret = rt715_sdca_index_read(rt715, nid, reg, &tmp);
75 if (ret < 0)
76 return ret;
77
78 set_mask_bits(&tmp, mask, val);
79
80 return rt715_sdca_index_write(rt715, nid, reg, tmp);
81 }
82
rt715_sdca_vol_gain(unsigned int u_ctrl_val,unsigned int vol_max,unsigned int vol_gain_sft)83 static inline unsigned int rt715_sdca_vol_gain(unsigned int u_ctrl_val,
84 unsigned int vol_max, unsigned int vol_gain_sft)
85 {
86 unsigned int val;
87
88 if (u_ctrl_val > vol_max)
89 u_ctrl_val = vol_max;
90 val = u_ctrl_val;
91 u_ctrl_val =
92 ((abs(u_ctrl_val - vol_gain_sft) * RT715_SDCA_DB_STEP) << 8) / 1000;
93 if (val <= vol_gain_sft) {
94 u_ctrl_val = ~u_ctrl_val;
95 u_ctrl_val += 1;
96 }
97 u_ctrl_val &= 0xffff;
98
99 return u_ctrl_val;
100 }
101
rt715_sdca_boost_gain(unsigned int u_ctrl_val,unsigned int b_max,unsigned int b_gain_sft)102 static inline unsigned int rt715_sdca_boost_gain(unsigned int u_ctrl_val,
103 unsigned int b_max, unsigned int b_gain_sft)
104 {
105 if (u_ctrl_val > b_max)
106 u_ctrl_val = b_max;
107
108 return (u_ctrl_val * 10) << b_gain_sft;
109 }
110
rt715_sdca_get_gain(unsigned int reg_val,unsigned int gain_sft)111 static inline unsigned int rt715_sdca_get_gain(unsigned int reg_val,
112 unsigned int gain_sft)
113 {
114 unsigned int neg_flag = 0;
115
116 if (reg_val & BIT(15)) {
117 reg_val = ~(reg_val - 1) & 0xffff;
118 neg_flag = 1;
119 }
120 reg_val *= 1000;
121 reg_val >>= 8;
122 if (neg_flag)
123 reg_val = gain_sft - reg_val / RT715_SDCA_DB_STEP;
124 else
125 reg_val = gain_sft + reg_val / RT715_SDCA_DB_STEP;
126
127 return reg_val;
128 }
129
130 /* SDCA Volume/Boost control */
rt715_sdca_set_amp_gain_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)131 static int rt715_sdca_set_amp_gain_put(struct snd_kcontrol *kcontrol,
132 struct snd_ctl_elem_value *ucontrol)
133 {
134 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
135 struct soc_mixer_control *mc =
136 (struct soc_mixer_control *)kcontrol->private_value;
137 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
138 unsigned int gain_val, i, k_changed = 0;
139 int ret;
140
141 for (i = 0; i < 2; i++) {
142 if (ucontrol->value.integer.value[i] != rt715->kctl_2ch_orig[i]) {
143 k_changed = 1;
144 break;
145 }
146 }
147
148 for (i = 0; i < 2; i++) {
149 rt715->kctl_2ch_orig[i] = ucontrol->value.integer.value[i];
150 gain_val =
151 rt715_sdca_vol_gain(ucontrol->value.integer.value[i], mc->max,
152 mc->shift);
153 ret = regmap_write(rt715->mbq_regmap, mc->reg + i, gain_val);
154 if (ret != 0) {
155 dev_err(component->dev, "%s: Failed to write 0x%x=0x%x\n",
156 __func__, mc->reg + i, gain_val);
157 return ret;
158 }
159 }
160
161 return k_changed;
162 }
163
rt715_sdca_set_amp_gain_4ch_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)164 static int rt715_sdca_set_amp_gain_4ch_put(struct snd_kcontrol *kcontrol,
165 struct snd_ctl_elem_value *ucontrol)
166 {
167 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
168 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
169 struct rt715_sdca_kcontrol_private *p =
170 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
171 unsigned int reg_base = p->reg_base, k_changed = 0;
172 const unsigned int gain_sft = 0x2f;
173 unsigned int gain_val, i;
174 int ret;
175
176 for (i = 0; i < 4; i++) {
177 if (ucontrol->value.integer.value[i] != rt715->kctl_4ch_orig[i]) {
178 k_changed = 1;
179 break;
180 }
181 }
182
183 for (i = 0; i < 4; i++) {
184 rt715->kctl_4ch_orig[i] = ucontrol->value.integer.value[i];
185 gain_val =
186 rt715_sdca_vol_gain(ucontrol->value.integer.value[i], p->max,
187 gain_sft);
188 ret = regmap_write(rt715->mbq_regmap, reg_base + i,
189 gain_val);
190 if (ret != 0) {
191 dev_err(component->dev, "%s: Failed to write 0x%x=0x%x\n",
192 __func__, reg_base + i, gain_val);
193 return ret;
194 }
195 }
196
197 return k_changed;
198 }
199
rt715_sdca_set_amp_gain_8ch_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)200 static int rt715_sdca_set_amp_gain_8ch_put(struct snd_kcontrol *kcontrol,
201 struct snd_ctl_elem_value *ucontrol)
202 {
203 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
204 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
205 struct rt715_sdca_kcontrol_private *p =
206 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
207 unsigned int reg_base = p->reg_base, i, k_changed = 0;
208 const unsigned int gain_sft = 8;
209 unsigned int gain_val, reg;
210 int ret;
211
212 for (i = 0; i < 8; i++) {
213 if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_orig[i]) {
214 k_changed = 1;
215 break;
216 }
217 }
218
219 for (i = 0; i < 8; i++) {
220 rt715->kctl_8ch_orig[i] = ucontrol->value.integer.value[i];
221 gain_val =
222 rt715_sdca_boost_gain(ucontrol->value.integer.value[i], p->max,
223 gain_sft);
224 reg = i < 7 ? reg_base + i : (reg_base - 1) | BIT(15);
225 ret = regmap_write(rt715->mbq_regmap, reg, gain_val);
226 if (ret != 0) {
227 dev_err(component->dev, "%s: Failed to write 0x%x=0x%x\n",
228 __func__, reg, gain_val);
229 return ret;
230 }
231 }
232
233 return k_changed;
234 }
235
rt715_sdca_set_amp_gain_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)236 static int rt715_sdca_set_amp_gain_get(struct snd_kcontrol *kcontrol,
237 struct snd_ctl_elem_value *ucontrol)
238 {
239 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
240 struct soc_mixer_control *mc =
241 (struct soc_mixer_control *)kcontrol->private_value;
242 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
243 unsigned int val, i;
244 int ret;
245
246 for (i = 0; i < 2; i++) {
247 ret = regmap_read(rt715->mbq_regmap, mc->reg + i, &val);
248 if (ret < 0) {
249 dev_err(component->dev, "%s: Failed to read 0x%x, ret=%d\n",
250 __func__, mc->reg + i, ret);
251 return ret;
252 }
253 ucontrol->value.integer.value[i] = rt715_sdca_get_gain(val, mc->shift);
254 }
255
256 return 0;
257 }
258
rt715_sdca_set_amp_gain_4ch_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)259 static int rt715_sdca_set_amp_gain_4ch_get(struct snd_kcontrol *kcontrol,
260 struct snd_ctl_elem_value *ucontrol)
261 {
262 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
263 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
264 struct rt715_sdca_kcontrol_private *p =
265 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
266 unsigned int reg_base = p->reg_base, i;
267 const unsigned int gain_sft = 0x2f;
268 unsigned int val;
269 int ret;
270
271 for (i = 0; i < 4; i++) {
272 ret = regmap_read(rt715->mbq_regmap, reg_base + i, &val);
273 if (ret < 0) {
274 dev_err(component->dev, "%s: Failed to read 0x%x, ret=%d\n",
275 __func__, reg_base + i, ret);
276 return ret;
277 }
278 ucontrol->value.integer.value[i] = rt715_sdca_get_gain(val, gain_sft);
279 }
280
281 return 0;
282 }
283
rt715_sdca_set_amp_gain_8ch_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)284 static int rt715_sdca_set_amp_gain_8ch_get(struct snd_kcontrol *kcontrol,
285 struct snd_ctl_elem_value *ucontrol)
286 {
287 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
288 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
289 struct rt715_sdca_kcontrol_private *p =
290 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
291 unsigned int reg_base = p->reg_base;
292 const unsigned int gain_sft = 8;
293 unsigned int val_l, val_r;
294 unsigned int i, reg;
295 int ret;
296
297 for (i = 0; i < 8; i += 2) {
298 ret = regmap_read(rt715->mbq_regmap, reg_base + i, &val_l);
299 if (ret < 0) {
300 dev_err(component->dev, "%s: Failed to read 0x%x, ret=%d\n",
301 __func__, reg_base + i, ret);
302 return ret;
303 }
304 ucontrol->value.integer.value[i] = (val_l >> gain_sft) / 10;
305
306 reg = (i == 6) ? (reg_base - 1) | BIT(15) : reg_base + 1 + i;
307 ret = regmap_read(rt715->mbq_regmap, reg, &val_r);
308 if (ret < 0) {
309 dev_err(component->dev, "%s: Failed to read 0x%x, ret=%d\n",
310 __func__, reg, ret);
311 return ret;
312 }
313 ucontrol->value.integer.value[i + 1] = (val_r >> gain_sft) / 10;
314 }
315
316 return 0;
317 }
318
319 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
320 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
321
rt715_sdca_get_volsw(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)322 static int rt715_sdca_get_volsw(struct snd_kcontrol *kcontrol,
323 struct snd_ctl_elem_value *ucontrol)
324 {
325 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
326 struct rt715_sdca_kcontrol_private *p =
327 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
328 unsigned int reg_base = p->reg_base;
329 unsigned int invert = p->invert, i;
330 int val;
331
332 for (i = 0; i < p->count; i += 2) {
333 val = snd_soc_component_read(component, reg_base + i);
334 if (val < 0)
335 return -EINVAL;
336 ucontrol->value.integer.value[i] = invert ? p->max - val : val;
337
338 val = snd_soc_component_read(component, reg_base + 1 + i);
339 if (val < 0)
340 return -EINVAL;
341 ucontrol->value.integer.value[i + 1] =
342 invert ? p->max - val : val;
343 }
344
345 return 0;
346 }
347
rt715_sdca_put_volsw(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)348 static int rt715_sdca_put_volsw(struct snd_kcontrol *kcontrol,
349 struct snd_ctl_elem_value *ucontrol)
350 {
351 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
352 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
353 struct rt715_sdca_kcontrol_private *p =
354 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
355 unsigned int val[4] = {0}, val_mask, i, k_changed = 0;
356 unsigned int reg = p->reg_base;
357 unsigned int shift = p->shift;
358 unsigned int max = p->max;
359 unsigned int mask = (1 << fls(max)) - 1;
360 unsigned int invert = p->invert;
361 int err;
362
363 for (i = 0; i < 4; i++) {
364 if (ucontrol->value.integer.value[i] != rt715->kctl_switch_orig[i]) {
365 k_changed = 1;
366 break;
367 }
368 }
369
370 for (i = 0; i < 2; i++) {
371 rt715->kctl_switch_orig[i * 2] = ucontrol->value.integer.value[i * 2];
372 val[i * 2] = ucontrol->value.integer.value[i * 2] & mask;
373 if (invert)
374 val[i * 2] = max - val[i * 2];
375 val_mask = mask << shift;
376 val[i * 2] <<= shift;
377
378 rt715->kctl_switch_orig[i * 2 + 1] =
379 ucontrol->value.integer.value[i * 2 + 1];
380 val[i * 2 + 1] =
381 ucontrol->value.integer.value[i * 2 + 1] & mask;
382 if (invert)
383 val[i * 2 + 1] = max - val[i * 2 + 1];
384
385 val[i * 2 + 1] <<= shift;
386
387 err = snd_soc_component_update_bits(component, reg + i * 2, val_mask,
388 val[i * 2]);
389 if (err < 0)
390 return err;
391
392 err = snd_soc_component_update_bits(component, reg + 1 + i * 2,
393 val_mask, val[i * 2 + 1]);
394 if (err < 0)
395 return err;
396 }
397
398 return k_changed;
399 }
400
rt715_sdca_fu_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)401 static int rt715_sdca_fu_info(struct snd_kcontrol *kcontrol,
402 struct snd_ctl_elem_info *uinfo)
403 {
404 struct rt715_sdca_kcontrol_private *p =
405 (struct rt715_sdca_kcontrol_private *)kcontrol->private_value;
406
407 if (p->max == 1)
408 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
409 else
410 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
411 uinfo->count = p->count;
412 uinfo->value.integer.min = 0;
413 uinfo->value.integer.max = p->max;
414 return 0;
415 }
416
417 #define RT715_SDCA_PR_VALUE(xreg_base, xcount, xmax, xshift, xinvert) \
418 ((unsigned long)&(struct rt715_sdca_kcontrol_private) \
419 {.reg_base = xreg_base, .count = xcount, .max = xmax, \
420 .shift = xshift, .invert = xinvert})
421
422 #define RT715_SDCA_FU_CTRL(xname, reg_base, xshift, xmax, xinvert, xcount) \
423 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
424 .info = rt715_sdca_fu_info, \
425 .get = rt715_sdca_get_volsw, \
426 .put = rt715_sdca_put_volsw, \
427 .private_value = RT715_SDCA_PR_VALUE(reg_base, xcount, xmax, \
428 xshift, xinvert)}
429
430 #define RT715_SDCA_EXT_TLV(xname, reg_base, xhandler_get,\
431 xhandler_put, tlv_array, xcount, xmax) \
432 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
433 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
434 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
435 .tlv.p = (tlv_array), \
436 .info = rt715_sdca_fu_info, \
437 .get = xhandler_get, .put = xhandler_put, \
438 .private_value = RT715_SDCA_PR_VALUE(reg_base, xcount, xmax, 0, 0) }
439
440 #define RT715_SDCA_BOOST_EXT_TLV(xname, reg_base, xhandler_get,\
441 xhandler_put, tlv_array, xcount, xmax) \
442 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
443 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
444 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
445 .tlv.p = (tlv_array), \
446 .info = rt715_sdca_fu_info, \
447 .get = xhandler_get, .put = xhandler_put, \
448 .private_value = RT715_SDCA_PR_VALUE(reg_base, xcount, xmax, 0, 0) }
449
450 static const struct snd_kcontrol_new rt715_sdca_snd_controls[] = {
451 /* Capture switch */
452 SOC_DOUBLE_R("FU0A Capture Switch",
453 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
454 RT715_SDCA_FU_MUTE_CTRL, CH_01),
455 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
456 RT715_SDCA_FU_MUTE_CTRL, CH_02),
457 0, 1, 1),
458 RT715_SDCA_FU_CTRL("FU02 Capture Switch",
459 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,
460 RT715_SDCA_FU_MUTE_CTRL, CH_01),
461 0, 1, 1, 4),
462 RT715_SDCA_FU_CTRL("FU06 Capture Switch",
463 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,
464 RT715_SDCA_FU_MUTE_CTRL, CH_01),
465 0, 1, 1, 4),
466 /* Volume Control */
467 SOC_DOUBLE_R_EXT_TLV("FU0A Capture Volume",
468 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
469 RT715_SDCA_FU_VOL_CTRL, CH_01),
470 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC7_27_VOL,
471 RT715_SDCA_FU_VOL_CTRL, CH_02),
472 0x2f, 0x3f, 0,
473 rt715_sdca_set_amp_gain_get, rt715_sdca_set_amp_gain_put,
474 in_vol_tlv),
475 RT715_SDCA_EXT_TLV("FU02 Capture Volume",
476 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC8_9_VOL,
477 RT715_SDCA_FU_VOL_CTRL, CH_01),
478 rt715_sdca_set_amp_gain_4ch_get,
479 rt715_sdca_set_amp_gain_4ch_put,
480 in_vol_tlv, 4, 0x3f),
481 RT715_SDCA_EXT_TLV("FU06 Capture Volume",
482 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_ADC10_11_VOL,
483 RT715_SDCA_FU_VOL_CTRL, CH_01),
484 rt715_sdca_set_amp_gain_4ch_get,
485 rt715_sdca_set_amp_gain_4ch_put,
486 in_vol_tlv, 4, 0x3f),
487 /* MIC Boost Control */
488 RT715_SDCA_BOOST_EXT_TLV("FU0E Boost",
489 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_DMIC_GAIN_EN,
490 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_01),
491 rt715_sdca_set_amp_gain_8ch_get,
492 rt715_sdca_set_amp_gain_8ch_put,
493 mic_vol_tlv, 8, 3),
494 RT715_SDCA_BOOST_EXT_TLV("FU0C Boost",
495 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_FU_AMIC_GAIN_EN,
496 RT715_SDCA_FU_DMIC_GAIN_CTRL, CH_01),
497 rt715_sdca_set_amp_gain_8ch_get,
498 rt715_sdca_set_amp_gain_8ch_put,
499 mic_vol_tlv, 8, 3),
500 };
501
rt715_sdca_mux_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)502 static int rt715_sdca_mux_get(struct snd_kcontrol *kcontrol,
503 struct snd_ctl_elem_value *ucontrol)
504 {
505 struct snd_soc_component *component =
506 snd_soc_dapm_kcontrol_component(kcontrol);
507 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
508 unsigned int val, mask_sft;
509
510 if (strstr(ucontrol->id.name, "ADC 22 Mux"))
511 mask_sft = 12;
512 else if (strstr(ucontrol->id.name, "ADC 23 Mux"))
513 mask_sft = 8;
514 else if (strstr(ucontrol->id.name, "ADC 24 Mux"))
515 mask_sft = 4;
516 else if (strstr(ucontrol->id.name, "ADC 25 Mux"))
517 mask_sft = 0;
518 else
519 return -EINVAL;
520
521 rt715_sdca_index_read(rt715, RT715_VENDOR_HDA_CTL,
522 RT715_HDA_LEGACY_MUX_CTL1, &val);
523 val = (val >> mask_sft) & 0xf;
524
525 /*
526 * The first two indices of ADC Mux 24/25 are routed to the same
527 * hardware source. ie, ADC Mux 24 0/1 will both connect to MIC2.
528 * To have a unique set of inputs, we skip the index1 of the muxes.
529 */
530 if ((strstr(ucontrol->id.name, "ADC 24 Mux") ||
531 strstr(ucontrol->id.name, "ADC 25 Mux")) && val > 0)
532 val -= 1;
533 ucontrol->value.enumerated.item[0] = val;
534
535 return 0;
536 }
537
rt715_sdca_mux_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)538 static int rt715_sdca_mux_put(struct snd_kcontrol *kcontrol,
539 struct snd_ctl_elem_value *ucontrol)
540 {
541 struct snd_soc_component *component =
542 snd_soc_dapm_kcontrol_component(kcontrol);
543 struct snd_soc_dapm_context *dapm =
544 snd_soc_dapm_kcontrol_dapm(kcontrol);
545 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
546 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
547 unsigned int *item = ucontrol->value.enumerated.item;
548 unsigned int val, val2 = 0, change, mask_sft;
549
550 if (item[0] >= e->items)
551 return -EINVAL;
552
553 if (strstr(ucontrol->id.name, "ADC 22 Mux"))
554 mask_sft = 12;
555 else if (strstr(ucontrol->id.name, "ADC 23 Mux"))
556 mask_sft = 8;
557 else if (strstr(ucontrol->id.name, "ADC 24 Mux"))
558 mask_sft = 4;
559 else if (strstr(ucontrol->id.name, "ADC 25 Mux"))
560 mask_sft = 0;
561 else
562 return -EINVAL;
563
564 /* Verb ID = 0x701h, nid = e->reg */
565 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l;
566
567 rt715_sdca_index_read(rt715, RT715_VENDOR_HDA_CTL,
568 RT715_HDA_LEGACY_MUX_CTL1, &val2);
569 val2 = (val2 >> mask_sft) & 0xf;
570
571 change = val != val2;
572
573 if (change)
574 rt715_sdca_index_update_bits(rt715, RT715_VENDOR_HDA_CTL,
575 RT715_HDA_LEGACY_MUX_CTL1, 0xf << mask_sft, val << mask_sft);
576
577 snd_soc_dapm_mux_update_power(dapm, kcontrol, item[0], e, NULL);
578
579 return change;
580 }
581
582 static const char * const adc_22_23_mux_text[] = {
583 "MIC1",
584 "MIC2",
585 "LINE1",
586 "LINE2",
587 "DMIC1",
588 "DMIC2",
589 "DMIC3",
590 "DMIC4",
591 };
592
593 /*
594 * Due to mux design for nid 24 (MUX_IN3)/25 (MUX_IN4), connection index 0 and
595 * 1 will be connected to the same dmic source, therefore we skip index 1 to
596 * avoid misunderstanding on usage of dapm routing.
597 */
598 static int rt715_adc_24_25_values[] = {
599 0,
600 2,
601 3,
602 4,
603 5,
604 };
605
606 static const char * const adc_24_mux_text[] = {
607 "MIC2",
608 "DMIC1",
609 "DMIC2",
610 "DMIC3",
611 "DMIC4",
612 };
613
614 static const char * const adc_25_mux_text[] = {
615 "MIC1",
616 "DMIC1",
617 "DMIC2",
618 "DMIC3",
619 "DMIC4",
620 };
621
622 static SOC_ENUM_SINGLE_DECL(rt715_adc22_enum, SND_SOC_NOPM, 0,
623 adc_22_23_mux_text);
624
625 static SOC_ENUM_SINGLE_DECL(rt715_adc23_enum, SND_SOC_NOPM, 0,
626 adc_22_23_mux_text);
627
628 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc24_enum,
629 SND_SOC_NOPM, 0, 0xf,
630 adc_24_mux_text, rt715_adc_24_25_values);
631 static SOC_VALUE_ENUM_SINGLE_DECL(rt715_adc25_enum,
632 SND_SOC_NOPM, 0, 0xf,
633 adc_25_mux_text, rt715_adc_24_25_values);
634
635 static const struct snd_kcontrol_new rt715_adc22_mux =
636 SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
637 rt715_sdca_mux_get, rt715_sdca_mux_put);
638
639 static const struct snd_kcontrol_new rt715_adc23_mux =
640 SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
641 rt715_sdca_mux_get, rt715_sdca_mux_put);
642
643 static const struct snd_kcontrol_new rt715_adc24_mux =
644 SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
645 rt715_sdca_mux_get, rt715_sdca_mux_put);
646
647 static const struct snd_kcontrol_new rt715_adc25_mux =
648 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
649 rt715_sdca_mux_get, rt715_sdca_mux_put);
650
rt715_sdca_pde23_24_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)651 static int rt715_sdca_pde23_24_event(struct snd_soc_dapm_widget *w,
652 struct snd_kcontrol *kcontrol, int event)
653 {
654 struct snd_soc_component *component =
655 snd_soc_dapm_to_component(w->dapm);
656 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
657
658 switch (event) {
659 case SND_SOC_DAPM_POST_PMU:
660 regmap_write(rt715->regmap,
661 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CREQ_POW_EN,
662 RT715_SDCA_REQ_POW_CTRL,
663 CH_00), 0x00);
664 break;
665 case SND_SOC_DAPM_PRE_PMD:
666 regmap_write(rt715->regmap,
667 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CREQ_POW_EN,
668 RT715_SDCA_REQ_POW_CTRL,
669 CH_00), 0x03);
670 break;
671 }
672 return 0;
673 }
674
675 static const struct snd_soc_dapm_widget rt715_sdca_dapm_widgets[] = {
676 SND_SOC_DAPM_INPUT("DMIC1"),
677 SND_SOC_DAPM_INPUT("DMIC2"),
678 SND_SOC_DAPM_INPUT("DMIC3"),
679 SND_SOC_DAPM_INPUT("DMIC4"),
680 SND_SOC_DAPM_INPUT("MIC1"),
681 SND_SOC_DAPM_INPUT("MIC2"),
682 SND_SOC_DAPM_INPUT("LINE1"),
683 SND_SOC_DAPM_INPUT("LINE2"),
684
685 SND_SOC_DAPM_SUPPLY("PDE23_24", SND_SOC_NOPM, 0, 0,
686 rt715_sdca_pde23_24_event,
687 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
688
689 SND_SOC_DAPM_ADC("ADC 07", NULL, SND_SOC_NOPM, 4, 0),
690 SND_SOC_DAPM_ADC("ADC 08", NULL, SND_SOC_NOPM, 4, 0),
691 SND_SOC_DAPM_ADC("ADC 09", NULL, SND_SOC_NOPM, 4, 0),
692 SND_SOC_DAPM_ADC("ADC 27", NULL, SND_SOC_NOPM, 4, 0),
693 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
694 &rt715_adc22_mux),
695 SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
696 &rt715_adc23_mux),
697 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
698 &rt715_adc24_mux),
699 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
700 &rt715_adc25_mux),
701 SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0),
702 SND_SOC_DAPM_AIF_OUT("DP6TX", "DP6 Capture", 0, SND_SOC_NOPM, 0, 0),
703 };
704
705 static const struct snd_soc_dapm_route rt715_sdca_audio_map[] = {
706 {"DP6TX", NULL, "ADC 09"},
707 {"DP6TX", NULL, "ADC 08"},
708 {"DP4TX", NULL, "ADC 07"},
709 {"DP4TX", NULL, "ADC 27"},
710 {"DP4TX", NULL, "ADC 09"},
711 {"DP4TX", NULL, "ADC 08"},
712
713 {"LINE1", NULL, "PDE23_24"},
714 {"LINE2", NULL, "PDE23_24"},
715 {"MIC1", NULL, "PDE23_24"},
716 {"MIC2", NULL, "PDE23_24"},
717 {"DMIC1", NULL, "PDE23_24"},
718 {"DMIC2", NULL, "PDE23_24"},
719 {"DMIC3", NULL, "PDE23_24"},
720 {"DMIC4", NULL, "PDE23_24"},
721
722 {"ADC 09", NULL, "ADC 22 Mux"},
723 {"ADC 08", NULL, "ADC 23 Mux"},
724 {"ADC 07", NULL, "ADC 24 Mux"},
725 {"ADC 27", NULL, "ADC 25 Mux"},
726 {"ADC 22 Mux", "MIC1", "MIC1"},
727 {"ADC 22 Mux", "MIC2", "MIC2"},
728 {"ADC 22 Mux", "LINE1", "LINE1"},
729 {"ADC 22 Mux", "LINE2", "LINE2"},
730 {"ADC 22 Mux", "DMIC1", "DMIC1"},
731 {"ADC 22 Mux", "DMIC2", "DMIC2"},
732 {"ADC 22 Mux", "DMIC3", "DMIC3"},
733 {"ADC 22 Mux", "DMIC4", "DMIC4"},
734 {"ADC 23 Mux", "MIC1", "MIC1"},
735 {"ADC 23 Mux", "MIC2", "MIC2"},
736 {"ADC 23 Mux", "LINE1", "LINE1"},
737 {"ADC 23 Mux", "LINE2", "LINE2"},
738 {"ADC 23 Mux", "DMIC1", "DMIC1"},
739 {"ADC 23 Mux", "DMIC2", "DMIC2"},
740 {"ADC 23 Mux", "DMIC3", "DMIC3"},
741 {"ADC 23 Mux", "DMIC4", "DMIC4"},
742 {"ADC 24 Mux", "MIC2", "MIC2"},
743 {"ADC 24 Mux", "DMIC1", "DMIC1"},
744 {"ADC 24 Mux", "DMIC2", "DMIC2"},
745 {"ADC 24 Mux", "DMIC3", "DMIC3"},
746 {"ADC 24 Mux", "DMIC4", "DMIC4"},
747 {"ADC 25 Mux", "MIC1", "MIC1"},
748 {"ADC 25 Mux", "DMIC1", "DMIC1"},
749 {"ADC 25 Mux", "DMIC2", "DMIC2"},
750 {"ADC 25 Mux", "DMIC3", "DMIC3"},
751 {"ADC 25 Mux", "DMIC4", "DMIC4"},
752 };
753
rt715_sdca_probe(struct snd_soc_component * component)754 static int rt715_sdca_probe(struct snd_soc_component *component)
755 {
756 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
757 int ret;
758
759 if (!rt715->first_hw_init)
760 return 0;
761
762 ret = pm_runtime_resume(component->dev);
763 if (ret < 0 && ret != -EACCES)
764 return ret;
765
766 return 0;
767 }
768
769 static const struct snd_soc_component_driver soc_codec_dev_rt715_sdca = {
770 .probe = rt715_sdca_probe,
771 .controls = rt715_sdca_snd_controls,
772 .num_controls = ARRAY_SIZE(rt715_sdca_snd_controls),
773 .dapm_widgets = rt715_sdca_dapm_widgets,
774 .num_dapm_widgets = ARRAY_SIZE(rt715_sdca_dapm_widgets),
775 .dapm_routes = rt715_sdca_audio_map,
776 .num_dapm_routes = ARRAY_SIZE(rt715_sdca_audio_map),
777 .endianness = 1,
778 };
779
rt715_sdca_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,int direction)780 static int rt715_sdca_set_sdw_stream(struct snd_soc_dai *dai, void *sdw_stream,
781 int direction)
782 {
783 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
784
785 return 0;
786 }
787
rt715_sdca_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)788 static void rt715_sdca_shutdown(struct snd_pcm_substream *substream,
789 struct snd_soc_dai *dai)
790
791 {
792 snd_soc_dai_set_dma_data(dai, substream, NULL);
793 }
794
rt715_sdca_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)795 static int rt715_sdca_pcm_hw_params(struct snd_pcm_substream *substream,
796 struct snd_pcm_hw_params *params,
797 struct snd_soc_dai *dai)
798 {
799 struct snd_soc_component *component = dai->component;
800 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
801 struct sdw_stream_config stream_config = {0};
802 struct sdw_port_config port_config = {0};
803 struct sdw_stream_runtime *sdw_stream;
804 int retval;
805 unsigned int val;
806
807 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
808
809 if (!sdw_stream)
810 return -EINVAL;
811
812 if (!rt715->slave)
813 return -EINVAL;
814
815 snd_sdw_params_to_config(substream, params, &stream_config, &port_config);
816
817 switch (dai->id) {
818 case RT715_AIF1:
819 port_config.num = 6;
820 rt715_sdca_index_write(rt715, RT715_VENDOR_REG, RT715_SDW_INPUT_SEL,
821 0xa500);
822 break;
823 case RT715_AIF2:
824 port_config.num = 4;
825 rt715_sdca_index_write(rt715, RT715_VENDOR_REG, RT715_SDW_INPUT_SEL,
826 0xaf00);
827 break;
828 default:
829 dev_err(component->dev, "%s: Invalid DAI id %d\n", __func__, dai->id);
830 return -EINVAL;
831 }
832
833 retval = sdw_stream_add_slave(rt715->slave, &stream_config,
834 &port_config, 1, sdw_stream);
835 if (retval) {
836 dev_err(component->dev, "%s: Unable to configure port, retval:%d\n",
837 __func__, retval);
838 return retval;
839 }
840
841 switch (params_rate(params)) {
842 case 8000:
843 val = 0x1;
844 break;
845 case 11025:
846 val = 0x2;
847 break;
848 case 12000:
849 val = 0x3;
850 break;
851 case 16000:
852 val = 0x4;
853 break;
854 case 22050:
855 val = 0x5;
856 break;
857 case 24000:
858 val = 0x6;
859 break;
860 case 32000:
861 val = 0x7;
862 break;
863 case 44100:
864 val = 0x8;
865 break;
866 case 48000:
867 val = 0x9;
868 break;
869 case 88200:
870 val = 0xa;
871 break;
872 case 96000:
873 val = 0xb;
874 break;
875 case 176400:
876 val = 0xc;
877 break;
878 case 192000:
879 val = 0xd;
880 break;
881 case 384000:
882 val = 0xe;
883 break;
884 case 768000:
885 val = 0xf;
886 break;
887 default:
888 dev_err(component->dev, "%s: Unsupported sample rate %d\n",
889 __func__, params_rate(params));
890 return -EINVAL;
891 }
892
893 regmap_write(rt715->regmap,
894 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CS_FREQ_IND_EN,
895 RT715_SDCA_FREQ_IND_CTRL, CH_00), val);
896
897 return 0;
898 }
899
rt715_sdca_pcm_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)900 static int rt715_sdca_pcm_hw_free(struct snd_pcm_substream *substream,
901 struct snd_soc_dai *dai)
902 {
903 struct snd_soc_component *component = dai->component;
904 struct rt715_sdca_priv *rt715 = snd_soc_component_get_drvdata(component);
905 struct sdw_stream_runtime *sdw_stream =
906 snd_soc_dai_get_dma_data(dai, substream);
907
908 if (!rt715->slave)
909 return -EINVAL;
910
911 sdw_stream_remove_slave(rt715->slave, sdw_stream);
912 return 0;
913 }
914
915 #define RT715_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
916 #define RT715_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
917 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
918
919 static const struct snd_soc_dai_ops rt715_sdca_ops = {
920 .hw_params = rt715_sdca_pcm_hw_params,
921 .hw_free = rt715_sdca_pcm_hw_free,
922 .set_stream = rt715_sdca_set_sdw_stream,
923 .shutdown = rt715_sdca_shutdown,
924 };
925
926 static struct snd_soc_dai_driver rt715_sdca_dai[] = {
927 {
928 .name = "rt715-sdca-aif1",
929 .id = RT715_AIF1,
930 .capture = {
931 .stream_name = "DP6 Capture",
932 .channels_min = 1,
933 .channels_max = 2,
934 .rates = RT715_STEREO_RATES,
935 .formats = RT715_FORMATS,
936 },
937 .ops = &rt715_sdca_ops,
938 },
939 {
940 .name = "rt715-sdca-aif2",
941 .id = RT715_AIF2,
942 .capture = {
943 .stream_name = "DP4 Capture",
944 .channels_min = 1,
945 .channels_max = 2,
946 .rates = RT715_STEREO_RATES,
947 .formats = RT715_FORMATS,
948 },
949 .ops = &rt715_sdca_ops,
950 },
951 };
952
953 /* Bus clock frequency */
954 #define RT715_CLK_FREQ_9600000HZ 9600000
955 #define RT715_CLK_FREQ_12000000HZ 12000000
956 #define RT715_CLK_FREQ_6000000HZ 6000000
957 #define RT715_CLK_FREQ_4800000HZ 4800000
958 #define RT715_CLK_FREQ_2400000HZ 2400000
959 #define RT715_CLK_FREQ_12288000HZ 12288000
960
rt715_sdca_init(struct device * dev,struct regmap * mbq_regmap,struct regmap * regmap,struct sdw_slave * slave)961 int rt715_sdca_init(struct device *dev, struct regmap *mbq_regmap,
962 struct regmap *regmap, struct sdw_slave *slave)
963 {
964 struct rt715_sdca_priv *rt715;
965 int ret;
966
967 rt715 = devm_kzalloc(dev, sizeof(*rt715), GFP_KERNEL);
968 if (!rt715)
969 return -ENOMEM;
970
971 dev_set_drvdata(dev, rt715);
972 rt715->slave = slave;
973 rt715->regmap = regmap;
974 rt715->mbq_regmap = mbq_regmap;
975 rt715->hw_sdw_ver = slave->id.sdw_version;
976
977 regcache_cache_only(rt715->regmap, true);
978 regcache_cache_only(rt715->mbq_regmap, true);
979
980 /*
981 * Mark hw_init to false
982 * HW init will be performed when device reports present
983 */
984 rt715->hw_init = false;
985 rt715->first_hw_init = false;
986
987 ret = devm_snd_soc_register_component(dev,
988 &soc_codec_dev_rt715_sdca,
989 rt715_sdca_dai,
990 ARRAY_SIZE(rt715_sdca_dai));
991 if (ret < 0)
992 return ret;
993
994 /* set autosuspend parameters */
995 pm_runtime_set_autosuspend_delay(dev, 3000);
996 pm_runtime_use_autosuspend(dev);
997
998 /* make sure the device does not suspend immediately */
999 pm_runtime_mark_last_busy(dev);
1000
1001 pm_runtime_enable(dev);
1002
1003 /* important note: the device is NOT tagged as 'active' and will remain
1004 * 'suspended' until the hardware is enumerated/initialized. This is required
1005 * to make sure the ASoC framework use of pm_runtime_get_sync() does not silently
1006 * fail with -EACCESS because of race conditions between card creation and enumeration
1007 */
1008
1009 dev_dbg(dev, "%s\n", __func__);
1010
1011 return ret;
1012 }
1013
rt715_sdca_io_init(struct device * dev,struct sdw_slave * slave)1014 int rt715_sdca_io_init(struct device *dev, struct sdw_slave *slave)
1015 {
1016 struct rt715_sdca_priv *rt715 = dev_get_drvdata(dev);
1017 unsigned int hw_ver;
1018
1019 if (rt715->hw_init)
1020 return 0;
1021
1022 regcache_cache_only(rt715->regmap, false);
1023 regcache_cache_only(rt715->mbq_regmap, false);
1024
1025 /*
1026 * PM runtime status is marked as 'active' only when a Slave reports as Attached
1027 */
1028 if (!rt715->first_hw_init) {
1029 /* update count of parent 'active' children */
1030 pm_runtime_set_active(&slave->dev);
1031
1032 rt715->first_hw_init = true;
1033 }
1034
1035 pm_runtime_get_noresume(&slave->dev);
1036
1037 rt715_sdca_index_read(rt715, RT715_VENDOR_REG,
1038 RT715_PRODUCT_NUM, &hw_ver);
1039 hw_ver = hw_ver & 0x000f;
1040
1041 /* set clock selector = external */
1042 regmap_write(rt715->regmap,
1043 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_CX_CLK_SEL_EN,
1044 RT715_SDCA_CX_CLK_SEL_CTRL, CH_00), 0x1);
1045 /* set GPIO_4/5/6 to be 3rd/4th DMIC usage */
1046 if (hw_ver == 0x0)
1047 rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG,
1048 RT715_AD_FUNC_EN, 0x54, 0x54);
1049 else if (hw_ver == 0x1) {
1050 rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG,
1051 RT715_AD_FUNC_EN, 0x55, 0x55);
1052 rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG,
1053 RT715_REV_1, 0x40, 0x40);
1054 }
1055 /* DFLL Calibration trigger */
1056 rt715_sdca_index_update_bits(rt715, RT715_VENDOR_REG,
1057 RT715_DFLL_VAD, 0x1, 0x1);
1058 /* trigger mode = VAD enable */
1059 regmap_write(rt715->regmap,
1060 SDW_SDCA_CTL(FUN_MIC_ARRAY, RT715_SDCA_SMPU_TRIG_ST_EN,
1061 RT715_SDCA_SMPU_TRIG_EN_CTRL, CH_00), 0x2);
1062 /* SMPU-1 interrupt enable mask */
1063 regmap_update_bits(rt715->regmap, RT715_INT_MASK, 0x1, 0x1);
1064
1065 /* Mark Slave initialization complete */
1066 rt715->hw_init = true;
1067
1068 pm_runtime_mark_last_busy(&slave->dev);
1069 pm_runtime_put_autosuspend(&slave->dev);
1070
1071 return 0;
1072 }
1073
1074 MODULE_DESCRIPTION("ASoC rt715 driver SDW SDCA");
1075 MODULE_AUTHOR("Jack Yu <jack.yu@realtek.com>");
1076 MODULE_LICENSE("GPL v2");
1077