1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
6 * Copyright (C) 2012-2014 LSI Corporation
7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * NO WARRANTY
21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25 * solely responsible for determining the appropriateness of using and
26 * distributing the Program and assumes all risks associated with its
27 * exercise of rights under this Agreement, including but not limited to
28 * the risks and costs of program errors, damage to or loss of data,
29 * programs or equipment, and unavailability or interruption of operations.
30
31 * DISCLAIMER OF LIABILITY
32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39
40 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
43 * USA.
44 */
45
46 #ifndef MPT3SAS_BASE_H_INCLUDED
47 #define MPT3SAS_BASE_H_INCLUDED
48
49 #include "mpi/mpi2_type.h"
50 #include "mpi/mpi2.h"
51 #include "mpi/mpi2_ioc.h"
52 #include "mpi/mpi2_cnfg.h"
53 #include "mpi/mpi2_init.h"
54 #include "mpi/mpi2_raid.h"
55 #include "mpi/mpi2_tool.h"
56 #include "mpi/mpi2_sas.h"
57 #include "mpi/mpi2_pci.h"
58 #include "mpi/mpi2_image.h"
59
60 #include <scsi/scsi.h>
61 #include <scsi/scsi_cmnd.h>
62 #include <scsi/scsi_device.h>
63 #include <scsi/scsi_host.h>
64 #include <scsi/scsi_tcq.h>
65 #include <scsi/scsi_transport_sas.h>
66 #include <scsi/scsi_dbg.h>
67 #include <scsi/scsi_eh.h>
68 #include <linux/pci.h>
69 #include <linux/poll.h>
70 #include <linux/irq_poll.h>
71
72 #include "mpt3sas_debug.h"
73 #include "mpt3sas_trigger_diag.h"
74 #include "mpt3sas_trigger_pages.h"
75
76 /* driver versioning info */
77 #define MPT3SAS_DRIVER_NAME "mpt3sas"
78 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
79 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
80 #define MPT3SAS_DRIVER_VERSION "54.100.00.00"
81 #define MPT3SAS_MAJOR_VERSION 54
82 #define MPT3SAS_MINOR_VERSION 100
83 #define MPT3SAS_BUILD_VERSION 00
84 #define MPT3SAS_RELEASE_VERSION 00
85
86 #define MPT2SAS_DRIVER_NAME "mpt2sas"
87 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
88 #define MPT2SAS_DRIVER_VERSION "20.102.00.00"
89 #define MPT2SAS_MAJOR_VERSION 20
90 #define MPT2SAS_MINOR_VERSION 102
91 #define MPT2SAS_BUILD_VERSION 0
92 #define MPT2SAS_RELEASE_VERSION 00
93
94 /* CoreDump: Default timeout */
95 #define MPT3SAS_DEFAULT_COREDUMP_TIMEOUT_SECONDS (15) /*15 seconds*/
96 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF)
97 #define MPT3SAS_TIMESYNC_TIMEOUT_SECONDS (10) /* 10 seconds */
98 #define MPT3SAS_TIMESYNC_UPDATE_INTERVAL (900) /* 15 minutes */
99 #define MPT3SAS_TIMESYNC_UNIT_MASK (0x80) /* bit 7 */
100 #define MPT3SAS_TIMESYNC_MASK (0x7F) /* 0 - 6 bits */
101 #define SECONDS_PER_MIN (60)
102 #define SECONDS_PER_HOUR (3600)
103 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF)
104 #define MPI26_SET_IOC_PARAMETER_SYNC_TIMESTAMP (0x81)
105
106 /*
107 * Set MPT3SAS_SG_DEPTH value based on user input.
108 */
109 #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE
110 #define MPT_MIN_PHYS_SEGMENTS 16
111 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32
112
113 #define MCPU_MAX_CHAINS_PER_IO 3
114
115 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
116 #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE
117 #else
118 #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
119 #endif
120
121 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
122 #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE
123 #else
124 #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
125 #endif
126
127 /*
128 * Generic Defines
129 */
130 #define MPT3SAS_SATA_QUEUE_DEPTH 32
131 #define MPT3SAS_SAS_QUEUE_DEPTH 254
132 #define MPT3SAS_RAID_QUEUE_DEPTH 128
133 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200
134
135 #define MPT3SAS_RAID_MAX_SECTORS 8192
136 #define MPT3SAS_HOST_PAGE_SIZE_4K 12
137 #define MPT3SAS_NVME_QUEUE_DEPTH 128
138 #define MPT_NAME_LENGTH 32 /* generic length of strings */
139 #define MPT_STRING_LENGTH 64
140 #define MPI_FRAME_START_OFFSET 256
141 #define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/
142
143 #define MPT_MAX_CALLBACKS 32
144
145 #define MPT_MAX_HBA_NUM_PHYS 32
146
147 #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */
148 /* reserved for issuing internally framed scsi io cmds */
149 #define INTERNAL_SCSIIO_CMDS_COUNT 3
150 #define INTERNAL_SCSIIO_FOR_DISCOVERY 2
151
152 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/
153
154 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
155
156 #define MAX_CHAIN_ELEMT_SZ 16
157 #define DEFAULT_NUM_FWCHAIN_ELEMTS 8
158
159 #define IO_UNIT_CONTROL_SHUTDOWN_TIMEOUT 6
160 #define FW_IMG_HDR_READ_TIMEOUT 15
161
162 #define IOC_OPERATIONAL_WAIT_COUNT 10
163
164 /*
165 * NVMe defines
166 */
167 #define NVME_PRP_SIZE 8 /* PRP size */
168 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
169 #define NVME_TASK_ABORT_MIN_TIMEOUT 6
170 #define NVME_TASK_ABORT_MAX_TIMEOUT 60
171 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010)
172 #define NVME_PRP_PAGE_SIZE 4096 /* Page size */
173
174 struct mpt3sas_nvme_cmd {
175 u8 rsvd[24];
176 __le64 prp1;
177 __le64 prp2;
178 };
179
180 /*
181 * logging format
182 */
183 #define ioc_err(ioc, fmt, ...) \
184 pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
185 #define ioc_notice(ioc, fmt, ...) \
186 pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
187 #define ioc_warn(ioc, fmt, ...) \
188 pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
189 #define ioc_info(ioc, fmt, ...) \
190 pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
191
192 /*
193 * WarpDrive Specific Log codes
194 */
195
196 #define MPT2_WARPDRIVE_LOGENTRY (0x8002)
197 #define MPT2_WARPDRIVE_LC_SSDT (0x41)
198 #define MPT2_WARPDRIVE_LC_SSDLW (0x43)
199 #define MPT2_WARPDRIVE_LC_SSDLF (0x44)
200 #define MPT2_WARPDRIVE_LC_BRMF (0x4D)
201
202 /*
203 * per target private data
204 */
205 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
206 #define MPT_TARGET_FLAGS_VOLUME 0x02
207 #define MPT_TARGET_FLAGS_DELETED 0x04
208 #define MPT_TARGET_FASTPATH_IO 0x08
209 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10
210
211 #define SAS2_PCI_DEVICE_B0_REVISION (0x01)
212 #define SAS3_PCI_DEVICE_C0_REVISION (0x02)
213
214 /* Atlas PCIe Switch Management Port */
215 #define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2)
216
217 /*
218 * Intel HBA branding
219 */
220 #define MPT2SAS_INTEL_RMS25JB080_BRANDING \
221 "Intel(R) Integrated RAID Module RMS25JB080"
222 #define MPT2SAS_INTEL_RMS25JB040_BRANDING \
223 "Intel(R) Integrated RAID Module RMS25JB040"
224 #define MPT2SAS_INTEL_RMS25KB080_BRANDING \
225 "Intel(R) Integrated RAID Module RMS25KB080"
226 #define MPT2SAS_INTEL_RMS25KB040_BRANDING \
227 "Intel(R) Integrated RAID Module RMS25KB040"
228 #define MPT2SAS_INTEL_RMS25LB040_BRANDING \
229 "Intel(R) Integrated RAID Module RMS25LB040"
230 #define MPT2SAS_INTEL_RMS25LB080_BRANDING \
231 "Intel(R) Integrated RAID Module RMS25LB080"
232 #define MPT2SAS_INTEL_RMS2LL080_BRANDING \
233 "Intel Integrated RAID Module RMS2LL080"
234 #define MPT2SAS_INTEL_RMS2LL040_BRANDING \
235 "Intel Integrated RAID Module RMS2LL040"
236 #define MPT2SAS_INTEL_RS25GB008_BRANDING \
237 "Intel(R) RAID Controller RS25GB008"
238 #define MPT2SAS_INTEL_SSD910_BRANDING \
239 "Intel(R) SSD 910 Series"
240
241 #define MPT3SAS_INTEL_RMS3JC080_BRANDING \
242 "Intel(R) Integrated RAID Module RMS3JC080"
243 #define MPT3SAS_INTEL_RS3GC008_BRANDING \
244 "Intel(R) RAID Controller RS3GC008"
245 #define MPT3SAS_INTEL_RS3FC044_BRANDING \
246 "Intel(R) RAID Controller RS3FC044"
247 #define MPT3SAS_INTEL_RS3UC080_BRANDING \
248 "Intel(R) RAID Controller RS3UC080"
249
250 /*
251 * Intel HBA SSDIDs
252 */
253 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516
254 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517
255 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518
256 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519
257 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A
258 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B
259 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E
260 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F
261 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000
262 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700
263
264 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521
265 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522
266 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523
267 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524
268
269 /*
270 * Dell HBA branding
271 */
272 #define MPT2SAS_DELL_BRANDING_SIZE 32
273
274 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA"
275 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter"
276 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
277 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular"
278 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded"
279 #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200"
280 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS"
281
282 #define MPT3SAS_DELL_12G_HBA_BRANDING \
283 "Dell 12Gbps HBA"
284
285 /*
286 * Dell HBA SSDIDs
287 */
288 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C
289 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D
290 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
291 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F
292 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20
293 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21
294 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22
295
296 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46
297
298 /*
299 * Cisco HBA branding
300 */
301 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \
302 "Cisco 9300-8E 12G SAS HBA"
303 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \
304 "Cisco 9300-8i 12G SAS HBA"
305 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \
306 "Cisco 12G Modular SAS Pass through Controller"
307 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \
308 "UCS C3X60 12G SAS Pass through Controller"
309 /*
310 * Cisco HBA SSSDIDs
311 */
312 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C
313 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154
314 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155
315 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156
316
317 /*
318 * status bits for ioc->diag_buffer_status
319 */
320 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
321 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
322 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
323 #define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED (0x08)
324 #define MPT3_DIAG_BUFFER_IS_APP_OWNED (0x10)
325
326 /*
327 * HP HBA branding
328 */
329 #define MPT2SAS_HP_3PAR_SSVID 0x1590
330
331 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \
332 "HP H220 Host Bus Adapter"
333 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \
334 "HP H221 Host Bus Adapter"
335 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \
336 "HP H222 Host Bus Adapter"
337 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \
338 "HP H220i Host Bus Adapter"
339 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \
340 "HP H210i Host Bus Adapter"
341
342 /*
343 * HO HBA SSDIDs
344 */
345 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041
346 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042
347 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043
348 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044
349 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046
350
351 /*
352 * Combined Reply Queue constants,
353 * There are twelve Supplemental Reply Post Host Index Registers
354 * and each register is at offset 0x10 bytes from the previous one.
355 */
356 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
357 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12
358 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16
359 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
360 #define MPT3_MIN_IRQS 1
361
362 /* OEM Identifiers */
363 #define MFG10_OEM_ID_INVALID (0x00000000)
364 #define MFG10_OEM_ID_DELL (0x00000001)
365 #define MFG10_OEM_ID_FSC (0x00000002)
366 #define MFG10_OEM_ID_SUN (0x00000003)
367 #define MFG10_OEM_ID_IBM (0x00000004)
368
369 /* GENERIC Flags 0*/
370 #define MFG10_GF0_OCE_DISABLED (0x00000001)
371 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
372 #define MFG10_GF0_R10_DISPLAY (0x00000004)
373 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
374 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
375
376 #define VIRTUAL_IO_FAILED_RETRY (0x32010081)
377
378 /* High IOPs definitions */
379 #define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH 8
380 #define MPT3SAS_HIGH_IOPS_REPLY_QUEUES 8
381 #define MPT3SAS_HIGH_IOPS_BATCH_COUNT 16
382 #define MPT3SAS_GEN35_MAX_MSIX_QUEUES 128
383 #define RDPQ_MAX_INDEX_IN_ONE_CHUNK 16
384
385 /* OEM Specific Flags will come from OEM specific header files */
386 struct Mpi2ManufacturingPage10_t {
387 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
388 U8 OEMIdentifier; /* 04h */
389 U8 Reserved1; /* 05h */
390 U16 Reserved2; /* 08h */
391 U32 Reserved3; /* 0Ch */
392 U32 GenericFlags0; /* 10h */
393 U32 GenericFlags1; /* 14h */
394 U32 Reserved4; /* 18h */
395 U32 OEMSpecificFlags0; /* 1Ch */
396 U32 OEMSpecificFlags1; /* 20h */
397 U32 Reserved5[18]; /* 24h - 60h*/
398 };
399
400
401 /* Miscellaneous options */
402 struct Mpi2ManufacturingPage11_t {
403 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
404 __le32 Reserved1; /* 04h */
405 u8 Reserved2; /* 08h */
406 u8 EEDPTagMode; /* 09h */
407 u8 Reserved3; /* 0Ah */
408 u8 Reserved4; /* 0Bh */
409 __le32 Reserved5[8]; /* 0Ch-2Ch */
410 u16 AddlFlags2; /* 2Ch */
411 u8 AddlFlags3; /* 2Eh */
412 u8 Reserved6; /* 2Fh */
413 __le32 Reserved7[7]; /* 30h - 4Bh */
414 u8 NVMeAbortTO; /* 4Ch */
415 u8 NumPerDevEvents; /* 4Dh */
416 u8 HostTraceBufferDecrementSizeKB; /* 4Eh */
417 u8 HostTraceBufferFlags; /* 4Fh */
418 u16 HostTraceBufferMaxSizeKB; /* 50h */
419 u16 HostTraceBufferMinSizeKB; /* 52h */
420 u8 CoreDumpTOSec; /* 54h */
421 u8 TimeSyncInterval; /* 55h */
422 u16 Reserved9; /* 56h */
423 __le32 Reserved10; /* 58h */
424 };
425
426 /**
427 * struct MPT3SAS_TARGET - starget private hostdata
428 * @starget: starget object
429 * @sas_address: target sas address
430 * @raid_device: raid_device pointer to access volume data
431 * @handle: device handle
432 * @num_luns: number luns
433 * @flags: MPT_TARGET_FLAGS_XXX flags
434 * @deleted: target flaged for deletion
435 * @tm_busy: target is busy with TM request.
436 * @port: hba port entry containing target's port number info
437 * @sas_dev: The sas_device associated with this target
438 * @pcie_dev: The pcie device associated with this target
439 */
440 struct MPT3SAS_TARGET {
441 struct scsi_target *starget;
442 u64 sas_address;
443 struct _raid_device *raid_device;
444 u16 handle;
445 int num_luns;
446 u32 flags;
447 u8 deleted;
448 u8 tm_busy;
449 struct hba_port *port;
450 struct _sas_device *sas_dev;
451 struct _pcie_device *pcie_dev;
452 };
453
454
455 /*
456 * per device private data
457 */
458 #define MPT_DEVICE_FLAGS_INIT 0x01
459
460 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
461 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
462 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
463 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02)
464
465 /**
466 * struct MPT3SAS_DEVICE - sdev private hostdata
467 * @sas_target: starget private hostdata
468 * @lun: lun number
469 * @flags: MPT_DEVICE_XXX flags
470 * @configured_lun: lun is configured
471 * @block: device is in SDEV_BLOCK state
472 * @tlr_snoop_check: flag used in determining whether to disable TLR
473 * @eedp_enable: eedp support enable bit
474 * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
475 * @eedp_block_length: block size
476 * @ata_command_pending: SATL passthrough outstanding for device
477 */
478 struct MPT3SAS_DEVICE {
479 struct MPT3SAS_TARGET *sas_target;
480 unsigned int lun;
481 u32 flags;
482 u8 configured_lun;
483 u8 block;
484 u8 deleted;
485 u8 tlr_snoop_check;
486 u8 ignore_delay_remove;
487 /* Iopriority Command Handling */
488 u8 ncq_prio_enable;
489 /*
490 * Bug workaround for SATL handling: the mpt2/3sas firmware
491 * doesn't return BUSY or TASK_SET_FULL for subsequent
492 * commands while a SATL pass through is in operation as the
493 * spec requires, it simply does nothing with them until the
494 * pass through completes, causing them possibly to timeout if
495 * the passthrough is a long executing command (like format or
496 * secure erase). This variable allows us to do the right
497 * thing while a SATL command is pending.
498 */
499 unsigned long ata_command_pending;
500
501 };
502
503 #define MPT3_CMD_NOT_USED 0x8000 /* free */
504 #define MPT3_CMD_COMPLETE 0x0001 /* completed */
505 #define MPT3_CMD_PENDING 0x0002 /* pending */
506 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */
507 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */
508 #define MPT3_CMD_COMPLETE_ASYNC 0x0010 /* tells whether cmd completes in same thread or not */
509
510 /**
511 * struct _internal_cmd - internal commands struct
512 * @mutex: mutex
513 * @done: completion
514 * @reply: reply message pointer
515 * @sense: sense data
516 * @status: MPT3_CMD_XXX status
517 * @smid: system message id
518 */
519 struct _internal_cmd {
520 struct mutex mutex;
521 struct completion done;
522 void *reply;
523 void *sense;
524 u16 status;
525 u16 smid;
526 };
527
528
529
530 /**
531 * struct _sas_device - attached device information
532 * @list: sas device list
533 * @starget: starget object
534 * @sas_address: device sas address
535 * @device_name: retrieved from the SAS IDENTIFY frame.
536 * @handle: device handle
537 * @sas_address_parent: sas address of parent expander or sas host
538 * @enclosure_handle: enclosure handle
539 * @enclosure_logical_id: enclosure logical identifier
540 * @volume_handle: volume handle (valid when hidden raid member)
541 * @volume_wwid: volume unique identifier
542 * @device_info: bitfield provides detailed info about the device
543 * @id: target id
544 * @channel: target channel
545 * @slot: number number
546 * @phy: phy identifier provided in sas device page 0
547 * @responding: used in _scsih_sas_device_mark_responding
548 * @fast_path: fast path feature enable bit
549 * @pfa_led_on: flag for PFA LED status
550 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
551 * addition routine.
552 * @chassis_slot: chassis slot
553 * @is_chassis_slot_valid: chassis slot valid or not
554 * @port: hba port entry containing device's port number info
555 * @rphy: device's sas_rphy address used to identify this device structure in
556 * target_alloc callback function
557 */
558 struct _sas_device {
559 struct list_head list;
560 struct scsi_target *starget;
561 u64 sas_address;
562 u64 device_name;
563 u16 handle;
564 u64 sas_address_parent;
565 u16 enclosure_handle;
566 u64 enclosure_logical_id;
567 u16 volume_handle;
568 u64 volume_wwid;
569 u32 device_info;
570 int id;
571 int channel;
572 u16 slot;
573 u8 phy;
574 u8 responding;
575 u8 fast_path;
576 u8 pfa_led_on;
577 u8 pend_sas_rphy_add;
578 u8 enclosure_level;
579 u8 chassis_slot;
580 u8 is_chassis_slot_valid;
581 u8 connector_name[5];
582 u8 ssd_device;
583 struct kref refcount;
584
585 u8 port_type;
586 struct hba_port *port;
587 struct sas_rphy *rphy;
588 };
589
sas_device_get(struct _sas_device * s)590 static inline void sas_device_get(struct _sas_device *s)
591 {
592 kref_get(&s->refcount);
593 }
594
sas_device_free(struct kref * r)595 static inline void sas_device_free(struct kref *r)
596 {
597 kfree(container_of(r, struct _sas_device, refcount));
598 }
599
sas_device_put(struct _sas_device * s)600 static inline void sas_device_put(struct _sas_device *s)
601 {
602 kref_put(&s->refcount, sas_device_free);
603 }
604
605 /*
606 * struct _pcie_device - attached PCIe device information
607 * @list: pcie device list
608 * @starget: starget object
609 * @wwid: device WWID
610 * @handle: device handle
611 * @device_info: bitfield provides detailed info about the device
612 * @id: target id
613 * @channel: target channel
614 * @slot: slot number
615 * @port_num: port number
616 * @responding: used in _scsih_pcie_device_mark_responding
617 * @fast_path: fast path feature enable bit
618 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
619 * NVMe device only
620 * @enclosure_handle: enclosure handle
621 * @enclosure_logical_id: enclosure logical identifier
622 * @enclosure_level: The level of device's enclosure from the controller
623 * @connector_name: ASCII value of the Connector's name
624 * @serial_number: pointer of serial number string allocated runtime
625 * @access_status: Device's Access Status
626 * @shutdown_latency: NVMe device's RTD3 Entry Latency
627 * @refcount: reference count for deletion
628 */
629 struct _pcie_device {
630 struct list_head list;
631 struct scsi_target *starget;
632 u64 wwid;
633 u16 handle;
634 u32 device_info;
635 int id;
636 int channel;
637 u16 slot;
638 u8 port_num;
639 u8 responding;
640 u8 fast_path;
641 u32 nvme_mdts;
642 u16 enclosure_handle;
643 u64 enclosure_logical_id;
644 u8 enclosure_level;
645 u8 connector_name[4];
646 u8 *serial_number;
647 u8 reset_timeout;
648 u8 access_status;
649 u16 shutdown_latency;
650 struct kref refcount;
651 };
652 /**
653 * pcie_device_get - Increment the pcie device reference count
654 *
655 * @p: pcie_device object
656 *
657 * When ever this function called it will increment the
658 * reference count of the pcie device for which this function called.
659 *
660 */
pcie_device_get(struct _pcie_device * p)661 static inline void pcie_device_get(struct _pcie_device *p)
662 {
663 kref_get(&p->refcount);
664 }
665
666 /**
667 * pcie_device_free - Release the pcie device object
668 * @r - kref object
669 *
670 * Free's the pcie device object. It will be called when reference count
671 * reaches to zero.
672 */
pcie_device_free(struct kref * r)673 static inline void pcie_device_free(struct kref *r)
674 {
675 kfree(container_of(r, struct _pcie_device, refcount));
676 }
677
678 /**
679 * pcie_device_put - Decrement the pcie device reference count
680 *
681 * @p: pcie_device object
682 *
683 * When ever this function called it will decrement the
684 * reference count of the pcie device for which this function called.
685 *
686 * When refernce count reaches to Zero, this will call pcie_device_free to the
687 * pcie_device object.
688 */
pcie_device_put(struct _pcie_device * p)689 static inline void pcie_device_put(struct _pcie_device *p)
690 {
691 kref_put(&p->refcount, pcie_device_free);
692 }
693 /**
694 * struct _raid_device - raid volume link list
695 * @list: sas device list
696 * @starget: starget object
697 * @sdev: scsi device struct (volumes are single lun)
698 * @wwid: unique identifier for the volume
699 * @handle: device handle
700 * @block_size: Block size of the volume
701 * @id: target id
702 * @channel: target channel
703 * @volume_type: the raid level
704 * @device_info: bitfield provides detailed info about the hidden components
705 * @num_pds: number of hidden raid components
706 * @responding: used in _scsih_raid_device_mark_responding
707 * @percent_complete: resync percent complete
708 * @direct_io_enabled: Whether direct io to PDs are allowed or not
709 * @stripe_exponent: X where 2powX is the stripe sz in blocks
710 * @block_exponent: X where 2powX is the block sz in bytes
711 * @max_lba: Maximum number of LBA in the volume
712 * @stripe_sz: Stripe Size of the volume
713 * @device_info: Device info of the volume member disk
714 * @pd_handle: Array of handles of the physical drives for direct I/O in le16
715 */
716 #define MPT_MAX_WARPDRIVE_PDS 8
717 struct _raid_device {
718 struct list_head list;
719 struct scsi_target *starget;
720 struct scsi_device *sdev;
721 u64 wwid;
722 u16 handle;
723 u16 block_sz;
724 int id;
725 int channel;
726 u8 volume_type;
727 u8 num_pds;
728 u8 responding;
729 u8 percent_complete;
730 u8 direct_io_enabled;
731 u8 stripe_exponent;
732 u8 block_exponent;
733 u64 max_lba;
734 u32 stripe_sz;
735 u32 device_info;
736 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS];
737 };
738
739 /**
740 * struct _boot_device - boot device info
741 *
742 * @channel: sas, raid, or pcie channel
743 * @device: holds pointer for struct _sas_device, struct _raid_device or
744 * struct _pcie_device
745 */
746 struct _boot_device {
747 int channel;
748 void *device;
749 };
750
751 /**
752 * struct _sas_port - wide/narrow sas port information
753 * @port_list: list of ports belonging to expander
754 * @num_phys: number of phys belonging to this port
755 * @remote_identify: attached device identification
756 * @rphy: sas transport rphy object
757 * @port: sas transport wide/narrow port object
758 * @hba_port: hba port entry containing port's port number info
759 * @phy_list: _sas_phy list objects belonging to this port
760 */
761 struct _sas_port {
762 struct list_head port_list;
763 u8 num_phys;
764 struct sas_identify remote_identify;
765 struct sas_rphy *rphy;
766 struct sas_port *port;
767 struct hba_port *hba_port;
768 struct list_head phy_list;
769 };
770
771 /**
772 * struct _sas_phy - phy information
773 * @port_siblings: list of phys belonging to a port
774 * @identify: phy identification
775 * @remote_identify: attached device identification
776 * @phy: sas transport phy object
777 * @phy_id: unique phy id
778 * @handle: device handle for this phy
779 * @attached_handle: device handle for attached device
780 * @phy_belongs_to_port: port has been created for this phy
781 * @port: hba port entry containing port number info
782 */
783 struct _sas_phy {
784 struct list_head port_siblings;
785 struct sas_identify identify;
786 struct sas_identify remote_identify;
787 struct sas_phy *phy;
788 u8 phy_id;
789 u16 handle;
790 u16 attached_handle;
791 u8 phy_belongs_to_port;
792 u8 hba_vphy;
793 struct hba_port *port;
794 };
795
796 /**
797 * struct _sas_node - sas_host/expander information
798 * @list: list of expanders
799 * @parent_dev: parent device class
800 * @num_phys: number phys belonging to this sas_host/expander
801 * @sas_address: sas address of this sas_host/expander
802 * @handle: handle for this sas_host/expander
803 * @sas_address_parent: sas address of parent expander or sas host
804 * @enclosure_handle: handle for this a member of an enclosure
805 * @device_info: bitwise defining capabilities of this sas_host/expander
806 * @responding: used in _scsih_expander_device_mark_responding
807 * @nr_phys_allocated: Allocated memory for this many count phys
808 * @phy: a list of phys that make up this sas_host/expander
809 * @sas_port_list: list of ports attached to this sas_host/expander
810 * @port: hba port entry containing node's port number info
811 * @rphy: sas_rphy object of this expander
812 */
813 struct _sas_node {
814 struct list_head list;
815 struct device *parent_dev;
816 u8 num_phys;
817 u64 sas_address;
818 u16 handle;
819 u64 sas_address_parent;
820 u16 enclosure_handle;
821 u64 enclosure_logical_id;
822 u8 responding;
823 u8 nr_phys_allocated;
824 struct hba_port *port;
825 struct _sas_phy *phy;
826 struct list_head sas_port_list;
827 struct sas_rphy *rphy;
828 };
829
830 /**
831 * struct _enclosure_node - enclosure information
832 * @list: list of enclosures
833 * @pg0: enclosure pg0;
834 */
835 struct _enclosure_node {
836 struct list_head list;
837 Mpi2SasEnclosurePage0_t pg0;
838 };
839
840 /**
841 * enum reset_type - reset state
842 * @FORCE_BIG_HAMMER: issue diagnostic reset
843 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
844 */
845 enum reset_type {
846 FORCE_BIG_HAMMER,
847 SOFT_RESET,
848 };
849
850 /**
851 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
852 * @pcie_sgl: PCIe native SGL for NVMe devices
853 * @pcie_sgl_dma: physical address
854 */
855 struct pcie_sg_list {
856 void *pcie_sgl;
857 dma_addr_t pcie_sgl_dma;
858 };
859
860 /**
861 * struct chain_tracker - firmware chain tracker
862 * @chain_buffer: chain buffer
863 * @chain_buffer_dma: physical address
864 * @tracker_list: list of free request (ioc->free_chain_list)
865 */
866 struct chain_tracker {
867 void *chain_buffer;
868 dma_addr_t chain_buffer_dma;
869 };
870
871 struct chain_lookup {
872 struct chain_tracker *chains_per_smid;
873 atomic_t chain_offset;
874 };
875
876 /**
877 * struct scsiio_tracker - scsi mf request tracker
878 * @smid: system message id
879 * @cb_idx: callback index
880 * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
881 * @chain_list: list of associated firmware chain tracker
882 * @msix_io: IO's msix
883 */
884 struct scsiio_tracker {
885 u16 smid;
886 struct scsi_cmnd *scmd;
887 u8 cb_idx;
888 u8 direct_io;
889 struct pcie_sg_list pcie_sg_list;
890 struct list_head chain_list;
891 u16 msix_io;
892 };
893
894 /**
895 * struct request_tracker - firmware request tracker
896 * @smid: system message id
897 * @cb_idx: callback index
898 * @tracker_list: list of free request (ioc->free_list)
899 */
900 struct request_tracker {
901 u16 smid;
902 u8 cb_idx;
903 struct list_head tracker_list;
904 };
905
906 /**
907 * struct _tr_list - target reset list
908 * @handle: device handle
909 * @state: state machine
910 */
911 struct _tr_list {
912 struct list_head list;
913 u16 handle;
914 u16 state;
915 };
916
917 /**
918 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
919 * @handle: device handle
920 */
921 struct _sc_list {
922 struct list_head list;
923 u16 handle;
924 };
925
926 /**
927 * struct _event_ack_list - delayed event acknowledgment list
928 * @Event: Event ID
929 * @EventContext: used to track the event uniquely
930 */
931 struct _event_ack_list {
932 struct list_head list;
933 U16 Event;
934 U32 EventContext;
935 };
936
937 /**
938 * struct adapter_reply_queue - the reply queue struct
939 * @ioc: per adapter object
940 * @msix_index: msix index into vector table
941 * @vector: irq vector
942 * @reply_post_host_index: head index in the pool where FW completes IO
943 * @reply_post_free: reply post base virt address
944 * @name: the name registered to request_irq()
945 * @busy: isr is actively processing replies on another cpu
946 * @os_irq: irq number
947 * @irqpoll: irq_poll object
948 * @irq_poll_scheduled: Tells whether irq poll is scheduled or not
949 * @is_iouring_poll_q: Tells whether reply queues is assigned
950 * to io uring poll queues or not
951 * @list: this list
952 */
953 struct adapter_reply_queue {
954 struct MPT3SAS_ADAPTER *ioc;
955 u8 msix_index;
956 u32 reply_post_host_index;
957 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
958 char name[MPT_NAME_LENGTH];
959 atomic_t busy;
960 u32 os_irq;
961 struct irq_poll irqpoll;
962 bool irq_poll_scheduled;
963 bool irq_line_enable;
964 bool is_iouring_poll_q;
965 struct list_head list;
966 };
967
968 /**
969 * struct io_uring_poll_queue - the io uring poll queue structure
970 * @busy: Tells whether io uring poll queue is busy or not
971 * @pause: Tells whether IOs are paused on io uring poll queue or not
972 * @reply_q: reply queue mapped for io uring poll queue
973 */
974 struct io_uring_poll_queue {
975 atomic_t busy;
976 atomic_t pause;
977 struct adapter_reply_queue *reply_q;
978 };
979
980 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
981
982 /* SAS3.0 support */
983 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
984 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
985 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
986 dma_addr_t data_out_dma, size_t data_out_sz,
987 dma_addr_t data_in_dma, size_t data_in_sz);
988 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
989 void *paddr);
990
991 /* SAS3.5 support */
992 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
993 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
994 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
995 size_t data_in_sz);
996
997 /* To support atomic and non atomic descriptors*/
998 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
999 u16 funcdep);
1000 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
1001 typedef u32 (*BASE_READ_REG) (const void __iomem *addr);
1002 /*
1003 * To get high iops reply queue's msix index when high iops mode is enabled
1004 * else get the msix index of general reply queues.
1005 */
1006 typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc,
1007 struct scsi_cmnd *scmd);
1008
1009 /* IOC Facts and Port Facts converted from little endian to cpu */
1010 union mpi3_version_union {
1011 MPI2_VERSION_STRUCT Struct;
1012 u32 Word;
1013 };
1014
1015 struct mpt3sas_facts {
1016 u16 MsgVersion;
1017 u16 HeaderVersion;
1018 u8 IOCNumber;
1019 u8 VP_ID;
1020 u8 VF_ID;
1021 u16 IOCExceptions;
1022 u16 IOCStatus;
1023 u32 IOCLogInfo;
1024 u8 MaxChainDepth;
1025 u8 WhoInit;
1026 u8 NumberOfPorts;
1027 u8 MaxMSIxVectors;
1028 u16 RequestCredit;
1029 u16 ProductID;
1030 u32 IOCCapabilities;
1031 union mpi3_version_union FWVersion;
1032 u16 IOCRequestFrameSize;
1033 u16 IOCMaxChainSegmentSize;
1034 u16 MaxInitiators;
1035 u16 MaxTargets;
1036 u16 MaxSasExpanders;
1037 u16 MaxEnclosures;
1038 u16 ProtocolFlags;
1039 u16 HighPriorityCredit;
1040 u16 MaxReplyDescriptorPostQueueDepth;
1041 u8 ReplyFrameSize;
1042 u8 MaxVolumes;
1043 u16 MaxDevHandle;
1044 u16 MaxPersistentEntries;
1045 u16 MinDevHandle;
1046 u8 CurrentHostPageSize;
1047 };
1048
1049 struct mpt3sas_port_facts {
1050 u8 PortNumber;
1051 u8 VP_ID;
1052 u8 VF_ID;
1053 u8 PortType;
1054 u16 MaxPostedCmdBuffers;
1055 };
1056
1057 struct reply_post_struct {
1058 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
1059 dma_addr_t reply_post_free_dma;
1060 };
1061
1062 /**
1063 * struct virtual_phy - vSES phy structure
1064 * sas_address: SAS Address of vSES device
1065 * phy_mask: vSES device's phy number
1066 * flags: flags used to manage this structure
1067 */
1068 struct virtual_phy {
1069 struct list_head list;
1070 u64 sas_address;
1071 u32 phy_mask;
1072 u8 flags;
1073 };
1074
1075 #define MPT_VPHY_FLAG_DIRTY_PHY 0x01
1076
1077 /**
1078 * struct hba_port - Saves each HBA's Wide/Narrow port info
1079 * @sas_address: sas address of this wide/narrow port's attached device
1080 * @phy_mask: HBA PHY's belonging to this port
1081 * @port_id: port number
1082 * @flags: hba port flags
1083 * @vphys_mask : mask of vSES devices Phy number
1084 * @vphys_list : list containing vSES device structures
1085 */
1086 struct hba_port {
1087 struct list_head list;
1088 u64 sas_address;
1089 u32 phy_mask;
1090 u8 port_id;
1091 u8 flags;
1092 u32 vphys_mask;
1093 struct list_head vphys_list;
1094 };
1095
1096 /* hba port flags */
1097 #define HBA_PORT_FLAG_DIRTY_PORT 0x01
1098 #define HBA_PORT_FLAG_NEW_PORT 0x02
1099
1100 #define MULTIPATH_DISABLED_PORT_ID 0xFF
1101
1102 /**
1103 * struct htb_rel_query - diagnostic buffer release reason
1104 * @unique_id - unique id associated with this buffer.
1105 * @buffer_rel_condition - Release condition ioctl/sysfs/reset
1106 * @reserved
1107 * @trigger_type - Master/Event/scsi/MPI
1108 * @trigger_info_dwords - Data Correspondig to trigger type
1109 */
1110 struct htb_rel_query {
1111 u16 buffer_rel_condition;
1112 u16 reserved;
1113 u32 trigger_type;
1114 u32 trigger_info_dwords[2];
1115 };
1116
1117 /* Buffer_rel_condition bit fields */
1118
1119 /* Bit 0 - Diag Buffer not Released */
1120 #define MPT3_DIAG_BUFFER_NOT_RELEASED (0x00)
1121 /* Bit 0 - Diag Buffer Released */
1122 #define MPT3_DIAG_BUFFER_RELEASED (0x01)
1123
1124 /*
1125 * Bit 1 - Diag Buffer Released by IOCTL,
1126 * This bit is valid only if Bit 0 is one
1127 */
1128 #define MPT3_DIAG_BUFFER_REL_IOCTL (0x02 | MPT3_DIAG_BUFFER_RELEASED)
1129
1130 /*
1131 * Bit 2 - Diag Buffer Released by Trigger,
1132 * This bit is valid only if Bit 0 is one
1133 */
1134 #define MPT3_DIAG_BUFFER_REL_TRIGGER (0x04 | MPT3_DIAG_BUFFER_RELEASED)
1135
1136 /*
1137 * Bit 3 - Diag Buffer Released by SysFs,
1138 * This bit is valid only if Bit 0 is one
1139 */
1140 #define MPT3_DIAG_BUFFER_REL_SYSFS (0x08 | MPT3_DIAG_BUFFER_RELEASED)
1141
1142 /* DIAG RESET Master trigger flags */
1143 #define MPT_DIAG_RESET_ISSUED_BY_DRIVER 0x00000000
1144 #define MPT_DIAG_RESET_ISSUED_BY_USER 0x00000001
1145
1146 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
1147 /**
1148 * struct MPT3SAS_ADAPTER - per adapter struct
1149 * @list: ioc_list
1150 * @shost: shost object
1151 * @id: unique adapter id
1152 * @cpu_count: number online cpus
1153 * @name: generic ioc string
1154 * @tmp_string: tmp string used for logging
1155 * @pdev: pci pdev object
1156 * @pio_chip: physical io register space
1157 * @chip: memory mapped register space
1158 * @chip_phys: physical addrss prior to mapping
1159 * @logging_level: see mpt3sas_debug.h
1160 * @fwfault_debug: debuging FW timeouts
1161 * @ir_firmware: IR firmware present
1162 * @bars: bitmask of BAR's that must be configured
1163 * @mask_interrupts: ignore interrupt
1164 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
1165 * pci resource handling
1166 * @fault_reset_work_q: fw fault workqueue
1167 * @fault_reset_work: fw fault work
1168 * @firmware_event_thread: fw event work queue
1169 * @fw_event_lock:
1170 * @fw_event_list: list of fw events
1171 * @current_evet: current processing firmware event
1172 * @fw_event_cleanup: set to one while cleaning up the fw events
1173 * @aen_event_read_flag: event log was read
1174 * @broadcast_aen_busy: broadcast aen waiting to be serviced
1175 * @shost_recovery: host reset in progress
1176 * @ioc_reset_in_progress_lock:
1177 * @ioc_link_reset_in_progress: phy/hard reset in progress
1178 * @ignore_loginfos: ignore loginfos during task management
1179 * @remove_host: flag for when driver unloads, to avoid sending dev resets
1180 * @pci_error_recovery: flag to prevent ioc access until slot reset completes
1181 * @wait_for_discovery_to_complete: flag set at driver load time when
1182 * waiting on reporting devices
1183 * @is_driver_loading: flag set at driver load time
1184 * @port_enable_failed: flag set when port enable has failed
1185 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
1186 * @start_scan_failed: means port enable failed, return's the ioc_status
1187 * @msix_enable: flag indicating msix is enabled
1188 * @msix_vector_count: number msix vectors
1189 * @cpu_msix_table: table for mapping cpus to msix index
1190 * @cpu_msix_table_sz: table size
1191 * @total_io_cnt: Gives total IO count, used to load balance the interrupts
1192 * @ioc_coredump_loop: will have non-zero value when FW is in CoreDump state
1193 * @timestamp_update_count: Counter to fire timeSync command
1194 * time_sync_interval: Time sync interval read from man page 11
1195 * @high_iops_outstanding: used to load balance the interrupts
1196 * within high iops reply queues
1197 * @msix_load_balance: Enables load balancing of interrupts across
1198 * the multiple MSIXs
1199 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
1200 * @thresh_hold: Max number of reply descriptors processed
1201 * before updating Host Index
1202 * @iopoll_q_start_index: starting index of io uring poll queues
1203 * in reply queue list
1204 * @drv_internal_flags: Bit map internal to driver
1205 * @drv_support_bitmap: driver's supported feature bit map
1206 * @use_32bit_dma: Flag to use 32 bit consistent dma mask
1207 * @scsi_io_cb_idx: shost generated commands
1208 * @tm_cb_idx: task management commands
1209 * @scsih_cb_idx: scsih internal commands
1210 * @transport_cb_idx: transport internal commands
1211 * @ctl_cb_idx: clt internal commands
1212 * @base_cb_idx: base internal commands
1213 * @config_cb_idx: base internal commands
1214 * @tm_tr_cb_idx : device removal target reset handshake
1215 * @tm_tr_volume_cb_idx : volume removal target reset
1216 * @base_cmds:
1217 * @transport_cmds:
1218 * @scsih_cmds:
1219 * @tm_cmds:
1220 * @ctl_cmds:
1221 * @config_cmds:
1222 * @base_add_sg_single: handler for either 32/64 bit sgl's
1223 * @event_type: bits indicating which events to log
1224 * @event_context: unique id for each logged event
1225 * @event_log: event log pointer
1226 * @event_masks: events that are masked
1227 * @max_shutdown_latency: timeout value for NVMe shutdown operation,
1228 * which is equal that NVMe drive's RTD3 Entry Latency
1229 * which has reported maximum RTD3 Entry Latency value
1230 * among attached NVMe drives.
1231 * @facts: static facts data
1232 * @prev_fw_facts: previous fw facts data
1233 * @pfacts: static port facts data
1234 * @manu_pg0: static manufacturing page 0
1235 * @manu_pg10: static manufacturing page 10
1236 * @manu_pg11: static manufacturing page 11
1237 * @bios_pg2: static bios page 2
1238 * @bios_pg3: static bios page 3
1239 * @ioc_pg8: static ioc page 8
1240 * @iounit_pg0: static iounit page 0
1241 * @iounit_pg1: static iounit page 1
1242 * @sas_hba: sas host object
1243 * @sas_expander_list: expander object list
1244 * @enclosure_list: enclosure object list
1245 * @sas_node_lock:
1246 * @sas_device_list: sas device object list
1247 * @sas_device_init_list: sas device object list (used only at init time)
1248 * @sas_device_lock:
1249 * @pcie_device_list: pcie device object list
1250 * @pcie_device_init_list: pcie device object list (used only at init time)
1251 * @pcie_device_lock:
1252 * @io_missing_delay: time for IO completed by fw when PDR enabled
1253 * @device_missing_delay: time for device missing by fw when PDR enabled
1254 * @sas_id : used for setting volume target IDs
1255 * @pcie_target_id: used for setting pcie target IDs
1256 * @blocking_handles: bitmask used to identify which devices need blocking
1257 * @pd_handles : bitmask for PD handles
1258 * @pd_handles_sz : size of pd_handle bitmask
1259 * @config_page_sz: config page size
1260 * @config_page: reserve memory for config page payload
1261 * @config_page_dma:
1262 * @hba_queue_depth: hba request queue depth
1263 * @sge_size: sg element size for either 32/64 bit
1264 * @scsiio_depth: SCSI_IO queue depth
1265 * @request_sz: per request frame size
1266 * @request: pool of request frames
1267 * @request_dma:
1268 * @request_dma_sz:
1269 * @scsi_lookup: firmware request tracker list
1270 * @scsi_lookup_lock:
1271 * @free_list: free list of request
1272 * @pending_io_count:
1273 * @reset_wq:
1274 * @chain: pool of chains
1275 * @chain_dma:
1276 * @max_sges_in_main_message: number sg elements in main message
1277 * @max_sges_in_chain_message: number sg elements per chain
1278 * @chains_needed_per_io: max chains per io
1279 * @chain_depth: total chains allocated
1280 * @chain_segment_sz: gives the max number of
1281 * SGEs accommodate on single chain buffer
1282 * @hi_priority_smid:
1283 * @hi_priority:
1284 * @hi_priority_dma:
1285 * @hi_priority_depth:
1286 * @hpr_lookup:
1287 * @hpr_free_list:
1288 * @internal_smid:
1289 * @internal:
1290 * @internal_dma:
1291 * @internal_depth:
1292 * @internal_lookup:
1293 * @internal_free_list:
1294 * @sense: pool of sense
1295 * @sense_dma:
1296 * @sense_dma_pool:
1297 * @reply_depth: hba reply queue depth:
1298 * @reply_sz: per reply frame size:
1299 * @reply: pool of replys:
1300 * @reply_dma:
1301 * @reply_dma_pool:
1302 * @reply_free_queue_depth: reply free depth
1303 * @reply_free: pool for reply free queue (32 bit addr)
1304 * @reply_free_dma:
1305 * @reply_free_dma_pool:
1306 * @reply_free_host_index: tail index in pool to insert free replys
1307 * @reply_post_queue_depth: reply post queue depth
1308 * @reply_post_struct: struct for reply_post_free physical & virt address
1309 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1310 * @rdpq_array_enable: rdpq_array support is enabled in the driver
1311 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1312 * is assigned only ones
1313 * @reply_queue_count: number of reply queue's
1314 * @reply_queue_list: link list contaning the reply queue info
1315 * @msix96_vector: 96 MSI-X vector support
1316 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
1317 * @delayed_tr_list: target reset link list
1318 * @delayed_tr_volume_list: volume target reset link list
1319 * @delayed_sc_list:
1320 * @delayed_event_ack_list:
1321 * @temp_sensors_count: flag to carry the number of temperature sensors
1322 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1323 * pci resource handling. PCI resource freeing will lead to free
1324 * vital hardware/memory resource, which might be in use by cli/sysfs
1325 * path functions resulting in Null pointer reference followed by kernel
1326 * crash. To avoid the above race condition we use mutex syncrhonization
1327 * which ensures the syncrhonization between cli/sysfs_show path.
1328 * @atomic_desc_capable: Atomic Request Descriptor support.
1329 * @GET_MSIX_INDEX: Get the msix index of high iops queues.
1330 * @multipath_on_hba: flag to determine multipath on hba is enabled or not
1331 * @port_table_list: list containing HBA's wide/narrow port's info
1332 */
1333 struct MPT3SAS_ADAPTER {
1334 struct list_head list;
1335 struct Scsi_Host *shost;
1336 u8 id;
1337 int cpu_count;
1338 char name[MPT_NAME_LENGTH];
1339 char driver_name[MPT_NAME_LENGTH - 8];
1340 char tmp_string[MPT_STRING_LENGTH];
1341 struct pci_dev *pdev;
1342 Mpi2SystemInterfaceRegs_t __iomem *chip;
1343 phys_addr_t chip_phys;
1344 int logging_level;
1345 int fwfault_debug;
1346 u8 ir_firmware;
1347 int bars;
1348 u8 mask_interrupts;
1349
1350 /* fw fault handler */
1351 struct workqueue_struct *fault_reset_work_q;
1352 struct delayed_work fault_reset_work;
1353
1354 /* fw event handler */
1355 struct workqueue_struct *firmware_event_thread;
1356 spinlock_t fw_event_lock;
1357 struct list_head fw_event_list;
1358 struct fw_event_work *current_event;
1359 u8 fw_events_cleanup;
1360
1361 /* misc flags */
1362 int aen_event_read_flag;
1363 u8 broadcast_aen_busy;
1364 u16 broadcast_aen_pending;
1365 u8 shost_recovery;
1366 u8 got_task_abort_from_ioctl;
1367
1368 struct mutex reset_in_progress_mutex;
1369 struct mutex hostdiag_unlock_mutex;
1370 spinlock_t ioc_reset_in_progress_lock;
1371 u8 ioc_link_reset_in_progress;
1372
1373 u8 ignore_loginfos;
1374 u8 remove_host;
1375 u8 pci_error_recovery;
1376 u8 wait_for_discovery_to_complete;
1377 u8 is_driver_loading;
1378 u8 port_enable_failed;
1379 u8 start_scan;
1380 u16 start_scan_failed;
1381
1382 u8 msix_enable;
1383 u16 msix_vector_count;
1384 u8 *cpu_msix_table;
1385 u16 cpu_msix_table_sz;
1386 resource_size_t __iomem **reply_post_host_index;
1387 u32 ioc_reset_count;
1388 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1389 u32 non_operational_loop;
1390 u8 ioc_coredump_loop;
1391 u32 timestamp_update_count;
1392 u32 time_sync_interval;
1393 atomic64_t total_io_cnt;
1394 atomic64_t high_iops_outstanding;
1395 bool msix_load_balance;
1396 u16 thresh_hold;
1397 u8 high_iops_queues;
1398 u8 iopoll_q_start_index;
1399 u32 drv_internal_flags;
1400 u32 drv_support_bitmap;
1401 u32 dma_mask;
1402 bool enable_sdev_max_qd;
1403 bool use_32bit_dma;
1404 struct io_uring_poll_queue *io_uring_poll_queues;
1405
1406 /* internal commands, callback index */
1407 u8 scsi_io_cb_idx;
1408 u8 tm_cb_idx;
1409 u8 transport_cb_idx;
1410 u8 scsih_cb_idx;
1411 u8 ctl_cb_idx;
1412 u8 base_cb_idx;
1413 u8 port_enable_cb_idx;
1414 u8 config_cb_idx;
1415 u8 tm_tr_cb_idx;
1416 u8 tm_tr_volume_cb_idx;
1417 u8 tm_sas_control_cb_idx;
1418 struct _internal_cmd base_cmds;
1419 struct _internal_cmd port_enable_cmds;
1420 struct _internal_cmd transport_cmds;
1421 struct _internal_cmd scsih_cmds;
1422 struct _internal_cmd tm_cmds;
1423 struct _internal_cmd ctl_cmds;
1424 struct _internal_cmd config_cmds;
1425
1426 MPT_ADD_SGE base_add_sg_single;
1427
1428 /* function ptr for either IEEE or MPI sg elements */
1429 MPT_BUILD_SG_SCMD build_sg_scmd;
1430 MPT_BUILD_SG build_sg;
1431 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1432 u16 sge_size_ieee;
1433 u16 hba_mpi_version_belonged;
1434
1435 /* function ptr for MPI sg elements only */
1436 MPT_BUILD_SG build_sg_mpi;
1437 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1438
1439 /* function ptr for NVMe PRP elements only */
1440 NVME_BUILD_PRP build_nvme_prp;
1441
1442 /* event log */
1443 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1444 u32 event_context;
1445 void *event_log;
1446 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1447
1448 u8 tm_custom_handling;
1449 u8 nvme_abort_timeout;
1450 u16 max_shutdown_latency;
1451 u16 max_wideport_qd;
1452 u16 max_narrowport_qd;
1453 u16 max_nvme_qd;
1454 u8 max_sata_qd;
1455
1456 /* static config pages */
1457 struct mpt3sas_facts facts;
1458 struct mpt3sas_facts prev_fw_facts;
1459 struct mpt3sas_port_facts *pfacts;
1460 Mpi2ManufacturingPage0_t manu_pg0;
1461 struct Mpi2ManufacturingPage10_t manu_pg10;
1462 struct Mpi2ManufacturingPage11_t manu_pg11;
1463 Mpi2BiosPage2_t bios_pg2;
1464 Mpi2BiosPage3_t bios_pg3;
1465 Mpi2IOCPage8_t ioc_pg8;
1466 Mpi2IOUnitPage0_t iounit_pg0;
1467 Mpi2IOUnitPage1_t iounit_pg1;
1468 Mpi2IOCPage1_t ioc_pg1_copy;
1469
1470 struct _boot_device req_boot_device;
1471 struct _boot_device req_alt_boot_device;
1472 struct _boot_device current_boot_device;
1473
1474 /* sas hba, expander, and device list */
1475 struct _sas_node sas_hba;
1476 struct list_head sas_expander_list;
1477 struct list_head enclosure_list;
1478 spinlock_t sas_node_lock;
1479 struct list_head sas_device_list;
1480 struct list_head sas_device_init_list;
1481 spinlock_t sas_device_lock;
1482 struct list_head pcie_device_list;
1483 struct list_head pcie_device_init_list;
1484 spinlock_t pcie_device_lock;
1485
1486 struct list_head raid_device_list;
1487 spinlock_t raid_device_lock;
1488 u8 io_missing_delay;
1489 u16 device_missing_delay;
1490 int sas_id;
1491 int pcie_target_id;
1492
1493 void *blocking_handles;
1494 void *pd_handles;
1495 u16 pd_handles_sz;
1496
1497 void *pend_os_device_add;
1498 u16 pend_os_device_add_sz;
1499
1500 /* config page */
1501 u16 config_page_sz;
1502 void *config_page;
1503 dma_addr_t config_page_dma;
1504 void *config_vaddr;
1505
1506 /* scsiio request */
1507 u16 hba_queue_depth;
1508 u16 sge_size;
1509 u16 scsiio_depth;
1510 u16 request_sz;
1511 u8 *request;
1512 dma_addr_t request_dma;
1513 u32 request_dma_sz;
1514 struct pcie_sg_list *pcie_sg_lookup;
1515 spinlock_t scsi_lookup_lock;
1516 int pending_io_count;
1517 wait_queue_head_t reset_wq;
1518 u16 *io_queue_num;
1519
1520 /* PCIe SGL */
1521 struct dma_pool *pcie_sgl_dma_pool;
1522 /* Host Page Size */
1523 u32 page_size;
1524
1525 /* chain */
1526 struct chain_lookup *chain_lookup;
1527 struct list_head free_chain_list;
1528 struct dma_pool *chain_dma_pool;
1529 ulong chain_pages;
1530 u16 max_sges_in_main_message;
1531 u16 max_sges_in_chain_message;
1532 u16 chains_needed_per_io;
1533 u32 chain_depth;
1534 u16 chain_segment_sz;
1535 u16 chains_per_prp_buffer;
1536
1537 /* hi-priority queue */
1538 u16 hi_priority_smid;
1539 u8 *hi_priority;
1540 dma_addr_t hi_priority_dma;
1541 u16 hi_priority_depth;
1542 struct request_tracker *hpr_lookup;
1543 struct list_head hpr_free_list;
1544
1545 /* internal queue */
1546 u16 internal_smid;
1547 u8 *internal;
1548 dma_addr_t internal_dma;
1549 u16 internal_depth;
1550 struct request_tracker *internal_lookup;
1551 struct list_head internal_free_list;
1552
1553 /* sense */
1554 u8 *sense;
1555 dma_addr_t sense_dma;
1556 struct dma_pool *sense_dma_pool;
1557
1558 /* reply */
1559 u16 reply_sz;
1560 u8 *reply;
1561 dma_addr_t reply_dma;
1562 u32 reply_dma_max_address;
1563 u32 reply_dma_min_address;
1564 struct dma_pool *reply_dma_pool;
1565
1566 /* reply free queue */
1567 u16 reply_free_queue_depth;
1568 __le32 *reply_free;
1569 dma_addr_t reply_free_dma;
1570 struct dma_pool *reply_free_dma_pool;
1571 u32 reply_free_host_index;
1572
1573 /* reply post queue */
1574 u16 reply_post_queue_depth;
1575 struct reply_post_struct *reply_post;
1576 u8 rdpq_array_capable;
1577 u8 rdpq_array_enable;
1578 u8 rdpq_array_enable_assigned;
1579 struct dma_pool *reply_post_free_dma_pool;
1580 struct dma_pool *reply_post_free_array_dma_pool;
1581 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1582 dma_addr_t reply_post_free_array_dma;
1583 u8 reply_queue_count;
1584 struct list_head reply_queue_list;
1585
1586 u8 combined_reply_queue;
1587 u8 combined_reply_index_count;
1588 u8 smp_affinity_enable;
1589 /* reply post register index */
1590 resource_size_t __iomem **replyPostRegisterIndex;
1591
1592 struct list_head delayed_tr_list;
1593 struct list_head delayed_tr_volume_list;
1594 struct list_head delayed_sc_list;
1595 struct list_head delayed_event_ack_list;
1596 u8 temp_sensors_count;
1597 struct mutex pci_access_mutex;
1598
1599 /* diag buffer support */
1600 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1601 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1602 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1603 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1604 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1605 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1606 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1607 u32 ring_buffer_offset;
1608 u32 ring_buffer_sz;
1609 struct htb_rel_query htb_rel;
1610 u8 reset_from_user;
1611 u8 is_warpdrive;
1612 u8 is_mcpu_endpoint;
1613 u8 hide_ir_msg;
1614 u8 mfg_pg10_hide_flag;
1615 u8 hide_drives;
1616 spinlock_t diag_trigger_lock;
1617 u8 diag_trigger_active;
1618 u8 atomic_desc_capable;
1619 BASE_READ_REG base_readl;
1620 BASE_READ_REG base_readl_ext_retry;
1621 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1622 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1623 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1624 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1625 u8 supports_trigger_pages;
1626 void *device_remove_in_progress;
1627 u16 device_remove_in_progress_sz;
1628 u8 is_gen35_ioc;
1629 u8 is_aero_ioc;
1630 struct dentry *debugfs_root;
1631 struct dentry *ioc_dump;
1632 PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1633 PUT_SMID_IO_FP_HIP put_smid_fast_path;
1634 PUT_SMID_IO_FP_HIP put_smid_hi_priority;
1635 PUT_SMID_DEFAULT put_smid_default;
1636 GET_MSIX_INDEX get_msix_index_for_smlio;
1637
1638 u8 multipath_on_hba;
1639 struct list_head port_table_list;
1640 };
1641
1642 struct mpt3sas_debugfs_buffer {
1643 void *buf;
1644 u32 len;
1645 };
1646
1647 #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001
1648 #define MPT_DRV_SUPPORT_BITMAP_ADDNLQUERY 0x00000002
1649
1650 #define MPT_DRV_INTERNAL_FIRST_PE_ISSUED 0x00000001
1651
1652 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1653 u32 reply);
1654
1655 /*
1656 * struct ATTO_SAS_NVRAM - ATTO NVRAM settings stored
1657 * in Manufacturing page 1 used to get
1658 * ATTO SasAddr.
1659 */
1660 struct ATTO_SAS_NVRAM {
1661 u8 Signature[4];
1662 u8 Version;
1663 #define ATTO_SASNVR_VERSION 0
1664
1665 u8 Checksum;
1666 #define ATTO_SASNVR_CKSUM_SEED 0x5A
1667 u8 Pad[10];
1668 u8 SasAddr[8];
1669 #define ATTO_SAS_ADDR_ALIGN 64
1670 u8 Reserved[232];
1671 };
1672
1673 #define ATTO_SAS_ADDR_DEVNAME_BIAS 63
1674
1675 union ATTO_SAS_ADDRESS {
1676 U8 b[8];
1677 U16 w[4];
1678 U32 d[2];
1679 U64 q;
1680 };
1681
1682 /* base shared API */
1683 extern struct list_head mpt3sas_ioc_list;
1684 extern char driver_name[MPT_NAME_LENGTH];
1685 /* spinlock on list operations over IOCs
1686 * Case: when multiple warpdrive cards(IOCs) are in use
1687 * Each IOC will added to the ioc list structure on initialization.
1688 * Watchdog threads run at regular intervals to check IOC for any
1689 * fault conditions which will trigger the dead_ioc thread to
1690 * deallocate pci resource, resulting deleting the IOC netry from list,
1691 * this deletion need to protected by spinlock to enusre that
1692 * ioc removal is syncrhonized, if not synchronized it might lead to
1693 * list_del corruption as the ioc list is traversed in cli path.
1694 */
1695 extern spinlock_t gioc_lock;
1696
1697 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1698 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1699
1700 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1701 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1702 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1703 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1704 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1705 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1706 enum reset_type type);
1707
1708 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1709 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1710 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1711 u16 smid);
1712 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1713 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1714 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc, u8 poll);
1715 void mpt3sas_base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc);
1716 void mpt3sas_base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc);
1717
1718 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1719 u16 handle);
1720 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1721 u16 msix_task);
1722 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1723 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1724 /* hi-priority queue */
1725 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1726 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1727 struct scsi_cmnd *scmd);
1728 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1729 struct scsiio_tracker *st);
1730
1731 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1732 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1733 void mpt3sas_base_initialize_callback_handler(void);
1734 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1735 void mpt3sas_base_release_callback_handler(u8 cb_idx);
1736
1737 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1738 u32 reply);
1739 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1740 u8 msix_index, u32 reply);
1741 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1742 u32 phys_addr);
1743
1744 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1745
1746 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1747 #define mpt3sas_print_fault_code(ioc, fault_code) \
1748 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1749 mpt3sas_base_fault_info(ioc, fault_code); } while (0)
1750
1751 void mpt3sas_base_coredump_info(struct MPT3SAS_ADAPTER *ioc, u16 fault_code);
1752 #define mpt3sas_print_coredump_info(ioc, fault_code) \
1753 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1754 mpt3sas_base_coredump_info(ioc, fault_code); } while (0)
1755
1756 int mpt3sas_base_wait_for_coredump_completion(struct MPT3SAS_ADAPTER *ioc,
1757 const char *caller);
1758 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1759 Mpi2SasIoUnitControlReply_t *mpi_reply,
1760 Mpi2SasIoUnitControlRequest_t *mpi_request);
1761 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1762 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1763
1764 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1765 u32 *event_type);
1766
1767 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1768
1769 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1770 u16 device_missing_delay, u8 io_missing_delay);
1771
1772 int mpt3sas_base_check_for_fault_and_issue_reset(
1773 struct MPT3SAS_ADAPTER *ioc);
1774
1775 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1776
1777 void
1778 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1779
1780 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1781 u8 status, void *mpi_request, int sz);
1782 #define mpt3sas_check_cmd_timeout(ioc, status, mpi_request, sz, issue_reset) \
1783 do { ioc_err(ioc, "In func: %s\n", __func__); \
1784 issue_reset = mpt3sas_base_check_cmd_timeout(ioc, \
1785 status, mpi_request, sz); } while (0)
1786
1787 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
1788 int mpt3sas_base_make_ioc_ready(struct MPT3SAS_ADAPTER *ioc, enum reset_type type);
1789 void mpt3sas_base_free_irq(struct MPT3SAS_ADAPTER *ioc);
1790 void mpt3sas_base_disable_msix(struct MPT3SAS_ADAPTER *ioc);
1791 int mpt3sas_blk_mq_poll(struct Scsi_Host *shost, unsigned int queue_num);
1792 void mpt3sas_base_pause_mq_polling(struct MPT3SAS_ADAPTER *ioc);
1793 void mpt3sas_base_resume_mq_polling(struct MPT3SAS_ADAPTER *ioc);
1794 int mpt3sas_base_unlock_and_get_host_diagnostic(struct MPT3SAS_ADAPTER *ioc,
1795 u32 *host_diagnostic);
1796 void mpt3sas_base_lock_host_diagnostic(struct MPT3SAS_ADAPTER *ioc);
1797
1798 /* scsih shared API */
1799 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1800 u16 smid);
1801 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1802 u32 reply);
1803 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1804 void mpt3sas_scsih_clear_outstanding_scsi_tm_commands(
1805 struct MPT3SAS_ADAPTER *ioc);
1806 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1807
1808 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1809 uint channel, uint id, u64 lun, u8 type, u16 smid_task,
1810 u16 msix_task, u8 timeout, u8 tr_method);
1811 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1812 uint channel, uint id, u64 lun, u8 type, u16 smid_task,
1813 u16 msix_task, u8 timeout, u8 tr_method);
1814
1815 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1816 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1817 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1818 struct hba_port *port);
1819 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1820 u64 sas_address, struct hba_port *port);
1821 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1822 u16 smid);
1823 struct hba_port *
1824 mpt3sas_get_port_by_id(struct MPT3SAS_ADAPTER *ioc, u8 port,
1825 u8 bypass_dirty_port_flag);
1826
1827 struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1828 struct MPT3SAS_ADAPTER *ioc, u16 handle);
1829 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1830 struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1831 struct hba_port *port);
1832 struct _sas_device *mpt3sas_get_sdev_by_addr(
1833 struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1834 struct hba_port *port);
1835 struct _sas_device *__mpt3sas_get_sdev_by_addr(
1836 struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1837 struct hba_port *port);
1838 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1839 u16 handle);
1840 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1841 u16 handle);
1842
1843 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1844 struct _raid_device *
1845 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1846 void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
1847 struct _sas_device *
1848 __mpt3sas_get_sdev_by_rphy(struct MPT3SAS_ADAPTER *ioc, struct sas_rphy *rphy);
1849 struct virtual_phy *
1850 mpt3sas_get_vphy_by_phy(struct MPT3SAS_ADAPTER *ioc,
1851 struct hba_port *port, u32 phy);
1852
1853 /* config shared API */
1854 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1855 u32 reply);
1856 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1857 u8 *num_phys);
1858 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1859 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1860 int mpt3sas_config_get_manufacturing_pg1(struct MPT3SAS_ADAPTER *ioc,
1861 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage1_t *config_page);
1862
1863 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1864 Mpi2ConfigReply_t *mpi_reply,
1865 struct Mpi2ManufacturingPage10_t *config_page);
1866
1867 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1868 Mpi2ConfigReply_t *mpi_reply,
1869 struct Mpi2ManufacturingPage11_t *config_page);
1870 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1871 Mpi2ConfigReply_t *mpi_reply,
1872 struct Mpi2ManufacturingPage11_t *config_page);
1873
1874 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1875 *mpi_reply, Mpi2BiosPage2_t *config_page);
1876 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1877 *mpi_reply, Mpi2BiosPage3_t *config_page);
1878 int mpt3sas_config_set_bios_pg4(struct MPT3SAS_ADAPTER *ioc,
1879 Mpi2ConfigReply_t *mpi_reply, Mpi2BiosPage4_t *config_page,
1880 int sz_config_page);
1881 int mpt3sas_config_get_bios_pg4(struct MPT3SAS_ADAPTER *ioc,
1882 Mpi2ConfigReply_t *mpi_reply, Mpi2BiosPage4_t *config_page,
1883 int sz_config_page);
1884 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1885 *mpi_reply, Mpi2IOUnitPage0_t *config_page);
1886 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1887 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1888 u32 form, u32 handle);
1889 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1890 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1891 u32 form, u32 handle);
1892 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1893 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1894 u32 form, u32 handle);
1895 int mpt3sas_config_get_pcie_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1896 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeIOUnitPage1_t *config_page,
1897 u16 sz);
1898 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1899 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1900 u16 sz);
1901 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1902 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1903 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1904 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1905 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1906 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1907 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1908 *mpi_reply, Mpi2IOUnitPage8_t *config_page);
1909 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1910 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1911 u16 sz);
1912 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1913 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1914 u16 sz);
1915 int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1916 *mpi_reply, Mpi2IOCPage1_t *config_page);
1917 int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1918 *mpi_reply, Mpi2IOCPage1_t *config_page);
1919 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1920 *mpi_reply, Mpi2IOCPage8_t *config_page);
1921 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1922 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1923 u32 form, u32 handle);
1924 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1925 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1926 u32 phy_number, u16 handle);
1927 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1928 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1929 u32 form, u32 handle);
1930 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1931 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1932 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1933 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1934 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1935 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1936 u32 handle);
1937 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1938 u8 *num_pds);
1939 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1940 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1941 u32 handle, u16 sz);
1942 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1943 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1944 u32 form, u32 form_specific);
1945 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1946 u16 *volume_handle);
1947 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1948 u16 volume_handle, u64 *wwid);
1949 int
1950 mpt3sas_config_get_driver_trigger_pg0(struct MPT3SAS_ADAPTER *ioc,
1951 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage0_t *config_page);
1952 int
1953 mpt3sas_config_get_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc,
1954 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage1_t *config_page);
1955 int
1956 mpt3sas_config_get_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc,
1957 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage2_t *config_page);
1958 int
1959 mpt3sas_config_get_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc,
1960 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage3_t *config_page);
1961 int
1962 mpt3sas_config_get_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc,
1963 Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage4_t *config_page);
1964 int
1965 mpt3sas_config_update_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc,
1966 struct SL_WH_MASTER_TRIGGER_T *master_tg, bool set);
1967 int
1968 mpt3sas_config_update_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc,
1969 struct SL_WH_EVENT_TRIGGERS_T *event_tg, bool set);
1970 int
1971 mpt3sas_config_update_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc,
1972 struct SL_WH_SCSI_TRIGGERS_T *scsi_tg, bool set);
1973 int
1974 mpt3sas_config_update_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc,
1975 struct SL_WH_MPI_TRIGGERS_T *mpi_tg, bool set);
1976
1977 /* ctl shared API */
1978 extern const struct attribute_group *mpt3sas_host_groups[];
1979 extern const struct attribute_group *mpt3sas_dev_groups[];
1980 void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1981 void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1982 void mpt3sas_ctl_release(struct MPT3SAS_ADAPTER *ioc);
1983 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1984 u32 reply);
1985 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1986 void mpt3sas_ctl_clear_outstanding_ioctls(struct MPT3SAS_ADAPTER *ioc);
1987 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1988 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1989 u8 msix_index, u32 reply);
1990 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1991 Mpi2EventNotificationReply_t *mpi_reply);
1992
1993 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1994 u8 bits_to_register);
1995 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1996 u8 *issue_reset);
1997
1998 /* transport shared API */
1999 extern struct scsi_transport_template *mpt3sas_transport_template;
2000 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
2001 u32 reply);
2002 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
2003 u16 handle, u64 sas_address, struct hba_port *port);
2004 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
2005 u64 sas_address_parent, struct hba_port *port);
2006 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
2007 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
2008 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
2009 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
2010 struct device *parent_dev);
2011 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
2012 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate,
2013 struct hba_port *port);
2014 extern struct sas_function_template mpt3sas_transport_functions;
2015 extern struct scsi_transport_template *mpt3sas_transport_template;
2016 void
2017 mpt3sas_transport_del_phy_from_an_existing_port(struct MPT3SAS_ADAPTER *ioc,
2018 struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy);
2019 void
2020 mpt3sas_transport_add_phy_to_an_existing_port(struct MPT3SAS_ADAPTER *ioc,
2021 struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy,
2022 u64 sas_address, struct hba_port *port);
2023 /* trigger data externs */
2024 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
2025 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
2026 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
2027 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
2028 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
2029 u32 trigger_bitmask);
2030 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
2031 u16 log_entry_qualifier);
2032 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
2033 u8 asc, u8 ascq);
2034 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
2035 u32 loginfo);
2036
2037 /* warpdrive APIs */
2038 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
2039 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
2040 struct _raid_device *raid_device);
2041 void
2042 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
2043 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
2044
2045 void mpt3sas_setup_debugfs(struct MPT3SAS_ADAPTER *ioc);
2046 void mpt3sas_destroy_debugfs(struct MPT3SAS_ADAPTER *ioc);
2047 void mpt3sas_init_debugfs(void);
2048 void mpt3sas_exit_debugfs(void);
2049
2050 /**
2051 * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device
2052 * @device_info: bitfield providing information about the device.
2053 * Context: none
2054 *
2055 * Returns 1 if scsi device.
2056 */
2057 static inline int
mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)2058 mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)
2059 {
2060 if ((device_info &
2061 MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI)
2062 return 1;
2063 else
2064 return 0;
2065 }
2066 #endif /* MPT3SAS_BASE_H_INCLUDED */
2067