| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn201/ |
| H A D | irq_service_dcn201.c | 125 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
139 #define hpd_int_entry(reg_num)\ argument
148 #define hpd_rx_int_entry(reg_num)\ argument
156 #define pflip_int_entry(reg_num)\ argument
164 #define vupdate_int_entry(reg_num)\ argument
175 #define vupdate_no_lock_int_entry(reg_num)\ argument
182 #define vblank_int_entry(reg_num)\ argument
190 #define vline0_int_entry(reg_num)\ argument
203 #define i2c_int_entry(reg_num) \ argument
206 #define dp_sink_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn401/ |
| H A D | irq_service_dcn401.c | 172 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
200 #define hpd_int_entry(reg_num)\ argument
209 #define hpd_rx_int_entry(reg_num)\ argument
217 #define pflip_int_entry(reg_num)\ argument
225 #define vblank_int_entry(reg_num)\ argument
235 #define vupdate_no_lock_int_entry(reg_num)\ argument
243 #define vline0_int_entry(reg_num)\ argument
250 #define vline1_int_entry(reg_num)\ argument
257 #define vline2_int_entry(reg_num)\ argument
277 #define i2c_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn32/ |
| H A D | irq_service_dcn32.c | 192 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
220 #define hpd_int_entry(reg_num)\ argument
229 #define hpd_rx_int_entry(reg_num)\ argument
237 #define pflip_int_entry(reg_num)\ argument
245 #define vblank_int_entry(reg_num)\ argument
255 #define vupdate_no_lock_int_entry(reg_num)\ argument
263 #define vline0_int_entry(reg_num)\ argument
270 #define vline1_int_entry(reg_num)\ argument
277 #define vline2_int_entry(reg_num)\ argument
297 #define i2c_int_entry(reg_num) \ argument
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| /linux/arch/sparc/kernel/ |
| H A D | pcr.c | 55 static u64 direct_pcr_read(unsigned long reg_num) in direct_pcr_read()
64 static void direct_pcr_write(unsigned long reg_num, u64 val) in direct_pcr_write()
70 static u64 direct_pic_read(unsigned long reg_num) in direct_pic_read()
79 static void direct_pic_write(unsigned long reg_num, u64 val) in direct_pic_write()
111 static void n2_pcr_write(unsigned long reg_num, u64 val) in n2_pcr_write()
144 static u64 n4_pcr_read(unsigned long reg_num) in n4_pcr_read()
153 static void n4_pcr_write(unsigned long reg_num, u64 val) in n4_pcr_write()
158 static u64 n4_pic_read(unsigned long reg_num) in n4_pic_read()
169 static void n4_pic_write(unsigned long reg_num, u64 val) in n4_pic_write()
195 static u64 n5_pcr_read(unsigned long reg_num) in n5_pcr_read()
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dce80/ |
| H A D | irq_service_dce80.c | 65 #define hpd_int_entry(reg_num)\ argument
80 #define hpd_rx_int_entry(reg_num)\ argument
94 #define pflip_int_entry(reg_num)\ argument
109 #define vupdate_int_entry(reg_num)\ argument
125 #define vblank_int_entry(reg_num)\ argument
147 #define i2c_int_entry(reg_num) \ argument
150 #define dp_sink_int_entry(reg_num) \ argument
153 #define gpio_pad_int_entry(reg_num) \ argument
156 #define dc_underflow_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn10/ |
| H A D | irq_service_dcn10.c | 173 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
187 #define hpd_int_entry(reg_num)\ argument
196 #define hpd_rx_int_entry(reg_num)\ argument
204 #define pflip_int_entry(reg_num)\ argument
215 #define vupdate_no_lock_int_entry(reg_num)\ argument
223 #define vblank_int_entry(reg_num)\ argument
231 #define vline0_int_entry(reg_num)\ argument
244 #define i2c_int_entry(reg_num) \ argument
247 #define dp_sink_int_entry(reg_num) \ argument
250 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn20/ |
| H A D | irq_service_dcn20.c | 176 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
192 #define hpd_int_entry(reg_num)\ argument
201 #define hpd_rx_int_entry(reg_num)\ argument
209 #define pflip_int_entry(reg_num)\ argument
220 #define vupdate_no_lock_int_entry(reg_num)\ argument
228 #define vblank_int_entry(reg_num)\ argument
236 #define vline0_int_entry(reg_num)\ argument
249 #define i2c_int_entry(reg_num) \ argument
252 #define dp_sink_int_entry(reg_num) \ argument
255 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn303/ |
| H A D | irq_service_dcn303.c | 121 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
134 #define hpd_int_entry(reg_num)\ argument
143 #define hpd_rx_int_entry(reg_num)\ argument
151 #define pflip_int_entry(reg_num)\ argument
162 #define vupdate_no_lock_int_entry(reg_num)\ argument
170 #define vblank_int_entry(reg_num)\ argument
178 #define vline0_int_entry(reg_num)\ argument
188 #define i2c_int_entry(reg_num) \ argument
191 #define dp_sink_int_entry(reg_num) \ argument
194 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dce120/ |
| H A D | irq_service_dce120.c | 76 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
90 #define hpd_int_entry(reg_num)\ argument
99 #define hpd_rx_int_entry(reg_num)\ argument
107 #define pflip_int_entry(reg_num)\ argument
116 #define vupdate_int_entry(reg_num)\ argument
124 #define vblank_int_entry(reg_num)\ argument
138 #define i2c_int_entry(reg_num) \ argument
141 #define dp_sink_int_entry(reg_num) \ argument
144 #define gpio_pad_int_entry(reg_num) \ argument
147 #define dc_underflow_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn30/ |
| H A D | irq_service_dcn30.c | 193 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
221 #define hpd_int_entry(reg_num)\ argument
230 #define hpd_rx_int_entry(reg_num)\ argument
238 #define pflip_int_entry(reg_num)\ argument
249 #define vupdate_no_lock_int_entry(reg_num)\ argument
257 #define vblank_int_entry(reg_num)\ argument
272 #define vline0_int_entry(reg_num)\ argument
285 #define i2c_int_entry(reg_num) \ argument
288 #define dp_sink_int_entry(reg_num) \ argument
291 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn314/ |
| H A D | irq_service_dcn314.c | 183 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
211 #define hpd_int_entry(reg_num)\ argument
220 #define hpd_rx_int_entry(reg_num)\ argument
228 #define pflip_int_entry(reg_num)\ argument
239 #define vupdate_no_lock_int_entry(reg_num)\ argument
247 #define vblank_int_entry(reg_num)\ argument
255 #define vline0_int_entry(reg_num)\ argument
275 #define i2c_int_entry(reg_num) \ argument
278 #define dp_sink_int_entry(reg_num) \ argument
281 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn31/ |
| H A D | irq_service_dcn31.c | 181 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
209 #define hpd_int_entry(reg_num)\ argument
218 #define hpd_rx_int_entry(reg_num)\ argument
226 #define pflip_int_entry(reg_num)\ argument
237 #define vupdate_no_lock_int_entry(reg_num)\ argument
245 #define vblank_int_entry(reg_num)\ argument
253 #define vline0_int_entry(reg_num)\ argument
273 #define i2c_int_entry(reg_num) \ argument
276 #define dp_sink_int_entry(reg_num) \ argument
279 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn21/ |
| H A D | irq_service_dcn21.c | 186 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
214 #define hpd_int_entry(reg_num)\ argument
223 #define hpd_rx_int_entry(reg_num)\ argument
231 #define pflip_int_entry(reg_num)\ argument
242 #define vupdate_no_lock_int_entry(reg_num)\ argument
250 #define vblank_int_entry(reg_num)\ argument
258 #define vline0_int_entry(reg_num)\ argument
278 #define i2c_int_entry(reg_num) \ argument
281 #define dp_sink_int_entry(reg_num) \ argument
284 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn302/ |
| H A D | irq_service_dcn302.c | 178 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
210 #define hpd_int_entry(reg_num)\ argument
219 #define hpd_rx_int_entry(reg_num)\ argument
227 #define pflip_int_entry(reg_num)\ argument
238 #define vupdate_no_lock_int_entry(reg_num)\ argument
246 #define vblank_int_entry(reg_num)\ argument
254 #define vline0_int_entry(reg_num)\ argument
264 #define i2c_int_entry(reg_num) \ argument
267 #define dp_sink_int_entry(reg_num) \ argument
270 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dce60/ |
| H A D | irq_service_dce60.c | 74 #define hpd_int_entry(reg_num)\ argument
89 #define hpd_rx_int_entry(reg_num)\ argument
103 #define pflip_int_entry(reg_num)\ argument
118 #define vupdate_int_entry(reg_num)\ argument
134 #define vblank_int_entry(reg_num)\ argument
155 #define i2c_int_entry(reg_num) \ argument
158 #define dp_sink_int_entry(reg_num) \ argument
161 #define gpio_pad_int_entry(reg_num) \ argument
164 #define dc_underflow_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn315/ |
| H A D | irq_service_dcn315.c | 188 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
216 #define hpd_int_entry(reg_num)\ argument
225 #define hpd_rx_int_entry(reg_num)\ argument
233 #define pflip_int_entry(reg_num)\ argument
244 #define vupdate_no_lock_int_entry(reg_num)\ argument
252 #define vblank_int_entry(reg_num)\ argument
260 #define vline0_int_entry(reg_num)\ argument
280 #define i2c_int_entry(reg_num) \ argument
283 #define dp_sink_int_entry(reg_num) \ argument
286 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn351/ |
| H A D | irq_service_dcn351.c | 159 #define IRQ_REG_ENTRY(base, block, reg_num, reg1, mask1, reg2, mask2)\ argument
187 #define hpd_int_entry(reg_num)\ argument
194 #define hpd_rx_int_entry(reg_num)\ argument
201 #define pflip_int_entry(reg_num)\ argument
210 #define vupdate_no_lock_int_entry(reg_num)\ argument
216 #define vblank_int_entry(reg_num)\ argument
222 #define vline0_int_entry(reg_num)\ argument
237 #define i2c_int_entry(reg_num) \ argument
240 #define dp_sink_int_entry(reg_num) \ argument
243 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn36/ |
| H A D | irq_service_dcn36.c | 158 #define IRQ_REG_ENTRY(base, block, reg_num, reg1, mask1, reg2, mask2)\ argument
186 #define hpd_int_entry(reg_num)\ argument
193 #define hpd_rx_int_entry(reg_num)\ argument
200 #define pflip_int_entry(reg_num)\ argument
209 #define vupdate_no_lock_int_entry(reg_num)\ argument
215 #define vblank_int_entry(reg_num)\ argument
221 #define vline0_int_entry(reg_num)\ argument
236 #define i2c_int_entry(reg_num) \ argument
239 #define dp_sink_int_entry(reg_num) \ argument
242 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dcn35/ |
| H A D | irq_service_dcn35.c | 180 #define IRQ_REG_ENTRY(base, block, reg_num, reg1, mask1, reg2, mask2)\ argument
208 #define hpd_int_entry(reg_num)\ argument
215 #define hpd_rx_int_entry(reg_num)\ argument
222 #define pflip_int_entry(reg_num)\ argument
231 #define vupdate_no_lock_int_entry(reg_num)\ argument
237 #define vblank_int_entry(reg_num)\ argument
243 #define vline0_int_entry(reg_num)\ argument
258 #define i2c_int_entry(reg_num) \ argument
261 #define dp_sink_int_entry(reg_num) \ argument
264 #define gpio_pad_int_entry(reg_num) \ argument
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| /linux/drivers/gpu/drm/amd/display/dc/irq/dce110/ |
| H A D | irq_service_dce110.c | 89 #define hpd_int_entry(reg_num)\ argument
104 #define hpd_rx_int_entry(reg_num)\ argument
117 #define pflip_int_entry(reg_num)\ argument
132 #define vupdate_int_entry(reg_num)\ argument
148 #define vblank_int_entry(reg_num)\ argument
170 #define i2c_int_entry(reg_num) \ argument
173 #define dp_sink_int_entry(reg_num) \ argument
176 #define gpio_pad_int_entry(reg_num) \ argument
179 #define dc_underflow_int_entry(reg_num) \ argument
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| /linux/arch/riscv/kvm/ |
| H A D | vcpu_onereg.c | 274 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_config() local
328 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_config() local
439 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_core() local
472 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_core() local
502 unsigned long reg_num, in kvm_riscv_vcpu_general_get_csr()
521 unsigned long reg_num, in kvm_riscv_vcpu_general_set_csr()
543 unsigned long reg_num, in kvm_riscv_vcpu_smstateen_set_csr()
557 unsigned long reg_num, in kvm_riscv_vcpu_smstateen_get_csr()
576 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_csr() local
618 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_csr() local
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| H A D | vcpu_sbi.c | 211 unsigned long reg_num, in riscv_vcpu_set_sbi_ext_single()
232 unsigned long reg_num, in riscv_vcpu_get_sbi_ext_single()
249 unsigned long reg_num, in riscv_vcpu_set_sbi_ext_multi()
269 unsigned long reg_num, in riscv_vcpu_get_sbi_ext_multi()
321 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_sbi_ext() local
358 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_sbi_ext() local
463 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_sbi() local
508 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_sbi() local
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| H A D | vcpu_vector.c | 97 unsigned long reg_num, in kvm_riscv_vcpu_vreg_addr()
145 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_vector() local
171 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_vector() local
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| H A D | vcpu_fp.c | 84 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_fp() local
129 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_fp() local
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| /linux/drivers/video/fbdev/via/ |
| H A D | hw.h | 355 int reg_num; member
361 int reg_num; member
367 int reg_num; member
373 int reg_num; member
379 int reg_num; member
385 int reg_num; member
391 int reg_num; member
397 int reg_num; member
403 int reg_num; member
409 int reg_num; member
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