| /linux-5.10/drivers/gpu/drm/amd/display/dmub/src/ |
| D | dmub_reg.h | 37 #define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name) argument
39 #define FD_SHIFT(reg_name, field) reg_name##__##field##__SHIFT argument
41 #define FD_MASK(reg_name, field) reg_name##__##field##_MASK argument
47 #define FN(reg_name, field) FD(reg_name##__##field) argument
58 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument
61 #define REG_SET(reg_name, initial_val, field, val) \ argument
85 #define REG_UPDATE_N(reg_name, n, ...)\ argument
88 #define REG_UPDATE(reg_name, field, val) \ argument
112 #define REG_GET(reg_name, field, val) \ argument
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| /linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
| D | hw_factory_dcn21.c | 57 #define REG(reg_name)\ argument
60 #define SF_HPD(reg_name, field_name, post_fix)\ argument
63 #define REGI(reg_name, block, id)\ argument
67 #define SF(reg_name, field_name, post_fix)\ argument
99 #define SF_DDC(reg_name, field_name, post_fix)\ argument
139 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
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| D | hw_translate_dcn21.c | 55 #define REG(reg_name)\ argument
57 #define SF_HPD(reg_name, field_name, post_fix)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| D | hw_factory_dcn20.c | 59 #define REG(reg_name)\ argument
62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
65 #define REGI(reg_name, block, id)\ argument
69 #define SF(reg_name, field_name, post_fix)\ argument
102 #define SF_DDC(reg_name, field_name, post_fix)\ argument
156 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
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| D | hw_translate_dcn20.c | 55 #define REG(reg_name)\ argument
57 #define SF_HPD(reg_name, field_name, post_fix)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
| D | hw_factory_dcn30.c | 67 #define REG(reg_name)\ argument
70 #define SF_HPD(reg_name, field_name, post_fix)\ argument
73 #define REGI(reg_name, block, id)\ argument
77 #define SF(reg_name, field_name, post_fix)\ argument
110 #define SF_DDC(reg_name, field_name, post_fix)\ argument
164 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
|
| D | hw_translate_dcn30.c | 61 #define REG(reg_name)\ argument
63 #define SF_HPD(reg_name, field_name, post_fix)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| D | hw_factory_dce120.c | 46 #define SF_HPD(reg_name, field_name, post_fix)\ argument
50 #define SF_HPD(reg_name, field_name, post_fix)\ argument
60 #define REG(reg_name)\ argument
63 #define REGI(reg_name, block, id)\ argument
96 #define SF_DDC(reg_name, field_name, post_fix)\ argument
|
| D | hw_translate_dce120.c | 51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| D | hw_factory_dcn10.c | 47 #define SF_HPD(reg_name, field_name, post_fix)\ argument
57 #define REG(reg_name)\ argument
60 #define REGI(reg_name, block, id)\ argument
92 #define SF_DDC(reg_name, field_name, post_fix)\ argument
128 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
|
| D | hw_translate_dcn10.c | 51 #define REG(reg_name)\ argument
54 #define REGI(reg_name, block, id)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dce110/ |
| D | hw_factory_dce110.c | 42 #define SF_HPD(reg_name, field_name, post_fix)\ argument
45 #define REG(reg_name)\ argument
48 #define REGI(reg_name, block, id)\ argument
83 #define SF_DDC(reg_name, field_name, post_fix)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/ |
| D | dm_services.h | 114 #define get_reg_field_value(reg_value, reg_name, reg_field)\ argument
130 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ argument
175 #define generic_reg_update_soc15(ctx, inst_offset, reg_name, n, ...)\ argument
179 #define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\ argument
183 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\ argument
189 #define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_dio_link_encoder.c | 47 #define FN(reg_name, field_name) \ argument
210 #define AUX_REG_READ(reg_name) \ argument
213 #define AUX_REG_WRITE(reg_name, val) \ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| D | rv1_clk_mgr_clk.c | 43 #define CLK_REG(reg_name, block, inst)\ argument
47 #define REG(reg_name) \ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_panel_cntl.h | 32 #define DCE_PANEL_CNTL_SR(reg_name, block)\ argument
45 #define DCN_PANEL_CNTL_SR(reg_name, block)\ argument
59 #define DCE_PANEL_CNTL_SF(reg_name, field_name, post_fix)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dwb.h | 37 #define SR(reg_name)\ argument
41 #define SRI(reg_name, block, id)\ argument
45 #define SRI2(reg_name, block, id)\ argument
49 #define SRII(reg_name, block, id)\ argument
53 #define SF(reg_name, field_name, post_fix)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_dwb.h | 36 #define SR(reg_name)\ argument
40 #define SRI(reg_name, block, id)\ argument
45 #define SRII(reg_name, block, id)\ argument
49 #define SF(reg_name, field_name, post_fix)\ argument
|
| D | dcn10_link_encoder.c | 49 #define FN(reg_name, field_name) \ argument
1353 #define HPD_REG_READ(reg_name) \ argument
1356 #define HPD_REG_UPDATE_N(reg_name, n, ...) \ argument
1361 #define HPD_REG_UPDATE(reg_name, field, val) \ argument
1384 #define AUX_REG_READ(reg_name) \ argument
1387 #define AUX_REG_UPDATE_N(reg_name, n, ...) \ argument
1392 #define AUX_REG_UPDATE(reg_name, field, val) \ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/inc/ |
| D | reg_helper.h | 39 #define REG_READ(reg_name) \ argument
42 #define REG_WRITE(reg_name, value) \ argument
54 #define REG_SET_N(reg_name, n, initial_val, ...) \ argument
60 #define FN(reg_name, field) \ argument
63 #define REG_SET(reg_name, initial_val, field, val) \ argument
156 #define REG_GET(reg_name, field, val) \ argument
160 #define REG_GET_2(reg_name, f1, v1, f2, v2) \ argument
165 #define REG_GET_3(reg_name, f1, v1, f2, v2, f3, v3) \ argument
171 #define REG_GET_4(reg_name, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
178 #define REG_GET_5(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5) \ argument
[all …]
|
| /linux-5.10/drivers/crypto/ux500/cryp/ |
| D | cryp_p.h | 23 #define CRYP_SET_BITS(reg_name, mask) \ argument
26 #define CRYP_WRITE_BIT(reg_name, val, mask) \ argument
30 #define CRYP_TEST_BITS(reg_name, val) \ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dce80/ |
| D | hw_factory_dce80.c | 41 #define REG(reg_name)\ argument
83 #define SF_DDC(reg_name, field_name, post_fix)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/dce60/ |
| D | hw_factory_dce60.c | 41 #define REG(reg_name)\ argument
83 #define SF_DDC(reg_name, field_name, post_fix)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/ |
| D | dce60_clk_mgr.c | 50 #define FN(reg_name, field_name) \ argument
54 #define SR(reg_name)\ argument
|
| /linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 324 #define SR(reg_name)\ argument
328 #define SRI(reg_name, block, id)\ argument
332 #define SRIR(var_name, reg_name, block, id)\ argument
336 #define SRII(reg_name, block, id)\ argument
340 #define DCCG_SRII(reg_name, block, id)\ argument
344 #define VUPDATE_SRII(reg_name, block, id)\ argument
355 #define NBIO_SR(reg_name)\ argument
366 #define MMHUB_SR(reg_name)\ argument
1723 #define REG(reg_name) \ argument
|