1 /* 2 * ARM kernel loader. 3 * 4 * Copyright (c) 2006 CodeSourcery. 5 * Written by Paul Brook 6 * 7 * This code is licensed under the LGPL. 8 * 9 */ 10 11 #ifndef HW_ARM_BOOT_H 12 #define HW_ARM_BOOT_H 13 14 #include "target/arm/cpu-qom.h" 15 #include "qemu/notify.h" 16 17 typedef enum { 18 ARM_ENDIANNESS_UNKNOWN = 0, 19 ARM_ENDIANNESS_LE, 20 ARM_ENDIANNESS_BE8, 21 ARM_ENDIANNESS_BE32, 22 } arm_endianness; 23 24 /** 25 * armv7m_load_kernel: 26 * @cpu: CPU 27 * @kernel_filename: file to load 28 * @mem_base: base address to load image at (should be where the 29 * CPU expects to find its vector table on reset) 30 * @mem_size: mem_size: maximum image size to load 31 * 32 * Load the guest image for an ARMv7M system. This must be called by 33 * any ARMv7M board. (This is necessary to ensure that the CPU resets 34 * correctly on system reset, as well as for kernel loading.) 35 */ 36 void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, 37 hwaddr mem_base, int mem_size); 38 39 /* arm_boot.c */ 40 struct arm_boot_info { 41 uint64_t ram_size; 42 const char *kernel_filename; 43 const char *kernel_cmdline; 44 const char *initrd_filename; 45 const char *dtb_filename; 46 hwaddr loader_start; 47 hwaddr dtb_start; 48 hwaddr dtb_limit; 49 /* If set to True, arm_load_kernel() will not load DTB. 50 * It allows board to load DTB manually later. 51 * (default: False) 52 */ 53 bool skip_dtb_autoload; 54 /* multicore boards that use the default secondary core boot functions 55 * need to put the address of the secondary boot code, the boot reg, 56 * and the GIC address in the next 3 values, respectively. boards that 57 * have their own boot functions can use these values as they want. 58 */ 59 hwaddr smp_loader_start; 60 hwaddr smp_bootreg_addr; 61 hwaddr gic_cpu_if_addr; 62 int board_id; 63 /* ARM machines that support the ARM Security Extensions use this field to 64 * control whether Linux is booted as secure(true) or non-secure(false). 65 */ 66 bool secure_boot; 67 int (*atag_board)(const struct arm_boot_info *info, void *p); 68 /* multicore boards that use the default secondary core boot functions 69 * can ignore these two function calls. If the default functions won't 70 * work, then write_secondary_boot() should write a suitable blob of 71 * code mimicking the secondary CPU startup process used by the board's 72 * boot loader/boot ROM code, and secondary_cpu_reset_hook() should 73 * perform any necessary CPU reset handling and set the PC for the 74 * secondary CPUs to point at this boot blob. 75 * 76 * These hooks won't be called if secondary CPUs are booting via 77 * emulated PSCI (see psci_conduit below). 78 */ 79 void (*write_secondary_boot)(ARMCPU *cpu, 80 const struct arm_boot_info *info); 81 void (*secondary_cpu_reset_hook)(ARMCPU *cpu, 82 const struct arm_boot_info *info); 83 /* if a board is able to create a dtb without a dtb file then it 84 * sets get_dtb. This will only be used if no dtb file is provided 85 * by the user. On success, sets *size to the length of the created 86 * dtb, and returns a pointer to it. (The caller must free this memory 87 * with g_free() when it has finished with it.) On failure, returns NULL. 88 */ 89 void *(*get_dtb)(const struct arm_boot_info *info, int *size); 90 /* if a board needs to be able to modify a device tree provided by 91 * the user it should implement this hook. 92 */ 93 void (*modify_dtb)(const struct arm_boot_info *info, void *fdt); 94 /* 95 * If a board wants to use the QEMU emulated-firmware PSCI support, 96 * it should set this to QEMU_PSCI_CONDUIT_HVC or QEMU_PSCI_CONDUIT_SMC 97 * as appropriate. arm_load_kernel() will set the psci-conduit and 98 * start-powered-off properties on the CPUs accordingly. 99 * Note that if the guest image is started at the same exception level 100 * as the conduit specifies calls should go to (eg guest firmware booted 101 * to EL3) then PSCI will not be enabled. 102 */ 103 int psci_conduit; 104 /* Used internally by arm_boot.c */ 105 int is_linux; 106 hwaddr initrd_start; 107 hwaddr initrd_size; 108 hwaddr entry; 109 110 /* Boot firmware has been loaded, typically at address 0, with -bios or 111 * -pflash. It also implies that fw_cfg_find() will succeed. 112 */ 113 bool firmware_loaded; 114 115 /* Address at which board specific loader/setup code exists. If enabled, 116 * this code-blob will run before anything else. It must return to the 117 * caller via the link register. There is no stack set up. Enabled by 118 * defining write_board_setup, which is responsible for loading the blob 119 * to the specified address. 120 */ 121 hwaddr board_setup_addr; 122 void (*write_board_setup)(ARMCPU *cpu, 123 const struct arm_boot_info *info); 124 125 /* 126 * If set, the board specific loader/setup blob will be run from secure 127 * mode, regardless of secure_boot. The blob becomes responsible for 128 * changing to non-secure state if implementing a non-secure boot, 129 * including setting up EL3/Secure registers such as the NSACR as 130 * required by the Linux booting ABI before the switch to non-secure. 131 */ 132 bool secure_board_setup; 133 134 arm_endianness endianness; 135 136 /* CPU having load the kernel and that should be the first to boot. */ 137 ARMCPU *primary_cpu; 138 }; 139 140 /** 141 * arm_load_kernel - Loads memory with everything needed to boot 142 * 143 * @cpu: handle to the first CPU object 144 * @info: handle to the boot info struct 145 * Registers a machine init done notifier that copies to memory 146 * everything needed to boot, depending on machine and user options: 147 * kernel image, boot loaders, initrd, dtb. Also registers the CPU 148 * reset handler. 149 * 150 * In case the machine file supports the platform bus device and its 151 * dynamically instantiable sysbus devices, this function must be called 152 * before sysbus-fdt arm_register_platform_bus_fdt_creator. Indeed the 153 * machine init done notifiers are called in registration reverse order. 154 */ 155 void arm_load_kernel(ARMCPU *cpu, MachineState *ms, struct arm_boot_info *info); 156 157 AddressSpace *arm_boot_address_space(ARMCPU *cpu, 158 const struct arm_boot_info *info); 159 160 /** 161 * arm_load_dtb() - load a device tree binary image into memory 162 * @addr: the address to load the image at 163 * @binfo: struct describing the boot environment 164 * @addr_limit: upper limit of the available memory area at @addr 165 * @as: address space to load image to 166 * @cpu: ARM CPU object 167 * 168 * Load a device tree supplied by the machine or by the user with the 169 * '-dtb' command line option, and put it at offset @addr in target 170 * memory. 171 * 172 * If @addr_limit contains a meaningful value (i.e., it is strictly greater 173 * than @addr), the device tree is only loaded if its size does not exceed 174 * the limit. 175 * 176 * Returns: the size of the device tree image on success, 177 * 0 if the image size exceeds the limit, 178 * -1 on errors. 179 * 180 * Note: Must not be called unless have_dtb(binfo) is true. 181 */ 182 int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo, 183 hwaddr addr_limit, AddressSpace *as, MachineState *ms, 184 ARMCPU *cpu); 185 186 /* Write a secure board setup routine with a dummy handler for SMCs */ 187 void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu, 188 const struct arm_boot_info *info, 189 hwaddr mvbar_addr); 190 191 typedef enum { 192 FIXUP_NONE = 0, /* do nothing */ 193 FIXUP_TERMINATOR, /* end of insns */ 194 FIXUP_BOARDID, /* overwrite with board ID number */ 195 FIXUP_BOARD_SETUP, /* overwrite with board specific setup code address */ 196 FIXUP_ARGPTR_LO, /* overwrite with pointer to kernel args */ 197 FIXUP_ARGPTR_HI, /* overwrite with pointer to kernel args (high half) */ 198 FIXUP_ENTRYPOINT_LO, /* overwrite with kernel entry point */ 199 FIXUP_ENTRYPOINT_HI, /* overwrite with kernel entry point (high half) */ 200 FIXUP_GIC_CPU_IF, /* overwrite with GIC CPU interface address */ 201 FIXUP_BOOTREG, /* overwrite with boot register address */ 202 FIXUP_DSB, /* overwrite with correct DSB insn for cpu */ 203 FIXUP_MAX, 204 } FixupType; 205 206 typedef struct ARMInsnFixup { 207 uint32_t insn; 208 FixupType fixup; 209 } ARMInsnFixup; 210 211 /** 212 * arm_write_bootloader - write a bootloader to guest memory 213 * @name: name of the bootloader blob 214 * @as: AddressSpace to write the bootloader 215 * @addr: guest address to write it 216 * @insns: the blob to be loaded 217 * @fixupcontext: context to be used for any fixups in @insns 218 * 219 * Write a bootloader to guest memory at address @addr in the address 220 * space @as. @name is the name to use for the resulting ROM blob, so 221 * it should be unique in the system and reasonably identifiable for debugging. 222 * 223 * @insns must be an array of ARMInsnFixup structs, each of which has 224 * one 32-bit value to be written to the guest memory, and a fixup to be 225 * applied to the value. FIXUP_NONE (do nothing) is value 0, so effectively 226 * the fixup is optional when writing a struct initializer. 227 * The final entry in the array must be { 0, FIXUP_TERMINATOR }. 228 * 229 * All other supported fixup types have the semantics "ignore insn 230 * and instead use the value from the array element @fixupcontext[fixup]". 231 * The caller should therefore provide @fixupcontext as an array of 232 * size FIXUP_MAX whose elements have been initialized for at least 233 * the entries that @insns refers to. 234 */ 235 void arm_write_bootloader(const char *name, 236 AddressSpace *as, hwaddr addr, 237 const ARMInsnFixup *insns, 238 const uint32_t *fixupcontext); 239 240 #endif /* HW_ARM_BOOT_H */ 241