1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2022 Advanced Micro Devices, Inc. 4 * 5 * Author: Meng Li <li.meng@amd.com> 6 */ 7 8 #ifndef _LINUX_AMD_PSTATE_H 9 #define _LINUX_AMD_PSTATE_H 10 11 #include <linux/pm_qos.h> 12 #include <linux/platform_profile.h> 13 14 /********************************************************************* 15 * AMD P-state INTERFACE * 16 *********************************************************************/ 17 18 /** 19 * union perf_cached - A union to cache performance-related data. 20 * @highest_perf: the maximum performance an individual processor may reach, 21 * assuming ideal conditions 22 * For platforms that support the preferred core feature, the highest_perf value maybe 23 * configured to any value in the range 166-255 by the firmware (because the preferred 24 * core ranking is encoded in the highest_perf value). To maintain consistency across 25 * all platforms, we split the highest_perf and preferred core ranking values into 26 * cpudata->perf.highest_perf and cpudata->prefcore_ranking. 27 * @nominal_perf: the maximum sustained performance level of the processor, 28 * assuming ideal operating conditions 29 * @lowest_nonlinear_perf: the lowest performance level at which nonlinear power 30 * savings are achieved 31 * @lowest_perf: the absolute lowest performance level of the processor 32 * @min_limit_perf: Cached value of the performance corresponding to policy->min 33 * @max_limit_perf: Cached value of the performance corresponding to policy->max 34 * @bios_min_perf: Cached perf value corresponding to the "Requested CPU Min Frequency" BIOS option 35 */ 36 union perf_cached { 37 struct { 38 u8 highest_perf; 39 u8 nominal_perf; 40 u8 lowest_nonlinear_perf; 41 u8 lowest_perf; 42 u8 min_limit_perf; 43 u8 max_limit_perf; 44 u8 bios_min_perf; 45 }; 46 u64 val; 47 }; 48 49 /** 50 * struct amd_aperf_mperf 51 * @aperf: actual performance frequency clock count 52 * @mperf: maximum performance frequency clock count 53 * @tsc: time stamp counter 54 */ 55 struct amd_aperf_mperf { 56 u64 aperf; 57 u64 mperf; 58 u64 tsc; 59 }; 60 61 /** 62 * struct amd_cpudata - private CPU data for AMD P-State 63 * @cpu: CPU number 64 * @req: constraint request to apply 65 * @cppc_req_cached: cached performance request hints 66 * @cppc_req2_cached: cached value of MSR_AMD_CPPC_REQ2 67 * @perf: cached performance-related data 68 * @prefcore_ranking: the preferred core ranking, the higher value indicates a higher 69 * priority. 70 * @floor_perf_cnt: Cached value of the number of distinct floor 71 * performance levels supported 72 * @bios_floor_perf: Cached value of the boot-time floor performance level from 73 * MSR_AMD_CPPC_REQ2 74 * @min_limit_freq: Cached value of policy->min (in khz) 75 * @max_limit_freq: Cached value of policy->max (in khz) 76 * @nominal_freq: the frequency (in khz) that mapped to nominal_perf 77 * @max_freq: in ideal conditions the maximum frequency (in khz) possible frequency 78 * @lowest_nonlinear_freq: the frequency (in khz) that mapped to lowest_nonlinear_perf 79 * @floor_freq: Cached value of the user requested floor_freq 80 * @cur: Difference of Aperf/Mperf/tsc count between last and current sample 81 * @prev: Last Aperf/Mperf/tsc count value read from register 82 * @freq: current cpu frequency value (in khz) 83 * @boost_supported: check whether the Processor or SBIOS supports boost mode 84 * @hw_prefcore: check whether HW supports preferred core featue. 85 * Only when hw_prefcore and early prefcore param are true, 86 * AMD P-State driver supports preferred core featue. 87 * @epp_cached: Cached CPPC energy-performance preference value 88 * @policy: Cpufreq policy value 89 * @suspended: If CPU core if offlined 90 * @epp_default_ac: Default EPP value for AC power source 91 * @epp_default_dc: Default EPP value for DC power source 92 * @dynamic_epp: Whether dynamic EPP is enabled 93 * @power_nb: Notifier block for power events 94 * 95 * The amd_cpudata is key private data for each CPU thread in AMD P-State, and 96 * represents all the attributes and goals that AMD P-State requests at runtime. 97 */ 98 struct amd_cpudata { 99 int cpu; 100 101 struct freq_qos_request req[2]; 102 u64 cppc_req_cached; 103 u64 cppc_req2_cached; 104 105 union perf_cached perf; 106 107 u8 prefcore_ranking; 108 u8 floor_perf_cnt; 109 u8 bios_floor_perf; 110 u32 min_limit_freq; 111 u32 max_limit_freq; 112 u32 nominal_freq; 113 u32 max_freq; 114 u32 lowest_nonlinear_freq; 115 u32 floor_freq; 116 117 struct amd_aperf_mperf cur; 118 struct amd_aperf_mperf prev; 119 120 u64 freq; 121 bool boost_supported; 122 bool hw_prefcore; 123 124 /* EPP feature related attributes*/ 125 u32 policy; 126 bool suspended; 127 u8 epp_default_ac; 128 u8 epp_default_dc; 129 bool dynamic_epp; 130 bool raw_epp; 131 struct notifier_block power_nb; 132 133 /* platform profile */ 134 enum platform_profile_option current_profile; 135 struct device *ppdev; 136 char *profile_name; 137 }; 138 139 /* 140 * enum amd_pstate_mode - driver working mode of amd pstate 141 */ 142 enum amd_pstate_mode { 143 AMD_PSTATE_UNDEFINED = 0, 144 AMD_PSTATE_DISABLE, 145 AMD_PSTATE_PASSIVE, 146 AMD_PSTATE_ACTIVE, 147 AMD_PSTATE_GUIDED, 148 AMD_PSTATE_MAX, 149 }; 150 const char *amd_pstate_get_mode_string(enum amd_pstate_mode mode); 151 int amd_pstate_get_status(void); 152 int amd_pstate_update_status(const char *buf, size_t size); 153 ssize_t store_energy_performance_preference(struct cpufreq_policy *policy, 154 const char *buf, size_t count); 155 ssize_t show_energy_performance_preference(struct cpufreq_policy *policy, char *buf); 156 void amd_pstate_clear_dynamic_epp(struct cpufreq_policy *policy); 157 158 struct freq_attr; 159 160 struct freq_attr **amd_pstate_get_current_attrs(void); 161 162 #endif /* _LINUX_AMD_PSTATE_H */ 163