1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2025, Intel Corporation. 4 * All Rights Reserved. 5 * 6 * Author: "David E. Box" <david.e.box@linux.intel.com> 7 */ 8 9 #include <linux/export.h> 10 #include <linux/types.h> 11 12 #include <linux/intel_pmt_features.h> 13 14 const char * const pmt_feature_names[] = { 15 [FEATURE_PER_CORE_PERF_TELEM] = "per_core_performance_telemetry", 16 [FEATURE_PER_CORE_ENV_TELEM] = "per_core_environment_telemetry", 17 [FEATURE_PER_RMID_PERF_TELEM] = "per_rmid_perf_telemetry", 18 [FEATURE_ACCEL_TELEM] = "accelerator_telemetry", 19 [FEATURE_UNCORE_TELEM] = "uncore_telemetry", 20 [FEATURE_CRASH_LOG] = "crash_log", 21 [FEATURE_PETE_LOG] = "pete_log", 22 [FEATURE_TPMI_CTRL] = "tpmi_control", 23 [FEATURE_TRACING] = "tracing", 24 [FEATURE_PER_RMID_ENERGY_TELEM] = "per_rmid_energy_telemetry", 25 }; 26 EXPORT_SYMBOL_NS_GPL(pmt_feature_names, "INTEL_PMT_DISCOVERY"); 27 28 enum feature_layout feature_layout[] = { 29 [FEATURE_PER_CORE_PERF_TELEM] = LAYOUT_WATCHER, 30 [FEATURE_PER_CORE_ENV_TELEM] = LAYOUT_WATCHER, 31 [FEATURE_PER_RMID_PERF_TELEM] = LAYOUT_RMID, 32 [FEATURE_ACCEL_TELEM] = LAYOUT_WATCHER, 33 [FEATURE_UNCORE_TELEM] = LAYOUT_WATCHER, 34 [FEATURE_CRASH_LOG] = LAYOUT_COMMAND, 35 [FEATURE_PETE_LOG] = LAYOUT_COMMAND, 36 [FEATURE_TPMI_CTRL] = LAYOUT_CAPS_ONLY, 37 [FEATURE_TRACING] = LAYOUT_CAPS_ONLY, 38 [FEATURE_PER_RMID_ENERGY_TELEM] = LAYOUT_RMID, 39 }; 40 41 struct pmt_cap pmt_cap_common[] = { 42 {PMT_CAP_TELEM, "telemetry"}, 43 {PMT_CAP_WATCHER, "watcher"}, 44 {PMT_CAP_CRASHLOG, "crashlog"}, 45 {PMT_CAP_STREAMING, "streaming"}, 46 {PMT_CAP_THRESHOLD, "threshold"}, 47 {PMT_CAP_WINDOW, "window"}, 48 {PMT_CAP_CONFIG, "config"}, 49 {PMT_CAP_TRACING, "tracing"}, 50 {PMT_CAP_INBAND, "inband"}, 51 {PMT_CAP_OOB, "oob"}, 52 {PMT_CAP_SECURED_CHAN, "secure_chan"}, 53 {PMT_CAP_PMT_SP, "pmt_sp"}, 54 {PMT_CAP_PMT_SP_POLICY, "pmt_sp_policy"}, 55 {} 56 }; 57 58 struct pmt_cap pmt_cap_pcpt[] = { 59 {PMT_CAP_PCPT_CORE_PERF, "core_performance"}, 60 {PMT_CAP_PCPT_CORE_C0_RES, "core_c0_residency"}, 61 {PMT_CAP_PCPT_CORE_ACTIVITY, "core_activity"}, 62 {PMT_CAP_PCPT_CACHE_PERF, "cache_performance"}, 63 {PMT_CAP_PCPT_QUALITY_TELEM, "quality_telemetry"}, 64 {} 65 }; 66 67 struct pmt_cap *pmt_caps_pcpt[] = { 68 pmt_cap_common, 69 pmt_cap_pcpt, 70 NULL 71 }; 72 73 struct pmt_cap pmt_cap_pcet[] = { 74 {PMT_CAP_PCET_WORKPOINT_HIST, "workpoint_histogram"}, 75 {PMT_CAP_PCET_CORE_CURR_TEMP, "core_current_temp"}, 76 {PMT_CAP_PCET_CORE_INST_RES, "core_inst_residency"}, 77 {PMT_CAP_PCET_QUALITY_TELEM, "quality_telemetry"}, 78 {PMT_CAP_PCET_CORE_CDYN_LVL, "core_cdyn_level"}, 79 {PMT_CAP_PCET_CORE_STRESS_LVL, "core_stress_level"}, 80 {PMT_CAP_PCET_CORE_DAS, "core_digital_aging_sensor"}, 81 {PMT_CAP_PCET_FIVR_HEALTH, "fivr_health"}, 82 {PMT_CAP_PCET_ENERGY, "energy"}, 83 {PMT_CAP_PCET_PEM_STATUS, "pem_status"}, 84 {PMT_CAP_PCET_CORE_C_STATE, "core_c_state"}, 85 {} 86 }; 87 88 struct pmt_cap *pmt_caps_pcet[] = { 89 pmt_cap_common, 90 pmt_cap_pcet, 91 NULL 92 }; 93 94 struct pmt_cap pmt_cap_rmid_perf[] = { 95 {PMT_CAP_RMID_CORES_PERF, "core_performance"}, 96 {PMT_CAP_RMID_CACHE_PERF, "cache_performance"}, 97 {PMT_CAP_RMID_PERF_QUAL, "performance_quality"}, 98 {} 99 }; 100 101 struct pmt_cap *pmt_caps_rmid_perf[] = { 102 pmt_cap_common, 103 pmt_cap_rmid_perf, 104 NULL 105 }; 106 107 struct pmt_cap pmt_cap_accel[] = { 108 {PMT_CAP_ACCEL_CPM_TELEM, "content_processing_module"}, 109 {PMT_CAP_ACCEL_TIP_TELEM, "content_turbo_ip"}, 110 {} 111 }; 112 113 struct pmt_cap *pmt_caps_accel[] = { 114 pmt_cap_common, 115 pmt_cap_accel, 116 NULL 117 }; 118 119 struct pmt_cap pmt_cap_uncore[] = { 120 {PMT_CAP_UNCORE_IO_CA_TELEM, "io_ca"}, 121 {PMT_CAP_UNCORE_RMID_TELEM, "rmid"}, 122 {PMT_CAP_UNCORE_D2D_ULA_TELEM, "d2d_ula"}, 123 {PMT_CAP_UNCORE_PKGC_TELEM, "package_c"}, 124 {} 125 }; 126 127 struct pmt_cap *pmt_caps_uncore[] = { 128 pmt_cap_common, 129 pmt_cap_uncore, 130 NULL 131 }; 132 133 struct pmt_cap pmt_cap_crashlog[] = { 134 {PMT_CAP_CRASHLOG_MAN_TRIG, "manual_trigger"}, 135 {PMT_CAP_CRASHLOG_CORE, "core"}, 136 {PMT_CAP_CRASHLOG_UNCORE, "uncore"}, 137 {PMT_CAP_CRASHLOG_TOR, "tor"}, 138 {PMT_CAP_CRASHLOG_S3M, "s3m"}, 139 {PMT_CAP_CRASHLOG_PERSISTENCY, "persistency"}, 140 {PMT_CAP_CRASHLOG_CLIP_GPIO, "crashlog_in_progress"}, 141 {PMT_CAP_CRASHLOG_PRE_RESET, "pre_reset_extraction"}, 142 {PMT_CAP_CRASHLOG_POST_RESET, "post_reset_extraction"}, 143 {} 144 }; 145 146 struct pmt_cap *pmt_caps_crashlog[] = { 147 pmt_cap_common, 148 pmt_cap_crashlog, 149 NULL 150 }; 151 152 struct pmt_cap pmt_cap_pete[] = { 153 {PMT_CAP_PETE_MAN_TRIG, "manual_trigger"}, 154 {PMT_CAP_PETE_ENCRYPTION, "encryption"}, 155 {PMT_CAP_PETE_PERSISTENCY, "persistency"}, 156 {PMT_CAP_PETE_REQ_TOKENS, "required_tokens"}, 157 {PMT_CAP_PETE_PROD_ENABLED, "production_enabled"}, 158 {PMT_CAP_PETE_DEBUG_ENABLED, "debug_enabled"}, 159 {} 160 }; 161 162 struct pmt_cap *pmt_caps_pete[] = { 163 pmt_cap_common, 164 pmt_cap_pete, 165 NULL 166 }; 167 168 struct pmt_cap pmt_cap_tpmi[] = { 169 {PMT_CAP_TPMI_MAILBOX, "mailbox"}, 170 {PMT_CAP_TPMI_LOCK, "bios_lock"}, 171 {} 172 }; 173 174 struct pmt_cap *pmt_caps_tpmi[] = { 175 pmt_cap_common, 176 pmt_cap_tpmi, 177 NULL 178 }; 179 180 struct pmt_cap pmt_cap_tracing[] = { 181 {PMT_CAP_TRACE_SRAR, "srar_errors"}, 182 {PMT_CAP_TRACE_CORRECTABLE, "correctable_errors"}, 183 {PMT_CAP_TRACE_MCTP, "mctp"}, 184 {PMT_CAP_TRACE_MRT, "memory_resiliency"}, 185 {} 186 }; 187 188 struct pmt_cap *pmt_caps_tracing[] = { 189 pmt_cap_common, 190 pmt_cap_tracing, 191 NULL 192 }; 193 194 struct pmt_cap pmt_cap_rmid_energy[] = { 195 {PMT_CAP_RMID_ENERGY, "energy"}, 196 {PMT_CAP_RMID_ACTIVITY, "activity"}, 197 {PMT_CAP_RMID_ENERGY_QUAL, "energy_quality"}, 198 {} 199 }; 200 201 struct pmt_cap *pmt_caps_rmid_energy[] = { 202 pmt_cap_common, 203 pmt_cap_rmid_energy, 204 NULL 205 }; 206