1 /*
2 * Toshiba RBTX4939 setup routines.
3 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
4 * and RBTX49xx patch from CELF patch archive.
5 *
6 * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/slab.h>
16 #include <linux/export.h>
17 #include <linux/platform_device.h>
18 #include <linux/leds.h>
19 #include <linux/interrupt.h>
20 #include <linux/smc91x.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/mtd/map.h>
24 #include <asm/reboot.h>
25 #include <asm/txx9/generic.h>
26 #include <asm/txx9/pci.h>
27 #include <asm/txx9/rbtx4939.h>
28
rbtx4939_machine_restart(char * command)29 static void rbtx4939_machine_restart(char *command)
30 {
31 local_irq_disable();
32 writeb(1, rbtx4939_reseten_addr);
33 writeb(1, rbtx4939_softreset_addr);
34 while (1)
35 ;
36 }
37
rbtx4939_time_init(void)38 static void __init rbtx4939_time_init(void)
39 {
40 tx4939_time_init(0);
41 }
42
43 #if defined(__BIG_ENDIAN) && \
44 (defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE))
45 #define HAVE_RBTX4939_IOSWAB
46 #define IS_CE1_ADDR(addr) \
47 ((((unsigned long)(addr) - IO_BASE) & 0xfff00000) == TXX9_CE(1))
rbtx4939_ioswabw(volatile u16 * a,u16 x)48 static u16 rbtx4939_ioswabw(volatile u16 *a, u16 x)
49 {
50 return IS_CE1_ADDR(a) ? x : le16_to_cpu(x);
51 }
rbtx4939_mem_ioswabw(volatile u16 * a,u16 x)52 static u16 rbtx4939_mem_ioswabw(volatile u16 *a, u16 x)
53 {
54 return !IS_CE1_ADDR(a) ? x : le16_to_cpu(x);
55 }
56 #endif /* __BIG_ENDIAN && CONFIG_SMC91X */
57
rbtx4939_pci_setup(void)58 static void __init rbtx4939_pci_setup(void)
59 {
60 #ifdef CONFIG_PCI
61 int extarb = !(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCIARB);
62 struct pci_controller *c = &txx9_primary_pcic;
63
64 register_pci_controller(c);
65
66 tx4939_report_pciclk();
67 tx4927_pcic_setup(tx4939_pcicptr, c, extarb);
68 if (!(__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_ATA1MODE) &&
69 (__raw_readq(&tx4939_ccfgptr->pcfg) &
70 (TX4939_PCFG_ET0MODE | TX4939_PCFG_ET1MODE))) {
71 tx4939_report_pci1clk();
72
73 /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
74 c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000);
75 register_pci_controller(c);
76 tx4927_pcic_setup(tx4939_pcic1ptr, c, 0);
77 }
78
79 tx4939_setup_pcierr_irq();
80 #endif /* CONFIG_PCI */
81 }
82
83 static unsigned long long default_ebccr[] __initdata = {
84 0x01c0000000007608ULL, /* 64M ROM */
85 0x017f000000007049ULL, /* 1M IOC */
86 0x0180000000408608ULL, /* ISA */
87 0,
88 };
89
rbtx4939_ebusc_setup(void)90 static void __init rbtx4939_ebusc_setup(void)
91 {
92 int i;
93 unsigned int sp;
94
95 /* use user-configured speed */
96 sp = TX4939_EBUSC_CR(0) & 0x30;
97 default_ebccr[0] |= sp;
98 default_ebccr[1] |= sp;
99 default_ebccr[2] |= sp;
100 /* initialise by myself */
101 for (i = 0; i < ARRAY_SIZE(default_ebccr); i++) {
102 if (default_ebccr[i])
103 ____raw_writeq(default_ebccr[i],
104 &tx4939_ebuscptr->cr[i]);
105 else
106 ____raw_writeq(____raw_readq(&tx4939_ebuscptr->cr[i])
107 & ~8,
108 &tx4939_ebuscptr->cr[i]);
109 }
110 }
111
rbtx4939_update_ioc_pen(void)112 static void __init rbtx4939_update_ioc_pen(void)
113 {
114 __u64 pcfg = ____raw_readq(&tx4939_ccfgptr->pcfg);
115 __u64 ccfg = ____raw_readq(&tx4939_ccfgptr->ccfg);
116 __u8 pe1 = readb(rbtx4939_pe1_addr);
117 __u8 pe2 = readb(rbtx4939_pe2_addr);
118 __u8 pe3 = readb(rbtx4939_pe3_addr);
119 if (pcfg & TX4939_PCFG_ATA0MODE)
120 pe1 |= RBTX4939_PE1_ATA(0);
121 else
122 pe1 &= ~RBTX4939_PE1_ATA(0);
123 if (pcfg & TX4939_PCFG_ATA1MODE) {
124 pe1 |= RBTX4939_PE1_ATA(1);
125 pe1 &= ~(RBTX4939_PE1_RMII(0) | RBTX4939_PE1_RMII(1));
126 } else {
127 pe1 &= ~RBTX4939_PE1_ATA(1);
128 if (pcfg & TX4939_PCFG_ET0MODE)
129 pe1 |= RBTX4939_PE1_RMII(0);
130 else
131 pe1 &= ~RBTX4939_PE1_RMII(0);
132 if (pcfg & TX4939_PCFG_ET1MODE)
133 pe1 |= RBTX4939_PE1_RMII(1);
134 else
135 pe1 &= ~RBTX4939_PE1_RMII(1);
136 }
137 if (ccfg & TX4939_CCFG_PTSEL)
138 pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
139 RBTX4939_PE3_VP_S);
140 else {
141 __u64 vmode = pcfg &
142 (TX4939_PCFG_VSSMODE | TX4939_PCFG_VPSMODE);
143 if (vmode == 0)
144 pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_P |
145 RBTX4939_PE3_VP_S);
146 else if (vmode == TX4939_PCFG_VPSMODE) {
147 pe3 |= RBTX4939_PE3_VP_P;
148 pe3 &= ~(RBTX4939_PE3_VP | RBTX4939_PE3_VP_S);
149 } else if (vmode == TX4939_PCFG_VSSMODE) {
150 pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_S;
151 pe3 &= ~RBTX4939_PE3_VP_P;
152 } else {
153 pe3 |= RBTX4939_PE3_VP | RBTX4939_PE3_VP_P;
154 pe3 &= ~RBTX4939_PE3_VP_S;
155 }
156 }
157 if (pcfg & TX4939_PCFG_SPIMODE) {
158 if (pcfg & TX4939_PCFG_SIO2MODE_GPIO)
159 pe2 &= ~(RBTX4939_PE2_SIO2 | RBTX4939_PE2_SIO0);
160 else {
161 if (pcfg & TX4939_PCFG_SIO2MODE_SIO2) {
162 pe2 |= RBTX4939_PE2_SIO2;
163 pe2 &= ~RBTX4939_PE2_SIO0;
164 } else {
165 pe2 |= RBTX4939_PE2_SIO0;
166 pe2 &= ~RBTX4939_PE2_SIO2;
167 }
168 }
169 if (pcfg & TX4939_PCFG_SIO3MODE)
170 pe2 |= RBTX4939_PE2_SIO3;
171 else
172 pe2 &= ~RBTX4939_PE2_SIO3;
173 pe2 &= ~RBTX4939_PE2_SPI;
174 } else {
175 pe2 |= RBTX4939_PE2_SPI;
176 pe2 &= ~(RBTX4939_PE2_SIO3 | RBTX4939_PE2_SIO2 |
177 RBTX4939_PE2_SIO0);
178 }
179 if ((pcfg & TX4939_PCFG_I2SMODE_MASK) == TX4939_PCFG_I2SMODE_GPIO)
180 pe2 |= RBTX4939_PE2_GPIO;
181 else
182 pe2 &= ~RBTX4939_PE2_GPIO;
183 writeb(pe1, rbtx4939_pe1_addr);
184 writeb(pe2, rbtx4939_pe2_addr);
185 writeb(pe3, rbtx4939_pe3_addr);
186 }
187
188 #define RBTX4939_MAX_7SEGLEDS 8
189
190 #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
191 static u8 led_val[RBTX4939_MAX_7SEGLEDS];
192 struct rbtx4939_led_data {
193 struct led_classdev cdev;
194 char name[32];
195 unsigned int num;
196 };
197
198 /* Use "dot" in 7seg LEDs */
rbtx4939_led_brightness_set(struct led_classdev * led_cdev,enum led_brightness value)199 static void rbtx4939_led_brightness_set(struct led_classdev *led_cdev,
200 enum led_brightness value)
201 {
202 struct rbtx4939_led_data *led_dat =
203 container_of(led_cdev, struct rbtx4939_led_data, cdev);
204 unsigned int num = led_dat->num;
205 unsigned long flags;
206
207 local_irq_save(flags);
208 led_val[num] = (led_val[num] & 0x7f) | (value ? 0x80 : 0);
209 writeb(led_val[num], rbtx4939_7seg_addr(num / 4, num % 4));
210 local_irq_restore(flags);
211 }
212
rbtx4939_led_probe(struct platform_device * pdev)213 static int __init rbtx4939_led_probe(struct platform_device *pdev)
214 {
215 struct rbtx4939_led_data *leds_data;
216 int i;
217 static char *default_triggers[] __initdata = {
218 "heartbeat",
219 "ide-disk",
220 "nand-disk",
221 };
222
223 leds_data = kzalloc(sizeof(*leds_data) * RBTX4939_MAX_7SEGLEDS,
224 GFP_KERNEL);
225 if (!leds_data)
226 return -ENOMEM;
227 for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++) {
228 int rc;
229 struct rbtx4939_led_data *led_dat = &leds_data[i];
230
231 led_dat->num = i;
232 led_dat->cdev.brightness_set = rbtx4939_led_brightness_set;
233 sprintf(led_dat->name, "rbtx4939:amber:%u", i);
234 led_dat->cdev.name = led_dat->name;
235 if (i < ARRAY_SIZE(default_triggers))
236 led_dat->cdev.default_trigger = default_triggers[i];
237 rc = led_classdev_register(&pdev->dev, &led_dat->cdev);
238 if (rc < 0)
239 return rc;
240 led_dat->cdev.brightness_set(&led_dat->cdev, 0);
241 }
242 return 0;
243
244 }
245
246 static struct platform_driver rbtx4939_led_driver = {
247 .driver = {
248 .name = "rbtx4939-led",
249 .owner = THIS_MODULE,
250 },
251 };
252
rbtx4939_led_setup(void)253 static void __init rbtx4939_led_setup(void)
254 {
255 platform_device_register_simple("rbtx4939-led", -1, NULL, 0);
256 platform_driver_probe(&rbtx4939_led_driver, rbtx4939_led_probe);
257 }
258 #else
rbtx4939_led_setup(void)259 static inline void rbtx4939_led_setup(void)
260 {
261 }
262 #endif
263
__rbtx4939_7segled_putc(unsigned int pos,unsigned char val)264 static void __rbtx4939_7segled_putc(unsigned int pos, unsigned char val)
265 {
266 #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
267 unsigned long flags;
268 local_irq_save(flags);
269 /* bit7: reserved for LED class */
270 led_val[pos] = (led_val[pos] & 0x80) | (val & 0x7f);
271 val = led_val[pos];
272 local_irq_restore(flags);
273 #endif
274 writeb(val, rbtx4939_7seg_addr(pos / 4, pos % 4));
275 }
276
rbtx4939_7segled_putc(unsigned int pos,unsigned char val)277 static void rbtx4939_7segled_putc(unsigned int pos, unsigned char val)
278 {
279 /* convert from map_to_seg7() notation */
280 val = (val & 0x88) |
281 ((val & 0x40) >> 6) |
282 ((val & 0x20) >> 4) |
283 ((val & 0x10) >> 2) |
284 ((val & 0x04) << 2) |
285 ((val & 0x02) << 4) |
286 ((val & 0x01) << 6);
287 __rbtx4939_7segled_putc(pos, val);
288 }
289
290 #if defined(CONFIG_MTD_RBTX4939) || defined(CONFIG_MTD_RBTX4939_MODULE)
291 /* special mapping for boot rom */
rbtx4939_flash_fixup_ofs(unsigned long ofs)292 static unsigned long rbtx4939_flash_fixup_ofs(unsigned long ofs)
293 {
294 u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f;
295 unsigned char shift;
296
297 if (bdipsw & 8) {
298 /* BOOT Mode: USER ROM1 / USER ROM2 */
299 shift = bdipsw & 3;
300 /* rotate A[23:22] */
301 return (ofs & ~0xc00000) | ((((ofs >> 22) + shift) & 3) << 22);
302 }
303 #ifdef __BIG_ENDIAN
304 if (bdipsw == 0)
305 /* BOOT Mode: Monitor ROM */
306 ofs ^= 0x400000; /* swap A[22] */
307 #endif
308 return ofs;
309 }
310
rbtx4939_flash_read16(struct map_info * map,unsigned long ofs)311 static map_word rbtx4939_flash_read16(struct map_info *map, unsigned long ofs)
312 {
313 map_word r;
314
315 ofs = rbtx4939_flash_fixup_ofs(ofs);
316 r.x[0] = __raw_readw(map->virt + ofs);
317 return r;
318 }
319
rbtx4939_flash_write16(struct map_info * map,const map_word datum,unsigned long ofs)320 static void rbtx4939_flash_write16(struct map_info *map, const map_word datum,
321 unsigned long ofs)
322 {
323 ofs = rbtx4939_flash_fixup_ofs(ofs);
324 __raw_writew(datum.x[0], map->virt + ofs);
325 mb(); /* see inline_map_write() in mtd/map.h */
326 }
327
rbtx4939_flash_copy_from(struct map_info * map,void * to,unsigned long from,ssize_t len)328 static void rbtx4939_flash_copy_from(struct map_info *map, void *to,
329 unsigned long from, ssize_t len)
330 {
331 u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f;
332 unsigned char shift;
333 ssize_t curlen;
334
335 from += (unsigned long)map->virt;
336 if (bdipsw & 8) {
337 /* BOOT Mode: USER ROM1 / USER ROM2 */
338 shift = bdipsw & 3;
339 while (len) {
340 curlen = min_t(unsigned long, len,
341 0x400000 - (from & (0x400000 - 1)));
342 memcpy(to,
343 (void *)((from & ~0xc00000) |
344 ((((from >> 22) + shift) & 3) << 22)),
345 curlen);
346 len -= curlen;
347 from += curlen;
348 to += curlen;
349 }
350 return;
351 }
352 #ifdef __BIG_ENDIAN
353 if (bdipsw == 0) {
354 /* BOOT Mode: Monitor ROM */
355 while (len) {
356 curlen = min_t(unsigned long, len,
357 0x400000 - (from & (0x400000 - 1)));
358 memcpy(to, (void *)(from ^ 0x400000), curlen);
359 len -= curlen;
360 from += curlen;
361 to += curlen;
362 }
363 return;
364 }
365 #endif
366 memcpy(to, (void *)from, len);
367 }
368
rbtx4939_flash_map_init(struct map_info * map)369 static void rbtx4939_flash_map_init(struct map_info *map)
370 {
371 map->read = rbtx4939_flash_read16;
372 map->write = rbtx4939_flash_write16;
373 map->copy_from = rbtx4939_flash_copy_from;
374 }
375
rbtx4939_mtd_init(void)376 static void __init rbtx4939_mtd_init(void)
377 {
378 static struct {
379 struct platform_device dev;
380 struct resource res;
381 struct rbtx4939_flash_data data;
382 } pdevs[4];
383 int i;
384 static char names[4][8];
385 static struct mtd_partition parts[4];
386 struct rbtx4939_flash_data *boot_pdata = &pdevs[0].data;
387 u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f;
388
389 if (bdipsw & 8) {
390 /* BOOT Mode: USER ROM1 / USER ROM2 */
391 boot_pdata->nr_parts = 4;
392 for (i = 0; i < boot_pdata->nr_parts; i++) {
393 sprintf(names[i], "img%d", 4 - i);
394 parts[i].name = names[i];
395 parts[i].size = 0x400000;
396 parts[i].offset = MTDPART_OFS_NXTBLK;
397 }
398 } else if (bdipsw == 0) {
399 /* BOOT Mode: Monitor ROM */
400 boot_pdata->nr_parts = 2;
401 strcpy(names[0], "big");
402 strcpy(names[1], "little");
403 for (i = 0; i < boot_pdata->nr_parts; i++) {
404 parts[i].name = names[i];
405 parts[i].size = 0x400000;
406 parts[i].offset = MTDPART_OFS_NXTBLK;
407 }
408 } else {
409 /* BOOT Mode: ROM Emulator */
410 boot_pdata->nr_parts = 2;
411 parts[0].name = "boot";
412 parts[0].offset = 0xc00000;
413 parts[0].size = 0x400000;
414 parts[1].name = "user";
415 parts[1].offset = 0;
416 parts[1].size = 0xc00000;
417 }
418 boot_pdata->parts = parts;
419 boot_pdata->map_init = rbtx4939_flash_map_init;
420
421 for (i = 0; i < ARRAY_SIZE(pdevs); i++) {
422 struct resource *r = &pdevs[i].res;
423 struct platform_device *dev = &pdevs[i].dev;
424
425 r->start = 0x1f000000 - i * 0x1000000;
426 r->end = r->start + 0x1000000 - 1;
427 r->flags = IORESOURCE_MEM;
428 pdevs[i].data.width = 2;
429 dev->num_resources = 1;
430 dev->resource = r;
431 dev->id = i;
432 dev->name = "rbtx4939-flash";
433 dev->dev.platform_data = &pdevs[i].data;
434 platform_device_register(dev);
435 }
436 }
437 #else
rbtx4939_mtd_init(void)438 static void __init rbtx4939_mtd_init(void)
439 {
440 }
441 #endif
442
rbtx4939_arch_init(void)443 static void __init rbtx4939_arch_init(void)
444 {
445 rbtx4939_pci_setup();
446 }
447
rbtx4939_device_init(void)448 static void __init rbtx4939_device_init(void)
449 {
450 unsigned long smc_addr = RBTX4939_ETHER_ADDR - IO_BASE;
451 struct resource smc_res[] = {
452 {
453 .start = smc_addr,
454 .end = smc_addr + 0x10 - 1,
455 .flags = IORESOURCE_MEM,
456 }, {
457 .start = RBTX4939_IRQ_ETHER,
458 /* override default irq flag defined in smc91x.h */
459 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
460 },
461 };
462 struct smc91x_platdata smc_pdata = {
463 .flags = SMC91X_USE_16BIT,
464 };
465 struct platform_device *pdev;
466 #if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE)
467 int i, j;
468 unsigned char ethaddr[2][6];
469 u8 bdipsw = readb(rbtx4939_bdipsw_addr) & 0x0f;
470
471 for (i = 0; i < 2; i++) {
472 unsigned long area = CKSEG1 + 0x1fff0000 + (i * 0x10);
473 if (bdipsw == 0)
474 memcpy(ethaddr[i], (void *)area, 6);
475 else {
476 u16 buf[3];
477 if (bdipsw & 8)
478 area -= 0x03000000;
479 else
480 area -= 0x01000000;
481 for (j = 0; j < 3; j++)
482 buf[j] = le16_to_cpup((u16 *)(area + j * 2));
483 memcpy(ethaddr[i], buf, 6);
484 }
485 }
486 tx4939_ethaddr_init(ethaddr[0], ethaddr[1]);
487 #endif
488 pdev = platform_device_alloc("smc91x", -1);
489 if (!pdev ||
490 platform_device_add_resources(pdev, smc_res, ARRAY_SIZE(smc_res)) ||
491 platform_device_add_data(pdev, &smc_pdata, sizeof(smc_pdata)) ||
492 platform_device_add(pdev))
493 platform_device_put(pdev);
494 rbtx4939_mtd_init();
495 /* TC58DVM82A1FT: tDH=10ns, tWP=tRP=tREADID=35ns */
496 tx4939_ndfmc_init(10, 35,
497 (1 << 1) | (1 << 2),
498 (1 << 2)); /* ch1:8bit, ch2:16bit */
499 rbtx4939_led_setup();
500 tx4939_wdt_init();
501 tx4939_ata_init();
502 tx4939_rtc_init();
503 tx4939_dmac_init(0, 2);
504 tx4939_aclc_init();
505 platform_device_register_simple("txx9aclc-generic", -1, NULL, 0);
506 tx4939_sramc_init();
507 tx4939_rng_init();
508 }
509
rbtx4939_setup(void)510 static void __init rbtx4939_setup(void)
511 {
512 int i;
513
514 rbtx4939_ebusc_setup();
515 /* always enable ATA0 */
516 txx9_set64(&tx4939_ccfgptr->pcfg, TX4939_PCFG_ATA0MODE);
517 if (txx9_master_clock == 0)
518 txx9_master_clock = 20000000;
519 tx4939_setup();
520 rbtx4939_update_ioc_pen();
521 #ifdef HAVE_RBTX4939_IOSWAB
522 ioswabw = rbtx4939_ioswabw;
523 __mem_ioswabw = rbtx4939_mem_ioswabw;
524 #endif
525
526 _machine_restart = rbtx4939_machine_restart;
527
528 txx9_7segled_init(RBTX4939_MAX_7SEGLEDS, rbtx4939_7segled_putc);
529 for (i = 0; i < RBTX4939_MAX_7SEGLEDS; i++)
530 txx9_7segled_putc(i, '-');
531 pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
532 readb(rbtx4939_board_rev_addr), readb(rbtx4939_ioc_rev_addr),
533 readb(rbtx4939_udipsw_addr), readb(rbtx4939_bdipsw_addr));
534
535 #ifdef CONFIG_PCI
536 txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0);
537 txx9_board_pcibios_setup = tx4927_pcibios_setup;
538 #else
539 set_io_port_base(RBTX4939_ETHER_BASE);
540 #endif
541
542 tx4939_sio_init(TX4939_SCLK0(txx9_master_clock), 0);
543 }
544
545 struct txx9_board_vec rbtx4939_vec __initdata = {
546 .system = "Toshiba RBTX4939",
547 .prom_init = rbtx4939_prom_init,
548 .mem_setup = rbtx4939_setup,
549 .irq_setup = rbtx4939_irq_setup,
550 .time_init = rbtx4939_time_init,
551 .device_init = rbtx4939_device_init,
552 .arch_init = rbtx4939_arch_init,
553 #ifdef CONFIG_PCI
554 .pci_map_irq = tx4939_pci_map_irq,
555 #endif
556 };
557