1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2019 Collabora Ltd */
3
4 #include <linux/completion.h>
5 #include <linux/iopoll.h>
6 #include <linux/iosys-map.h>
7 #include <linux/pm_runtime.h>
8 #include <linux/slab.h>
9 #include <linux/uaccess.h>
10
11 #include <drm/drm_file.h>
12 #include <drm/drm_gem_shmem_helper.h>
13 #include <drm/panfrost_drm.h>
14
15 #include "panfrost_device.h"
16 #include "panfrost_features.h"
17 #include "panfrost_gem.h"
18 #include "panfrost_issues.h"
19 #include "panfrost_job.h"
20 #include "panfrost_mmu.h"
21 #include "panfrost_perfcnt.h"
22 #include "panfrost_regs.h"
23
24 #define COUNTERS_PER_BLOCK 64
25 #define BYTES_PER_COUNTER 4
26 #define BLOCKS_PER_COREGROUP 8
27 #define V4_SHADERS_PER_COREGROUP 4
28
29 struct panfrost_perfcnt {
30 struct panfrost_gem_mapping *mapping;
31 size_t bosize;
32 void *buf;
33 struct panfrost_file_priv *user;
34 struct mutex lock;
35 struct completion dump_comp;
36 };
37
panfrost_perfcnt_clean_cache_done(struct panfrost_device * pfdev)38 void panfrost_perfcnt_clean_cache_done(struct panfrost_device *pfdev)
39 {
40 complete(&pfdev->perfcnt->dump_comp);
41 }
42
panfrost_perfcnt_sample_done(struct panfrost_device * pfdev)43 void panfrost_perfcnt_sample_done(struct panfrost_device *pfdev)
44 {
45 gpu_write(pfdev, GPU_CMD, GPU_CMD_CLEAN_CACHES);
46 }
47
panfrost_perfcnt_dump_locked(struct panfrost_device * pfdev)48 static int panfrost_perfcnt_dump_locked(struct panfrost_device *pfdev)
49 {
50 u64 gpuva;
51 int ret;
52
53 reinit_completion(&pfdev->perfcnt->dump_comp);
54 gpuva = pfdev->perfcnt->mapping->mmnode.start << PAGE_SHIFT;
55 gpu_write(pfdev, GPU_PERFCNT_BASE_LO, lower_32_bits(gpuva));
56 gpu_write(pfdev, GPU_PERFCNT_BASE_HI, upper_32_bits(gpuva));
57 gpu_write(pfdev, GPU_INT_CLEAR,
58 GPU_IRQ_CLEAN_CACHES_COMPLETED |
59 GPU_IRQ_PERFCNT_SAMPLE_COMPLETED);
60 gpu_write(pfdev, GPU_CMD, GPU_CMD_PERFCNT_SAMPLE);
61 ret = wait_for_completion_interruptible_timeout(&pfdev->perfcnt->dump_comp,
62 msecs_to_jiffies(1000));
63 if (!ret)
64 ret = -ETIMEDOUT;
65 else if (ret > 0)
66 ret = 0;
67
68 return ret;
69 }
70
panfrost_perfcnt_enable_locked(struct panfrost_device * pfdev,struct drm_file * file_priv,unsigned int counterset)71 static int panfrost_perfcnt_enable_locked(struct panfrost_device *pfdev,
72 struct drm_file *file_priv,
73 unsigned int counterset)
74 {
75 struct panfrost_file_priv *user = file_priv->driver_priv;
76 struct panfrost_perfcnt *perfcnt = pfdev->perfcnt;
77 struct iosys_map map;
78 struct drm_gem_shmem_object *bo;
79 u32 cfg, as;
80 int ret;
81
82 if (user == perfcnt->user)
83 return 0;
84 else if (perfcnt->user)
85 return -EBUSY;
86
87 ret = pm_runtime_get_sync(pfdev->dev);
88 if (ret < 0)
89 goto err_put_pm;
90
91 bo = drm_gem_shmem_create(pfdev->ddev, perfcnt->bosize);
92 if (IS_ERR(bo)) {
93 ret = PTR_ERR(bo);
94 goto err_put_pm;
95 }
96
97 /* Map the perfcnt buf in the address space attached to file_priv. */
98 ret = panfrost_gem_open(&bo->base, file_priv);
99 if (ret)
100 goto err_put_bo;
101
102 perfcnt->mapping = panfrost_gem_mapping_get(to_panfrost_bo(&bo->base),
103 user);
104 if (!perfcnt->mapping) {
105 ret = -EINVAL;
106 goto err_close_bo;
107 }
108
109 ret = drm_gem_vmap(&bo->base, &map);
110 if (ret)
111 goto err_put_mapping;
112 perfcnt->buf = map.vaddr;
113
114 panfrost_gem_internal_set_label(&bo->base, "Perfcnt sample buffer");
115
116 /*
117 * Invalidate the cache and clear the counters to start from a fresh
118 * state.
119 */
120 reinit_completion(&pfdev->perfcnt->dump_comp);
121 gpu_write(pfdev, GPU_INT_CLEAR,
122 GPU_IRQ_CLEAN_CACHES_COMPLETED |
123 GPU_IRQ_PERFCNT_SAMPLE_COMPLETED);
124 gpu_write(pfdev, GPU_CMD, GPU_CMD_PERFCNT_CLEAR);
125 gpu_write(pfdev, GPU_CMD, GPU_CMD_CLEAN_INV_CACHES);
126 ret = wait_for_completion_timeout(&pfdev->perfcnt->dump_comp,
127 msecs_to_jiffies(1000));
128 if (!ret) {
129 ret = -ETIMEDOUT;
130 goto err_vunmap;
131 }
132
133 perfcnt->user = user;
134
135 as = panfrost_mmu_as_get(pfdev, perfcnt->mapping->mmu);
136 cfg = GPU_PERFCNT_CFG_AS(as) |
137 GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_MANUAL);
138
139 /*
140 * Bifrost GPUs have 2 set of counters, but we're only interested by
141 * the first one for now.
142 */
143 if (panfrost_model_is_bifrost(pfdev))
144 cfg |= GPU_PERFCNT_CFG_SETSEL(counterset);
145
146 gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0xffffffff);
147 gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0xffffffff);
148 gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0xffffffff);
149
150 /*
151 * Due to PRLAM-8186 we need to disable the Tiler before we enable HW
152 * counters.
153 */
154 if (panfrost_has_hw_issue(pfdev, HW_ISSUE_8186))
155 gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0);
156 else
157 gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0xffffffff);
158
159 gpu_write(pfdev, GPU_PERFCNT_CFG, cfg);
160
161 if (panfrost_has_hw_issue(pfdev, HW_ISSUE_8186))
162 gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0xffffffff);
163
164 /* The BO ref is retained by the mapping. */
165 drm_gem_object_put(&bo->base);
166
167 return 0;
168
169 err_vunmap:
170 drm_gem_vunmap(&bo->base, &map);
171 err_put_mapping:
172 panfrost_gem_mapping_put(perfcnt->mapping);
173 err_close_bo:
174 panfrost_gem_close(&bo->base, file_priv);
175 err_put_bo:
176 drm_gem_object_put(&bo->base);
177 err_put_pm:
178 pm_runtime_put(pfdev->dev);
179 return ret;
180 }
181
panfrost_perfcnt_disable_locked(struct panfrost_device * pfdev,struct drm_file * file_priv)182 static int panfrost_perfcnt_disable_locked(struct panfrost_device *pfdev,
183 struct drm_file *file_priv)
184 {
185 struct panfrost_file_priv *user = file_priv->driver_priv;
186 struct panfrost_perfcnt *perfcnt = pfdev->perfcnt;
187 struct iosys_map map = IOSYS_MAP_INIT_VADDR(perfcnt->buf);
188
189 if (user != perfcnt->user)
190 return -EINVAL;
191
192 gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0x0);
193 gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0x0);
194 gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0x0);
195 gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0);
196 gpu_write(pfdev, GPU_PERFCNT_CFG,
197 GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF));
198
199 perfcnt->user = NULL;
200 drm_gem_vunmap(&perfcnt->mapping->obj->base.base, &map);
201 perfcnt->buf = NULL;
202 panfrost_gem_close(&perfcnt->mapping->obj->base.base, file_priv);
203 panfrost_mmu_as_put(pfdev, perfcnt->mapping->mmu);
204 panfrost_gem_mapping_put(perfcnt->mapping);
205 perfcnt->mapping = NULL;
206 pm_runtime_mark_last_busy(pfdev->dev);
207 pm_runtime_put_autosuspend(pfdev->dev);
208
209 return 0;
210 }
211
panfrost_ioctl_perfcnt_enable(struct drm_device * dev,void * data,struct drm_file * file_priv)212 int panfrost_ioctl_perfcnt_enable(struct drm_device *dev, void *data,
213 struct drm_file *file_priv)
214 {
215 struct panfrost_device *pfdev = dev->dev_private;
216 struct panfrost_perfcnt *perfcnt = pfdev->perfcnt;
217 struct drm_panfrost_perfcnt_enable *req = data;
218 int ret;
219
220 ret = panfrost_unstable_ioctl_check();
221 if (ret)
222 return ret;
223
224 /* Only Bifrost GPUs have 2 set of counters. */
225 if (req->counterset > (panfrost_model_is_bifrost(pfdev) ? 1 : 0))
226 return -EINVAL;
227
228 mutex_lock(&perfcnt->lock);
229 if (req->enable)
230 ret = panfrost_perfcnt_enable_locked(pfdev, file_priv,
231 req->counterset);
232 else
233 ret = panfrost_perfcnt_disable_locked(pfdev, file_priv);
234 mutex_unlock(&perfcnt->lock);
235
236 return ret;
237 }
238
panfrost_ioctl_perfcnt_dump(struct drm_device * dev,void * data,struct drm_file * file_priv)239 int panfrost_ioctl_perfcnt_dump(struct drm_device *dev, void *data,
240 struct drm_file *file_priv)
241 {
242 struct panfrost_device *pfdev = dev->dev_private;
243 struct panfrost_perfcnt *perfcnt = pfdev->perfcnt;
244 struct drm_panfrost_perfcnt_dump *req = data;
245 void __user *user_ptr = (void __user *)(uintptr_t)req->buf_ptr;
246 int ret;
247
248 ret = panfrost_unstable_ioctl_check();
249 if (ret)
250 return ret;
251
252 mutex_lock(&perfcnt->lock);
253 if (perfcnt->user != file_priv->driver_priv) {
254 ret = -EINVAL;
255 goto out;
256 }
257
258 ret = panfrost_perfcnt_dump_locked(pfdev);
259 if (ret)
260 goto out;
261
262 if (copy_to_user(user_ptr, perfcnt->buf, perfcnt->bosize))
263 ret = -EFAULT;
264
265 out:
266 mutex_unlock(&perfcnt->lock);
267
268 return ret;
269 }
270
panfrost_perfcnt_close(struct drm_file * file_priv)271 void panfrost_perfcnt_close(struct drm_file *file_priv)
272 {
273 struct panfrost_file_priv *pfile = file_priv->driver_priv;
274 struct panfrost_device *pfdev = pfile->pfdev;
275 struct panfrost_perfcnt *perfcnt = pfdev->perfcnt;
276
277 pm_runtime_get_sync(pfdev->dev);
278 mutex_lock(&perfcnt->lock);
279 if (perfcnt->user == pfile)
280 panfrost_perfcnt_disable_locked(pfdev, file_priv);
281 mutex_unlock(&perfcnt->lock);
282 pm_runtime_mark_last_busy(pfdev->dev);
283 pm_runtime_put_autosuspend(pfdev->dev);
284 }
285
panfrost_perfcnt_init(struct panfrost_device * pfdev)286 int panfrost_perfcnt_init(struct panfrost_device *pfdev)
287 {
288 struct panfrost_perfcnt *perfcnt;
289 size_t size;
290
291 if (panfrost_has_hw_feature(pfdev, HW_FEATURE_V4)) {
292 unsigned int ncoregroups;
293
294 ncoregroups = hweight64(pfdev->features.l2_present);
295 size = ncoregroups * BLOCKS_PER_COREGROUP *
296 COUNTERS_PER_BLOCK * BYTES_PER_COUNTER;
297 } else {
298 unsigned int nl2c, ncores;
299
300 /*
301 * TODO: define a macro to extract the number of l2 caches from
302 * mem_features.
303 */
304 nl2c = ((pfdev->features.mem_features >> 8) & GENMASK(3, 0)) + 1;
305
306 /*
307 * shader_present might be sparse, but the counters layout
308 * forces to dump unused regions too, hence the fls64() call
309 * instead of hweight64().
310 */
311 ncores = fls64(pfdev->features.shader_present);
312
313 /*
314 * There's always one JM and one Tiler block, hence the '+ 2'
315 * here.
316 */
317 size = (nl2c + ncores + 2) *
318 COUNTERS_PER_BLOCK * BYTES_PER_COUNTER;
319 }
320
321 perfcnt = devm_kzalloc(pfdev->dev, sizeof(*perfcnt), GFP_KERNEL);
322 if (!perfcnt)
323 return -ENOMEM;
324
325 perfcnt->bosize = size;
326
327 /* Start with everything disabled. */
328 gpu_write(pfdev, GPU_PERFCNT_CFG,
329 GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF));
330 gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0);
331 gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0);
332 gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0);
333 gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0);
334
335 init_completion(&perfcnt->dump_comp);
336 mutex_init(&perfcnt->lock);
337 pfdev->perfcnt = perfcnt;
338
339 return 0;
340 }
341
panfrost_perfcnt_fini(struct panfrost_device * pfdev)342 void panfrost_perfcnt_fini(struct panfrost_device *pfdev)
343 {
344 /* Disable everything before leaving. */
345 gpu_write(pfdev, GPU_PERFCNT_CFG,
346 GPU_PERFCNT_CFG_MODE(GPU_PERFCNT_CFG_MODE_OFF));
347 gpu_write(pfdev, GPU_PRFCNT_JM_EN, 0);
348 gpu_write(pfdev, GPU_PRFCNT_SHADER_EN, 0);
349 gpu_write(pfdev, GPU_PRFCNT_MMU_L2_EN, 0);
350 gpu_write(pfdev, GPU_PRFCNT_TILER_EN, 0);
351 }
352