1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * HDMI driver for OMAP5
4 *
5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
6 *
7 * Authors:
8 * Yong Zhi
9 * Mythri pk
10 * Archit Taneja <archit@ti.com>
11 * Tomi Valkeinen <tomi.valkeinen@ti.com>
12 */
13
14 #define DSS_SUBSYS_NAME "HDMI"
15
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/err.h>
19 #include <linux/io.h>
20 #include <linux/interrupt.h>
21 #include <linux/mutex.h>
22 #include <linux/delay.h>
23 #include <linux/string.h>
24 #include <linux/platform_device.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/clk.h>
27 #include <linux/regulator/consumer.h>
28 #include <linux/component.h>
29 #include <linux/of.h>
30 #include <linux/of_graph.h>
31 #include <sound/omap-hdmi-audio.h>
32
33 #include <drm/drm_atomic.h>
34 #include <drm/drm_atomic_state_helper.h>
35 #include <drm/drm_edid.h>
36
37 #include "omapdss.h"
38 #include "hdmi5_core.h"
39 #include "dss.h"
40
hdmi_runtime_get(struct omap_hdmi * hdmi)41 static int hdmi_runtime_get(struct omap_hdmi *hdmi)
42 {
43 int r;
44
45 DSSDBG("hdmi_runtime_get\n");
46
47 r = pm_runtime_get_sync(&hdmi->pdev->dev);
48 if (WARN_ON(r < 0)) {
49 pm_runtime_put_noidle(&hdmi->pdev->dev);
50 return r;
51 }
52 return 0;
53 }
54
hdmi_runtime_put(struct omap_hdmi * hdmi)55 static void hdmi_runtime_put(struct omap_hdmi *hdmi)
56 {
57 int r;
58
59 DSSDBG("hdmi_runtime_put\n");
60
61 r = pm_runtime_put_sync(&hdmi->pdev->dev);
62 WARN_ON(r < 0 && r != -ENOSYS);
63 }
64
hdmi_irq_handler(int irq,void * data)65 static irqreturn_t hdmi_irq_handler(int irq, void *data)
66 {
67 struct omap_hdmi *hdmi = data;
68 struct hdmi_wp_data *wp = &hdmi->wp;
69 u32 irqstatus;
70
71 irqstatus = hdmi_wp_get_irqstatus(wp);
72 hdmi_wp_set_irqstatus(wp, irqstatus);
73
74 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
75 irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
76 u32 v;
77 /*
78 * If we get both connect and disconnect interrupts at the same
79 * time, turn off the PHY, clear interrupts, and restart, which
80 * raises connect interrupt if a cable is connected, or nothing
81 * if cable is not connected.
82 */
83
84 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
85
86 /*
87 * We always get bogus CONNECT & DISCONNECT interrupts when
88 * setting the PHY to LDOON. To ignore those, we force the RXDET
89 * line to 0 until the PHY power state has been changed.
90 */
91 v = hdmi_read_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
92 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
93 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
94 hdmi_write_reg(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
95
96 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
97 HDMI_IRQ_LINK_DISCONNECT);
98
99 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
100
101 REG_FLD_MOD(hdmi->phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
102
103 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
104 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
105 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
106 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
107 }
108
109 return IRQ_HANDLED;
110 }
111
hdmi_power_on_core(struct omap_hdmi * hdmi)112 static int hdmi_power_on_core(struct omap_hdmi *hdmi)
113 {
114 int r;
115
116 r = regulator_enable(hdmi->vdda_reg);
117 if (r)
118 return r;
119
120 r = hdmi_runtime_get(hdmi);
121 if (r)
122 goto err_runtime_get;
123
124 /* Make selection of HDMI in DSS */
125 dss_select_hdmi_venc_clk_source(hdmi->dss, DSS_HDMI_M_PCLK);
126
127 hdmi->core_enabled = true;
128
129 return 0;
130
131 err_runtime_get:
132 regulator_disable(hdmi->vdda_reg);
133
134 return r;
135 }
136
hdmi_power_off_core(struct omap_hdmi * hdmi)137 static void hdmi_power_off_core(struct omap_hdmi *hdmi)
138 {
139 hdmi->core_enabled = false;
140
141 hdmi_runtime_put(hdmi);
142 regulator_disable(hdmi->vdda_reg);
143 }
144
hdmi_power_on_full(struct omap_hdmi * hdmi)145 static int hdmi_power_on_full(struct omap_hdmi *hdmi)
146 {
147 int r;
148 const struct videomode *vm;
149 struct dss_pll_clock_info hdmi_cinfo = { 0 };
150 unsigned int pc;
151
152 r = hdmi_power_on_core(hdmi);
153 if (r)
154 return r;
155
156 vm = &hdmi->cfg.vm;
157
158 DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
159 vm->vactive);
160
161 pc = vm->pixelclock;
162 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
163 pc *= 2;
164
165 /* DSS_HDMI_TCLK is bitclk / 10 */
166 pc *= 10;
167
168 dss_pll_calc_b(&hdmi->pll.pll, clk_get_rate(hdmi->pll.pll.clkin),
169 pc, &hdmi_cinfo);
170
171 /* disable and clear irqs */
172 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
173 hdmi_wp_set_irqstatus(&hdmi->wp,
174 hdmi_wp_get_irqstatus(&hdmi->wp));
175
176 r = dss_pll_enable(&hdmi->pll.pll);
177 if (r) {
178 DSSERR("Failed to enable PLL\n");
179 goto err_pll_enable;
180 }
181
182 r = dss_pll_set_config(&hdmi->pll.pll, &hdmi_cinfo);
183 if (r) {
184 DSSERR("Failed to configure PLL\n");
185 goto err_pll_cfg;
186 }
187
188 r = hdmi_phy_configure(&hdmi->phy, hdmi_cinfo.clkdco,
189 hdmi_cinfo.clkout[0]);
190 if (r) {
191 DSSDBG("Failed to start PHY\n");
192 goto err_phy_cfg;
193 }
194
195 r = hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_LDOON);
196 if (r)
197 goto err_phy_pwr;
198
199 hdmi5_configure(&hdmi->core, &hdmi->wp, &hdmi->cfg);
200
201 r = dss_mgr_enable(&hdmi->output);
202 if (r)
203 goto err_mgr_enable;
204
205 r = hdmi_wp_video_start(&hdmi->wp);
206 if (r)
207 goto err_vid_enable;
208
209 hdmi_wp_set_irqenable(&hdmi->wp,
210 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
211
212 return 0;
213
214 err_vid_enable:
215 dss_mgr_disable(&hdmi->output);
216 err_mgr_enable:
217 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
218 err_phy_pwr:
219 err_phy_cfg:
220 err_pll_cfg:
221 dss_pll_disable(&hdmi->pll.pll);
222 err_pll_enable:
223 hdmi_power_off_core(hdmi);
224 return -EIO;
225 }
226
hdmi_power_off_full(struct omap_hdmi * hdmi)227 static void hdmi_power_off_full(struct omap_hdmi *hdmi)
228 {
229 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff);
230
231 hdmi_wp_video_stop(&hdmi->wp);
232
233 dss_mgr_disable(&hdmi->output);
234
235 hdmi_wp_set_phy_pwr(&hdmi->wp, HDMI_PHYPWRCMD_OFF);
236
237 dss_pll_disable(&hdmi->pll.pll);
238
239 hdmi_power_off_core(hdmi);
240 }
241
hdmi_dump_regs(struct seq_file * s,void * p)242 static int hdmi_dump_regs(struct seq_file *s, void *p)
243 {
244 struct omap_hdmi *hdmi = s->private;
245
246 mutex_lock(&hdmi->lock);
247
248 if (hdmi_runtime_get(hdmi)) {
249 mutex_unlock(&hdmi->lock);
250 return 0;
251 }
252
253 hdmi_wp_dump(&hdmi->wp, s);
254 hdmi_pll_dump(&hdmi->pll, s);
255 hdmi_phy_dump(&hdmi->phy, s);
256 hdmi5_core_dump(&hdmi->core, s);
257
258 hdmi_runtime_put(hdmi);
259 mutex_unlock(&hdmi->lock);
260 return 0;
261 }
262
hdmi_start_audio_stream(struct omap_hdmi * hd)263 static void hdmi_start_audio_stream(struct omap_hdmi *hd)
264 {
265 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
266 hdmi_wp_audio_enable(&hd->wp, true);
267 hdmi_wp_audio_core_req_enable(&hd->wp, true);
268 }
269
hdmi_stop_audio_stream(struct omap_hdmi * hd)270 static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
271 {
272 hdmi_wp_audio_core_req_enable(&hd->wp, false);
273 hdmi_wp_audio_enable(&hd->wp, false);
274 REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
275 }
276
hdmi_core_enable(struct omap_hdmi * hdmi)277 static int hdmi_core_enable(struct omap_hdmi *hdmi)
278 {
279 int r = 0;
280
281 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
282
283 mutex_lock(&hdmi->lock);
284
285 r = hdmi_power_on_core(hdmi);
286 if (r) {
287 DSSERR("failed to power on device\n");
288 goto err0;
289 }
290
291 mutex_unlock(&hdmi->lock);
292 return 0;
293
294 err0:
295 mutex_unlock(&hdmi->lock);
296 return r;
297 }
298
hdmi_core_disable(struct omap_hdmi * hdmi)299 static void hdmi_core_disable(struct omap_hdmi *hdmi)
300 {
301 DSSDBG("Enter omapdss_hdmi_core_disable\n");
302
303 mutex_lock(&hdmi->lock);
304
305 hdmi_power_off_core(hdmi);
306
307 mutex_unlock(&hdmi->lock);
308 }
309
310 /* -----------------------------------------------------------------------------
311 * DRM Bridge Operations
312 */
313
hdmi5_bridge_attach(struct drm_bridge * bridge,struct drm_encoder * encoder,enum drm_bridge_attach_flags flags)314 static int hdmi5_bridge_attach(struct drm_bridge *bridge,
315 struct drm_encoder *encoder,
316 enum drm_bridge_attach_flags flags)
317 {
318 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
319
320 if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR))
321 return -EINVAL;
322
323 return drm_bridge_attach(encoder, hdmi->output.next_bridge,
324 bridge, flags);
325 }
326
hdmi5_bridge_mode_set(struct drm_bridge * bridge,const struct drm_display_mode * mode,const struct drm_display_mode * adjusted_mode)327 static void hdmi5_bridge_mode_set(struct drm_bridge *bridge,
328 const struct drm_display_mode *mode,
329 const struct drm_display_mode *adjusted_mode)
330 {
331 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
332
333 mutex_lock(&hdmi->lock);
334
335 drm_display_mode_to_videomode(adjusted_mode, &hdmi->cfg.vm);
336
337 dispc_set_tv_pclk(hdmi->dss->dispc, adjusted_mode->clock * 1000);
338
339 mutex_unlock(&hdmi->lock);
340 }
341
hdmi5_bridge_enable(struct drm_bridge * bridge,struct drm_atomic_state * state)342 static void hdmi5_bridge_enable(struct drm_bridge *bridge,
343 struct drm_atomic_state *state)
344 {
345 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
346 struct drm_connector_state *conn_state;
347 struct drm_connector *connector;
348 struct drm_crtc_state *crtc_state;
349 unsigned long flags;
350 int ret;
351
352 /*
353 * None of these should fail, as the bridge can't be enabled without a
354 * valid CRTC to connector path with fully populated new states.
355 */
356 connector = drm_atomic_get_new_connector_for_encoder(state,
357 bridge->encoder);
358 if (WARN_ON(!connector))
359 return;
360 conn_state = drm_atomic_get_new_connector_state(state, connector);
361 if (WARN_ON(!conn_state))
362 return;
363 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
364 if (WARN_ON(!crtc_state))
365 return;
366
367 hdmi->cfg.hdmi_dvi_mode = connector->display_info.is_hdmi
368 ? HDMI_HDMI : HDMI_DVI;
369
370 if (connector->display_info.is_hdmi) {
371 const struct drm_display_mode *mode;
372 struct hdmi_avi_infoframe avi;
373
374 mode = &crtc_state->adjusted_mode;
375 ret = drm_hdmi_avi_infoframe_from_display_mode(&avi, connector,
376 mode);
377 if (ret == 0)
378 hdmi->cfg.infoframe = avi;
379 }
380
381 mutex_lock(&hdmi->lock);
382
383 ret = hdmi_power_on_full(hdmi);
384 if (ret) {
385 DSSERR("failed to power on device\n");
386 goto done;
387 }
388
389 if (hdmi->audio_configured) {
390 ret = hdmi5_audio_config(&hdmi->core, &hdmi->wp,
391 &hdmi->audio_config,
392 hdmi->cfg.vm.pixelclock);
393 if (ret) {
394 DSSERR("Error restoring audio configuration: %d", ret);
395 hdmi->audio_abort_cb(&hdmi->pdev->dev);
396 hdmi->audio_configured = false;
397 }
398 }
399
400 spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
401 if (hdmi->audio_configured && hdmi->audio_playing)
402 hdmi_start_audio_stream(hdmi);
403 hdmi->display_enabled = true;
404 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
405
406 done:
407 mutex_unlock(&hdmi->lock);
408 }
409
hdmi5_bridge_disable(struct drm_bridge * bridge,struct drm_atomic_state * state)410 static void hdmi5_bridge_disable(struct drm_bridge *bridge,
411 struct drm_atomic_state *state)
412 {
413 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
414 unsigned long flags;
415
416 mutex_lock(&hdmi->lock);
417
418 spin_lock_irqsave(&hdmi->audio_playing_lock, flags);
419 hdmi_stop_audio_stream(hdmi);
420 hdmi->display_enabled = false;
421 spin_unlock_irqrestore(&hdmi->audio_playing_lock, flags);
422
423 hdmi_power_off_full(hdmi);
424
425 mutex_unlock(&hdmi->lock);
426 }
427
hdmi5_bridge_edid_read(struct drm_bridge * bridge,struct drm_connector * connector)428 static const struct drm_edid *hdmi5_bridge_edid_read(struct drm_bridge *bridge,
429 struct drm_connector *connector)
430 {
431 struct omap_hdmi *hdmi = drm_bridge_to_hdmi(bridge);
432 const struct drm_edid *drm_edid;
433 bool need_enable;
434 int idlemode;
435 int r;
436
437 need_enable = hdmi->core_enabled == false;
438
439 if (need_enable) {
440 r = hdmi_core_enable(hdmi);
441 if (r)
442 return NULL;
443 }
444
445 mutex_lock(&hdmi->lock);
446 r = hdmi_runtime_get(hdmi);
447 BUG_ON(r);
448
449 idlemode = REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
450 /* No-idle mode */
451 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
452
453 hdmi5_core_ddc_init(&hdmi->core);
454
455 drm_edid = drm_edid_read_custom(connector, hdmi5_core_ddc_read, &hdmi->core);
456
457 hdmi5_core_ddc_uninit(&hdmi->core);
458
459 REG_FLD_MOD(hdmi->wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
460
461 hdmi_runtime_put(hdmi);
462 mutex_unlock(&hdmi->lock);
463
464 if (need_enable)
465 hdmi_core_disable(hdmi);
466
467 return drm_edid;
468 }
469
470 static const struct drm_bridge_funcs hdmi5_bridge_funcs = {
471 .attach = hdmi5_bridge_attach,
472 .mode_set = hdmi5_bridge_mode_set,
473 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
474 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
475 .atomic_reset = drm_atomic_helper_bridge_reset,
476 .atomic_enable = hdmi5_bridge_enable,
477 .atomic_disable = hdmi5_bridge_disable,
478 .edid_read = hdmi5_bridge_edid_read,
479 };
480
hdmi5_bridge_init(struct omap_hdmi * hdmi)481 static void hdmi5_bridge_init(struct omap_hdmi *hdmi)
482 {
483 hdmi->bridge.of_node = hdmi->pdev->dev.of_node;
484 hdmi->bridge.ops = DRM_BRIDGE_OP_EDID;
485 hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
486
487 drm_bridge_add(&hdmi->bridge);
488 }
489
hdmi5_bridge_cleanup(struct omap_hdmi * hdmi)490 static void hdmi5_bridge_cleanup(struct omap_hdmi *hdmi)
491 {
492 drm_bridge_remove(&hdmi->bridge);
493 }
494
495 /* -----------------------------------------------------------------------------
496 * Audio Callbacks
497 */
498
hdmi_audio_startup(struct device * dev,void (* abort_cb)(struct device * dev))499 static int hdmi_audio_startup(struct device *dev,
500 void (*abort_cb)(struct device *dev))
501 {
502 struct omap_hdmi *hd = dev_get_drvdata(dev);
503
504 mutex_lock(&hd->lock);
505
506 WARN_ON(hd->audio_abort_cb != NULL);
507
508 hd->audio_abort_cb = abort_cb;
509
510 mutex_unlock(&hd->lock);
511
512 return 0;
513 }
514
hdmi_audio_shutdown(struct device * dev)515 static int hdmi_audio_shutdown(struct device *dev)
516 {
517 struct omap_hdmi *hd = dev_get_drvdata(dev);
518
519 mutex_lock(&hd->lock);
520 hd->audio_abort_cb = NULL;
521 hd->audio_configured = false;
522 hd->audio_playing = false;
523 mutex_unlock(&hd->lock);
524
525 return 0;
526 }
527
hdmi_audio_start(struct device * dev)528 static int hdmi_audio_start(struct device *dev)
529 {
530 struct omap_hdmi *hd = dev_get_drvdata(dev);
531 unsigned long flags;
532
533 spin_lock_irqsave(&hd->audio_playing_lock, flags);
534
535 if (hd->display_enabled) {
536 if (!hdmi_mode_has_audio(&hd->cfg))
537 DSSERR("%s: Video mode does not support audio\n",
538 __func__);
539 hdmi_start_audio_stream(hd);
540 }
541 hd->audio_playing = true;
542
543 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
544 return 0;
545 }
546
hdmi_audio_stop(struct device * dev)547 static void hdmi_audio_stop(struct device *dev)
548 {
549 struct omap_hdmi *hd = dev_get_drvdata(dev);
550 unsigned long flags;
551
552 if (!hdmi_mode_has_audio(&hd->cfg))
553 DSSERR("%s: Video mode does not support audio\n", __func__);
554
555 spin_lock_irqsave(&hd->audio_playing_lock, flags);
556
557 if (hd->display_enabled)
558 hdmi_stop_audio_stream(hd);
559 hd->audio_playing = false;
560
561 spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
562 }
563
hdmi_audio_config(struct device * dev,struct omap_dss_audio * dss_audio)564 static int hdmi_audio_config(struct device *dev,
565 struct omap_dss_audio *dss_audio)
566 {
567 struct omap_hdmi *hd = dev_get_drvdata(dev);
568 int ret = 0;
569
570 mutex_lock(&hd->lock);
571
572 if (hd->display_enabled) {
573 ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
574 hd->cfg.vm.pixelclock);
575 if (ret)
576 goto out;
577 }
578
579 hd->audio_configured = true;
580 hd->audio_config = *dss_audio;
581 out:
582 mutex_unlock(&hd->lock);
583
584 return ret;
585 }
586
587 static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
588 .audio_startup = hdmi_audio_startup,
589 .audio_shutdown = hdmi_audio_shutdown,
590 .audio_start = hdmi_audio_start,
591 .audio_stop = hdmi_audio_stop,
592 .audio_config = hdmi_audio_config,
593 };
594
hdmi_audio_register(struct omap_hdmi * hdmi)595 static int hdmi_audio_register(struct omap_hdmi *hdmi)
596 {
597 struct omap_hdmi_audio_pdata pdata = {
598 .dev = &hdmi->pdev->dev,
599 .version = 5,
600 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi->wp),
601 .ops = &hdmi_audio_ops,
602 };
603
604 hdmi->audio_pdev = platform_device_register_data(
605 &hdmi->pdev->dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
606 &pdata, sizeof(pdata));
607
608 if (IS_ERR(hdmi->audio_pdev))
609 return PTR_ERR(hdmi->audio_pdev);
610
611 hdmi_runtime_get(hdmi);
612 hdmi->wp_idlemode =
613 REG_GET(hdmi->wp.base, HDMI_WP_SYSCONFIG, 3, 2);
614 hdmi_runtime_put(hdmi);
615
616 return 0;
617 }
618
619 /* -----------------------------------------------------------------------------
620 * Component Bind & Unbind
621 */
622
hdmi5_bind(struct device * dev,struct device * master,void * data)623 static int hdmi5_bind(struct device *dev, struct device *master, void *data)
624 {
625 struct dss_device *dss = dss_get_device(master);
626 struct omap_hdmi *hdmi = dev_get_drvdata(dev);
627 int r;
628
629 hdmi->dss = dss;
630
631 r = hdmi_pll_init(dss, hdmi->pdev, &hdmi->pll, &hdmi->wp);
632 if (r)
633 return r;
634
635 r = hdmi_audio_register(hdmi);
636 if (r) {
637 DSSERR("Registering HDMI audio failed %d\n", r);
638 goto err_pll_uninit;
639 }
640
641 hdmi->debugfs = dss_debugfs_create_file(dss, "hdmi", hdmi_dump_regs,
642 hdmi);
643
644 return 0;
645
646 err_pll_uninit:
647 hdmi_pll_uninit(&hdmi->pll);
648 return r;
649 }
650
hdmi5_unbind(struct device * dev,struct device * master,void * data)651 static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
652 {
653 struct omap_hdmi *hdmi = dev_get_drvdata(dev);
654
655 dss_debugfs_remove_file(hdmi->debugfs);
656
657 if (hdmi->audio_pdev)
658 platform_device_unregister(hdmi->audio_pdev);
659
660 hdmi_pll_uninit(&hdmi->pll);
661 }
662
663 static const struct component_ops hdmi5_component_ops = {
664 .bind = hdmi5_bind,
665 .unbind = hdmi5_unbind,
666 };
667
668 /* -----------------------------------------------------------------------------
669 * Probe & Remove, Suspend & Resume
670 */
671
hdmi5_init_output(struct omap_hdmi * hdmi)672 static int hdmi5_init_output(struct omap_hdmi *hdmi)
673 {
674 struct omap_dss_device *out = &hdmi->output;
675 int r;
676
677 hdmi5_bridge_init(hdmi);
678
679 out->dev = &hdmi->pdev->dev;
680 out->id = OMAP_DSS_OUTPUT_HDMI;
681 out->type = OMAP_DISPLAY_TYPE_HDMI;
682 out->name = "hdmi.0";
683 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
684 out->of_port = 0;
685
686 r = omapdss_device_init_output(out, &hdmi->bridge);
687 if (r < 0) {
688 hdmi5_bridge_cleanup(hdmi);
689 return r;
690 }
691
692 omapdss_device_register(out);
693
694 return 0;
695 }
696
hdmi5_uninit_output(struct omap_hdmi * hdmi)697 static void hdmi5_uninit_output(struct omap_hdmi *hdmi)
698 {
699 struct omap_dss_device *out = &hdmi->output;
700
701 omapdss_device_unregister(out);
702 omapdss_device_cleanup_output(out);
703
704 hdmi5_bridge_cleanup(hdmi);
705 }
706
hdmi5_probe_of(struct omap_hdmi * hdmi)707 static int hdmi5_probe_of(struct omap_hdmi *hdmi)
708 {
709 struct platform_device *pdev = hdmi->pdev;
710 struct device_node *node = pdev->dev.of_node;
711 struct device_node *ep;
712 int r;
713
714 ep = of_graph_get_endpoint_by_regs(node, 0, 0);
715 if (!ep)
716 return 0;
717
718 r = hdmi_parse_lanes_of(pdev, ep, &hdmi->phy);
719 of_node_put(ep);
720 return r;
721 }
722
hdmi5_probe(struct platform_device * pdev)723 static int hdmi5_probe(struct platform_device *pdev)
724 {
725 struct omap_hdmi *hdmi;
726 int irq;
727 int r;
728
729 hdmi = devm_drm_bridge_alloc(&pdev->dev, struct omap_hdmi, bridge, &hdmi5_bridge_funcs);
730 if (IS_ERR(hdmi))
731 return PTR_ERR(hdmi);
732
733 hdmi->pdev = pdev;
734
735 dev_set_drvdata(&pdev->dev, hdmi);
736
737 mutex_init(&hdmi->lock);
738 spin_lock_init(&hdmi->audio_playing_lock);
739
740 r = hdmi5_probe_of(hdmi);
741 if (r)
742 return r;
743
744 r = hdmi_wp_init(pdev, &hdmi->wp, 5);
745 if (r)
746 return r;
747
748 r = hdmi_phy_init(pdev, &hdmi->phy, 5);
749 if (r)
750 return r;
751
752 r = hdmi5_core_init(pdev, &hdmi->core);
753 if (r)
754 return r;
755
756 irq = platform_get_irq(pdev, 0);
757 if (irq < 0) {
758 DSSERR("platform_get_irq failed\n");
759 return -ENODEV;
760 }
761
762 r = devm_request_threaded_irq(&pdev->dev, irq,
763 NULL, hdmi_irq_handler,
764 IRQF_ONESHOT, "OMAP HDMI", hdmi);
765 if (r) {
766 DSSERR("HDMI IRQ request failed\n");
767 return r;
768 }
769
770 hdmi->vdda_reg = devm_regulator_get(&pdev->dev, "vdda");
771 if (IS_ERR(hdmi->vdda_reg)) {
772 r = PTR_ERR(hdmi->vdda_reg);
773 if (r != -EPROBE_DEFER)
774 DSSERR("can't get VDDA regulator\n");
775 return r;
776 }
777
778 pm_runtime_enable(&pdev->dev);
779
780 r = hdmi5_init_output(hdmi);
781 if (r)
782 goto err_pm_disable;
783
784 r = component_add(&pdev->dev, &hdmi5_component_ops);
785 if (r)
786 goto err_uninit_output;
787
788 return 0;
789
790 err_uninit_output:
791 hdmi5_uninit_output(hdmi);
792 err_pm_disable:
793 pm_runtime_disable(&pdev->dev);
794 return r;
795 }
796
hdmi5_remove(struct platform_device * pdev)797 static void hdmi5_remove(struct platform_device *pdev)
798 {
799 struct omap_hdmi *hdmi = platform_get_drvdata(pdev);
800
801 component_del(&pdev->dev, &hdmi5_component_ops);
802
803 hdmi5_uninit_output(hdmi);
804
805 pm_runtime_disable(&pdev->dev);
806 }
807
808 static const struct of_device_id hdmi_of_match[] = {
809 { .compatible = "ti,omap5-hdmi", },
810 { .compatible = "ti,dra7-hdmi", },
811 {},
812 };
813
814 struct platform_driver omapdss_hdmi5hw_driver = {
815 .probe = hdmi5_probe,
816 .remove = hdmi5_remove,
817 .driver = {
818 .name = "omapdss_hdmi5",
819 .of_match_table = hdmi_of_match,
820 .suppress_bind_attrs = true,
821 },
822 };
823