1 /*
2  * OMAP 32ksynctimer/counter_32k-related code
3  *
4  * Copyright (C) 2009 Texas Instruments
5  * Copyright (C) 2010 Nokia Corporation
6  * Tony Lindgren <tony@atomide.com>
7  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * NOTE: This timer is not the same timer as the old OMAP1 MPU timer.
14  */
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/clk.h>
18 #include <linux/err.h>
19 #include <linux/io.h>
20 #include <linux/clocksource.h>
21 
22 #include <asm/sched_clock.h>
23 
24 #include <plat/common.h>
25 #include <plat/board.h>
26 
27 #include <plat/clock.h>
28 
29 /*
30  * 32KHz clocksource ... always available, on pretty most chips except
31  * OMAP 730 and 1510.  Other timers could be used as clocksources, with
32  * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
33  * but systems won't necessarily want to spend resources that way.
34  */
35 static void __iomem *timer_32k_base;
36 
37 #define OMAP16XX_TIMER_32K_SYNCHRONIZED		0xfffbc410
38 
omap_32k_read_sched_clock(void)39 static u32 notrace omap_32k_read_sched_clock(void)
40 {
41 	return timer_32k_base ? __raw_readl(timer_32k_base) : 0;
42 }
43 
44 /**
45  * read_persistent_clock -  Return time from a persistent clock.
46  *
47  * Reads the time from a source which isn't disabled during PM, the
48  * 32k sync timer.  Convert the cycles elapsed since last read into
49  * nsecs and adds to a monotonically increasing timespec.
50  */
51 static struct timespec persistent_ts;
52 static cycles_t cycles, last_cycles;
53 static unsigned int persistent_mult, persistent_shift;
read_persistent_clock(struct timespec * ts)54 void read_persistent_clock(struct timespec *ts)
55 {
56 	unsigned long long nsecs;
57 	cycles_t delta;
58 	struct timespec *tsp = &persistent_ts;
59 
60 	last_cycles = cycles;
61 	cycles = timer_32k_base ? __raw_readl(timer_32k_base) : 0;
62 	delta = cycles - last_cycles;
63 
64 	nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift);
65 
66 	timespec_add_ns(tsp, nsecs);
67 	*ts = *tsp;
68 }
69 
omap_init_clocksource_32k(void)70 int __init omap_init_clocksource_32k(void)
71 {
72 	static char err[] __initdata = KERN_ERR
73 			"%s: can't register clocksource!\n";
74 
75 	if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
76 		u32 pbase;
77 		unsigned long size = SZ_4K;
78 		void __iomem *base;
79 		struct clk *sync_32k_ick;
80 
81 		if (cpu_is_omap16xx()) {
82 			pbase = OMAP16XX_TIMER_32K_SYNCHRONIZED;
83 			size = SZ_1K;
84 		} else if (cpu_is_omap2420())
85 			pbase = OMAP2420_32KSYNCT_BASE + 0x10;
86 		else if (cpu_is_omap2430())
87 			pbase = OMAP2430_32KSYNCT_BASE + 0x10;
88 		else if (cpu_is_omap34xx())
89 			pbase = OMAP3430_32KSYNCT_BASE + 0x10;
90 		else if (cpu_is_omap44xx())
91 			pbase = OMAP4430_32KSYNCT_BASE + 0x10;
92 		else
93 			return -ENODEV;
94 
95 		/* For this to work we must have a static mapping in io.c for this area */
96 		base = ioremap(pbase, size);
97 		if (!base)
98 			return -ENODEV;
99 
100 		sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
101 		if (!IS_ERR(sync_32k_ick))
102 			clk_enable(sync_32k_ick);
103 
104 		timer_32k_base = base;
105 
106 		/*
107 		 * 120000 rough estimate from the calculations in
108 		 * __clocksource_updatefreq_scale.
109 		 */
110 		clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
111 				32768, NSEC_PER_SEC, 120000);
112 
113 		if (clocksource_mmio_init(base, "32k_counter", 32768, 250, 32,
114 					  clocksource_mmio_readl_up))
115 			printk(err, "32k_counter");
116 
117 		setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
118 	}
119 	return 0;
120 }
121