1 // SPDX-License-Identifier: GPL-2.0+ 2 /* vim: set ts=8 sw=8 noet tw=80 nowrap: */ 3 /* 4 * comedi/drivers/ni_routing/ni_route_values/ni_mseries.c 5 * Route information for NI_MSERIES boards. 6 * 7 * COMEDI - Linux Control and Measurement Device Interface 8 * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 */ 20 21 /* 22 * This file includes a list of all the values of various signals routes 23 * available on NI 660x hardware. In many cases, one does not explicitly make 24 * these routes, rather one might indicate that something is used as the source 25 * of one particular trigger or another (using *_src=TRIG_EXT). 26 * 27 * The contents of this file can be generated using the tools in 28 * comedi/drivers/ni_routing/tools. This file also contains specific notes to 29 * this family of devices. 30 * 31 * Please use those tools to help maintain the contents of this file, but be 32 * mindful to not lose the notes already made in this file, since these notes 33 * are critical to a complete undertsanding of the register values of this 34 * family. 35 */ 36 37 #include "../ni_route_values.h" 38 #include "all.h" 39 40 /* 41 * GATE SELECT NOTE: 42 * CtrAux and CtrArmStartrigger register values are not documented in the 43 * DAQ-STC. There is some evidence that using CtrGate values is valid (see 44 * comedi.h). Some information and hints exist in the M-Series user manual 45 * (ni-62xx user-manual 371022K-01). 46 */ 47 48 const struct family_route_values ni_mseries_route_values = { 49 .family = "ni_mseries", 50 .register_values = { 51 /* 52 * destination = { 53 * source = register value, 54 * ... 55 * } 56 */ 57 [B(NI_PFI(0))] = { 58 [B(TRIGGER_LINE(0))] = I(18), 59 [B(TRIGGER_LINE(1))] = I(19), 60 [B(TRIGGER_LINE(2))] = I(20), 61 [B(TRIGGER_LINE(3))] = I(21), 62 [B(TRIGGER_LINE(4))] = I(22), 63 [B(TRIGGER_LINE(5))] = I(23), 64 [B(TRIGGER_LINE(6))] = I(24), 65 [B(TRIGGER_LINE(7))] = I(25), 66 [B(NI_CtrSource(0))] = I(9), 67 [B(NI_CtrSource(1))] = I(4), 68 [B(NI_CtrGate(0))] = I(10), 69 [B(NI_CtrGate(1))] = I(5), 70 [B(NI_CtrInternalOutput(0))] = I(13), 71 [B(NI_CtrInternalOutput(1))] = I(14), 72 [B(PXI_Star)] = I(26), 73 [B(NI_AI_SampleClock)] = I(8), 74 [B(NI_AI_StartTrigger)] = I(1), 75 [B(NI_AI_ReferenceTrigger)] = I(2), 76 [B(NI_AI_ConvertClock)] = I(3), 77 [B(NI_AI_ExternalMUXClock)] = I(12), 78 [B(NI_AO_SampleClock)] = I(6), 79 [B(NI_AO_StartTrigger)] = I(7), 80 [B(NI_DI_SampleClock)] = I(29), 81 [B(NI_DO_SampleClock)] = I(30), 82 [B(NI_FrequencyOutput)] = I(15), 83 [B(NI_ChangeDetectionEvent)] = I(28), 84 [B(NI_AnalogComparisonEvent)] = I(17), 85 [B(NI_SCXI_Trig1)] = I(27), 86 [B(NI_ExternalStrobe)] = I(11), 87 [B(NI_PFI_DO)] = I(16), 88 }, 89 [B(NI_PFI(1))] = { 90 [B(TRIGGER_LINE(0))] = I(18), 91 [B(TRIGGER_LINE(1))] = I(19), 92 [B(TRIGGER_LINE(2))] = I(20), 93 [B(TRIGGER_LINE(3))] = I(21), 94 [B(TRIGGER_LINE(4))] = I(22), 95 [B(TRIGGER_LINE(5))] = I(23), 96 [B(TRIGGER_LINE(6))] = I(24), 97 [B(TRIGGER_LINE(7))] = I(25), 98 [B(NI_CtrSource(0))] = I(9), 99 [B(NI_CtrSource(1))] = I(4), 100 [B(NI_CtrGate(0))] = I(10), 101 [B(NI_CtrGate(1))] = I(5), 102 [B(NI_CtrInternalOutput(0))] = I(13), 103 [B(NI_CtrInternalOutput(1))] = I(14), 104 [B(PXI_Star)] = I(26), 105 [B(NI_AI_SampleClock)] = I(8), 106 [B(NI_AI_StartTrigger)] = I(1), 107 [B(NI_AI_ReferenceTrigger)] = I(2), 108 [B(NI_AI_ConvertClock)] = I(3), 109 [B(NI_AI_ExternalMUXClock)] = I(12), 110 [B(NI_AO_SampleClock)] = I(6), 111 [B(NI_AO_StartTrigger)] = I(7), 112 [B(NI_DI_SampleClock)] = I(29), 113 [B(NI_DO_SampleClock)] = I(30), 114 [B(NI_FrequencyOutput)] = I(15), 115 [B(NI_ChangeDetectionEvent)] = I(28), 116 [B(NI_AnalogComparisonEvent)] = I(17), 117 [B(NI_SCXI_Trig1)] = I(27), 118 [B(NI_ExternalStrobe)] = I(11), 119 [B(NI_PFI_DO)] = I(16), 120 }, 121 [B(NI_PFI(2))] = { 122 [B(TRIGGER_LINE(0))] = I(18), 123 [B(TRIGGER_LINE(1))] = I(19), 124 [B(TRIGGER_LINE(2))] = I(20), 125 [B(TRIGGER_LINE(3))] = I(21), 126 [B(TRIGGER_LINE(4))] = I(22), 127 [B(TRIGGER_LINE(5))] = I(23), 128 [B(TRIGGER_LINE(6))] = I(24), 129 [B(TRIGGER_LINE(7))] = I(25), 130 [B(NI_CtrSource(0))] = I(9), 131 [B(NI_CtrSource(1))] = I(4), 132 [B(NI_CtrGate(0))] = I(10), 133 [B(NI_CtrGate(1))] = I(5), 134 [B(NI_CtrInternalOutput(0))] = I(13), 135 [B(NI_CtrInternalOutput(1))] = I(14), 136 [B(PXI_Star)] = I(26), 137 [B(NI_AI_SampleClock)] = I(8), 138 [B(NI_AI_StartTrigger)] = I(1), 139 [B(NI_AI_ReferenceTrigger)] = I(2), 140 [B(NI_AI_ConvertClock)] = I(3), 141 [B(NI_AI_ExternalMUXClock)] = I(12), 142 [B(NI_AO_SampleClock)] = I(6), 143 [B(NI_AO_StartTrigger)] = I(7), 144 [B(NI_DI_SampleClock)] = I(29), 145 [B(NI_DO_SampleClock)] = I(30), 146 [B(NI_FrequencyOutput)] = I(15), 147 [B(NI_ChangeDetectionEvent)] = I(28), 148 [B(NI_AnalogComparisonEvent)] = I(17), 149 [B(NI_SCXI_Trig1)] = I(27), 150 [B(NI_ExternalStrobe)] = I(11), 151 [B(NI_PFI_DO)] = I(16), 152 }, 153 [B(NI_PFI(3))] = { 154 [B(TRIGGER_LINE(0))] = I(18), 155 [B(TRIGGER_LINE(1))] = I(19), 156 [B(TRIGGER_LINE(2))] = I(20), 157 [B(TRIGGER_LINE(3))] = I(21), 158 [B(TRIGGER_LINE(4))] = I(22), 159 [B(TRIGGER_LINE(5))] = I(23), 160 [B(TRIGGER_LINE(6))] = I(24), 161 [B(TRIGGER_LINE(7))] = I(25), 162 [B(NI_CtrSource(0))] = I(9), 163 [B(NI_CtrSource(1))] = I(4), 164 [B(NI_CtrGate(0))] = I(10), 165 [B(NI_CtrGate(1))] = I(5), 166 [B(NI_CtrInternalOutput(0))] = I(13), 167 [B(NI_CtrInternalOutput(1))] = I(14), 168 [B(PXI_Star)] = I(26), 169 [B(NI_AI_SampleClock)] = I(8), 170 [B(NI_AI_StartTrigger)] = I(1), 171 [B(NI_AI_ReferenceTrigger)] = I(2), 172 [B(NI_AI_ConvertClock)] = I(3), 173 [B(NI_AI_ExternalMUXClock)] = I(12), 174 [B(NI_AO_SampleClock)] = I(6), 175 [B(NI_AO_StartTrigger)] = I(7), 176 [B(NI_DI_SampleClock)] = I(29), 177 [B(NI_DO_SampleClock)] = I(30), 178 [B(NI_FrequencyOutput)] = I(15), 179 [B(NI_ChangeDetectionEvent)] = I(28), 180 [B(NI_AnalogComparisonEvent)] = I(17), 181 [B(NI_SCXI_Trig1)] = I(27), 182 [B(NI_ExternalStrobe)] = I(11), 183 [B(NI_PFI_DO)] = I(16), 184 }, 185 [B(NI_PFI(4))] = { 186 [B(TRIGGER_LINE(0))] = I(18), 187 [B(TRIGGER_LINE(1))] = I(19), 188 [B(TRIGGER_LINE(2))] = I(20), 189 [B(TRIGGER_LINE(3))] = I(21), 190 [B(TRIGGER_LINE(4))] = I(22), 191 [B(TRIGGER_LINE(5))] = I(23), 192 [B(TRIGGER_LINE(6))] = I(24), 193 [B(TRIGGER_LINE(7))] = I(25), 194 [B(NI_CtrSource(0))] = I(9), 195 [B(NI_CtrSource(1))] = I(4), 196 [B(NI_CtrGate(0))] = I(10), 197 [B(NI_CtrGate(1))] = I(5), 198 [B(NI_CtrInternalOutput(0))] = I(13), 199 [B(NI_CtrInternalOutput(1))] = I(14), 200 [B(PXI_Star)] = I(26), 201 [B(NI_AI_SampleClock)] = I(8), 202 [B(NI_AI_StartTrigger)] = I(1), 203 [B(NI_AI_ReferenceTrigger)] = I(2), 204 [B(NI_AI_ConvertClock)] = I(3), 205 [B(NI_AI_ExternalMUXClock)] = I(12), 206 [B(NI_AO_SampleClock)] = I(6), 207 [B(NI_AO_StartTrigger)] = I(7), 208 [B(NI_DI_SampleClock)] = I(29), 209 [B(NI_DO_SampleClock)] = I(30), 210 [B(NI_FrequencyOutput)] = I(15), 211 [B(NI_ChangeDetectionEvent)] = I(28), 212 [B(NI_AnalogComparisonEvent)] = I(17), 213 [B(NI_SCXI_Trig1)] = I(27), 214 [B(NI_ExternalStrobe)] = I(11), 215 [B(NI_PFI_DO)] = I(16), 216 }, 217 [B(NI_PFI(5))] = { 218 [B(TRIGGER_LINE(0))] = I(18), 219 [B(TRIGGER_LINE(1))] = I(19), 220 [B(TRIGGER_LINE(2))] = I(20), 221 [B(TRIGGER_LINE(3))] = I(21), 222 [B(TRIGGER_LINE(4))] = I(22), 223 [B(TRIGGER_LINE(5))] = I(23), 224 [B(TRIGGER_LINE(6))] = I(24), 225 [B(TRIGGER_LINE(7))] = I(25), 226 [B(NI_CtrSource(0))] = I(9), 227 [B(NI_CtrSource(1))] = I(4), 228 [B(NI_CtrGate(0))] = I(10), 229 [B(NI_CtrGate(1))] = I(5), 230 [B(NI_CtrInternalOutput(0))] = I(13), 231 [B(NI_CtrInternalOutput(1))] = I(14), 232 [B(PXI_Star)] = I(26), 233 [B(NI_AI_SampleClock)] = I(8), 234 [B(NI_AI_StartTrigger)] = I(1), 235 [B(NI_AI_ReferenceTrigger)] = I(2), 236 [B(NI_AI_ConvertClock)] = I(3), 237 [B(NI_AI_ExternalMUXClock)] = I(12), 238 [B(NI_AO_SampleClock)] = I(6), 239 [B(NI_AO_StartTrigger)] = I(7), 240 [B(NI_DI_SampleClock)] = I(29), 241 [B(NI_DO_SampleClock)] = I(30), 242 [B(NI_FrequencyOutput)] = I(15), 243 [B(NI_ChangeDetectionEvent)] = I(28), 244 [B(NI_AnalogComparisonEvent)] = I(17), 245 [B(NI_SCXI_Trig1)] = I(27), 246 [B(NI_ExternalStrobe)] = I(11), 247 [B(NI_PFI_DO)] = I(16), 248 }, 249 [B(NI_PFI(6))] = { 250 [B(TRIGGER_LINE(0))] = I(18), 251 [B(TRIGGER_LINE(1))] = I(19), 252 [B(TRIGGER_LINE(2))] = I(20), 253 [B(TRIGGER_LINE(3))] = I(21), 254 [B(TRIGGER_LINE(4))] = I(22), 255 [B(TRIGGER_LINE(5))] = I(23), 256 [B(TRIGGER_LINE(6))] = I(24), 257 [B(TRIGGER_LINE(7))] = I(25), 258 [B(NI_CtrSource(0))] = I(9), 259 [B(NI_CtrSource(1))] = I(4), 260 [B(NI_CtrGate(0))] = I(10), 261 [B(NI_CtrGate(1))] = I(5), 262 [B(NI_CtrInternalOutput(0))] = I(13), 263 [B(NI_CtrInternalOutput(1))] = I(14), 264 [B(PXI_Star)] = I(26), 265 [B(NI_AI_SampleClock)] = I(8), 266 [B(NI_AI_StartTrigger)] = I(1), 267 [B(NI_AI_ReferenceTrigger)] = I(2), 268 [B(NI_AI_ConvertClock)] = I(3), 269 [B(NI_AI_ExternalMUXClock)] = I(12), 270 [B(NI_AO_SampleClock)] = I(6), 271 [B(NI_AO_StartTrigger)] = I(7), 272 [B(NI_DI_SampleClock)] = I(29), 273 [B(NI_DO_SampleClock)] = I(30), 274 [B(NI_FrequencyOutput)] = I(15), 275 [B(NI_ChangeDetectionEvent)] = I(28), 276 [B(NI_AnalogComparisonEvent)] = I(17), 277 [B(NI_SCXI_Trig1)] = I(27), 278 [B(NI_ExternalStrobe)] = I(11), 279 [B(NI_PFI_DO)] = I(16), 280 }, 281 [B(NI_PFI(7))] = { 282 [B(TRIGGER_LINE(0))] = I(18), 283 [B(TRIGGER_LINE(1))] = I(19), 284 [B(TRIGGER_LINE(2))] = I(20), 285 [B(TRIGGER_LINE(3))] = I(21), 286 [B(TRIGGER_LINE(4))] = I(22), 287 [B(TRIGGER_LINE(5))] = I(23), 288 [B(TRIGGER_LINE(6))] = I(24), 289 [B(TRIGGER_LINE(7))] = I(25), 290 [B(NI_CtrSource(0))] = I(9), 291 [B(NI_CtrSource(1))] = I(4), 292 [B(NI_CtrGate(0))] = I(10), 293 [B(NI_CtrGate(1))] = I(5), 294 [B(NI_CtrInternalOutput(0))] = I(13), 295 [B(NI_CtrInternalOutput(1))] = I(14), 296 [B(PXI_Star)] = I(26), 297 [B(NI_AI_SampleClock)] = I(8), 298 [B(NI_AI_StartTrigger)] = I(1), 299 [B(NI_AI_ReferenceTrigger)] = I(2), 300 [B(NI_AI_ConvertClock)] = I(3), 301 [B(NI_AI_ExternalMUXClock)] = I(12), 302 [B(NI_AO_SampleClock)] = I(6), 303 [B(NI_AO_StartTrigger)] = I(7), 304 [B(NI_DI_SampleClock)] = I(29), 305 [B(NI_DO_SampleClock)] = I(30), 306 [B(NI_FrequencyOutput)] = I(15), 307 [B(NI_ChangeDetectionEvent)] = I(28), 308 [B(NI_AnalogComparisonEvent)] = I(17), 309 [B(NI_SCXI_Trig1)] = I(27), 310 [B(NI_ExternalStrobe)] = I(11), 311 [B(NI_PFI_DO)] = I(16), 312 }, 313 [B(NI_PFI(8))] = { 314 [B(TRIGGER_LINE(0))] = I(18), 315 [B(TRIGGER_LINE(1))] = I(19), 316 [B(TRIGGER_LINE(2))] = I(20), 317 [B(TRIGGER_LINE(3))] = I(21), 318 [B(TRIGGER_LINE(4))] = I(22), 319 [B(TRIGGER_LINE(5))] = I(23), 320 [B(TRIGGER_LINE(6))] = I(24), 321 [B(TRIGGER_LINE(7))] = I(25), 322 [B(NI_CtrSource(0))] = I(9), 323 [B(NI_CtrSource(1))] = I(4), 324 [B(NI_CtrGate(0))] = I(10), 325 [B(NI_CtrGate(1))] = I(5), 326 [B(NI_CtrInternalOutput(0))] = I(13), 327 [B(NI_CtrInternalOutput(1))] = I(14), 328 [B(PXI_Star)] = I(26), 329 [B(NI_AI_SampleClock)] = I(8), 330 [B(NI_AI_StartTrigger)] = I(1), 331 [B(NI_AI_ReferenceTrigger)] = I(2), 332 [B(NI_AI_ConvertClock)] = I(3), 333 [B(NI_AI_ExternalMUXClock)] = I(12), 334 [B(NI_AO_SampleClock)] = I(6), 335 [B(NI_AO_StartTrigger)] = I(7), 336 [B(NI_DI_SampleClock)] = I(29), 337 [B(NI_DO_SampleClock)] = I(30), 338 [B(NI_FrequencyOutput)] = I(15), 339 [B(NI_ChangeDetectionEvent)] = I(28), 340 [B(NI_AnalogComparisonEvent)] = I(17), 341 [B(NI_SCXI_Trig1)] = I(27), 342 [B(NI_ExternalStrobe)] = I(11), 343 [B(NI_PFI_DO)] = I(16), 344 }, 345 [B(NI_PFI(9))] = { 346 [B(TRIGGER_LINE(0))] = I(18), 347 [B(TRIGGER_LINE(1))] = I(19), 348 [B(TRIGGER_LINE(2))] = I(20), 349 [B(TRIGGER_LINE(3))] = I(21), 350 [B(TRIGGER_LINE(4))] = I(22), 351 [B(TRIGGER_LINE(5))] = I(23), 352 [B(TRIGGER_LINE(6))] = I(24), 353 [B(TRIGGER_LINE(7))] = I(25), 354 [B(NI_CtrSource(0))] = I(9), 355 [B(NI_CtrSource(1))] = I(4), 356 [B(NI_CtrGate(0))] = I(10), 357 [B(NI_CtrGate(1))] = I(5), 358 [B(NI_CtrInternalOutput(0))] = I(13), 359 [B(NI_CtrInternalOutput(1))] = I(14), 360 [B(PXI_Star)] = I(26), 361 [B(NI_AI_SampleClock)] = I(8), 362 [B(NI_AI_StartTrigger)] = I(1), 363 [B(NI_AI_ReferenceTrigger)] = I(2), 364 [B(NI_AI_ConvertClock)] = I(3), 365 [B(NI_AI_ExternalMUXClock)] = I(12), 366 [B(NI_AO_SampleClock)] = I(6), 367 [B(NI_AO_StartTrigger)] = I(7), 368 [B(NI_DI_SampleClock)] = I(29), 369 [B(NI_DO_SampleClock)] = I(30), 370 [B(NI_FrequencyOutput)] = I(15), 371 [B(NI_ChangeDetectionEvent)] = I(28), 372 [B(NI_AnalogComparisonEvent)] = I(17), 373 [B(NI_SCXI_Trig1)] = I(27), 374 [B(NI_ExternalStrobe)] = I(11), 375 [B(NI_PFI_DO)] = I(16), 376 }, 377 [B(NI_PFI(10))] = { 378 [B(TRIGGER_LINE(0))] = I(18), 379 [B(TRIGGER_LINE(1))] = I(19), 380 [B(TRIGGER_LINE(2))] = I(20), 381 [B(TRIGGER_LINE(3))] = I(21), 382 [B(TRIGGER_LINE(4))] = I(22), 383 [B(TRIGGER_LINE(5))] = I(23), 384 [B(TRIGGER_LINE(6))] = I(24), 385 [B(TRIGGER_LINE(7))] = I(25), 386 [B(NI_CtrSource(0))] = I(9), 387 [B(NI_CtrSource(1))] = I(4), 388 [B(NI_CtrGate(0))] = I(10), 389 [B(NI_CtrGate(1))] = I(5), 390 [B(NI_CtrInternalOutput(0))] = I(13), 391 [B(NI_CtrInternalOutput(1))] = I(14), 392 [B(PXI_Star)] = I(26), 393 [B(NI_AI_SampleClock)] = I(8), 394 [B(NI_AI_StartTrigger)] = I(1), 395 [B(NI_AI_ReferenceTrigger)] = I(2), 396 [B(NI_AI_ConvertClock)] = I(3), 397 [B(NI_AI_ExternalMUXClock)] = I(12), 398 [B(NI_AO_SampleClock)] = I(6), 399 [B(NI_AO_StartTrigger)] = I(7), 400 [B(NI_DI_SampleClock)] = I(29), 401 [B(NI_DO_SampleClock)] = I(30), 402 [B(NI_FrequencyOutput)] = I(15), 403 [B(NI_ChangeDetectionEvent)] = I(28), 404 [B(NI_AnalogComparisonEvent)] = I(17), 405 [B(NI_SCXI_Trig1)] = I(27), 406 [B(NI_ExternalStrobe)] = I(11), 407 [B(NI_PFI_DO)] = I(16), 408 }, 409 [B(NI_PFI(11))] = { 410 [B(TRIGGER_LINE(0))] = I(18), 411 [B(TRIGGER_LINE(1))] = I(19), 412 [B(TRIGGER_LINE(2))] = I(20), 413 [B(TRIGGER_LINE(3))] = I(21), 414 [B(TRIGGER_LINE(4))] = I(22), 415 [B(TRIGGER_LINE(5))] = I(23), 416 [B(TRIGGER_LINE(6))] = I(24), 417 [B(TRIGGER_LINE(7))] = I(25), 418 [B(NI_CtrSource(0))] = I(9), 419 [B(NI_CtrSource(1))] = I(4), 420 [B(NI_CtrGate(0))] = I(10), 421 [B(NI_CtrGate(1))] = I(5), 422 [B(NI_CtrInternalOutput(0))] = I(13), 423 [B(NI_CtrInternalOutput(1))] = I(14), 424 [B(PXI_Star)] = I(26), 425 [B(NI_AI_SampleClock)] = I(8), 426 [B(NI_AI_StartTrigger)] = I(1), 427 [B(NI_AI_ReferenceTrigger)] = I(2), 428 [B(NI_AI_ConvertClock)] = I(3), 429 [B(NI_AI_ExternalMUXClock)] = I(12), 430 [B(NI_AO_SampleClock)] = I(6), 431 [B(NI_AO_StartTrigger)] = I(7), 432 [B(NI_DI_SampleClock)] = I(29), 433 [B(NI_DO_SampleClock)] = I(30), 434 [B(NI_FrequencyOutput)] = I(15), 435 [B(NI_ChangeDetectionEvent)] = I(28), 436 [B(NI_AnalogComparisonEvent)] = I(17), 437 [B(NI_SCXI_Trig1)] = I(27), 438 [B(NI_ExternalStrobe)] = I(11), 439 [B(NI_PFI_DO)] = I(16), 440 }, 441 [B(NI_PFI(12))] = { 442 [B(TRIGGER_LINE(0))] = I(18), 443 [B(TRIGGER_LINE(1))] = I(19), 444 [B(TRIGGER_LINE(2))] = I(20), 445 [B(TRIGGER_LINE(3))] = I(21), 446 [B(TRIGGER_LINE(4))] = I(22), 447 [B(TRIGGER_LINE(5))] = I(23), 448 [B(TRIGGER_LINE(6))] = I(24), 449 [B(TRIGGER_LINE(7))] = I(25), 450 [B(NI_CtrSource(0))] = I(9), 451 [B(NI_CtrSource(1))] = I(4), 452 [B(NI_CtrGate(0))] = I(10), 453 [B(NI_CtrGate(1))] = I(5), 454 [B(NI_CtrInternalOutput(0))] = I(13), 455 [B(NI_CtrInternalOutput(1))] = I(14), 456 [B(PXI_Star)] = I(26), 457 [B(NI_AI_SampleClock)] = I(8), 458 [B(NI_AI_StartTrigger)] = I(1), 459 [B(NI_AI_ReferenceTrigger)] = I(2), 460 [B(NI_AI_ConvertClock)] = I(3), 461 [B(NI_AI_ExternalMUXClock)] = I(12), 462 [B(NI_AO_SampleClock)] = I(6), 463 [B(NI_AO_StartTrigger)] = I(7), 464 [B(NI_DI_SampleClock)] = I(29), 465 [B(NI_DO_SampleClock)] = I(30), 466 [B(NI_FrequencyOutput)] = I(15), 467 [B(NI_ChangeDetectionEvent)] = I(28), 468 [B(NI_AnalogComparisonEvent)] = I(17), 469 [B(NI_SCXI_Trig1)] = I(27), 470 [B(NI_ExternalStrobe)] = I(11), 471 [B(NI_PFI_DO)] = I(16), 472 }, 473 [B(NI_PFI(13))] = { 474 [B(TRIGGER_LINE(0))] = I(18), 475 [B(TRIGGER_LINE(1))] = I(19), 476 [B(TRIGGER_LINE(2))] = I(20), 477 [B(TRIGGER_LINE(3))] = I(21), 478 [B(TRIGGER_LINE(4))] = I(22), 479 [B(TRIGGER_LINE(5))] = I(23), 480 [B(TRIGGER_LINE(6))] = I(24), 481 [B(TRIGGER_LINE(7))] = I(25), 482 [B(NI_CtrSource(0))] = I(9), 483 [B(NI_CtrSource(1))] = I(4), 484 [B(NI_CtrGate(0))] = I(10), 485 [B(NI_CtrGate(1))] = I(5), 486 [B(NI_CtrInternalOutput(0))] = I(13), 487 [B(NI_CtrInternalOutput(1))] = I(14), 488 [B(PXI_Star)] = I(26), 489 [B(NI_AI_SampleClock)] = I(8), 490 [B(NI_AI_StartTrigger)] = I(1), 491 [B(NI_AI_ReferenceTrigger)] = I(2), 492 [B(NI_AI_ConvertClock)] = I(3), 493 [B(NI_AI_ExternalMUXClock)] = I(12), 494 [B(NI_AO_SampleClock)] = I(6), 495 [B(NI_AO_StartTrigger)] = I(7), 496 [B(NI_DI_SampleClock)] = I(29), 497 [B(NI_DO_SampleClock)] = I(30), 498 [B(NI_FrequencyOutput)] = I(15), 499 [B(NI_ChangeDetectionEvent)] = I(28), 500 [B(NI_AnalogComparisonEvent)] = I(17), 501 [B(NI_SCXI_Trig1)] = I(27), 502 [B(NI_ExternalStrobe)] = I(11), 503 [B(NI_PFI_DO)] = I(16), 504 }, 505 [B(NI_PFI(14))] = { 506 [B(TRIGGER_LINE(0))] = I(18), 507 [B(TRIGGER_LINE(1))] = I(19), 508 [B(TRIGGER_LINE(2))] = I(20), 509 [B(TRIGGER_LINE(3))] = I(21), 510 [B(TRIGGER_LINE(4))] = I(22), 511 [B(TRIGGER_LINE(5))] = I(23), 512 [B(TRIGGER_LINE(6))] = I(24), 513 [B(TRIGGER_LINE(7))] = I(25), 514 [B(NI_CtrSource(0))] = I(9), 515 [B(NI_CtrSource(1))] = I(4), 516 [B(NI_CtrGate(0))] = I(10), 517 [B(NI_CtrGate(1))] = I(5), 518 [B(NI_CtrInternalOutput(0))] = I(13), 519 [B(NI_CtrInternalOutput(1))] = I(14), 520 [B(PXI_Star)] = I(26), 521 [B(NI_AI_SampleClock)] = I(8), 522 [B(NI_AI_StartTrigger)] = I(1), 523 [B(NI_AI_ReferenceTrigger)] = I(2), 524 [B(NI_AI_ConvertClock)] = I(3), 525 [B(NI_AI_ExternalMUXClock)] = I(12), 526 [B(NI_AO_SampleClock)] = I(6), 527 [B(NI_AO_StartTrigger)] = I(7), 528 [B(NI_DI_SampleClock)] = I(29), 529 [B(NI_DO_SampleClock)] = I(30), 530 [B(NI_FrequencyOutput)] = I(15), 531 [B(NI_ChangeDetectionEvent)] = I(28), 532 [B(NI_AnalogComparisonEvent)] = I(17), 533 [B(NI_SCXI_Trig1)] = I(27), 534 [B(NI_ExternalStrobe)] = I(11), 535 [B(NI_PFI_DO)] = I(16), 536 }, 537 [B(NI_PFI(15))] = { 538 [B(TRIGGER_LINE(0))] = I(18), 539 [B(TRIGGER_LINE(1))] = I(19), 540 [B(TRIGGER_LINE(2))] = I(20), 541 [B(TRIGGER_LINE(3))] = I(21), 542 [B(TRIGGER_LINE(4))] = I(22), 543 [B(TRIGGER_LINE(5))] = I(23), 544 [B(TRIGGER_LINE(6))] = I(24), 545 [B(TRIGGER_LINE(7))] = I(25), 546 [B(NI_CtrSource(0))] = I(9), 547 [B(NI_CtrSource(1))] = I(4), 548 [B(NI_CtrGate(0))] = I(10), 549 [B(NI_CtrGate(1))] = I(5), 550 [B(NI_CtrInternalOutput(0))] = I(13), 551 [B(NI_CtrInternalOutput(1))] = I(14), 552 [B(PXI_Star)] = I(26), 553 [B(NI_AI_SampleClock)] = I(8), 554 [B(NI_AI_StartTrigger)] = I(1), 555 [B(NI_AI_ReferenceTrigger)] = I(2), 556 [B(NI_AI_ConvertClock)] = I(3), 557 [B(NI_AI_ExternalMUXClock)] = I(12), 558 [B(NI_AO_SampleClock)] = I(6), 559 [B(NI_AO_StartTrigger)] = I(7), 560 [B(NI_DI_SampleClock)] = I(29), 561 [B(NI_DO_SampleClock)] = I(30), 562 [B(NI_FrequencyOutput)] = I(15), 563 [B(NI_ChangeDetectionEvent)] = I(28), 564 [B(NI_AnalogComparisonEvent)] = I(17), 565 [B(NI_SCXI_Trig1)] = I(27), 566 [B(NI_ExternalStrobe)] = I(11), 567 [B(NI_PFI_DO)] = I(16), 568 }, 569 [B(TRIGGER_LINE(0))] = { 570 [B(NI_RTSI_BRD(0))] = I(8), 571 [B(NI_RTSI_BRD(1))] = I(9), 572 [B(NI_RTSI_BRD(2))] = I(10), 573 [B(NI_RTSI_BRD(3))] = I(11), 574 [B(NI_CtrSource(0))] = I(5), 575 [B(NI_CtrGate(0))] = I(6), 576 [B(NI_AI_StartTrigger)] = I(0), 577 [B(NI_AI_ReferenceTrigger)] = I(1), 578 [B(NI_AI_ConvertClock)] = I(2), 579 [B(NI_AO_SampleClock)] = I(3), 580 [B(NI_AO_StartTrigger)] = I(4), 581 /* 582 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 583 * RTSI_OSC according to MHDDK mseries source. There 584 * are hints in comedi that show that this is actually a 585 * 20MHz source for 628x cards(?) 586 */ 587 [B(NI_10MHzRefClock)] = I(12), 588 [B(NI_RGOUT0)] = I(7), 589 }, 590 [B(TRIGGER_LINE(1))] = { 591 [B(NI_RTSI_BRD(0))] = I(8), 592 [B(NI_RTSI_BRD(1))] = I(9), 593 [B(NI_RTSI_BRD(2))] = I(10), 594 [B(NI_RTSI_BRD(3))] = I(11), 595 [B(NI_CtrSource(0))] = I(5), 596 [B(NI_CtrGate(0))] = I(6), 597 [B(NI_AI_StartTrigger)] = I(0), 598 [B(NI_AI_ReferenceTrigger)] = I(1), 599 [B(NI_AI_ConvertClock)] = I(2), 600 [B(NI_AO_SampleClock)] = I(3), 601 [B(NI_AO_StartTrigger)] = I(4), 602 /* 603 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 604 * RTSI_OSC according to MHDDK mseries source. There 605 * are hints in comedi that show that this is actually a 606 * 20MHz source for 628x cards(?) 607 */ 608 [B(NI_10MHzRefClock)] = I(12), 609 [B(NI_RGOUT0)] = I(7), 610 }, 611 [B(TRIGGER_LINE(2))] = { 612 [B(NI_RTSI_BRD(0))] = I(8), 613 [B(NI_RTSI_BRD(1))] = I(9), 614 [B(NI_RTSI_BRD(2))] = I(10), 615 [B(NI_RTSI_BRD(3))] = I(11), 616 [B(NI_CtrSource(0))] = I(5), 617 [B(NI_CtrGate(0))] = I(6), 618 [B(NI_AI_StartTrigger)] = I(0), 619 [B(NI_AI_ReferenceTrigger)] = I(1), 620 [B(NI_AI_ConvertClock)] = I(2), 621 [B(NI_AO_SampleClock)] = I(3), 622 [B(NI_AO_StartTrigger)] = I(4), 623 /* 624 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 625 * RTSI_OSC according to MHDDK mseries source. There 626 * are hints in comedi that show that this is actually a 627 * 20MHz source for 628x cards(?) 628 */ 629 [B(NI_10MHzRefClock)] = I(12), 630 [B(NI_RGOUT0)] = I(7), 631 }, 632 [B(TRIGGER_LINE(3))] = { 633 [B(NI_RTSI_BRD(0))] = I(8), 634 [B(NI_RTSI_BRD(1))] = I(9), 635 [B(NI_RTSI_BRD(2))] = I(10), 636 [B(NI_RTSI_BRD(3))] = I(11), 637 [B(NI_CtrSource(0))] = I(5), 638 [B(NI_CtrGate(0))] = I(6), 639 [B(NI_AI_StartTrigger)] = I(0), 640 [B(NI_AI_ReferenceTrigger)] = I(1), 641 [B(NI_AI_ConvertClock)] = I(2), 642 [B(NI_AO_SampleClock)] = I(3), 643 [B(NI_AO_StartTrigger)] = I(4), 644 /* 645 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 646 * RTSI_OSC according to MHDDK mseries source. There 647 * are hints in comedi that show that this is actually a 648 * 20MHz source for 628x cards(?) 649 */ 650 [B(NI_10MHzRefClock)] = I(12), 651 [B(NI_RGOUT0)] = I(7), 652 }, 653 [B(TRIGGER_LINE(4))] = { 654 [B(NI_RTSI_BRD(0))] = I(8), 655 [B(NI_RTSI_BRD(1))] = I(9), 656 [B(NI_RTSI_BRD(2))] = I(10), 657 [B(NI_RTSI_BRD(3))] = I(11), 658 [B(NI_CtrSource(0))] = I(5), 659 [B(NI_CtrGate(0))] = I(6), 660 [B(NI_AI_StartTrigger)] = I(0), 661 [B(NI_AI_ReferenceTrigger)] = I(1), 662 [B(NI_AI_ConvertClock)] = I(2), 663 [B(NI_AO_SampleClock)] = I(3), 664 [B(NI_AO_StartTrigger)] = I(4), 665 /* 666 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 667 * RTSI_OSC according to MHDDK mseries source. There 668 * are hints in comedi that show that this is actually a 669 * 20MHz source for 628x cards(?) 670 */ 671 [B(NI_10MHzRefClock)] = I(12), 672 [B(NI_RGOUT0)] = I(7), 673 }, 674 [B(TRIGGER_LINE(5))] = { 675 [B(NI_RTSI_BRD(0))] = I(8), 676 [B(NI_RTSI_BRD(1))] = I(9), 677 [B(NI_RTSI_BRD(2))] = I(10), 678 [B(NI_RTSI_BRD(3))] = I(11), 679 [B(NI_CtrSource(0))] = I(5), 680 [B(NI_CtrGate(0))] = I(6), 681 [B(NI_AI_StartTrigger)] = I(0), 682 [B(NI_AI_ReferenceTrigger)] = I(1), 683 [B(NI_AI_ConvertClock)] = I(2), 684 [B(NI_AO_SampleClock)] = I(3), 685 [B(NI_AO_StartTrigger)] = I(4), 686 /* 687 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 688 * RTSI_OSC according to MHDDK mseries source. There 689 * are hints in comedi that show that this is actually a 690 * 20MHz source for 628x cards(?) 691 */ 692 [B(NI_10MHzRefClock)] = I(12), 693 [B(NI_RGOUT0)] = I(7), 694 }, 695 [B(TRIGGER_LINE(6))] = { 696 [B(NI_RTSI_BRD(0))] = I(8), 697 [B(NI_RTSI_BRD(1))] = I(9), 698 [B(NI_RTSI_BRD(2))] = I(10), 699 [B(NI_RTSI_BRD(3))] = I(11), 700 [B(NI_CtrSource(0))] = I(5), 701 [B(NI_CtrGate(0))] = I(6), 702 [B(NI_AI_StartTrigger)] = I(0), 703 [B(NI_AI_ReferenceTrigger)] = I(1), 704 [B(NI_AI_ConvertClock)] = I(2), 705 [B(NI_AO_SampleClock)] = I(3), 706 [B(NI_AO_StartTrigger)] = I(4), 707 /* 708 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 709 * RTSI_OSC according to MHDDK mseries source. There 710 * are hints in comedi that show that this is actually a 711 * 20MHz source for 628x cards(?) 712 */ 713 [B(NI_10MHzRefClock)] = I(12), 714 [B(NI_RGOUT0)] = I(7), 715 }, 716 [B(TRIGGER_LINE(7))] = { 717 [B(NI_RTSI_BRD(0))] = I(8), 718 [B(NI_RTSI_BRD(1))] = I(9), 719 [B(NI_RTSI_BRD(2))] = I(10), 720 [B(NI_RTSI_BRD(3))] = I(11), 721 [B(NI_CtrSource(0))] = I(5), 722 [B(NI_CtrGate(0))] = I(6), 723 [B(NI_AI_StartTrigger)] = I(0), 724 [B(NI_AI_ReferenceTrigger)] = I(1), 725 [B(NI_AI_ConvertClock)] = I(2), 726 [B(NI_AO_SampleClock)] = I(3), 727 [B(NI_AO_StartTrigger)] = I(4), 728 /* 729 * for (*->TRIGGER_LINE(*)) MUX, a value of 12 should be 730 * RTSI_OSC according to MHDDK mseries source. There 731 * are hints in comedi that show that this is actually a 732 * 20MHz source for 628x cards(?) 733 */ 734 [B(NI_10MHzRefClock)] = I(12), 735 [B(NI_RGOUT0)] = I(7), 736 }, 737 [B(NI_RTSI_BRD(0))] = { 738 [B(NI_PFI(0))] = I(0), 739 [B(NI_PFI(1))] = I(1), 740 [B(NI_PFI(2))] = I(2), 741 [B(NI_PFI(3))] = I(3), 742 [B(NI_PFI(4))] = I(4), 743 [B(NI_PFI(5))] = I(5), 744 [B(NI_CtrSource(1))] = I(11), 745 [B(NI_CtrGate(1))] = I(10), 746 [B(NI_CtrZ(0))] = I(13), 747 [B(NI_CtrZ(1))] = I(12), 748 [B(NI_CtrOut(1))] = I(9), 749 [B(NI_AI_SampleClock)] = I(15), 750 [B(NI_AI_PauseTrigger)] = I(7), 751 [B(NI_AO_PauseTrigger)] = I(6), 752 [B(NI_FrequencyOutput)] = I(8), 753 [B(NI_AnalogComparisonEvent)] = I(14), 754 }, 755 [B(NI_RTSI_BRD(1))] = { 756 [B(NI_PFI(0))] = I(0), 757 [B(NI_PFI(1))] = I(1), 758 [B(NI_PFI(2))] = I(2), 759 [B(NI_PFI(3))] = I(3), 760 [B(NI_PFI(4))] = I(4), 761 [B(NI_PFI(5))] = I(5), 762 [B(NI_CtrSource(1))] = I(11), 763 [B(NI_CtrGate(1))] = I(10), 764 [B(NI_CtrZ(0))] = I(13), 765 [B(NI_CtrZ(1))] = I(12), 766 [B(NI_CtrOut(1))] = I(9), 767 [B(NI_AI_SampleClock)] = I(15), 768 [B(NI_AI_PauseTrigger)] = I(7), 769 [B(NI_AO_PauseTrigger)] = I(6), 770 [B(NI_FrequencyOutput)] = I(8), 771 [B(NI_AnalogComparisonEvent)] = I(14), 772 }, 773 [B(NI_RTSI_BRD(2))] = { 774 [B(NI_PFI(0))] = I(0), 775 [B(NI_PFI(1))] = I(1), 776 [B(NI_PFI(2))] = I(2), 777 [B(NI_PFI(3))] = I(3), 778 [B(NI_PFI(4))] = I(4), 779 [B(NI_PFI(5))] = I(5), 780 [B(NI_CtrSource(1))] = I(11), 781 [B(NI_CtrGate(1))] = I(10), 782 [B(NI_CtrZ(0))] = I(13), 783 [B(NI_CtrZ(1))] = I(12), 784 [B(NI_CtrOut(1))] = I(9), 785 [B(NI_AI_SampleClock)] = I(15), 786 [B(NI_AI_PauseTrigger)] = I(7), 787 [B(NI_AO_PauseTrigger)] = I(6), 788 [B(NI_FrequencyOutput)] = I(8), 789 [B(NI_AnalogComparisonEvent)] = I(14), 790 }, 791 [B(NI_RTSI_BRD(3))] = { 792 [B(NI_PFI(0))] = I(0), 793 [B(NI_PFI(1))] = I(1), 794 [B(NI_PFI(2))] = I(2), 795 [B(NI_PFI(3))] = I(3), 796 [B(NI_PFI(4))] = I(4), 797 [B(NI_PFI(5))] = I(5), 798 [B(NI_CtrSource(1))] = I(11), 799 [B(NI_CtrGate(1))] = I(10), 800 [B(NI_CtrZ(0))] = I(13), 801 [B(NI_CtrZ(1))] = I(12), 802 [B(NI_CtrOut(1))] = I(9), 803 [B(NI_AI_SampleClock)] = I(15), 804 [B(NI_AI_PauseTrigger)] = I(7), 805 [B(NI_AO_PauseTrigger)] = I(6), 806 [B(NI_FrequencyOutput)] = I(8), 807 [B(NI_AnalogComparisonEvent)] = I(14), 808 }, 809 [B(NI_CtrSource(0))] = { 810 /* These are not currently implemented in ni modules */ 811 [B(NI_PFI(0))] = U(1), 812 [B(NI_PFI(1))] = U(2), 813 [B(NI_PFI(2))] = U(3), 814 [B(NI_PFI(3))] = U(4), 815 [B(NI_PFI(4))] = U(5), 816 [B(NI_PFI(5))] = U(6), 817 [B(NI_PFI(6))] = U(7), 818 [B(NI_PFI(7))] = U(8), 819 [B(NI_PFI(8))] = U(9), 820 [B(NI_PFI(9))] = U(10), 821 [B(NI_PFI(10))] = U(21), 822 [B(NI_PFI(11))] = U(22), 823 [B(NI_PFI(12))] = U(23), 824 [B(NI_PFI(13))] = U(24), 825 [B(NI_PFI(14))] = U(25), 826 [B(NI_PFI(15))] = U(26), 827 [B(TRIGGER_LINE(0))] = U(11), 828 [B(TRIGGER_LINE(1))] = U(12), 829 [B(TRIGGER_LINE(2))] = U(13), 830 [B(TRIGGER_LINE(3))] = U(14), 831 [B(TRIGGER_LINE(4))] = U(15), 832 [B(TRIGGER_LINE(5))] = U(16), 833 [B(TRIGGER_LINE(6))] = U(17), 834 [B(TRIGGER_LINE(7))] = U(27), 835 [B(NI_CtrGate(1))] = U(Gi_SRC(20, 0)), 836 [B(NI_CtrInternalOutput(1))] = U(19), 837 [B(PXI_Star)] = U(Gi_SRC(20, 1)), 838 [B(PXI_Clk10)] = U(29), 839 [B(NI_20MHzTimebase)] = U(0), 840 [B(NI_80MHzTimebase)] = U(Gi_SRC(30, 0)), 841 [B(NI_100kHzTimebase)] = U(18), 842 [B(NI_AnalogComparisonEvent)] = U(Gi_SRC(30, 1)), 843 [B(NI_LogicLow)] = U(31), 844 }, 845 [B(NI_CtrSource(1))] = { 846 /* These are not currently implemented in ni modules */ 847 [B(NI_PFI(0))] = U(1), 848 [B(NI_PFI(1))] = U(2), 849 [B(NI_PFI(2))] = U(3), 850 [B(NI_PFI(3))] = U(4), 851 [B(NI_PFI(4))] = U(5), 852 [B(NI_PFI(5))] = U(6), 853 [B(NI_PFI(6))] = U(7), 854 [B(NI_PFI(7))] = U(8), 855 [B(NI_PFI(8))] = U(9), 856 [B(NI_PFI(9))] = U(10), 857 [B(NI_PFI(10))] = U(21), 858 [B(NI_PFI(11))] = U(22), 859 [B(NI_PFI(12))] = U(23), 860 [B(NI_PFI(13))] = U(24), 861 [B(NI_PFI(14))] = U(25), 862 [B(NI_PFI(15))] = U(26), 863 [B(TRIGGER_LINE(0))] = U(11), 864 [B(TRIGGER_LINE(1))] = U(12), 865 [B(TRIGGER_LINE(2))] = U(13), 866 [B(TRIGGER_LINE(3))] = U(14), 867 [B(TRIGGER_LINE(4))] = U(15), 868 [B(TRIGGER_LINE(5))] = U(16), 869 [B(TRIGGER_LINE(6))] = U(17), 870 [B(TRIGGER_LINE(7))] = U(27), 871 [B(NI_CtrGate(0))] = U(Gi_SRC(20, 0)), 872 [B(NI_CtrInternalOutput(0))] = U(19), 873 [B(PXI_Star)] = U(Gi_SRC(20, 1)), 874 [B(PXI_Clk10)] = U(29), 875 [B(NI_20MHzTimebase)] = U(0), 876 [B(NI_80MHzTimebase)] = U(Gi_SRC(30, 0)), 877 [B(NI_100kHzTimebase)] = U(18), 878 [B(NI_AnalogComparisonEvent)] = U(Gi_SRC(30, 1)), 879 [B(NI_LogicLow)] = U(31), 880 }, 881 [B(NI_CtrGate(0))] = { 882 [B(NI_PFI(0))] = I(1 /* source: mhddk examples */), 883 [B(NI_PFI(1))] = I(2), 884 [B(NI_PFI(2))] = I(3), 885 [B(NI_PFI(3))] = I(4), 886 [B(NI_PFI(4))] = I(5), 887 [B(NI_PFI(5))] = I(6), 888 [B(NI_PFI(6))] = I(7), 889 [B(NI_PFI(7))] = I(8), 890 [B(NI_PFI(8))] = I(9), 891 [B(NI_PFI(9))] = I(10), 892 [B(NI_PFI(10))] = I(21), 893 [B(NI_PFI(11))] = I(22), 894 [B(NI_PFI(12))] = I(23), 895 [B(NI_PFI(13))] = I(24), 896 [B(NI_PFI(14))] = I(25), 897 [B(NI_PFI(15))] = I(26), 898 [B(TRIGGER_LINE(0))] = I(11), 899 [B(TRIGGER_LINE(1))] = I(12), 900 [B(TRIGGER_LINE(2))] = I(13), 901 [B(TRIGGER_LINE(3))] = I(14), 902 [B(TRIGGER_LINE(4))] = I(15), 903 [B(TRIGGER_LINE(5))] = I(16), 904 [B(TRIGGER_LINE(6))] = I(17), 905 [B(TRIGGER_LINE(7))] = I(27), 906 [B(NI_CtrSource(1))] = I(29), 907 /* source for following line: mhddk GP examples */ 908 [B(NI_CtrInternalOutput(1))] = I(20), 909 [B(PXI_Star)] = I(19), 910 [B(NI_AI_StartTrigger)] = I(28), 911 [B(NI_AI_ReferenceTrigger)] = I(18), 912 [B(NI_AnalogComparisonEvent)] = I(30), 913 [B(NI_LogicLow)] = I(31), 914 }, 915 [B(NI_CtrGate(1))] = { 916 /* source for following line: mhddk examples */ 917 [B(NI_PFI(0))] = I(1), 918 [B(NI_PFI(1))] = I(2), 919 [B(NI_PFI(2))] = I(3), 920 [B(NI_PFI(3))] = I(4), 921 [B(NI_PFI(4))] = I(5), 922 [B(NI_PFI(5))] = I(6), 923 [B(NI_PFI(6))] = I(7), 924 [B(NI_PFI(7))] = I(8), 925 [B(NI_PFI(8))] = I(9), 926 [B(NI_PFI(9))] = I(10), 927 [B(NI_PFI(10))] = I(21), 928 [B(NI_PFI(11))] = I(22), 929 [B(NI_PFI(12))] = I(23), 930 [B(NI_PFI(13))] = I(24), 931 [B(NI_PFI(14))] = I(25), 932 [B(NI_PFI(15))] = I(26), 933 [B(TRIGGER_LINE(0))] = I(11), 934 [B(TRIGGER_LINE(1))] = I(12), 935 [B(TRIGGER_LINE(2))] = I(13), 936 [B(TRIGGER_LINE(3))] = I(14), 937 [B(TRIGGER_LINE(4))] = I(15), 938 [B(TRIGGER_LINE(5))] = I(16), 939 [B(TRIGGER_LINE(6))] = I(17), 940 [B(TRIGGER_LINE(7))] = I(27), 941 [B(NI_CtrSource(0))] = I(29), 942 /* source for following line: mhddk GP examples */ 943 [B(NI_CtrInternalOutput(0))] = I(20), 944 [B(PXI_Star)] = I(19), 945 [B(NI_AI_StartTrigger)] = I(28), 946 [B(NI_AI_ReferenceTrigger)] = I(18), 947 [B(NI_AnalogComparisonEvent)] = I(30), 948 [B(NI_LogicLow)] = I(31), 949 }, 950 [B(NI_CtrAux(0))] = { 951 /* these are just a guess; see GATE SELECT NOTE */ 952 [B(NI_PFI(0))] = I(1), 953 [B(NI_PFI(1))] = I(2), 954 [B(NI_PFI(2))] = I(3), 955 [B(NI_PFI(3))] = I(4), 956 [B(NI_PFI(4))] = I(5), 957 [B(NI_PFI(5))] = I(6), 958 [B(NI_PFI(6))] = I(7), 959 [B(NI_PFI(7))] = I(8), 960 [B(NI_PFI(8))] = I(9), 961 [B(NI_PFI(9))] = I(10), 962 [B(NI_PFI(10))] = I(21), 963 [B(NI_PFI(11))] = I(22), 964 [B(NI_PFI(12))] = I(23), 965 [B(NI_PFI(13))] = I(24), 966 [B(NI_PFI(14))] = I(25), 967 [B(NI_PFI(15))] = I(26), 968 [B(TRIGGER_LINE(0))] = I(11), 969 [B(TRIGGER_LINE(1))] = I(12), 970 [B(TRIGGER_LINE(2))] = I(13), 971 [B(TRIGGER_LINE(3))] = I(14), 972 [B(TRIGGER_LINE(4))] = I(15), 973 [B(TRIGGER_LINE(5))] = I(16), 974 [B(TRIGGER_LINE(6))] = I(17), 975 [B(TRIGGER_LINE(7))] = I(27), 976 [B(NI_CtrSource(1))] = I(29), 977 /* source for following line: mhddk GP examples */ 978 [B(NI_CtrInternalOutput(1))] = I(20), 979 [B(PXI_Star)] = I(19), 980 [B(NI_AI_StartTrigger)] = I(28), 981 [B(NI_AI_ReferenceTrigger)] = I(18), 982 [B(NI_AnalogComparisonEvent)] = I(30), 983 [B(NI_LogicLow)] = I(31), 984 }, 985 [B(NI_CtrAux(1))] = { 986 /* these are just a guess; see GATE SELECT NOTE */ 987 [B(NI_PFI(0))] = I(1), 988 [B(NI_PFI(1))] = I(2), 989 [B(NI_PFI(2))] = I(3), 990 [B(NI_PFI(3))] = I(4), 991 [B(NI_PFI(4))] = I(5), 992 [B(NI_PFI(5))] = I(6), 993 [B(NI_PFI(6))] = I(7), 994 [B(NI_PFI(7))] = I(8), 995 [B(NI_PFI(8))] = I(9), 996 [B(NI_PFI(9))] = I(10), 997 [B(NI_PFI(10))] = I(21), 998 [B(NI_PFI(11))] = I(22), 999 [B(NI_PFI(12))] = I(23), 1000 [B(NI_PFI(13))] = I(24), 1001 [B(NI_PFI(14))] = I(25), 1002 [B(NI_PFI(15))] = I(26), 1003 [B(TRIGGER_LINE(0))] = I(11), 1004 [B(TRIGGER_LINE(1))] = I(12), 1005 [B(TRIGGER_LINE(2))] = I(13), 1006 [B(TRIGGER_LINE(3))] = I(14), 1007 [B(TRIGGER_LINE(4))] = I(15), 1008 [B(TRIGGER_LINE(5))] = I(16), 1009 [B(TRIGGER_LINE(6))] = I(17), 1010 [B(TRIGGER_LINE(7))] = I(27), 1011 [B(NI_CtrSource(0))] = I(29), 1012 /* source for following line: mhddk GP examples */ 1013 [B(NI_CtrInternalOutput(0))] = I(20), 1014 [B(PXI_Star)] = I(19), 1015 [B(NI_AI_StartTrigger)] = I(28), 1016 [B(NI_AI_ReferenceTrigger)] = I(18), 1017 [B(NI_AnalogComparisonEvent)] = I(30), 1018 [B(NI_LogicLow)] = I(31), 1019 }, 1020 [B(NI_CtrA(0))] = { 1021 /* 1022 * See nimseries/Examples for outputs; inputs a guess 1023 * from device routes shown on NI-MAX. 1024 * see M-Series user manual (371022K-01) 1025 */ 1026 [B(NI_PFI(0))] = I(1), 1027 [B(NI_PFI(1))] = I(2), 1028 [B(NI_PFI(2))] = I(3), 1029 [B(NI_PFI(3))] = I(4), 1030 [B(NI_PFI(4))] = I(5), 1031 [B(NI_PFI(5))] = I(6), 1032 [B(NI_PFI(6))] = I(7), 1033 [B(NI_PFI(7))] = I(8), 1034 [B(NI_PFI(8))] = I(9), 1035 [B(NI_PFI(9))] = I(10), 1036 [B(NI_PFI(10))] = I(21), 1037 [B(NI_PFI(11))] = I(22), 1038 [B(NI_PFI(12))] = I(23), 1039 [B(NI_PFI(13))] = I(24), 1040 [B(NI_PFI(14))] = I(25), 1041 [B(NI_PFI(15))] = I(26), 1042 [B(TRIGGER_LINE(0))] = I(11), 1043 [B(TRIGGER_LINE(1))] = I(12), 1044 [B(TRIGGER_LINE(2))] = I(13), 1045 [B(TRIGGER_LINE(3))] = I(14), 1046 [B(TRIGGER_LINE(4))] = I(15), 1047 [B(TRIGGER_LINE(5))] = I(16), 1048 [B(TRIGGER_LINE(6))] = I(17), 1049 [B(TRIGGER_LINE(7))] = I(27), 1050 [B(PXI_Star)] = I(20), 1051 [B(NI_AnalogComparisonEvent)] = I(30), 1052 [B(NI_LogicLow)] = I(31), 1053 }, 1054 [B(NI_CtrA(1))] = { 1055 /* 1056 * See nimseries/Examples for outputs; inputs a guess 1057 * from device routes shown on NI-MAX. 1058 * see M-Series user manual (371022K-01) 1059 */ 1060 [B(NI_PFI(0))] = I(1), 1061 [B(NI_PFI(1))] = I(2), 1062 [B(NI_PFI(2))] = I(3), 1063 [B(NI_PFI(3))] = I(4), 1064 [B(NI_PFI(4))] = I(5), 1065 [B(NI_PFI(5))] = I(6), 1066 [B(NI_PFI(6))] = I(7), 1067 [B(NI_PFI(7))] = I(8), 1068 [B(NI_PFI(8))] = I(9), 1069 [B(NI_PFI(9))] = I(10), 1070 [B(NI_PFI(10))] = I(21), 1071 [B(NI_PFI(11))] = I(22), 1072 [B(NI_PFI(12))] = I(23), 1073 [B(NI_PFI(13))] = I(24), 1074 [B(NI_PFI(14))] = I(25), 1075 [B(NI_PFI(15))] = I(26), 1076 [B(TRIGGER_LINE(0))] = I(11), 1077 [B(TRIGGER_LINE(1))] = I(12), 1078 [B(TRIGGER_LINE(2))] = I(13), 1079 [B(TRIGGER_LINE(3))] = I(14), 1080 [B(TRIGGER_LINE(4))] = I(15), 1081 [B(TRIGGER_LINE(5))] = I(16), 1082 [B(TRIGGER_LINE(6))] = I(17), 1083 [B(TRIGGER_LINE(7))] = I(27), 1084 [B(PXI_Star)] = I(20), 1085 [B(NI_AnalogComparisonEvent)] = I(30), 1086 [B(NI_LogicLow)] = I(31), 1087 }, 1088 [B(NI_CtrB(0))] = { 1089 /* 1090 * See nimseries/Examples for outputs; inputs a guess 1091 * from device routes shown on NI-MAX. 1092 * see M-Series user manual (371022K-01) 1093 */ 1094 [B(NI_PFI(0))] = I(1), 1095 [B(NI_PFI(1))] = I(2), 1096 [B(NI_PFI(2))] = I(3), 1097 [B(NI_PFI(3))] = I(4), 1098 [B(NI_PFI(4))] = I(5), 1099 [B(NI_PFI(5))] = I(6), 1100 [B(NI_PFI(6))] = I(7), 1101 [B(NI_PFI(7))] = I(8), 1102 [B(NI_PFI(8))] = I(9), 1103 [B(NI_PFI(9))] = I(10), 1104 [B(NI_PFI(10))] = I(21), 1105 [B(NI_PFI(11))] = I(22), 1106 [B(NI_PFI(12))] = I(23), 1107 [B(NI_PFI(13))] = I(24), 1108 [B(NI_PFI(14))] = I(25), 1109 [B(NI_PFI(15))] = I(26), 1110 [B(TRIGGER_LINE(0))] = I(11), 1111 [B(TRIGGER_LINE(1))] = I(12), 1112 [B(TRIGGER_LINE(2))] = I(13), 1113 [B(TRIGGER_LINE(3))] = I(14), 1114 [B(TRIGGER_LINE(4))] = I(15), 1115 [B(TRIGGER_LINE(5))] = I(16), 1116 [B(TRIGGER_LINE(6))] = I(17), 1117 [B(TRIGGER_LINE(7))] = I(27), 1118 [B(PXI_Star)] = I(20), 1119 [B(NI_AnalogComparisonEvent)] = I(30), 1120 [B(NI_LogicLow)] = I(31), 1121 }, 1122 [B(NI_CtrB(1))] = { 1123 /* 1124 * See nimseries/Examples for outputs; inputs a guess 1125 * from device routes shown on NI-MAX. 1126 * see M-Series user manual (371022K-01) 1127 */ 1128 [B(NI_PFI(0))] = I(1), 1129 [B(NI_PFI(1))] = I(2), 1130 [B(NI_PFI(2))] = I(3), 1131 [B(NI_PFI(3))] = I(4), 1132 [B(NI_PFI(4))] = I(5), 1133 [B(NI_PFI(5))] = I(6), 1134 [B(NI_PFI(6))] = I(7), 1135 [B(NI_PFI(7))] = I(8), 1136 [B(NI_PFI(8))] = I(9), 1137 [B(NI_PFI(9))] = I(10), 1138 [B(NI_PFI(10))] = I(21), 1139 [B(NI_PFI(11))] = I(22), 1140 [B(NI_PFI(12))] = I(23), 1141 [B(NI_PFI(13))] = I(24), 1142 [B(NI_PFI(14))] = I(25), 1143 [B(NI_PFI(15))] = I(26), 1144 [B(TRIGGER_LINE(0))] = I(11), 1145 [B(TRIGGER_LINE(1))] = I(12), 1146 [B(TRIGGER_LINE(2))] = I(13), 1147 [B(TRIGGER_LINE(3))] = I(14), 1148 [B(TRIGGER_LINE(4))] = I(15), 1149 [B(TRIGGER_LINE(5))] = I(16), 1150 [B(TRIGGER_LINE(6))] = I(17), 1151 [B(TRIGGER_LINE(7))] = I(27), 1152 [B(PXI_Star)] = I(20), 1153 [B(NI_AnalogComparisonEvent)] = I(30), 1154 [B(NI_LogicLow)] = I(31), 1155 }, 1156 [B(NI_CtrZ(0))] = { 1157 /* 1158 * See nimseries/Examples for outputs; inputs a guess 1159 * from device routes shown on NI-MAX. 1160 * see M-Series user manual (371022K-01) 1161 */ 1162 [B(NI_PFI(0))] = I(1), 1163 [B(NI_PFI(1))] = I(2), 1164 [B(NI_PFI(2))] = I(3), 1165 [B(NI_PFI(3))] = I(4), 1166 [B(NI_PFI(4))] = I(5), 1167 [B(NI_PFI(5))] = I(6), 1168 [B(NI_PFI(6))] = I(7), 1169 [B(NI_PFI(7))] = I(8), 1170 [B(NI_PFI(8))] = I(9), 1171 [B(NI_PFI(9))] = I(10), 1172 [B(NI_PFI(10))] = I(21), 1173 [B(NI_PFI(11))] = I(22), 1174 [B(NI_PFI(12))] = I(23), 1175 [B(NI_PFI(13))] = I(24), 1176 [B(NI_PFI(14))] = I(25), 1177 [B(NI_PFI(15))] = I(26), 1178 [B(TRIGGER_LINE(0))] = I(11), 1179 [B(TRIGGER_LINE(1))] = I(12), 1180 [B(TRIGGER_LINE(2))] = I(13), 1181 [B(TRIGGER_LINE(3))] = I(14), 1182 [B(TRIGGER_LINE(4))] = I(15), 1183 [B(TRIGGER_LINE(5))] = I(16), 1184 [B(TRIGGER_LINE(6))] = I(17), 1185 [B(TRIGGER_LINE(7))] = I(27), 1186 [B(PXI_Star)] = I(20), 1187 [B(NI_AnalogComparisonEvent)] = I(30), 1188 [B(NI_LogicLow)] = I(31), 1189 }, 1190 [B(NI_CtrZ(1))] = { 1191 /* 1192 * See nimseries/Examples for outputs; inputs a guess 1193 * from device routes shown on NI-MAX. 1194 * see M-Series user manual (371022K-01) 1195 */ 1196 [B(NI_PFI(0))] = I(1), 1197 [B(NI_PFI(1))] = I(2), 1198 [B(NI_PFI(2))] = I(3), 1199 [B(NI_PFI(3))] = I(4), 1200 [B(NI_PFI(4))] = I(5), 1201 [B(NI_PFI(5))] = I(6), 1202 [B(NI_PFI(6))] = I(7), 1203 [B(NI_PFI(7))] = I(8), 1204 [B(NI_PFI(8))] = I(9), 1205 [B(NI_PFI(9))] = I(10), 1206 [B(NI_PFI(10))] = I(21), 1207 [B(NI_PFI(11))] = I(22), 1208 [B(NI_PFI(12))] = I(23), 1209 [B(NI_PFI(13))] = I(24), 1210 [B(NI_PFI(14))] = I(25), 1211 [B(NI_PFI(15))] = I(26), 1212 [B(TRIGGER_LINE(0))] = I(11), 1213 [B(TRIGGER_LINE(1))] = I(12), 1214 [B(TRIGGER_LINE(2))] = I(13), 1215 [B(TRIGGER_LINE(3))] = I(14), 1216 [B(TRIGGER_LINE(4))] = I(15), 1217 [B(TRIGGER_LINE(5))] = I(16), 1218 [B(TRIGGER_LINE(6))] = I(17), 1219 [B(TRIGGER_LINE(7))] = I(27), 1220 [B(PXI_Star)] = I(20), 1221 [B(NI_AnalogComparisonEvent)] = I(30), 1222 [B(NI_LogicLow)] = I(31), 1223 }, 1224 [B(NI_CtrArmStartTrigger(0))] = { 1225 /* these are just a guess; see GATE SELECT NOTE */ 1226 [B(NI_PFI(0))] = I(1), 1227 [B(NI_PFI(1))] = I(2), 1228 [B(NI_PFI(2))] = I(3), 1229 [B(NI_PFI(3))] = I(4), 1230 [B(NI_PFI(4))] = I(5), 1231 [B(NI_PFI(5))] = I(6), 1232 [B(NI_PFI(6))] = I(7), 1233 [B(NI_PFI(7))] = I(8), 1234 [B(NI_PFI(8))] = I(9), 1235 [B(NI_PFI(9))] = I(10), 1236 [B(NI_PFI(10))] = I(21), 1237 [B(NI_PFI(11))] = I(22), 1238 [B(NI_PFI(12))] = I(23), 1239 [B(NI_PFI(13))] = I(24), 1240 [B(NI_PFI(14))] = I(25), 1241 [B(NI_PFI(15))] = I(26), 1242 [B(TRIGGER_LINE(0))] = I(11), 1243 [B(TRIGGER_LINE(1))] = I(12), 1244 [B(TRIGGER_LINE(2))] = I(13), 1245 [B(TRIGGER_LINE(3))] = I(14), 1246 [B(TRIGGER_LINE(4))] = I(15), 1247 [B(TRIGGER_LINE(5))] = I(16), 1248 [B(TRIGGER_LINE(6))] = I(17), 1249 [B(TRIGGER_LINE(7))] = I(27), 1250 [B(NI_CtrSource(1))] = I(29), 1251 /* source for following line: mhddk GP examples */ 1252 [B(NI_CtrInternalOutput(1))] = I(20), 1253 [B(PXI_Star)] = I(19), 1254 [B(NI_AI_StartTrigger)] = I(28), 1255 [B(NI_AI_ReferenceTrigger)] = I(18), 1256 [B(NI_AnalogComparisonEvent)] = I(30), 1257 [B(NI_LogicLow)] = I(31), 1258 }, 1259 [B(NI_CtrArmStartTrigger(1))] = { 1260 /* these are just a guess; see GATE SELECT NOTE */ 1261 [B(NI_PFI(0))] = I(1), 1262 [B(NI_PFI(1))] = I(2), 1263 [B(NI_PFI(2))] = I(3), 1264 [B(NI_PFI(3))] = I(4), 1265 [B(NI_PFI(4))] = I(5), 1266 [B(NI_PFI(5))] = I(6), 1267 [B(NI_PFI(6))] = I(7), 1268 [B(NI_PFI(7))] = I(8), 1269 [B(NI_PFI(8))] = I(9), 1270 [B(NI_PFI(9))] = I(10), 1271 [B(NI_PFI(10))] = I(21), 1272 [B(NI_PFI(11))] = I(22), 1273 [B(NI_PFI(12))] = I(23), 1274 [B(NI_PFI(13))] = I(24), 1275 [B(NI_PFI(14))] = I(25), 1276 [B(NI_PFI(15))] = I(26), 1277 [B(TRIGGER_LINE(0))] = I(11), 1278 [B(TRIGGER_LINE(1))] = I(12), 1279 [B(TRIGGER_LINE(2))] = I(13), 1280 [B(TRIGGER_LINE(3))] = I(14), 1281 [B(TRIGGER_LINE(4))] = I(15), 1282 [B(TRIGGER_LINE(5))] = I(16), 1283 [B(TRIGGER_LINE(6))] = I(17), 1284 [B(TRIGGER_LINE(7))] = I(27), 1285 [B(NI_CtrSource(0))] = I(29), 1286 /* source for following line: mhddk GP examples */ 1287 [B(NI_CtrInternalOutput(0))] = I(20), 1288 [B(PXI_Star)] = I(19), 1289 [B(NI_AI_StartTrigger)] = I(28), 1290 [B(NI_AI_ReferenceTrigger)] = I(18), 1291 [B(NI_AnalogComparisonEvent)] = I(30), 1292 [B(NI_LogicLow)] = I(31), 1293 }, 1294 [B(NI_CtrOut(0))] = { 1295 [B(TRIGGER_LINE(0))] = I(1), 1296 [B(TRIGGER_LINE(1))] = I(2), 1297 [B(TRIGGER_LINE(2))] = I(3), 1298 [B(TRIGGER_LINE(3))] = I(4), 1299 [B(TRIGGER_LINE(4))] = I(5), 1300 [B(TRIGGER_LINE(5))] = I(6), 1301 [B(TRIGGER_LINE(6))] = I(7), 1302 [B(NI_CtrInternalOutput(0))] = I(0), 1303 }, 1304 [B(NI_CtrOut(1))] = { 1305 [B(NI_CtrInternalOutput(1))] = I(0), 1306 }, 1307 [B(NI_AI_SampleClock)] = { 1308 [B(NI_PFI(0))] = I(1), 1309 [B(NI_PFI(1))] = I(2), 1310 [B(NI_PFI(2))] = I(3), 1311 [B(NI_PFI(3))] = I(4), 1312 [B(NI_PFI(4))] = I(5), 1313 [B(NI_PFI(5))] = I(6), 1314 [B(NI_PFI(6))] = I(7), 1315 [B(NI_PFI(7))] = I(8), 1316 [B(NI_PFI(8))] = I(9), 1317 [B(NI_PFI(9))] = I(10), 1318 [B(NI_PFI(10))] = I(21), 1319 [B(NI_PFI(11))] = I(22), 1320 [B(NI_PFI(12))] = I(23), 1321 [B(NI_PFI(13))] = I(24), 1322 [B(NI_PFI(14))] = I(25), 1323 [B(NI_PFI(15))] = I(26), 1324 [B(TRIGGER_LINE(0))] = I(11), 1325 [B(TRIGGER_LINE(1))] = I(12), 1326 [B(TRIGGER_LINE(2))] = I(13), 1327 [B(TRIGGER_LINE(3))] = I(14), 1328 [B(TRIGGER_LINE(4))] = I(15), 1329 [B(TRIGGER_LINE(5))] = I(16), 1330 [B(TRIGGER_LINE(6))] = I(17), 1331 [B(TRIGGER_LINE(7))] = I(27), 1332 [B(NI_CtrInternalOutput(0))] = I(19), 1333 [B(NI_CtrInternalOutput(1))] = I(28), 1334 [B(PXI_Star)] = I(20), 1335 [B(NI_AI_SampleClockTimebase)] = I(0), 1336 [B(NI_AnalogComparisonEvent)] = I(30), 1337 [B(NI_SCXI_Trig1)] = I(29), 1338 [B(NI_LogicLow)] = I(31), 1339 }, 1340 [B(NI_AI_SampleClockTimebase)] = { 1341 /* These are not currently implemented in ni modules */ 1342 [B(NI_PFI(0))] = U(1), 1343 [B(NI_PFI(1))] = U(2), 1344 [B(NI_PFI(2))] = U(3), 1345 [B(NI_PFI(3))] = U(4), 1346 [B(NI_PFI(4))] = U(5), 1347 [B(NI_PFI(5))] = U(6), 1348 [B(NI_PFI(6))] = U(7), 1349 [B(NI_PFI(7))] = U(8), 1350 [B(NI_PFI(8))] = U(9), 1351 [B(NI_PFI(9))] = U(10), 1352 [B(NI_PFI(10))] = U(21), 1353 [B(NI_PFI(11))] = U(22), 1354 [B(NI_PFI(12))] = U(23), 1355 [B(NI_PFI(13))] = U(24), 1356 [B(NI_PFI(14))] = U(25), 1357 [B(NI_PFI(15))] = U(26), 1358 [B(TRIGGER_LINE(0))] = U(11), 1359 [B(TRIGGER_LINE(1))] = U(12), 1360 [B(TRIGGER_LINE(2))] = U(13), 1361 [B(TRIGGER_LINE(3))] = U(14), 1362 [B(TRIGGER_LINE(4))] = U(15), 1363 [B(TRIGGER_LINE(5))] = U(16), 1364 [B(TRIGGER_LINE(6))] = U(17), 1365 [B(TRIGGER_LINE(7))] = U(27), 1366 [B(PXI_Star)] = U(20), 1367 [B(PXI_Clk10)] = U(29), 1368 /* 1369 * For routes (*->NI_AI_SampleClockTimebase) and 1370 * (*->NI_AO_SampleClockTimebase), tMSeries.h of MHDDK 1371 * shows 0 value as selecting ground (case ground?) and 1372 * 28 value selecting TIMEBASE 1. 1373 */ 1374 [B(NI_20MHzTimebase)] = U(28), 1375 [B(NI_100kHzTimebase)] = U(19), 1376 [B(NI_AnalogComparisonEvent)] = U(30), 1377 [B(NI_LogicLow)] = U(31), 1378 [B(NI_CaseGround)] = U(0), 1379 }, 1380 [B(NI_AI_StartTrigger)] = { 1381 [B(NI_PFI(0))] = I(1), 1382 [B(NI_PFI(1))] = I(2), 1383 [B(NI_PFI(2))] = I(3), 1384 [B(NI_PFI(3))] = I(4), 1385 [B(NI_PFI(4))] = I(5), 1386 [B(NI_PFI(5))] = I(6), 1387 [B(NI_PFI(6))] = I(7), 1388 [B(NI_PFI(7))] = I(8), 1389 [B(NI_PFI(8))] = I(9), 1390 [B(NI_PFI(9))] = I(10), 1391 [B(NI_PFI(10))] = I(21), 1392 [B(NI_PFI(11))] = I(22), 1393 [B(NI_PFI(12))] = I(23), 1394 [B(NI_PFI(13))] = I(24), 1395 [B(NI_PFI(14))] = I(25), 1396 [B(NI_PFI(15))] = I(26), 1397 [B(TRIGGER_LINE(0))] = I(11), 1398 [B(TRIGGER_LINE(1))] = I(12), 1399 [B(TRIGGER_LINE(2))] = I(13), 1400 [B(TRIGGER_LINE(3))] = I(14), 1401 [B(TRIGGER_LINE(4))] = I(15), 1402 [B(TRIGGER_LINE(5))] = I(16), 1403 [B(TRIGGER_LINE(6))] = I(17), 1404 [B(TRIGGER_LINE(7))] = I(27), 1405 [B(NI_CtrInternalOutput(0))] = I(18), 1406 [B(NI_CtrInternalOutput(1))] = I(19), 1407 [B(PXI_Star)] = I(20), 1408 [B(NI_AnalogComparisonEvent)] = I(30), 1409 [B(NI_LogicLow)] = I(31), 1410 }, 1411 [B(NI_AI_ReferenceTrigger)] = { 1412 /* These are not currently implemented in ni modules */ 1413 [B(NI_PFI(0))] = U(1), 1414 [B(NI_PFI(1))] = U(2), 1415 [B(NI_PFI(2))] = U(3), 1416 [B(NI_PFI(3))] = U(4), 1417 [B(NI_PFI(4))] = U(5), 1418 [B(NI_PFI(5))] = U(6), 1419 [B(NI_PFI(6))] = U(7), 1420 [B(NI_PFI(7))] = U(8), 1421 [B(NI_PFI(8))] = U(9), 1422 [B(NI_PFI(9))] = U(10), 1423 [B(NI_PFI(10))] = U(21), 1424 [B(NI_PFI(11))] = U(22), 1425 [B(NI_PFI(12))] = U(23), 1426 [B(NI_PFI(13))] = U(24), 1427 [B(NI_PFI(14))] = U(25), 1428 [B(NI_PFI(15))] = U(26), 1429 [B(TRIGGER_LINE(0))] = U(11), 1430 [B(TRIGGER_LINE(1))] = U(12), 1431 [B(TRIGGER_LINE(2))] = U(13), 1432 [B(TRIGGER_LINE(3))] = U(14), 1433 [B(TRIGGER_LINE(4))] = U(15), 1434 [B(TRIGGER_LINE(5))] = U(16), 1435 [B(TRIGGER_LINE(6))] = U(17), 1436 [B(TRIGGER_LINE(7))] = U(27), 1437 [B(PXI_Star)] = U(20), 1438 [B(NI_AnalogComparisonEvent)] = U(30), 1439 [B(NI_LogicLow)] = U(31), 1440 }, 1441 [B(NI_AI_ConvertClock)] = { 1442 [B(NI_PFI(0))] = I(1), 1443 [B(NI_PFI(1))] = I(2), 1444 [B(NI_PFI(2))] = I(3), 1445 [B(NI_PFI(3))] = I(4), 1446 [B(NI_PFI(4))] = I(5), 1447 [B(NI_PFI(5))] = I(6), 1448 [B(NI_PFI(6))] = I(7), 1449 [B(NI_PFI(7))] = I(8), 1450 [B(NI_PFI(8))] = I(9), 1451 [B(NI_PFI(9))] = I(10), 1452 [B(NI_PFI(10))] = I(21), 1453 [B(NI_PFI(11))] = I(22), 1454 [B(NI_PFI(12))] = I(23), 1455 [B(NI_PFI(13))] = I(24), 1456 [B(NI_PFI(14))] = I(25), 1457 [B(NI_PFI(15))] = I(26), 1458 [B(TRIGGER_LINE(0))] = I(11), 1459 [B(TRIGGER_LINE(1))] = I(12), 1460 [B(TRIGGER_LINE(2))] = I(13), 1461 [B(TRIGGER_LINE(3))] = I(14), 1462 [B(TRIGGER_LINE(4))] = I(15), 1463 [B(TRIGGER_LINE(5))] = I(16), 1464 [B(TRIGGER_LINE(6))] = I(17), 1465 [B(TRIGGER_LINE(7))] = I(27), 1466 /* source for following line: mhddk example headers */ 1467 [B(NI_CtrInternalOutput(0))] = I(19), 1468 /* source for following line: mhddk example headers */ 1469 [B(NI_CtrInternalOutput(1))] = I(18), 1470 [B(PXI_Star)] = I(20), 1471 [B(NI_AI_ConvertClockTimebase)] = I(0), 1472 [B(NI_AnalogComparisonEvent)] = I(30), 1473 [B(NI_LogicLow)] = I(31), 1474 }, 1475 [B(NI_AI_ConvertClockTimebase)] = { 1476 /* These are not currently implemented in ni modules */ 1477 [B(NI_AI_SampleClockTimebase)] = U(0), 1478 [B(NI_20MHzTimebase)] = U(1), 1479 }, 1480 [B(NI_AI_PauseTrigger)] = { 1481 /* These are not currently implemented in ni modules */ 1482 [B(NI_PFI(0))] = U(1), 1483 [B(NI_PFI(1))] = U(2), 1484 [B(NI_PFI(2))] = U(3), 1485 [B(NI_PFI(3))] = U(4), 1486 [B(NI_PFI(4))] = U(5), 1487 [B(NI_PFI(5))] = U(6), 1488 [B(NI_PFI(6))] = U(7), 1489 [B(NI_PFI(7))] = U(8), 1490 [B(NI_PFI(8))] = U(9), 1491 [B(NI_PFI(9))] = U(10), 1492 [B(NI_PFI(10))] = U(21), 1493 [B(NI_PFI(11))] = U(22), 1494 [B(NI_PFI(12))] = U(23), 1495 [B(NI_PFI(13))] = U(24), 1496 [B(NI_PFI(14))] = U(25), 1497 [B(NI_PFI(15))] = U(26), 1498 [B(TRIGGER_LINE(0))] = U(11), 1499 [B(TRIGGER_LINE(1))] = U(12), 1500 [B(TRIGGER_LINE(2))] = U(13), 1501 [B(TRIGGER_LINE(3))] = U(14), 1502 [B(TRIGGER_LINE(4))] = U(15), 1503 [B(TRIGGER_LINE(5))] = U(16), 1504 [B(TRIGGER_LINE(6))] = U(17), 1505 [B(TRIGGER_LINE(7))] = U(27), 1506 [B(PXI_Star)] = U(20), 1507 [B(NI_AnalogComparisonEvent)] = U(30), 1508 [B(NI_LogicLow)] = U(31), 1509 }, 1510 [B(NI_AO_SampleClock)] = { 1511 [B(NI_PFI(0))] = I(1), 1512 [B(NI_PFI(1))] = I(2), 1513 [B(NI_PFI(2))] = I(3), 1514 [B(NI_PFI(3))] = I(4), 1515 [B(NI_PFI(4))] = I(5), 1516 [B(NI_PFI(5))] = I(6), 1517 [B(NI_PFI(6))] = I(7), 1518 [B(NI_PFI(7))] = I(8), 1519 [B(NI_PFI(8))] = I(9), 1520 [B(NI_PFI(9))] = I(10), 1521 [B(NI_PFI(10))] = I(21), 1522 [B(NI_PFI(11))] = I(22), 1523 [B(NI_PFI(12))] = I(23), 1524 [B(NI_PFI(13))] = I(24), 1525 [B(NI_PFI(14))] = I(25), 1526 [B(NI_PFI(15))] = I(26), 1527 [B(TRIGGER_LINE(0))] = I(11), 1528 [B(TRIGGER_LINE(1))] = I(12), 1529 [B(TRIGGER_LINE(2))] = I(13), 1530 [B(TRIGGER_LINE(3))] = I(14), 1531 [B(TRIGGER_LINE(4))] = I(15), 1532 [B(TRIGGER_LINE(5))] = I(16), 1533 [B(TRIGGER_LINE(6))] = I(17), 1534 [B(TRIGGER_LINE(7))] = I(27), 1535 [B(NI_CtrInternalOutput(0))] = I(18), 1536 [B(NI_CtrInternalOutput(1))] = I(19), 1537 [B(PXI_Star)] = I(20), 1538 [B(NI_AO_SampleClockTimebase)] = I(0), 1539 [B(NI_AnalogComparisonEvent)] = I(30), 1540 [B(NI_LogicLow)] = I(31), 1541 }, 1542 [B(NI_AO_SampleClockTimebase)] = { 1543 /* These are not currently implemented in ni modules */ 1544 [B(NI_PFI(0))] = U(1), 1545 [B(NI_PFI(1))] = U(2), 1546 [B(NI_PFI(2))] = U(3), 1547 [B(NI_PFI(3))] = U(4), 1548 [B(NI_PFI(4))] = U(5), 1549 [B(NI_PFI(5))] = U(6), 1550 [B(NI_PFI(6))] = U(7), 1551 [B(NI_PFI(7))] = U(8), 1552 [B(NI_PFI(8))] = U(9), 1553 [B(NI_PFI(9))] = U(10), 1554 [B(NI_PFI(10))] = U(21), 1555 [B(NI_PFI(11))] = U(22), 1556 [B(NI_PFI(12))] = U(23), 1557 [B(NI_PFI(13))] = U(24), 1558 [B(NI_PFI(14))] = U(25), 1559 [B(NI_PFI(15))] = U(26), 1560 [B(TRIGGER_LINE(0))] = U(11), 1561 [B(TRIGGER_LINE(1))] = U(12), 1562 [B(TRIGGER_LINE(2))] = U(13), 1563 [B(TRIGGER_LINE(3))] = U(14), 1564 [B(TRIGGER_LINE(4))] = U(15), 1565 [B(TRIGGER_LINE(5))] = U(16), 1566 [B(TRIGGER_LINE(6))] = U(17), 1567 [B(TRIGGER_LINE(7))] = U(27), 1568 [B(PXI_Star)] = U(20), 1569 [B(PXI_Clk10)] = U(29), 1570 /* 1571 * For routes (*->NI_AI_SampleClockTimebase) and 1572 * (*->NI_AO_SampleClockTimebase), tMSeries.h of MHDDK 1573 * shows 0 value as selecting ground (case ground?) and 1574 * 28 value selecting TIMEBASE 1. 1575 */ 1576 [B(NI_20MHzTimebase)] = U(28), 1577 [B(NI_100kHzTimebase)] = U(19), 1578 [B(NI_AnalogComparisonEvent)] = U(30), 1579 [B(NI_LogicLow)] = U(31), 1580 [B(NI_CaseGround)] = U(0), 1581 }, 1582 [B(NI_AO_StartTrigger)] = { 1583 [B(NI_PFI(0))] = I(1), 1584 [B(NI_PFI(1))] = I(2), 1585 [B(NI_PFI(2))] = I(3), 1586 [B(NI_PFI(3))] = I(4), 1587 [B(NI_PFI(4))] = I(5), 1588 [B(NI_PFI(5))] = I(6), 1589 [B(NI_PFI(6))] = I(7), 1590 [B(NI_PFI(7))] = I(8), 1591 [B(NI_PFI(8))] = I(9), 1592 [B(NI_PFI(9))] = I(10), 1593 [B(NI_PFI(10))] = I(21), 1594 [B(NI_PFI(11))] = I(22), 1595 [B(NI_PFI(12))] = I(23), 1596 [B(NI_PFI(13))] = I(24), 1597 [B(NI_PFI(14))] = I(25), 1598 [B(NI_PFI(15))] = I(26), 1599 [B(TRIGGER_LINE(0))] = I(11), 1600 [B(TRIGGER_LINE(1))] = I(12), 1601 [B(TRIGGER_LINE(2))] = I(13), 1602 [B(TRIGGER_LINE(3))] = I(14), 1603 [B(TRIGGER_LINE(4))] = I(15), 1604 [B(TRIGGER_LINE(5))] = I(16), 1605 [B(TRIGGER_LINE(6))] = I(17), 1606 [B(TRIGGER_LINE(7))] = I(27), 1607 [B(PXI_Star)] = I(20), 1608 /* 1609 * for the signal route 1610 * (NI_AI_StartTrigger->NI_AO_StartTrigger), DAQ-STC & 1611 * MHDDK disagreed for e-series. MHDDK for m-series 1612 * agrees with DAQ-STC description and uses the value 18 1613 * for the route 1614 * (NI_AI_ReferenceTrigger->NI_AO_StartTrigger). The 1615 * m-series devices are supposed to have DAQ-STC2. 1616 * There are no DAQ-STC2 docs to compare with. 1617 */ 1618 [B(NI_AI_StartTrigger)] = I(19), 1619 [B(NI_AI_ReferenceTrigger)] = I(18), 1620 [B(NI_AnalogComparisonEvent)] = I(30), 1621 [B(NI_LogicLow)] = I(31), 1622 }, 1623 [B(NI_AO_PauseTrigger)] = { 1624 /* These are not currently implemented in ni modules */ 1625 [B(NI_PFI(0))] = U(1), 1626 [B(NI_PFI(1))] = U(2), 1627 [B(NI_PFI(2))] = U(3), 1628 [B(NI_PFI(3))] = U(4), 1629 [B(NI_PFI(4))] = U(5), 1630 [B(NI_PFI(5))] = U(6), 1631 [B(NI_PFI(6))] = U(7), 1632 [B(NI_PFI(7))] = U(8), 1633 [B(NI_PFI(8))] = U(9), 1634 [B(NI_PFI(9))] = U(10), 1635 [B(NI_PFI(10))] = U(21), 1636 [B(NI_PFI(11))] = U(22), 1637 [B(NI_PFI(12))] = U(23), 1638 [B(NI_PFI(13))] = U(24), 1639 [B(NI_PFI(14))] = U(25), 1640 [B(NI_PFI(15))] = U(26), 1641 [B(TRIGGER_LINE(0))] = U(11), 1642 [B(TRIGGER_LINE(1))] = U(12), 1643 [B(TRIGGER_LINE(2))] = U(13), 1644 [B(TRIGGER_LINE(3))] = U(14), 1645 [B(TRIGGER_LINE(4))] = U(15), 1646 [B(TRIGGER_LINE(5))] = U(16), 1647 [B(TRIGGER_LINE(6))] = U(17), 1648 [B(TRIGGER_LINE(7))] = U(27), 1649 [B(PXI_Star)] = U(20), 1650 [B(NI_AnalogComparisonEvent)] = U(30), 1651 [B(NI_LogicLow)] = U(31), 1652 }, 1653 [B(NI_DI_SampleClock)] = { 1654 [B(NI_PFI(0))] = I(1), 1655 [B(NI_PFI(1))] = I(2), 1656 [B(NI_PFI(2))] = I(3), 1657 [B(NI_PFI(3))] = I(4), 1658 [B(NI_PFI(4))] = I(5), 1659 [B(NI_PFI(5))] = I(6), 1660 [B(NI_PFI(6))] = I(7), 1661 [B(NI_PFI(7))] = I(8), 1662 [B(NI_PFI(8))] = I(9), 1663 [B(NI_PFI(9))] = I(10), 1664 [B(NI_PFI(10))] = I(21), 1665 [B(NI_PFI(11))] = I(22), 1666 [B(NI_PFI(12))] = I(23), 1667 [B(NI_PFI(13))] = I(24), 1668 [B(NI_PFI(14))] = I(25), 1669 [B(NI_PFI(15))] = I(26), 1670 [B(TRIGGER_LINE(0))] = I(11), 1671 [B(TRIGGER_LINE(1))] = I(12), 1672 [B(TRIGGER_LINE(2))] = I(13), 1673 [B(TRIGGER_LINE(3))] = I(14), 1674 [B(TRIGGER_LINE(4))] = I(15), 1675 [B(TRIGGER_LINE(5))] = I(16), 1676 [B(TRIGGER_LINE(6))] = I(17), 1677 [B(TRIGGER_LINE(7))] = I(27), 1678 [B(NI_CtrInternalOutput(0))] = I(28), 1679 [B(NI_CtrInternalOutput(1))] = I(29), 1680 [B(PXI_Star)] = I(20), 1681 [B(NI_AI_SampleClock)] = I(18), 1682 [B(NI_AI_ConvertClock)] = I(19), 1683 [B(NI_AO_SampleClock)] = I(31), 1684 [B(NI_FrequencyOutput)] = I(32), 1685 [B(NI_ChangeDetectionEvent)] = I(33), 1686 [B(NI_CaseGround)] = I(0), 1687 }, 1688 [B(NI_DO_SampleClock)] = { 1689 [B(NI_PFI(0))] = I(1), 1690 [B(NI_PFI(1))] = I(2), 1691 [B(NI_PFI(2))] = I(3), 1692 [B(NI_PFI(3))] = I(4), 1693 [B(NI_PFI(4))] = I(5), 1694 [B(NI_PFI(5))] = I(6), 1695 [B(NI_PFI(6))] = I(7), 1696 [B(NI_PFI(7))] = I(8), 1697 [B(NI_PFI(8))] = I(9), 1698 [B(NI_PFI(9))] = I(10), 1699 [B(NI_PFI(10))] = I(21), 1700 [B(NI_PFI(11))] = I(22), 1701 [B(NI_PFI(12))] = I(23), 1702 [B(NI_PFI(13))] = I(24), 1703 [B(NI_PFI(14))] = I(25), 1704 [B(NI_PFI(15))] = I(26), 1705 [B(TRIGGER_LINE(0))] = I(11), 1706 [B(TRIGGER_LINE(1))] = I(12), 1707 [B(TRIGGER_LINE(2))] = I(13), 1708 [B(TRIGGER_LINE(3))] = I(14), 1709 [B(TRIGGER_LINE(4))] = I(15), 1710 [B(TRIGGER_LINE(5))] = I(16), 1711 [B(TRIGGER_LINE(6))] = I(17), 1712 [B(TRIGGER_LINE(7))] = I(27), 1713 [B(NI_CtrInternalOutput(0))] = I(28), 1714 [B(NI_CtrInternalOutput(1))] = I(29), 1715 [B(PXI_Star)] = I(20), 1716 [B(NI_AI_SampleClock)] = I(18), 1717 [B(NI_AI_ConvertClock)] = I(19), 1718 [B(NI_AO_SampleClock)] = I(31), 1719 [B(NI_FrequencyOutput)] = I(32), 1720 [B(NI_ChangeDetectionEvent)] = I(33), 1721 [B(NI_CaseGround)] = I(0), 1722 }, 1723 [B(NI_MasterTimebase)] = { 1724 /* These are not currently implemented in ni modules */ 1725 [B(TRIGGER_LINE(0))] = U(11), 1726 [B(TRIGGER_LINE(1))] = U(12), 1727 [B(TRIGGER_LINE(2))] = U(13), 1728 [B(TRIGGER_LINE(3))] = U(14), 1729 [B(TRIGGER_LINE(4))] = U(15), 1730 [B(TRIGGER_LINE(5))] = U(16), 1731 [B(TRIGGER_LINE(6))] = U(17), 1732 [B(TRIGGER_LINE(7))] = U(27), 1733 [B(PXI_Star)] = U(20), 1734 [B(PXI_Clk10)] = U(29), 1735 [B(NI_10MHzRefClock)] = U(0), 1736 }, 1737 /* 1738 * This symbol is not defined and nothing for this is 1739 * implemented--just including this because data was found in 1740 * the NI-STC for it--can't remember where. 1741 * [B(NI_FrequencyOutTimebase)] = { 1742 * ** These are not currently implemented in ni modules ** 1743 * [B(NI_20MHzTimebase)] = U(0), 1744 * [B(NI_100kHzTimebase)] = U(1), 1745 * }, 1746 */ 1747 [B(NI_RGOUT0)] = { 1748 [B(NI_CtrInternalOutput(0))] = I(0), 1749 [B(NI_CtrOut(0))] = I(1), 1750 }, 1751 }, 1752 }; 1753