1 // SPDX-License-Identifier: GPL-2.0+ 2 /* vim: set ts=8 sw=8 noet tw=80 nowrap: */ 3 /* 4 * comedi/drivers/ni_routing/ni_route_values/ni_660x.c 5 * Route information for NI_660X boards. 6 * 7 * COMEDI - Linux Control and Measurement Device Interface 8 * Copyright (C) 2016 Spencer E. Olson <olsonse@umich.edu> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 */ 20 21 /* 22 * This file includes a list of all the values of various signals routes 23 * available on NI 660x hardware. In many cases, one does not explicitly make 24 * these routes, rather one might indicate that something is used as the source 25 * of one particular trigger or another (using *_src=TRIG_EXT). 26 * 27 * The contents of this file can be generated using the tools in 28 * comedi/drivers/ni_routing/tools. This file also contains specific notes to 29 * this family of devices. 30 * 31 * Please use those tools to help maintain the contents of this file, but be 32 * mindful to not lose the notes already made in this file, since these notes 33 * are critical to a complete undertsanding of the register values of this 34 * family. 35 */ 36 37 #include "../ni_route_values.h" 38 #include "all.h" 39 40 const struct family_route_values ni_660x_route_values = { 41 .family = "ni_660x", 42 .register_values = { 43 /* 44 * destination = { 45 * source = register value, 46 * ... 47 * } 48 */ 49 [B(NI_PFI(8))] = { 50 [B(NI_CtrInternalOutput(7))] = I(1), 51 }, 52 [B(NI_PFI(10))] = { 53 [B(NI_CtrGate(7))] = I(1), 54 }, 55 [B(NI_PFI(11))] = { 56 [B(NI_CtrSource(7))] = I(1), 57 }, 58 [B(NI_PFI(12))] = { 59 [B(NI_CtrInternalOutput(6))] = I(1), 60 }, 61 [B(NI_PFI(14))] = { 62 [B(NI_CtrGate(6))] = I(1), 63 }, 64 [B(NI_PFI(15))] = { 65 [B(NI_CtrSource(6))] = I(1), 66 }, 67 [B(NI_PFI(16))] = { 68 [B(NI_CtrInternalOutput(5))] = I(1), 69 }, 70 [B(NI_PFI(18))] = { 71 [B(NI_CtrGate(5))] = I(1), 72 }, 73 [B(NI_PFI(19))] = { 74 [B(NI_CtrSource(5))] = I(1), 75 }, 76 [B(NI_PFI(20))] = { 77 [B(NI_CtrInternalOutput(4))] = I(1), 78 }, 79 [B(NI_PFI(22))] = { 80 [B(NI_CtrGate(4))] = I(1), 81 }, 82 [B(NI_PFI(23))] = { 83 [B(NI_CtrSource(4))] = I(1), 84 }, 85 [B(NI_PFI(24))] = { 86 [B(NI_CtrInternalOutput(3))] = I(1), 87 }, 88 [B(NI_PFI(26))] = { 89 [B(NI_CtrGate(3))] = I(1), 90 }, 91 [B(NI_PFI(27))] = { 92 [B(NI_CtrSource(3))] = I(1), 93 }, 94 [B(NI_PFI(28))] = { 95 [B(NI_CtrInternalOutput(2))] = I(1), 96 }, 97 [B(NI_PFI(30))] = { 98 [B(NI_CtrGate(2))] = I(1), 99 }, 100 [B(NI_PFI(31))] = { 101 [B(NI_CtrSource(2))] = I(1), 102 }, 103 [B(NI_PFI(32))] = { 104 [B(NI_CtrInternalOutput(1))] = I(1), 105 }, 106 [B(NI_PFI(34))] = { 107 [B(NI_CtrGate(1))] = I(1), 108 }, 109 [B(NI_PFI(35))] = { 110 [B(NI_CtrSource(1))] = I(1), 111 }, 112 [B(NI_PFI(36))] = { 113 [B(NI_CtrInternalOutput(0))] = I(1), 114 }, 115 [B(NI_PFI(38))] = { 116 [B(NI_CtrGate(0))] = I(1), 117 }, 118 [B(NI_PFI(39))] = { 119 [B(NI_CtrSource(0))] = I(1), 120 }, 121 [B(NI_CtrSource(0))] = { 122 /* These are not currently implemented in ni modules */ 123 [B(NI_PFI(11))] = U(9), 124 [B(NI_PFI(15))] = U(8), 125 [B(NI_PFI(19))] = U(7), 126 [B(NI_PFI(23))] = U(6), 127 [B(NI_PFI(27))] = U(5), 128 [B(NI_PFI(31))] = U(4), 129 [B(NI_PFI(35))] = U(3), 130 [B(NI_PFI(39))] = U(2 /* or 1 */), 131 [B(TRIGGER_LINE(0))] = U(11), 132 [B(TRIGGER_LINE(1))] = U(12), 133 [B(TRIGGER_LINE(2))] = U(13), 134 [B(TRIGGER_LINE(3))] = U(14), 135 [B(TRIGGER_LINE(4))] = U(15), 136 [B(TRIGGER_LINE(5))] = U(16), 137 [B(TRIGGER_LINE(6))] = U(17), 138 [B(NI_CtrGate(1))] = U(10), 139 [B(NI_20MHzTimebase)] = U(0), 140 [B(NI_80MHzTimebase)] = U(30), 141 [B(NI_100kHzTimebase)] = U(18), 142 [B(NI_LogicLow)] = U(31), 143 }, 144 [B(NI_CtrSource(1))] = { 145 /* These are not currently implemented in ni modules */ 146 [B(NI_PFI(11))] = U(9), 147 [B(NI_PFI(15))] = U(8), 148 [B(NI_PFI(19))] = U(7), 149 [B(NI_PFI(23))] = U(6), 150 [B(NI_PFI(27))] = U(5), 151 [B(NI_PFI(31))] = U(4), 152 [B(NI_PFI(35))] = U(3 /* or 1 */), 153 [B(NI_PFI(39))] = U(2), 154 [B(TRIGGER_LINE(0))] = U(11), 155 [B(TRIGGER_LINE(1))] = U(12), 156 [B(TRIGGER_LINE(2))] = U(13), 157 [B(TRIGGER_LINE(3))] = U(14), 158 [B(TRIGGER_LINE(4))] = U(15), 159 [B(TRIGGER_LINE(5))] = U(16), 160 [B(TRIGGER_LINE(6))] = U(17), 161 [B(NI_CtrGate(2))] = U(10), 162 [B(NI_20MHzTimebase)] = U(0), 163 [B(NI_80MHzTimebase)] = U(30), 164 [B(NI_100kHzTimebase)] = U(18), 165 [B(NI_LogicLow)] = U(31), 166 }, 167 [B(NI_CtrSource(2))] = { 168 /* These are not currently implemented in ni modules */ 169 [B(NI_PFI(11))] = U(9), 170 [B(NI_PFI(15))] = U(8), 171 [B(NI_PFI(19))] = U(7), 172 [B(NI_PFI(23))] = U(6), 173 [B(NI_PFI(27))] = U(5), 174 [B(NI_PFI(31))] = U(4 /* or 1 */), 175 [B(NI_PFI(35))] = U(3), 176 [B(NI_PFI(39))] = U(2), 177 [B(TRIGGER_LINE(0))] = U(11), 178 [B(TRIGGER_LINE(1))] = U(12), 179 [B(TRIGGER_LINE(2))] = U(13), 180 [B(TRIGGER_LINE(3))] = U(14), 181 [B(TRIGGER_LINE(4))] = U(15), 182 [B(TRIGGER_LINE(5))] = U(16), 183 [B(TRIGGER_LINE(6))] = U(17), 184 [B(NI_CtrGate(3))] = U(10), 185 [B(NI_20MHzTimebase)] = U(0), 186 [B(NI_80MHzTimebase)] = U(30), 187 [B(NI_100kHzTimebase)] = U(18), 188 [B(NI_LogicLow)] = U(31), 189 }, 190 [B(NI_CtrSource(3))] = { 191 /* These are not currently implemented in ni modules */ 192 [B(NI_PFI(11))] = U(9), 193 [B(NI_PFI(15))] = U(8), 194 [B(NI_PFI(19))] = U(7), 195 [B(NI_PFI(23))] = U(6), 196 [B(NI_PFI(27))] = U(5 /* or 1 */), 197 [B(NI_PFI(31))] = U(4), 198 [B(NI_PFI(35))] = U(3), 199 [B(NI_PFI(39))] = U(2), 200 [B(TRIGGER_LINE(0))] = U(11), 201 [B(TRIGGER_LINE(1))] = U(12), 202 [B(TRIGGER_LINE(2))] = U(13), 203 [B(TRIGGER_LINE(3))] = U(14), 204 [B(TRIGGER_LINE(4))] = U(15), 205 [B(TRIGGER_LINE(5))] = U(16), 206 [B(TRIGGER_LINE(6))] = U(17), 207 [B(NI_CtrGate(4))] = U(10), 208 [B(NI_20MHzTimebase)] = U(0), 209 [B(NI_80MHzTimebase)] = U(30), 210 [B(NI_100kHzTimebase)] = U(18), 211 [B(NI_LogicLow)] = U(31), 212 }, 213 [B(NI_CtrSource(4))] = { 214 /* These are not currently implemented in ni modules */ 215 [B(NI_PFI(11))] = U(9), 216 [B(NI_PFI(15))] = U(8), 217 [B(NI_PFI(19))] = U(7), 218 [B(NI_PFI(23))] = U(6 /* or 1 */), 219 [B(NI_PFI(27))] = U(5), 220 [B(NI_PFI(31))] = U(4), 221 [B(NI_PFI(35))] = U(3), 222 [B(NI_PFI(39))] = U(2), 223 [B(TRIGGER_LINE(0))] = U(11), 224 [B(TRIGGER_LINE(1))] = U(12), 225 [B(TRIGGER_LINE(2))] = U(13), 226 [B(TRIGGER_LINE(3))] = U(14), 227 [B(TRIGGER_LINE(4))] = U(15), 228 [B(TRIGGER_LINE(5))] = U(16), 229 [B(TRIGGER_LINE(6))] = U(17), 230 [B(NI_CtrGate(5))] = U(10), 231 [B(NI_20MHzTimebase)] = U(0), 232 [B(NI_80MHzTimebase)] = U(30), 233 [B(NI_100kHzTimebase)] = U(18), 234 [B(NI_LogicLow)] = U(31), 235 }, 236 [B(NI_CtrSource(5))] = { 237 /* These are not currently implemented in ni modules */ 238 [B(NI_PFI(11))] = U(9), 239 [B(NI_PFI(15))] = U(8), 240 [B(NI_PFI(19))] = U(7 /* or 1 */), 241 [B(NI_PFI(23))] = U(6), 242 [B(NI_PFI(27))] = U(5), 243 [B(NI_PFI(31))] = U(4), 244 [B(NI_PFI(35))] = U(3), 245 [B(NI_PFI(39))] = U(2), 246 [B(TRIGGER_LINE(0))] = U(11), 247 [B(TRIGGER_LINE(1))] = U(12), 248 [B(TRIGGER_LINE(2))] = U(13), 249 [B(TRIGGER_LINE(3))] = U(14), 250 [B(TRIGGER_LINE(4))] = U(15), 251 [B(TRIGGER_LINE(5))] = U(16), 252 [B(TRIGGER_LINE(6))] = U(17), 253 [B(NI_CtrGate(6))] = U(10), 254 [B(NI_20MHzTimebase)] = U(0), 255 [B(NI_80MHzTimebase)] = U(30), 256 [B(NI_100kHzTimebase)] = U(18), 257 [B(NI_LogicLow)] = U(31), 258 }, 259 [B(NI_CtrSource(6))] = { 260 /* These are not currently implemented in ni modules */ 261 [B(NI_PFI(11))] = U(9), 262 [B(NI_PFI(15))] = U(8 /* or 1 */), 263 [B(NI_PFI(19))] = U(7), 264 [B(NI_PFI(23))] = U(6), 265 [B(NI_PFI(27))] = U(5), 266 [B(NI_PFI(31))] = U(4), 267 [B(NI_PFI(35))] = U(3), 268 [B(NI_PFI(39))] = U(2), 269 [B(TRIGGER_LINE(0))] = U(11), 270 [B(TRIGGER_LINE(1))] = U(12), 271 [B(TRIGGER_LINE(2))] = U(13), 272 [B(TRIGGER_LINE(3))] = U(14), 273 [B(TRIGGER_LINE(4))] = U(15), 274 [B(TRIGGER_LINE(5))] = U(16), 275 [B(TRIGGER_LINE(6))] = U(17), 276 [B(NI_CtrGate(7))] = U(10), 277 [B(NI_20MHzTimebase)] = U(0), 278 [B(NI_80MHzTimebase)] = U(30), 279 [B(NI_100kHzTimebase)] = U(18), 280 [B(NI_LogicLow)] = U(31), 281 }, 282 [B(NI_CtrSource(7))] = { 283 /* These are not currently implemented in ni modules */ 284 [B(NI_PFI(11))] = U(9 /* or 1 */), 285 [B(NI_PFI(15))] = U(8), 286 [B(NI_PFI(19))] = U(7), 287 [B(NI_PFI(23))] = U(6), 288 [B(NI_PFI(27))] = U(5), 289 [B(NI_PFI(31))] = U(4), 290 [B(NI_PFI(35))] = U(3), 291 [B(NI_PFI(39))] = U(2), 292 [B(TRIGGER_LINE(0))] = U(11), 293 [B(TRIGGER_LINE(1))] = U(12), 294 [B(TRIGGER_LINE(2))] = U(13), 295 [B(TRIGGER_LINE(3))] = U(14), 296 [B(TRIGGER_LINE(4))] = U(15), 297 [B(TRIGGER_LINE(5))] = U(16), 298 [B(TRIGGER_LINE(6))] = U(17), 299 [B(NI_CtrGate(0))] = U(10), 300 [B(NI_20MHzTimebase)] = U(0), 301 [B(NI_80MHzTimebase)] = U(30), 302 [B(NI_100kHzTimebase)] = U(18), 303 [B(NI_LogicLow)] = U(31), 304 }, 305 [B(NI_CtrGate(0))] = { 306 [B(NI_PFI(10))] = I(9), 307 [B(NI_PFI(14))] = I(8), 308 [B(NI_PFI(18))] = I(7), 309 [B(NI_PFI(22))] = I(6), 310 [B(NI_PFI(26))] = I(5), 311 [B(NI_PFI(30))] = I(4), 312 [B(NI_PFI(34))] = I(3), 313 [B(NI_PFI(38))] = I(2 /* or 1 */), 314 [B(NI_PFI(39))] = I(0), 315 [B(TRIGGER_LINE(0))] = I(11), 316 [B(TRIGGER_LINE(1))] = I(12), 317 [B(TRIGGER_LINE(2))] = I(13), 318 [B(TRIGGER_LINE(3))] = I(14), 319 [B(TRIGGER_LINE(4))] = I(15), 320 [B(TRIGGER_LINE(5))] = I(16), 321 [B(TRIGGER_LINE(6))] = I(17), 322 [B(NI_CtrSource(1))] = I(10), 323 [B(NI_CtrInternalOutput(1))] = I(20), 324 [B(NI_LogicLow)] = I(31 /* or 30 */), 325 }, 326 [B(NI_CtrGate(1))] = { 327 [B(NI_PFI(10))] = I(9), 328 [B(NI_PFI(14))] = I(8), 329 [B(NI_PFI(18))] = I(7), 330 [B(NI_PFI(22))] = I(6), 331 [B(NI_PFI(26))] = I(5), 332 [B(NI_PFI(30))] = I(4), 333 [B(NI_PFI(34))] = I(3 /* or 1 */), 334 [B(NI_PFI(35))] = I(0), 335 [B(NI_PFI(38))] = I(2), 336 [B(TRIGGER_LINE(0))] = I(11), 337 [B(TRIGGER_LINE(1))] = I(12), 338 [B(TRIGGER_LINE(2))] = I(13), 339 [B(TRIGGER_LINE(3))] = I(14), 340 [B(TRIGGER_LINE(4))] = I(15), 341 [B(TRIGGER_LINE(5))] = I(16), 342 [B(TRIGGER_LINE(6))] = I(17), 343 [B(NI_CtrSource(2))] = I(10), 344 [B(NI_CtrInternalOutput(2))] = I(20), 345 [B(NI_LogicLow)] = I(31 /* or 30 */), 346 }, 347 [B(NI_CtrGate(2))] = { 348 [B(NI_PFI(10))] = I(9), 349 [B(NI_PFI(14))] = I(8), 350 [B(NI_PFI(18))] = I(7), 351 [B(NI_PFI(22))] = I(6), 352 [B(NI_PFI(26))] = I(5), 353 [B(NI_PFI(30))] = I(4 /* or 1 */), 354 [B(NI_PFI(31))] = I(0), 355 [B(NI_PFI(34))] = I(3), 356 [B(NI_PFI(38))] = I(2), 357 [B(TRIGGER_LINE(0))] = I(11), 358 [B(TRIGGER_LINE(1))] = I(12), 359 [B(TRIGGER_LINE(2))] = I(13), 360 [B(TRIGGER_LINE(3))] = I(14), 361 [B(TRIGGER_LINE(4))] = I(15), 362 [B(TRIGGER_LINE(5))] = I(16), 363 [B(TRIGGER_LINE(6))] = I(17), 364 [B(NI_CtrSource(3))] = I(10), 365 [B(NI_CtrInternalOutput(3))] = I(20), 366 [B(NI_LogicLow)] = I(31 /* or 30 */), 367 }, 368 [B(NI_CtrGate(3))] = { 369 [B(NI_PFI(10))] = I(9), 370 [B(NI_PFI(14))] = I(8), 371 [B(NI_PFI(18))] = I(7), 372 [B(NI_PFI(22))] = I(6), 373 [B(NI_PFI(26))] = I(5 /* or 1 */), 374 [B(NI_PFI(27))] = I(0), 375 [B(NI_PFI(30))] = I(4), 376 [B(NI_PFI(34))] = I(3), 377 [B(NI_PFI(38))] = I(2), 378 [B(TRIGGER_LINE(0))] = I(11), 379 [B(TRIGGER_LINE(1))] = I(12), 380 [B(TRIGGER_LINE(2))] = I(13), 381 [B(TRIGGER_LINE(3))] = I(14), 382 [B(TRIGGER_LINE(4))] = I(15), 383 [B(TRIGGER_LINE(5))] = I(16), 384 [B(TRIGGER_LINE(6))] = I(17), 385 [B(NI_CtrSource(4))] = I(10), 386 [B(NI_CtrInternalOutput(4))] = I(20), 387 [B(NI_LogicLow)] = I(31 /* or 30 */), 388 }, 389 [B(NI_CtrGate(4))] = { 390 [B(NI_PFI(10))] = I(9), 391 [B(NI_PFI(14))] = I(8), 392 [B(NI_PFI(18))] = I(7), 393 [B(NI_PFI(22))] = I(6 /* or 1 */), 394 [B(NI_PFI(23))] = I(0), 395 [B(NI_PFI(26))] = I(5), 396 [B(NI_PFI(30))] = I(4), 397 [B(NI_PFI(34))] = I(3), 398 [B(NI_PFI(38))] = I(2), 399 [B(TRIGGER_LINE(0))] = I(11), 400 [B(TRIGGER_LINE(1))] = I(12), 401 [B(TRIGGER_LINE(2))] = I(13), 402 [B(TRIGGER_LINE(3))] = I(14), 403 [B(TRIGGER_LINE(4))] = I(15), 404 [B(TRIGGER_LINE(5))] = I(16), 405 [B(TRIGGER_LINE(6))] = I(17), 406 [B(NI_CtrSource(5))] = I(10), 407 [B(NI_CtrInternalOutput(5))] = I(20), 408 [B(NI_LogicLow)] = I(31 /* or 30 */), 409 }, 410 [B(NI_CtrGate(5))] = { 411 [B(NI_PFI(10))] = I(9), 412 [B(NI_PFI(14))] = I(8), 413 [B(NI_PFI(18))] = I(7 /* or 1 */), 414 [B(NI_PFI(19))] = I(0), 415 [B(NI_PFI(22))] = I(6), 416 [B(NI_PFI(26))] = I(5), 417 [B(NI_PFI(30))] = I(4), 418 [B(NI_PFI(34))] = I(3), 419 [B(NI_PFI(38))] = I(2), 420 [B(TRIGGER_LINE(0))] = I(11), 421 [B(TRIGGER_LINE(1))] = I(12), 422 [B(TRIGGER_LINE(2))] = I(13), 423 [B(TRIGGER_LINE(3))] = I(14), 424 [B(TRIGGER_LINE(4))] = I(15), 425 [B(TRIGGER_LINE(5))] = I(16), 426 [B(TRIGGER_LINE(6))] = I(17), 427 [B(NI_CtrSource(6))] = I(10), 428 [B(NI_CtrInternalOutput(6))] = I(20), 429 [B(NI_LogicLow)] = I(31 /* or 30 */), 430 }, 431 [B(NI_CtrGate(6))] = { 432 [B(NI_PFI(10))] = I(9), 433 [B(NI_PFI(14))] = I(8 /* or 1 */), 434 [B(NI_PFI(15))] = I(0), 435 [B(NI_PFI(18))] = I(7), 436 [B(NI_PFI(22))] = I(6), 437 [B(NI_PFI(26))] = I(5), 438 [B(NI_PFI(30))] = I(4), 439 [B(NI_PFI(34))] = I(3), 440 [B(NI_PFI(38))] = I(2), 441 [B(TRIGGER_LINE(0))] = I(11), 442 [B(TRIGGER_LINE(1))] = I(12), 443 [B(TRIGGER_LINE(2))] = I(13), 444 [B(TRIGGER_LINE(3))] = I(14), 445 [B(TRIGGER_LINE(4))] = I(15), 446 [B(TRIGGER_LINE(5))] = I(16), 447 [B(TRIGGER_LINE(6))] = I(17), 448 [B(NI_CtrSource(7))] = I(10), 449 [B(NI_CtrInternalOutput(7))] = I(20), 450 [B(NI_LogicLow)] = I(31 /* or 30 */), 451 }, 452 [B(NI_CtrGate(7))] = { 453 [B(NI_PFI(10))] = I(9 /* or 1 */), 454 [B(NI_PFI(11))] = I(0), 455 [B(NI_PFI(14))] = I(8), 456 [B(NI_PFI(18))] = I(7), 457 [B(NI_PFI(22))] = I(6), 458 [B(NI_PFI(26))] = I(5), 459 [B(NI_PFI(30))] = I(4), 460 [B(NI_PFI(34))] = I(3), 461 [B(NI_PFI(38))] = I(2), 462 [B(TRIGGER_LINE(0))] = I(11), 463 [B(TRIGGER_LINE(1))] = I(12), 464 [B(TRIGGER_LINE(2))] = I(13), 465 [B(TRIGGER_LINE(3))] = I(14), 466 [B(TRIGGER_LINE(4))] = I(15), 467 [B(TRIGGER_LINE(5))] = I(16), 468 [B(TRIGGER_LINE(6))] = I(17), 469 [B(NI_CtrSource(0))] = I(10), 470 [B(NI_CtrInternalOutput(0))] = I(20), 471 [B(NI_LogicLow)] = I(31 /* or 30 */), 472 }, 473 [B(NI_CtrAux(0))] = { 474 [B(NI_PFI(9))] = I(9), 475 [B(NI_PFI(13))] = I(8), 476 [B(NI_PFI(17))] = I(7), 477 [B(NI_PFI(21))] = I(6), 478 [B(NI_PFI(25))] = I(5), 479 [B(NI_PFI(29))] = I(4), 480 [B(NI_PFI(33))] = I(3), 481 [B(NI_PFI(37))] = I(2 /* or 1 */), 482 [B(NI_PFI(39))] = I(0), 483 [B(TRIGGER_LINE(0))] = I(11), 484 [B(TRIGGER_LINE(1))] = I(12), 485 [B(TRIGGER_LINE(2))] = I(13), 486 [B(TRIGGER_LINE(3))] = I(14), 487 [B(TRIGGER_LINE(4))] = I(15), 488 [B(TRIGGER_LINE(5))] = I(16), 489 [B(TRIGGER_LINE(6))] = I(17), 490 [B(NI_CtrSource(1))] = I(10), 491 [B(NI_CtrGate(1))] = I(30), 492 [B(NI_CtrInternalOutput(1))] = I(20), 493 [B(NI_LogicLow)] = I(31), 494 }, 495 [B(NI_CtrAux(1))] = { 496 [B(NI_PFI(9))] = I(9), 497 [B(NI_PFI(13))] = I(8), 498 [B(NI_PFI(17))] = I(7), 499 [B(NI_PFI(21))] = I(6), 500 [B(NI_PFI(25))] = I(5), 501 [B(NI_PFI(29))] = I(4), 502 [B(NI_PFI(33))] = I(3 /* or 1 */), 503 [B(NI_PFI(35))] = I(0), 504 [B(NI_PFI(37))] = I(2), 505 [B(TRIGGER_LINE(0))] = I(11), 506 [B(TRIGGER_LINE(1))] = I(12), 507 [B(TRIGGER_LINE(2))] = I(13), 508 [B(TRIGGER_LINE(3))] = I(14), 509 [B(TRIGGER_LINE(4))] = I(15), 510 [B(TRIGGER_LINE(5))] = I(16), 511 [B(TRIGGER_LINE(6))] = I(17), 512 [B(NI_CtrSource(2))] = I(10), 513 [B(NI_CtrGate(2))] = I(30), 514 [B(NI_CtrInternalOutput(2))] = I(20), 515 [B(NI_LogicLow)] = I(31), 516 }, 517 [B(NI_CtrAux(2))] = { 518 [B(NI_PFI(9))] = I(9), 519 [B(NI_PFI(13))] = I(8), 520 [B(NI_PFI(17))] = I(7), 521 [B(NI_PFI(21))] = I(6), 522 [B(NI_PFI(25))] = I(5), 523 [B(NI_PFI(29))] = I(4 /* or 1 */), 524 [B(NI_PFI(31))] = I(0), 525 [B(NI_PFI(33))] = I(3), 526 [B(NI_PFI(37))] = I(2), 527 [B(TRIGGER_LINE(0))] = I(11), 528 [B(TRIGGER_LINE(1))] = I(12), 529 [B(TRIGGER_LINE(2))] = I(13), 530 [B(TRIGGER_LINE(3))] = I(14), 531 [B(TRIGGER_LINE(4))] = I(15), 532 [B(TRIGGER_LINE(5))] = I(16), 533 [B(TRIGGER_LINE(6))] = I(17), 534 [B(NI_CtrSource(3))] = I(10), 535 [B(NI_CtrGate(3))] = I(30), 536 [B(NI_CtrInternalOutput(3))] = I(20), 537 [B(NI_LogicLow)] = I(31), 538 }, 539 [B(NI_CtrAux(3))] = { 540 [B(NI_PFI(9))] = I(9), 541 [B(NI_PFI(13))] = I(8), 542 [B(NI_PFI(17))] = I(7), 543 [B(NI_PFI(21))] = I(6), 544 [B(NI_PFI(25))] = I(5 /* or 1 */), 545 [B(NI_PFI(27))] = I(0), 546 [B(NI_PFI(29))] = I(4), 547 [B(NI_PFI(33))] = I(3), 548 [B(NI_PFI(37))] = I(2), 549 [B(TRIGGER_LINE(0))] = I(11), 550 [B(TRIGGER_LINE(1))] = I(12), 551 [B(TRIGGER_LINE(2))] = I(13), 552 [B(TRIGGER_LINE(3))] = I(14), 553 [B(TRIGGER_LINE(4))] = I(15), 554 [B(TRIGGER_LINE(5))] = I(16), 555 [B(TRIGGER_LINE(6))] = I(17), 556 [B(NI_CtrSource(4))] = I(10), 557 [B(NI_CtrGate(4))] = I(30), 558 [B(NI_CtrInternalOutput(4))] = I(20), 559 [B(NI_LogicLow)] = I(31), 560 }, 561 [B(NI_CtrAux(4))] = { 562 [B(NI_PFI(9))] = I(9), 563 [B(NI_PFI(13))] = I(8), 564 [B(NI_PFI(17))] = I(7), 565 [B(NI_PFI(21))] = I(6 /* or 1 */), 566 [B(NI_PFI(23))] = I(0), 567 [B(NI_PFI(25))] = I(5), 568 [B(NI_PFI(29))] = I(4), 569 [B(NI_PFI(33))] = I(3), 570 [B(NI_PFI(37))] = I(2), 571 [B(TRIGGER_LINE(0))] = I(11), 572 [B(TRIGGER_LINE(1))] = I(12), 573 [B(TRIGGER_LINE(2))] = I(13), 574 [B(TRIGGER_LINE(3))] = I(14), 575 [B(TRIGGER_LINE(4))] = I(15), 576 [B(TRIGGER_LINE(5))] = I(16), 577 [B(TRIGGER_LINE(6))] = I(17), 578 [B(NI_CtrSource(5))] = I(10), 579 [B(NI_CtrGate(5))] = I(30), 580 [B(NI_CtrInternalOutput(5))] = I(20), 581 [B(NI_LogicLow)] = I(31), 582 }, 583 [B(NI_CtrAux(5))] = { 584 [B(NI_PFI(9))] = I(9), 585 [B(NI_PFI(13))] = I(8), 586 [B(NI_PFI(17))] = I(7 /* or 1 */), 587 [B(NI_PFI(19))] = I(0), 588 [B(NI_PFI(21))] = I(6), 589 [B(NI_PFI(25))] = I(5), 590 [B(NI_PFI(29))] = I(4), 591 [B(NI_PFI(33))] = I(3), 592 [B(NI_PFI(37))] = I(2), 593 [B(TRIGGER_LINE(0))] = I(11), 594 [B(TRIGGER_LINE(1))] = I(12), 595 [B(TRIGGER_LINE(2))] = I(13), 596 [B(TRIGGER_LINE(3))] = I(14), 597 [B(TRIGGER_LINE(4))] = I(15), 598 [B(TRIGGER_LINE(5))] = I(16), 599 [B(TRIGGER_LINE(6))] = I(17), 600 [B(NI_CtrSource(6))] = I(10), 601 [B(NI_CtrGate(6))] = I(30), 602 [B(NI_CtrInternalOutput(6))] = I(20), 603 [B(NI_LogicLow)] = I(31), 604 }, 605 [B(NI_CtrAux(6))] = { 606 [B(NI_PFI(9))] = I(9), 607 [B(NI_PFI(13))] = I(8 /* or 1 */), 608 [B(NI_PFI(15))] = I(0), 609 [B(NI_PFI(17))] = I(7), 610 [B(NI_PFI(21))] = I(6), 611 [B(NI_PFI(25))] = I(5), 612 [B(NI_PFI(29))] = I(4), 613 [B(NI_PFI(33))] = I(3), 614 [B(NI_PFI(37))] = I(2), 615 [B(TRIGGER_LINE(0))] = I(11), 616 [B(TRIGGER_LINE(1))] = I(12), 617 [B(TRIGGER_LINE(2))] = I(13), 618 [B(TRIGGER_LINE(3))] = I(14), 619 [B(TRIGGER_LINE(4))] = I(15), 620 [B(TRIGGER_LINE(5))] = I(16), 621 [B(TRIGGER_LINE(6))] = I(17), 622 [B(NI_CtrSource(7))] = I(10), 623 [B(NI_CtrGate(7))] = I(30), 624 [B(NI_CtrInternalOutput(7))] = I(20), 625 [B(NI_LogicLow)] = I(31), 626 }, 627 [B(NI_CtrAux(7))] = { 628 [B(NI_PFI(9))] = I(9 /* or 1 */), 629 [B(NI_PFI(11))] = I(0), 630 [B(NI_PFI(13))] = I(8), 631 [B(NI_PFI(17))] = I(7), 632 [B(NI_PFI(21))] = I(6), 633 [B(NI_PFI(25))] = I(5), 634 [B(NI_PFI(29))] = I(4), 635 [B(NI_PFI(33))] = I(3), 636 [B(NI_PFI(37))] = I(2), 637 [B(TRIGGER_LINE(0))] = I(11), 638 [B(TRIGGER_LINE(1))] = I(12), 639 [B(TRIGGER_LINE(2))] = I(13), 640 [B(TRIGGER_LINE(3))] = I(14), 641 [B(TRIGGER_LINE(4))] = I(15), 642 [B(TRIGGER_LINE(5))] = I(16), 643 [B(TRIGGER_LINE(6))] = I(17), 644 [B(NI_CtrSource(0))] = I(10), 645 [B(NI_CtrGate(0))] = I(30), 646 [B(NI_CtrInternalOutput(0))] = I(20), 647 [B(NI_LogicLow)] = I(31), 648 }, 649 }, 650 }; 651