xref: /linux/drivers/gpu/drm/amd/display/dc/inc/hw/optc.h (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright 2023 Advanced Micro Devices, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  *
23  * Authors: AMD
24  *
25  */
26 
27 /**
28  * DOC: overview
29  *
30  * Output Pipe Timing Combiner (OPTC) includes two major functional blocks:
31  * Output Data Mapper (ODM) and Output Timing Generator (OTG).
32  *
33  * - ODM: It is Output Data Mapping block. It can combine input data from
34  *   multiple OPP data pipes into one single data stream or split data from one
35  *   OPP data pipe into multiple data streams or just bypass OPP data to DIO.
36  * - OTG: It is Output Timing Generator. It generates display timing signals to
37  *   drive the display output.
38  */
39 
40 #ifndef __DC_OPTC_H__
41 #define __DC_OPTC_H__
42 
43 #include "timing_generator.h"
44 
45 struct optc {
46 	struct timing_generator base;
47 
48 	const struct dcn_optc_registers *tg_regs;
49 	const struct dcn_optc_shift *tg_shift;
50 	const struct dcn_optc_mask *tg_mask;
51 
52 	int opp_count;
53 
54 	uint32_t max_h_total;
55 	uint32_t max_v_total;
56 
57 	uint32_t min_h_blank;
58 
59 	uint32_t min_h_sync_width;
60 	uint32_t min_v_sync_width;
61 	uint32_t min_v_blank;
62 	uint32_t min_v_blank_interlace;
63 
64 	int vstartup_start;
65 	int vupdate_offset;
66 	int vupdate_width;
67 	int vready_offset;
68 	int pstate_keepout;
69 	struct dc_crtc_timing orginal_patched_timing;
70 	enum signal_type signal;
71 	uint32_t max_frame_count;
72 };
73 
74 void optc1_read_otg_state(struct timing_generator *optc, struct dcn_otg_state *s);
75 
76 bool optc1_get_hw_timing(struct timing_generator *tg, struct dc_crtc_timing *hw_crtc_timing);
77 
78 bool optc1_validate_timing(struct timing_generator *optc,
79 			   const struct dc_crtc_timing *timing);
80 
81 void optc1_program_timing(struct timing_generator *optc,
82 			  const struct dc_crtc_timing *dc_crtc_timing,
83 			  int vready_offset,
84 			  int vstartup_start,
85 			  int vupdate_offset,
86 			  int vupdate_width,
87 			  int pstate_keepout,
88 			  const enum signal_type signal,
89 			  bool use_vbios);
90 
91 void optc1_setup_vertical_interrupt0(struct timing_generator *optc,
92 				     uint32_t start_line,
93 				     uint32_t end_line);
94 
95 void optc1_setup_vertical_interrupt1(struct timing_generator *optc,
96 				     uint32_t start_line);
97 
98 void optc1_setup_vertical_interrupt2(struct timing_generator *optc,
99 				     uint32_t start_line);
100 
101 void optc1_program_global_sync(struct timing_generator *optc,
102 			       int vready_offset,
103 			       int vstartup_start,
104 			       int vupdate_offset,
105 			       int vupdate_width,
106 				   int pstate_keepout);
107 
108 bool optc1_disable_crtc(struct timing_generator *optc);
109 
110 bool optc1_is_counter_moving(struct timing_generator *optc);
111 
112 void optc1_get_position(struct timing_generator *optc,
113 			struct crtc_position *position);
114 
115 uint32_t optc1_get_vblank_counter(struct timing_generator *optc);
116 
117 void optc1_get_crtc_scanoutpos(struct timing_generator *optc,
118 			       uint32_t *v_blank_start,
119 			       uint32_t *v_blank_end,
120 			       uint32_t *h_position,
121 			       uint32_t *v_position);
122 
123 void optc1_set_early_control(struct timing_generator *optc,
124 			     uint32_t early_cntl);
125 
126 void optc1_wait_for_state(struct timing_generator *optc,
127 			  enum crtc_state state);
128 
129 void optc1_set_blank(struct timing_generator *optc,
130 		     bool enable_blanking);
131 
132 bool optc1_is_blanked(struct timing_generator *optc);
133 
134 void optc1_program_blank_color(struct timing_generator *optc,
135 			       const struct tg_color *black_color);
136 
137 bool optc1_did_triggered_reset_occur(struct timing_generator *optc);
138 
139 void optc1_enable_reset_trigger(struct timing_generator *optc, int source_tg_inst);
140 
141 void optc1_disable_reset_trigger(struct timing_generator *optc);
142 
143 void optc1_lock(struct timing_generator *optc);
144 
145 void optc1_unlock(struct timing_generator *optc);
146 
147 void optc1_enable_optc_clock(struct timing_generator *optc, bool enable);
148 
149 void optc1_set_drr(struct timing_generator *optc,
150 		   const struct drr_params *params);
151 
152 void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max);
153 
154 void optc1_set_static_screen_control(struct timing_generator *optc,
155 				     uint32_t event_triggers,
156 				     uint32_t num_frames);
157 
158 void optc1_program_stereo(struct timing_generator *optc,
159 			  const struct dc_crtc_timing *timing,
160 			  struct crtc_stereo_flags *flags);
161 
162 bool optc1_is_stereo_left_eye(struct timing_generator *optc);
163 
164 void optc1_clear_optc_underflow(struct timing_generator *optc);
165 
166 void optc1_tg_init(struct timing_generator *optc);
167 
168 bool optc1_is_tg_enabled(struct timing_generator *optc);
169 
170 bool optc1_is_optc_underflow_occurred(struct timing_generator *optc);
171 
172 void optc1_set_blank_data_double_buffer(struct timing_generator *optc, bool enable);
173 
174 void optc1_set_timing_double_buffer(struct timing_generator *optc, bool enable);
175 
176 bool optc1_get_otg_active_size(struct timing_generator *optc,
177 			       uint32_t *otg_active_width,
178 			       uint32_t *otg_active_height);
179 
180 void optc1_enable_crtc_reset(struct timing_generator *optc,
181 			     int source_tg_inst,
182 			     struct crtc_trigger_info *crtc_tp);
183 
184 bool optc1_configure_crc(struct timing_generator *optc, const struct crc_params *params);
185 
186 bool optc1_get_crc(struct timing_generator *optc, uint8_t idx,
187 		   uint32_t *r_cr,
188 		   uint32_t *g_y,
189 		   uint32_t *b_cb);
190 
191 void optc1_set_vtg_params(struct timing_generator *optc,
192 			  const struct dc_crtc_timing *dc_crtc_timing,
193 			  bool program_fp2);
194 
195 bool optc1_is_two_pixels_per_container(const struct dc_crtc_timing *timing);
196 
197 #endif
198