1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qemu/log.h"
18 #include "qapi/error.h"
19 #include "system/memory.h"
20 #include "qapi/visitor.h"
21 #include "qemu/bitops.h"
22 #include "qemu/error-report.h"
23 #include "qemu/main-loop.h"
24 #include "qemu/qemu-print.h"
25 #include "qom/object.h"
26 #include "trace.h"
27 #include "system/ram_addr.h"
28 #include "system/kvm.h"
29 #include "system/runstate.h"
30 #include "system/tcg.h"
31 #include "qemu/accel.h"
32 #include "hw/boards.h"
33 #include "migration/vmstate.h"
34 #include "system/address-spaces.h"
35
36 #include "memory-internal.h"
37
38 //#define DEBUG_UNASSIGNED
39
40 static unsigned memory_region_transaction_depth;
41 static bool memory_region_update_pending;
42 static bool ioeventfd_update_pending;
43 unsigned int global_dirty_tracking;
44
45 static QTAILQ_HEAD(, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static GHashTable *flat_views;
52
53 typedef struct AddrRange AddrRange;
54
55 /*
56 * Note that signed integers are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
addrrange_make(Int128 start,Int128 size)64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
addrrange_equal(AddrRange r1,AddrRange r2)69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
addrrange_end(AddrRange r)74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
addrrange_shift(AddrRange range,Int128 delta)79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
addrrange_contains(AddrRange range,Int128 addr)85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
addrrange_intersects(AddrRange r1,AddrRange r2)91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
addrrange_intersection(AddrRange r1,AddrRange r2)97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
130 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
131 do { \
132 MemoryListener *_listener; \
133 \
134 switch (_direction) { \
135 case Forward: \
136 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
137 if (_listener->_callback) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
143 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
144 if (_listener->_callback) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
156 do { \
157 MemoryRegionSection mrs = section_from_flat_range(fr, \
158 address_space_to_flatview(as)); \
159 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
160 } while(0)
161
162 struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165 };
166
167 struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
171 EventNotifier *e;
172 };
173
memory_region_ioeventfd_before(MemoryRegionIoeventfd * a,MemoryRegionIoeventfd * b)174 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
175 MemoryRegionIoeventfd *b)
176 {
177 if (int128_lt(a->addr.start, b->addr.start)) {
178 return true;
179 } else if (int128_gt(a->addr.start, b->addr.start)) {
180 return false;
181 } else if (int128_lt(a->addr.size, b->addr.size)) {
182 return true;
183 } else if (int128_gt(a->addr.size, b->addr.size)) {
184 return false;
185 } else if (a->match_data < b->match_data) {
186 return true;
187 } else if (a->match_data > b->match_data) {
188 return false;
189 } else if (a->match_data) {
190 if (a->data < b->data) {
191 return true;
192 } else if (a->data > b->data) {
193 return false;
194 }
195 }
196 if (a->e < b->e) {
197 return true;
198 } else if (a->e > b->e) {
199 return false;
200 }
201 return false;
202 }
203
memory_region_ioeventfd_equal(MemoryRegionIoeventfd * a,MemoryRegionIoeventfd * b)204 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
205 MemoryRegionIoeventfd *b)
206 {
207 if (int128_eq(a->addr.start, b->addr.start) &&
208 (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
209 (int128_eq(a->addr.size, b->addr.size) &&
210 (a->match_data == b->match_data) &&
211 ((a->match_data && (a->data == b->data)) || !a->match_data) &&
212 (a->e == b->e))))
213 return true;
214
215 return false;
216 }
217
218 /* Range of memory in the global map. Addresses are absolute. */
219 struct FlatRange {
220 MemoryRegion *mr;
221 hwaddr offset_in_region;
222 AddrRange addr;
223 uint8_t dirty_log_mask;
224 bool romd_mode;
225 bool readonly;
226 bool nonvolatile;
227 bool unmergeable;
228 };
229
230 #define FOR_EACH_FLAT_RANGE(var, view) \
231 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
232
233 static inline MemoryRegionSection
section_from_flat_range(FlatRange * fr,FlatView * fv)234 section_from_flat_range(FlatRange *fr, FlatView *fv)
235 {
236 return (MemoryRegionSection) {
237 .mr = fr->mr,
238 .fv = fv,
239 .offset_within_region = fr->offset_in_region,
240 .size = fr->addr.size,
241 .offset_within_address_space = int128_get64(fr->addr.start),
242 .readonly = fr->readonly,
243 .nonvolatile = fr->nonvolatile,
244 .unmergeable = fr->unmergeable,
245 };
246 }
247
flatrange_equal(FlatRange * a,FlatRange * b)248 static bool flatrange_equal(FlatRange *a, FlatRange *b)
249 {
250 return a->mr == b->mr
251 && addrrange_equal(a->addr, b->addr)
252 && a->offset_in_region == b->offset_in_region
253 && a->romd_mode == b->romd_mode
254 && a->readonly == b->readonly
255 && a->nonvolatile == b->nonvolatile
256 && a->unmergeable == b->unmergeable;
257 }
258
flatview_new(MemoryRegion * mr_root)259 static FlatView *flatview_new(MemoryRegion *mr_root)
260 {
261 FlatView *view;
262
263 view = g_new0(FlatView, 1);
264 view->ref = 1;
265 view->root = mr_root;
266 memory_region_ref(mr_root);
267 trace_flatview_new(view, mr_root);
268
269 return view;
270 }
271
272 /* Insert a range into a given position. Caller is responsible for maintaining
273 * sorting order.
274 */
flatview_insert(FlatView * view,unsigned pos,FlatRange * range)275 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
276 {
277 if (view->nr == view->nr_allocated) {
278 view->nr_allocated = MAX(2 * view->nr, 10);
279 view->ranges = g_realloc(view->ranges,
280 view->nr_allocated * sizeof(*view->ranges));
281 }
282 memmove(view->ranges + pos + 1, view->ranges + pos,
283 (view->nr - pos) * sizeof(FlatRange));
284 view->ranges[pos] = *range;
285 memory_region_ref(range->mr);
286 ++view->nr;
287 }
288
flatview_destroy(FlatView * view)289 static void flatview_destroy(FlatView *view)
290 {
291 int i;
292
293 trace_flatview_destroy(view, view->root);
294 if (view->dispatch) {
295 address_space_dispatch_free(view->dispatch);
296 }
297 for (i = 0; i < view->nr; i++) {
298 memory_region_unref(view->ranges[i].mr);
299 }
300 g_free(view->ranges);
301 memory_region_unref(view->root);
302 g_free(view);
303 }
304
flatview_ref(FlatView * view)305 static bool flatview_ref(FlatView *view)
306 {
307 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
308 }
309
flatview_unref(FlatView * view)310 void flatview_unref(FlatView *view)
311 {
312 if (qatomic_fetch_dec(&view->ref) == 1) {
313 trace_flatview_destroy_rcu(view, view->root);
314 assert(view->root);
315 call_rcu(view, flatview_destroy, rcu);
316 }
317 }
318
can_merge(FlatRange * r1,FlatRange * r2)319 static bool can_merge(FlatRange *r1, FlatRange *r2)
320 {
321 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
322 && r1->mr == r2->mr
323 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
324 r1->addr.size),
325 int128_make64(r2->offset_in_region))
326 && r1->dirty_log_mask == r2->dirty_log_mask
327 && r1->romd_mode == r2->romd_mode
328 && r1->readonly == r2->readonly
329 && r1->nonvolatile == r2->nonvolatile
330 && !r1->unmergeable && !r2->unmergeable;
331 }
332
333 /* Attempt to simplify a view by merging adjacent ranges */
flatview_simplify(FlatView * view)334 static void flatview_simplify(FlatView *view)
335 {
336 unsigned i, j, k;
337
338 i = 0;
339 while (i < view->nr) {
340 j = i + 1;
341 while (j < view->nr
342 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
343 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
344 ++j;
345 }
346 ++i;
347 for (k = i; k < j; k++) {
348 memory_region_unref(view->ranges[k].mr);
349 }
350 memmove(&view->ranges[i], &view->ranges[j],
351 (view->nr - j) * sizeof(view->ranges[j]));
352 view->nr -= j - i;
353 }
354 }
355
adjust_endianness(MemoryRegion * mr,uint64_t * data,MemOp op)356 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
357 {
358 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
359 switch (op & MO_SIZE) {
360 case MO_8:
361 break;
362 case MO_16:
363 *data = bswap16(*data);
364 break;
365 case MO_32:
366 *data = bswap32(*data);
367 break;
368 case MO_64:
369 *data = bswap64(*data);
370 break;
371 default:
372 g_assert_not_reached();
373 }
374 }
375 }
376
memory_region_shift_read_access(uint64_t * value,signed shift,uint64_t mask,uint64_t tmp)377 static inline void memory_region_shift_read_access(uint64_t *value,
378 signed shift,
379 uint64_t mask,
380 uint64_t tmp)
381 {
382 if (shift >= 0) {
383 *value |= (tmp & mask) << shift;
384 } else {
385 *value |= (tmp & mask) >> -shift;
386 }
387 }
388
memory_region_shift_write_access(uint64_t * value,signed shift,uint64_t mask)389 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
390 signed shift,
391 uint64_t mask)
392 {
393 uint64_t tmp;
394
395 if (shift >= 0) {
396 tmp = (*value >> shift) & mask;
397 } else {
398 tmp = (*value << -shift) & mask;
399 }
400
401 return tmp;
402 }
403
memory_region_to_absolute_addr(MemoryRegion * mr,hwaddr offset)404 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
405 {
406 MemoryRegion *root;
407 hwaddr abs_addr = offset;
408
409 abs_addr += mr->addr;
410 for (root = mr; root->container; ) {
411 root = root->container;
412 abs_addr += root->addr;
413 }
414
415 return abs_addr;
416 }
417
get_cpu_index(void)418 static int get_cpu_index(void)
419 {
420 if (current_cpu) {
421 return current_cpu->cpu_index;
422 }
423 return -1;
424 }
425
memory_region_read_accessor(MemoryRegion * mr,hwaddr addr,uint64_t * value,unsigned size,signed shift,uint64_t mask,MemTxAttrs attrs)426 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
427 hwaddr addr,
428 uint64_t *value,
429 unsigned size,
430 signed shift,
431 uint64_t mask,
432 MemTxAttrs attrs)
433 {
434 uint64_t tmp;
435
436 tmp = mr->ops->read(mr->opaque, addr, size);
437 if (mr->subpage) {
438 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
439 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
440 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
441 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
442 memory_region_name(mr));
443 }
444 memory_region_shift_read_access(value, shift, mask, tmp);
445 return MEMTX_OK;
446 }
447
memory_region_read_with_attrs_accessor(MemoryRegion * mr,hwaddr addr,uint64_t * value,unsigned size,signed shift,uint64_t mask,MemTxAttrs attrs)448 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
449 hwaddr addr,
450 uint64_t *value,
451 unsigned size,
452 signed shift,
453 uint64_t mask,
454 MemTxAttrs attrs)
455 {
456 uint64_t tmp = 0;
457 MemTxResult r;
458
459 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
460 if (mr->subpage) {
461 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
462 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
463 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
464 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
465 memory_region_name(mr));
466 }
467 memory_region_shift_read_access(value, shift, mask, tmp);
468 return r;
469 }
470
memory_region_write_accessor(MemoryRegion * mr,hwaddr addr,uint64_t * value,unsigned size,signed shift,uint64_t mask,MemTxAttrs attrs)471 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
472 hwaddr addr,
473 uint64_t *value,
474 unsigned size,
475 signed shift,
476 uint64_t mask,
477 MemTxAttrs attrs)
478 {
479 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
480
481 if (mr->subpage) {
482 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
483 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
484 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
485 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
486 memory_region_name(mr));
487 }
488 mr->ops->write(mr->opaque, addr, tmp, size);
489 return MEMTX_OK;
490 }
491
memory_region_write_with_attrs_accessor(MemoryRegion * mr,hwaddr addr,uint64_t * value,unsigned size,signed shift,uint64_t mask,MemTxAttrs attrs)492 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
493 hwaddr addr,
494 uint64_t *value,
495 unsigned size,
496 signed shift,
497 uint64_t mask,
498 MemTxAttrs attrs)
499 {
500 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
501
502 if (mr->subpage) {
503 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
504 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
505 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
506 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
507 memory_region_name(mr));
508 }
509 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
510 }
511
access_with_adjusted_size(hwaddr addr,uint64_t * value,unsigned size,unsigned access_size_min,unsigned access_size_max,MemTxResult (* access_fn)(MemoryRegion * mr,hwaddr addr,uint64_t * value,unsigned size,signed shift,uint64_t mask,MemTxAttrs attrs),MemoryRegion * mr,MemTxAttrs attrs)512 static MemTxResult access_with_adjusted_size(hwaddr addr,
513 uint64_t *value,
514 unsigned size,
515 unsigned access_size_min,
516 unsigned access_size_max,
517 MemTxResult (*access_fn)
518 (MemoryRegion *mr,
519 hwaddr addr,
520 uint64_t *value,
521 unsigned size,
522 signed shift,
523 uint64_t mask,
524 MemTxAttrs attrs),
525 MemoryRegion *mr,
526 MemTxAttrs attrs)
527 {
528 uint64_t access_mask;
529 unsigned access_size;
530 unsigned i;
531 MemTxResult r = MEMTX_OK;
532 bool reentrancy_guard_applied = false;
533
534 if (!access_size_min) {
535 access_size_min = 1;
536 }
537 if (!access_size_max) {
538 access_size_max = 4;
539 }
540
541 /* Do not allow more than one simultaneous access to a device's IO Regions */
542 if (mr->dev && !mr->disable_reentrancy_guard &&
543 !mr->ram_device && !mr->ram && !mr->rom_device && !mr->readonly) {
544 if (mr->dev->mem_reentrancy_guard.engaged_in_io) {
545 warn_report_once("Blocked re-entrant IO on MemoryRegion: "
546 "%s at addr: 0x%" HWADDR_PRIX,
547 memory_region_name(mr), addr);
548 return MEMTX_ACCESS_ERROR;
549 }
550 mr->dev->mem_reentrancy_guard.engaged_in_io = true;
551 reentrancy_guard_applied = true;
552 }
553
554 /* FIXME: support unaligned access? */
555 access_size = MAX(MIN(size, access_size_max), access_size_min);
556 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
557 if (devend_big_endian(mr->ops->endianness)) {
558 for (i = 0; i < size; i += access_size) {
559 r |= access_fn(mr, addr + i, value, access_size,
560 (size - access_size - i) * 8, access_mask, attrs);
561 }
562 } else {
563 for (i = 0; i < size; i += access_size) {
564 r |= access_fn(mr, addr + i, value, access_size, i * 8,
565 access_mask, attrs);
566 }
567 }
568 if (mr->dev && reentrancy_guard_applied) {
569 mr->dev->mem_reentrancy_guard.engaged_in_io = false;
570 }
571 return r;
572 }
573
memory_region_to_address_space(MemoryRegion * mr)574 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
575 {
576 AddressSpace *as;
577
578 while (mr->container) {
579 mr = mr->container;
580 }
581 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
582 if (mr == as->root) {
583 return as;
584 }
585 }
586 return NULL;
587 }
588
589 /* Render a memory region into the global view. Ranges in @view obscure
590 * ranges in @mr.
591 */
render_memory_region(FlatView * view,MemoryRegion * mr,Int128 base,AddrRange clip,bool readonly,bool nonvolatile,bool unmergeable)592 static void render_memory_region(FlatView *view,
593 MemoryRegion *mr,
594 Int128 base,
595 AddrRange clip,
596 bool readonly,
597 bool nonvolatile,
598 bool unmergeable)
599 {
600 MemoryRegion *subregion;
601 unsigned i;
602 hwaddr offset_in_region;
603 Int128 remain;
604 Int128 now;
605 FlatRange fr;
606 AddrRange tmp;
607
608 if (!mr->enabled) {
609 return;
610 }
611
612 int128_addto(&base, int128_make64(mr->addr));
613 readonly |= mr->readonly;
614 nonvolatile |= mr->nonvolatile;
615 unmergeable |= mr->unmergeable;
616
617 tmp = addrrange_make(base, mr->size);
618
619 if (!addrrange_intersects(tmp, clip)) {
620 return;
621 }
622
623 clip = addrrange_intersection(tmp, clip);
624
625 if (mr->alias) {
626 int128_subfrom(&base, int128_make64(mr->alias->addr));
627 int128_subfrom(&base, int128_make64(mr->alias_offset));
628 render_memory_region(view, mr->alias, base, clip,
629 readonly, nonvolatile, unmergeable);
630 return;
631 }
632
633 /* Render subregions in priority order. */
634 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
635 render_memory_region(view, subregion, base, clip,
636 readonly, nonvolatile, unmergeable);
637 }
638
639 if (!mr->terminates) {
640 return;
641 }
642
643 offset_in_region = int128_get64(int128_sub(clip.start, base));
644 base = clip.start;
645 remain = clip.size;
646
647 fr.mr = mr;
648 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
649 fr.romd_mode = mr->romd_mode;
650 fr.readonly = readonly;
651 fr.nonvolatile = nonvolatile;
652 fr.unmergeable = unmergeable;
653
654 /* Render the region itself into any gaps left by the current view. */
655 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
656 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
657 continue;
658 }
659 if (int128_lt(base, view->ranges[i].addr.start)) {
660 now = int128_min(remain,
661 int128_sub(view->ranges[i].addr.start, base));
662 fr.offset_in_region = offset_in_region;
663 fr.addr = addrrange_make(base, now);
664 flatview_insert(view, i, &fr);
665 ++i;
666 int128_addto(&base, now);
667 offset_in_region += int128_get64(now);
668 int128_subfrom(&remain, now);
669 }
670 now = int128_sub(int128_min(int128_add(base, remain),
671 addrrange_end(view->ranges[i].addr)),
672 base);
673 int128_addto(&base, now);
674 offset_in_region += int128_get64(now);
675 int128_subfrom(&remain, now);
676 }
677 if (int128_nz(remain)) {
678 fr.offset_in_region = offset_in_region;
679 fr.addr = addrrange_make(base, remain);
680 flatview_insert(view, i, &fr);
681 }
682 }
683
flatview_for_each_range(FlatView * fv,flatview_cb cb,void * opaque)684 void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
685 {
686 FlatRange *fr;
687
688 assert(fv);
689 assert(cb);
690
691 FOR_EACH_FLAT_RANGE(fr, fv) {
692 if (cb(fr->addr.start, fr->addr.size, fr->mr,
693 fr->offset_in_region, opaque)) {
694 break;
695 }
696 }
697 }
698
memory_region_get_flatview_root(MemoryRegion * mr)699 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
700 {
701 while (mr->enabled) {
702 if (mr->alias) {
703 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
704 /* The alias is included in its entirety. Use it as
705 * the "real" root, so that we can share more FlatViews.
706 */
707 mr = mr->alias;
708 continue;
709 }
710 } else if (!mr->terminates) {
711 unsigned int found = 0;
712 MemoryRegion *child, *next = NULL;
713 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
714 if (child->enabled) {
715 if (++found > 1) {
716 next = NULL;
717 break;
718 }
719 if (!child->addr && int128_ge(mr->size, child->size)) {
720 /* A child is included in its entirety. If it's the only
721 * enabled one, use it in the hope of finding an alias down the
722 * way. This will also let us share FlatViews.
723 */
724 next = child;
725 }
726 }
727 }
728 if (found == 0) {
729 return NULL;
730 }
731 if (next) {
732 mr = next;
733 continue;
734 }
735 }
736
737 return mr;
738 }
739
740 return NULL;
741 }
742
743 /* Render a memory topology into a list of disjoint absolute ranges. */
generate_memory_topology(MemoryRegion * mr)744 static FlatView *generate_memory_topology(MemoryRegion *mr)
745 {
746 int i;
747 FlatView *view;
748
749 view = flatview_new(mr);
750
751 if (mr) {
752 render_memory_region(view, mr, int128_zero(),
753 addrrange_make(int128_zero(), int128_2_64()),
754 false, false, false);
755 }
756 flatview_simplify(view);
757
758 view->dispatch = address_space_dispatch_new(view);
759 for (i = 0; i < view->nr; i++) {
760 MemoryRegionSection mrs =
761 section_from_flat_range(&view->ranges[i], view);
762 flatview_add_to_dispatch(view, &mrs);
763 }
764 address_space_dispatch_compact(view->dispatch);
765 g_hash_table_replace(flat_views, mr, view);
766
767 return view;
768 }
769
address_space_add_del_ioeventfds(AddressSpace * as,MemoryRegionIoeventfd * fds_new,unsigned fds_new_nb,MemoryRegionIoeventfd * fds_old,unsigned fds_old_nb)770 static void address_space_add_del_ioeventfds(AddressSpace *as,
771 MemoryRegionIoeventfd *fds_new,
772 unsigned fds_new_nb,
773 MemoryRegionIoeventfd *fds_old,
774 unsigned fds_old_nb)
775 {
776 unsigned iold, inew;
777 MemoryRegionIoeventfd *fd;
778 MemoryRegionSection section;
779
780 /* Generate a symmetric difference of the old and new fd sets, adding
781 * and deleting as necessary.
782 */
783
784 iold = inew = 0;
785 while (iold < fds_old_nb || inew < fds_new_nb) {
786 if (iold < fds_old_nb
787 && (inew == fds_new_nb
788 || memory_region_ioeventfd_before(&fds_old[iold],
789 &fds_new[inew]))) {
790 fd = &fds_old[iold];
791 section = (MemoryRegionSection) {
792 .fv = address_space_to_flatview(as),
793 .offset_within_address_space = int128_get64(fd->addr.start),
794 .size = fd->addr.size,
795 };
796 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, §ion,
797 fd->match_data, fd->data, fd->e);
798 ++iold;
799 } else if (inew < fds_new_nb
800 && (iold == fds_old_nb
801 || memory_region_ioeventfd_before(&fds_new[inew],
802 &fds_old[iold]))) {
803 fd = &fds_new[inew];
804 section = (MemoryRegionSection) {
805 .fv = address_space_to_flatview(as),
806 .offset_within_address_space = int128_get64(fd->addr.start),
807 .size = fd->addr.size,
808 };
809 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, §ion,
810 fd->match_data, fd->data, fd->e);
811 ++inew;
812 } else {
813 ++iold;
814 ++inew;
815 }
816 }
817 }
818
address_space_get_flatview(AddressSpace * as)819 FlatView *address_space_get_flatview(AddressSpace *as)
820 {
821 FlatView *view;
822
823 RCU_READ_LOCK_GUARD();
824 do {
825 view = address_space_to_flatview(as);
826 /* If somebody has replaced as->current_map concurrently,
827 * flatview_ref returns false.
828 */
829 } while (!flatview_ref(view));
830 return view;
831 }
832
address_space_update_ioeventfds(AddressSpace * as)833 static void address_space_update_ioeventfds(AddressSpace *as)
834 {
835 FlatView *view;
836 FlatRange *fr;
837 unsigned ioeventfd_nb = 0;
838 unsigned ioeventfd_max;
839 MemoryRegionIoeventfd *ioeventfds;
840 AddrRange tmp;
841 unsigned i;
842
843 if (!as->ioeventfd_notifiers) {
844 return;
845 }
846
847 /*
848 * It is likely that the number of ioeventfds hasn't changed much, so use
849 * the previous size as the starting value, with some headroom to avoid
850 * gratuitous reallocations.
851 */
852 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
853 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
854
855 view = address_space_get_flatview(as);
856 FOR_EACH_FLAT_RANGE(fr, view) {
857 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
858 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
859 int128_sub(fr->addr.start,
860 int128_make64(fr->offset_in_region)));
861 if (addrrange_intersects(fr->addr, tmp)) {
862 ++ioeventfd_nb;
863 if (ioeventfd_nb > ioeventfd_max) {
864 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
865 ioeventfds = g_realloc(ioeventfds,
866 ioeventfd_max * sizeof(*ioeventfds));
867 }
868 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
869 ioeventfds[ioeventfd_nb-1].addr = tmp;
870 }
871 }
872 }
873
874 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
875 as->ioeventfds, as->ioeventfd_nb);
876
877 g_free(as->ioeventfds);
878 as->ioeventfds = ioeventfds;
879 as->ioeventfd_nb = ioeventfd_nb;
880 flatview_unref(view);
881 }
882
883 /*
884 * Notify the memory listeners about the coalesced IO change events of
885 * range `cmr'. Only the part that has intersection of the specified
886 * FlatRange will be sent.
887 */
flat_range_coalesced_io_notify(FlatRange * fr,AddressSpace * as,CoalescedMemoryRange * cmr,bool add)888 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
889 CoalescedMemoryRange *cmr, bool add)
890 {
891 AddrRange tmp;
892
893 tmp = addrrange_shift(cmr->addr,
894 int128_sub(fr->addr.start,
895 int128_make64(fr->offset_in_region)));
896 if (!addrrange_intersects(tmp, fr->addr)) {
897 return;
898 }
899 tmp = addrrange_intersection(tmp, fr->addr);
900
901 if (add) {
902 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
903 int128_get64(tmp.start),
904 int128_get64(tmp.size));
905 } else {
906 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
907 int128_get64(tmp.start),
908 int128_get64(tmp.size));
909 }
910 }
911
flat_range_coalesced_io_del(FlatRange * fr,AddressSpace * as)912 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
913 {
914 CoalescedMemoryRange *cmr;
915
916 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
917 flat_range_coalesced_io_notify(fr, as, cmr, false);
918 }
919 }
920
flat_range_coalesced_io_add(FlatRange * fr,AddressSpace * as)921 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
922 {
923 MemoryRegion *mr = fr->mr;
924 CoalescedMemoryRange *cmr;
925
926 if (QTAILQ_EMPTY(&mr->coalesced)) {
927 return;
928 }
929
930 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
931 flat_range_coalesced_io_notify(fr, as, cmr, true);
932 }
933 }
934
935 static void
flat_range_coalesced_io_notify_listener_add_del(FlatRange * fr,MemoryRegionSection * mrs,MemoryListener * listener,AddressSpace * as,bool add)936 flat_range_coalesced_io_notify_listener_add_del(FlatRange *fr,
937 MemoryRegionSection *mrs,
938 MemoryListener *listener,
939 AddressSpace *as, bool add)
940 {
941 CoalescedMemoryRange *cmr;
942 MemoryRegion *mr = fr->mr;
943 AddrRange tmp;
944
945 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
946 tmp = addrrange_shift(cmr->addr,
947 int128_sub(fr->addr.start,
948 int128_make64(fr->offset_in_region)));
949
950 if (!addrrange_intersects(tmp, fr->addr)) {
951 return;
952 }
953 tmp = addrrange_intersection(tmp, fr->addr);
954
955 if (add && listener->coalesced_io_add) {
956 listener->coalesced_io_add(listener, mrs,
957 int128_get64(tmp.start),
958 int128_get64(tmp.size));
959 } else if (!add && listener->coalesced_io_del) {
960 listener->coalesced_io_del(listener, mrs,
961 int128_get64(tmp.start),
962 int128_get64(tmp.size));
963 }
964 }
965 }
966
address_space_update_topology_pass(AddressSpace * as,const FlatView * old_view,const FlatView * new_view,bool adding)967 static void address_space_update_topology_pass(AddressSpace *as,
968 const FlatView *old_view,
969 const FlatView *new_view,
970 bool adding)
971 {
972 unsigned iold, inew;
973 FlatRange *frold, *frnew;
974
975 /* Generate a symmetric difference of the old and new memory maps.
976 * Kill ranges in the old map, and instantiate ranges in the new map.
977 */
978 iold = inew = 0;
979 while (iold < old_view->nr || inew < new_view->nr) {
980 if (iold < old_view->nr) {
981 frold = &old_view->ranges[iold];
982 } else {
983 frold = NULL;
984 }
985 if (inew < new_view->nr) {
986 frnew = &new_view->ranges[inew];
987 } else {
988 frnew = NULL;
989 }
990
991 if (frold
992 && (!frnew
993 || int128_lt(frold->addr.start, frnew->addr.start)
994 || (int128_eq(frold->addr.start, frnew->addr.start)
995 && !flatrange_equal(frold, frnew)))) {
996 /* In old but not in new, or in both but attributes changed. */
997
998 if (!adding) {
999 flat_range_coalesced_io_del(frold, as);
1000 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
1001 }
1002
1003 ++iold;
1004 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
1005 /* In both and unchanged (except logging may have changed) */
1006
1007 if (adding) {
1008 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
1009 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
1010 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
1011 frold->dirty_log_mask,
1012 frnew->dirty_log_mask);
1013 }
1014 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
1015 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
1016 frold->dirty_log_mask,
1017 frnew->dirty_log_mask);
1018 }
1019 }
1020
1021 ++iold;
1022 ++inew;
1023 } else {
1024 /* In new */
1025
1026 if (adding) {
1027 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
1028 flat_range_coalesced_io_add(frnew, as);
1029 }
1030
1031 ++inew;
1032 }
1033 }
1034 }
1035
flatviews_init(void)1036 static void flatviews_init(void)
1037 {
1038 static FlatView *empty_view;
1039
1040 if (flat_views) {
1041 return;
1042 }
1043
1044 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
1045 (GDestroyNotify) flatview_unref);
1046 if (!empty_view) {
1047 empty_view = generate_memory_topology(NULL);
1048 /* We keep it alive forever in the global variable. */
1049 flatview_ref(empty_view);
1050 } else {
1051 g_hash_table_replace(flat_views, NULL, empty_view);
1052 flatview_ref(empty_view);
1053 }
1054 }
1055
flatviews_reset(void)1056 static void flatviews_reset(void)
1057 {
1058 AddressSpace *as;
1059
1060 if (flat_views) {
1061 g_hash_table_unref(flat_views);
1062 flat_views = NULL;
1063 }
1064 flatviews_init();
1065
1066 /* Render unique FVs */
1067 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1068 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1069
1070 if (g_hash_table_lookup(flat_views, physmr)) {
1071 continue;
1072 }
1073
1074 generate_memory_topology(physmr);
1075 }
1076 }
1077
address_space_set_flatview(AddressSpace * as)1078 static void address_space_set_flatview(AddressSpace *as)
1079 {
1080 FlatView *old_view = address_space_to_flatview(as);
1081 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1082 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1083
1084 assert(new_view);
1085
1086 if (old_view == new_view) {
1087 return;
1088 }
1089
1090 if (old_view) {
1091 flatview_ref(old_view);
1092 }
1093
1094 flatview_ref(new_view);
1095
1096 if (!QTAILQ_EMPTY(&as->listeners)) {
1097 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1098
1099 if (!old_view2) {
1100 old_view2 = &tmpview;
1101 }
1102 address_space_update_topology_pass(as, old_view2, new_view, false);
1103 address_space_update_topology_pass(as, old_view2, new_view, true);
1104 }
1105
1106 /* Writes are protected by the BQL. */
1107 qatomic_rcu_set(&as->current_map, new_view);
1108 if (old_view) {
1109 flatview_unref(old_view);
1110 }
1111
1112 /* Note that all the old MemoryRegions are still alive up to this
1113 * point. This relieves most MemoryListeners from the need to
1114 * ref/unref the MemoryRegions they get---unless they use them
1115 * outside the iothread mutex, in which case precise reference
1116 * counting is necessary.
1117 */
1118 if (old_view) {
1119 flatview_unref(old_view);
1120 }
1121 }
1122
address_space_update_topology(AddressSpace * as)1123 static void address_space_update_topology(AddressSpace *as)
1124 {
1125 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1126
1127 flatviews_init();
1128 if (!g_hash_table_lookup(flat_views, physmr)) {
1129 generate_memory_topology(physmr);
1130 }
1131 address_space_set_flatview(as);
1132 }
1133
memory_region_transaction_begin(void)1134 void memory_region_transaction_begin(void)
1135 {
1136 qemu_flush_coalesced_mmio_buffer();
1137 ++memory_region_transaction_depth;
1138 }
1139
memory_region_transaction_commit(void)1140 void memory_region_transaction_commit(void)
1141 {
1142 AddressSpace *as;
1143
1144 assert(memory_region_transaction_depth);
1145 assert(bql_locked());
1146
1147 --memory_region_transaction_depth;
1148 if (!memory_region_transaction_depth) {
1149 if (memory_region_update_pending) {
1150 flatviews_reset();
1151
1152 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1153
1154 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1155 address_space_set_flatview(as);
1156 address_space_update_ioeventfds(as);
1157 }
1158 memory_region_update_pending = false;
1159 ioeventfd_update_pending = false;
1160 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1161 } else if (ioeventfd_update_pending) {
1162 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1163 address_space_update_ioeventfds(as);
1164 }
1165 ioeventfd_update_pending = false;
1166 }
1167 }
1168 }
1169
memory_region_destructor_none(MemoryRegion * mr)1170 static void memory_region_destructor_none(MemoryRegion *mr)
1171 {
1172 }
1173
memory_region_destructor_ram(MemoryRegion * mr)1174 static void memory_region_destructor_ram(MemoryRegion *mr)
1175 {
1176 qemu_ram_free(mr->ram_block);
1177 }
1178
memory_region_need_escape(char c)1179 static bool memory_region_need_escape(char c)
1180 {
1181 return c == '/' || c == '[' || c == '\\' || c == ']';
1182 }
1183
memory_region_escape_name(const char * name)1184 static char *memory_region_escape_name(const char *name)
1185 {
1186 const char *p;
1187 char *escaped, *q;
1188 uint8_t c;
1189 size_t bytes = 0;
1190
1191 for (p = name; *p; p++) {
1192 bytes += memory_region_need_escape(*p) ? 4 : 1;
1193 }
1194 if (bytes == p - name) {
1195 return g_memdup(name, bytes + 1);
1196 }
1197
1198 escaped = g_malloc(bytes + 1);
1199 for (p = name, q = escaped; *p; p++) {
1200 c = *p;
1201 if (unlikely(memory_region_need_escape(c))) {
1202 *q++ = '\\';
1203 *q++ = 'x';
1204 *q++ = "0123456789abcdef"[c >> 4];
1205 c = "0123456789abcdef"[c & 15];
1206 }
1207 *q++ = c;
1208 }
1209 *q = 0;
1210 return escaped;
1211 }
1212
memory_region_do_init(MemoryRegion * mr,Object * owner,const char * name,uint64_t size)1213 static void memory_region_do_init(MemoryRegion *mr,
1214 Object *owner,
1215 const char *name,
1216 uint64_t size)
1217 {
1218 mr->size = int128_make64(size);
1219 if (size == UINT64_MAX) {
1220 mr->size = int128_2_64();
1221 }
1222 mr->name = g_strdup(name);
1223 mr->owner = owner;
1224 mr->dev = (DeviceState *) object_dynamic_cast(mr->owner, TYPE_DEVICE);
1225 mr->ram_block = NULL;
1226
1227 if (name) {
1228 char *escaped_name = memory_region_escape_name(name);
1229 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1230
1231 if (!owner) {
1232 owner = machine_get_container("unattached");
1233 }
1234
1235 object_property_add_child(owner, name_array, OBJECT(mr));
1236 object_unref(OBJECT(mr));
1237 g_free(name_array);
1238 g_free(escaped_name);
1239 }
1240 }
1241
memory_region_init(MemoryRegion * mr,Object * owner,const char * name,uint64_t size)1242 void memory_region_init(MemoryRegion *mr,
1243 Object *owner,
1244 const char *name,
1245 uint64_t size)
1246 {
1247 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1248 memory_region_do_init(mr, owner, name, size);
1249 }
1250
memory_region_get_container(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)1251 static void memory_region_get_container(Object *obj, Visitor *v,
1252 const char *name, void *opaque,
1253 Error **errp)
1254 {
1255 MemoryRegion *mr = MEMORY_REGION(obj);
1256 char *path = (char *)"";
1257
1258 if (mr->container) {
1259 path = object_get_canonical_path(OBJECT(mr->container));
1260 }
1261 visit_type_str(v, name, &path, errp);
1262 if (mr->container) {
1263 g_free(path);
1264 }
1265 }
1266
memory_region_resolve_container(Object * obj,void * opaque,const char * part)1267 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1268 const char *part)
1269 {
1270 MemoryRegion *mr = MEMORY_REGION(obj);
1271
1272 return OBJECT(mr->container);
1273 }
1274
memory_region_get_priority(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)1275 static void memory_region_get_priority(Object *obj, Visitor *v,
1276 const char *name, void *opaque,
1277 Error **errp)
1278 {
1279 MemoryRegion *mr = MEMORY_REGION(obj);
1280 int32_t value = mr->priority;
1281
1282 visit_type_int32(v, name, &value, errp);
1283 }
1284
memory_region_get_size(Object * obj,Visitor * v,const char * name,void * opaque,Error ** errp)1285 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1286 void *opaque, Error **errp)
1287 {
1288 MemoryRegion *mr = MEMORY_REGION(obj);
1289 uint64_t value = memory_region_size(mr);
1290
1291 visit_type_uint64(v, name, &value, errp);
1292 }
1293
memory_region_initfn(Object * obj)1294 static void memory_region_initfn(Object *obj)
1295 {
1296 MemoryRegion *mr = MEMORY_REGION(obj);
1297 ObjectProperty *op;
1298
1299 mr->ops = &unassigned_mem_ops;
1300 mr->enabled = true;
1301 mr->romd_mode = true;
1302 mr->destructor = memory_region_destructor_none;
1303 QTAILQ_INIT(&mr->subregions);
1304 QTAILQ_INIT(&mr->coalesced);
1305
1306 op = object_property_add(OBJECT(mr), "container",
1307 "link<" TYPE_MEMORY_REGION ">",
1308 memory_region_get_container,
1309 NULL, /* memory_region_set_container */
1310 NULL, NULL);
1311 op->resolve = memory_region_resolve_container;
1312
1313 object_property_add_uint64_ptr(OBJECT(mr), "addr",
1314 &mr->addr, OBJ_PROP_FLAG_READ);
1315 object_property_add(OBJECT(mr), "priority", "uint32",
1316 memory_region_get_priority,
1317 NULL, /* memory_region_set_priority */
1318 NULL, NULL);
1319 object_property_add(OBJECT(mr), "size", "uint64",
1320 memory_region_get_size,
1321 NULL, /* memory_region_set_size, */
1322 NULL, NULL);
1323 }
1324
iommu_memory_region_initfn(Object * obj)1325 static void iommu_memory_region_initfn(Object *obj)
1326 {
1327 MemoryRegion *mr = MEMORY_REGION(obj);
1328
1329 mr->is_iommu = true;
1330 }
1331
unassigned_mem_read(void * opaque,hwaddr addr,unsigned size)1332 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1333 unsigned size)
1334 {
1335 #ifdef DEBUG_UNASSIGNED
1336 printf("Unassigned mem read " HWADDR_FMT_plx "\n", addr);
1337 #endif
1338 return 0;
1339 }
1340
unassigned_mem_write(void * opaque,hwaddr addr,uint64_t val,unsigned size)1341 static void unassigned_mem_write(void *opaque, hwaddr addr,
1342 uint64_t val, unsigned size)
1343 {
1344 #ifdef DEBUG_UNASSIGNED
1345 printf("Unassigned mem write " HWADDR_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1346 #endif
1347 }
1348
unassigned_mem_accepts(void * opaque,hwaddr addr,unsigned size,bool is_write,MemTxAttrs attrs)1349 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1350 unsigned size, bool is_write,
1351 MemTxAttrs attrs)
1352 {
1353 return false;
1354 }
1355
1356 const MemoryRegionOps unassigned_mem_ops = {
1357 .valid.accepts = unassigned_mem_accepts,
1358 .endianness = DEVICE_NATIVE_ENDIAN,
1359 };
1360
memory_region_ram_device_read(void * opaque,hwaddr addr,unsigned size)1361 static uint64_t memory_region_ram_device_read(void *opaque,
1362 hwaddr addr, unsigned size)
1363 {
1364 MemoryRegion *mr = opaque;
1365 uint64_t data = ldn_he_p(mr->ram_block->host + addr, size);
1366
1367 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1368
1369 return data;
1370 }
1371
memory_region_ram_device_write(void * opaque,hwaddr addr,uint64_t data,unsigned size)1372 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1373 uint64_t data, unsigned size)
1374 {
1375 MemoryRegion *mr = opaque;
1376
1377 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1378
1379 stn_he_p(mr->ram_block->host + addr, size, data);
1380 }
1381
1382 static const MemoryRegionOps ram_device_mem_ops = {
1383 .read = memory_region_ram_device_read,
1384 .write = memory_region_ram_device_write,
1385 .endianness = HOST_BIG_ENDIAN ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN,
1386 .valid = {
1387 .min_access_size = 1,
1388 .max_access_size = 8,
1389 .unaligned = true,
1390 },
1391 .impl = {
1392 .min_access_size = 1,
1393 .max_access_size = 8,
1394 .unaligned = true,
1395 },
1396 };
1397
memory_region_access_valid(MemoryRegion * mr,hwaddr addr,unsigned size,bool is_write,MemTxAttrs attrs)1398 bool memory_region_access_valid(MemoryRegion *mr,
1399 hwaddr addr,
1400 unsigned size,
1401 bool is_write,
1402 MemTxAttrs attrs)
1403 {
1404 if (mr->ops->valid.accepts
1405 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1406 qemu_log_mask(LOG_INVALID_MEM, "Invalid %s at addr 0x%" HWADDR_PRIX
1407 ", size %u, region '%s', reason: rejected\n",
1408 is_write ? "write" : "read",
1409 addr, size, memory_region_name(mr));
1410 return false;
1411 }
1412
1413 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1414 qemu_log_mask(LOG_INVALID_MEM, "Invalid %s at addr 0x%" HWADDR_PRIX
1415 ", size %u, region '%s', reason: unaligned\n",
1416 is_write ? "write" : "read",
1417 addr, size, memory_region_name(mr));
1418 return false;
1419 }
1420
1421 /* Treat zero as compatibility all valid */
1422 if (!mr->ops->valid.max_access_size) {
1423 return true;
1424 }
1425
1426 if (size > mr->ops->valid.max_access_size
1427 || size < mr->ops->valid.min_access_size) {
1428 qemu_log_mask(LOG_INVALID_MEM, "Invalid %s at addr 0x%" HWADDR_PRIX
1429 ", size %u, region '%s', reason: invalid size "
1430 "(min:%u max:%u)\n",
1431 is_write ? "write" : "read",
1432 addr, size, memory_region_name(mr),
1433 mr->ops->valid.min_access_size,
1434 mr->ops->valid.max_access_size);
1435 return false;
1436 }
1437 return true;
1438 }
1439
memory_region_dispatch_read1(MemoryRegion * mr,hwaddr addr,uint64_t * pval,unsigned size,MemTxAttrs attrs)1440 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1441 hwaddr addr,
1442 uint64_t *pval,
1443 unsigned size,
1444 MemTxAttrs attrs)
1445 {
1446 *pval = 0;
1447
1448 if (mr->ops->read) {
1449 return access_with_adjusted_size(addr, pval, size,
1450 mr->ops->impl.min_access_size,
1451 mr->ops->impl.max_access_size,
1452 memory_region_read_accessor,
1453 mr, attrs);
1454 } else {
1455 return access_with_adjusted_size(addr, pval, size,
1456 mr->ops->impl.min_access_size,
1457 mr->ops->impl.max_access_size,
1458 memory_region_read_with_attrs_accessor,
1459 mr, attrs);
1460 }
1461 }
1462
memory_region_dispatch_read(MemoryRegion * mr,hwaddr addr,uint64_t * pval,MemOp op,MemTxAttrs attrs)1463 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1464 hwaddr addr,
1465 uint64_t *pval,
1466 MemOp op,
1467 MemTxAttrs attrs)
1468 {
1469 unsigned size = memop_size(op);
1470 MemTxResult r;
1471
1472 if (mr->alias) {
1473 return memory_region_dispatch_read(mr->alias,
1474 mr->alias_offset + addr,
1475 pval, op, attrs);
1476 }
1477 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1478 *pval = unassigned_mem_read(mr, addr, size);
1479 return MEMTX_DECODE_ERROR;
1480 }
1481
1482 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1483 adjust_endianness(mr, pval, op);
1484 return r;
1485 }
1486
1487 /* Return true if an eventfd was signalled */
memory_region_dispatch_write_eventfds(MemoryRegion * mr,hwaddr addr,uint64_t data,unsigned size,MemTxAttrs attrs)1488 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1489 hwaddr addr,
1490 uint64_t data,
1491 unsigned size,
1492 MemTxAttrs attrs)
1493 {
1494 MemoryRegionIoeventfd ioeventfd = {
1495 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1496 .data = data,
1497 };
1498 unsigned i;
1499
1500 for (i = 0; i < mr->ioeventfd_nb; i++) {
1501 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1502 ioeventfd.e = mr->ioeventfds[i].e;
1503
1504 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1505 event_notifier_set(ioeventfd.e);
1506 return true;
1507 }
1508 }
1509
1510 return false;
1511 }
1512
memory_region_dispatch_write(MemoryRegion * mr,hwaddr addr,uint64_t data,MemOp op,MemTxAttrs attrs)1513 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1514 hwaddr addr,
1515 uint64_t data,
1516 MemOp op,
1517 MemTxAttrs attrs)
1518 {
1519 unsigned size = memop_size(op);
1520
1521 if (mr->alias) {
1522 return memory_region_dispatch_write(mr->alias,
1523 mr->alias_offset + addr,
1524 data, op, attrs);
1525 }
1526 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1527 unassigned_mem_write(mr, addr, data, size);
1528 return MEMTX_DECODE_ERROR;
1529 }
1530
1531 adjust_endianness(mr, &data, op);
1532
1533 /*
1534 * FIXME: it's not clear why under KVM the write would be processed
1535 * directly, instead of going through eventfd. This probably should
1536 * test "tcg_enabled() || qtest_enabled()", or should just go away.
1537 */
1538 if (!kvm_enabled() &&
1539 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1540 return MEMTX_OK;
1541 }
1542
1543 if (mr->ops->write) {
1544 return access_with_adjusted_size(addr, &data, size,
1545 mr->ops->impl.min_access_size,
1546 mr->ops->impl.max_access_size,
1547 memory_region_write_accessor, mr,
1548 attrs);
1549 } else {
1550 return
1551 access_with_adjusted_size(addr, &data, size,
1552 mr->ops->impl.min_access_size,
1553 mr->ops->impl.max_access_size,
1554 memory_region_write_with_attrs_accessor,
1555 mr, attrs);
1556 }
1557 }
1558
memory_region_init_io(MemoryRegion * mr,Object * owner,const MemoryRegionOps * ops,void * opaque,const char * name,uint64_t size)1559 void memory_region_init_io(MemoryRegion *mr,
1560 Object *owner,
1561 const MemoryRegionOps *ops,
1562 void *opaque,
1563 const char *name,
1564 uint64_t size)
1565 {
1566 memory_region_init(mr, owner, name, size);
1567 mr->ops = ops ? ops : &unassigned_mem_ops;
1568 mr->opaque = opaque;
1569 mr->terminates = true;
1570 }
1571
memory_region_init_ram_nomigrate(MemoryRegion * mr,Object * owner,const char * name,uint64_t size,Error ** errp)1572 bool memory_region_init_ram_nomigrate(MemoryRegion *mr,
1573 Object *owner,
1574 const char *name,
1575 uint64_t size,
1576 Error **errp)
1577 {
1578 return memory_region_init_ram_flags_nomigrate(mr, owner, name,
1579 size, 0, errp);
1580 }
1581
memory_region_init_ram_flags_nomigrate(MemoryRegion * mr,Object * owner,const char * name,uint64_t size,uint32_t ram_flags,Error ** errp)1582 bool memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
1583 Object *owner,
1584 const char *name,
1585 uint64_t size,
1586 uint32_t ram_flags,
1587 Error **errp)
1588 {
1589 Error *err = NULL;
1590 memory_region_init(mr, owner, name, size);
1591 mr->ram = true;
1592 mr->terminates = true;
1593 mr->destructor = memory_region_destructor_ram;
1594 mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1595 if (err) {
1596 mr->size = int128_zero();
1597 object_unparent(OBJECT(mr));
1598 error_propagate(errp, err);
1599 return false;
1600 }
1601 return true;
1602 }
1603
memory_region_init_resizeable_ram(MemoryRegion * mr,Object * owner,const char * name,uint64_t size,uint64_t max_size,void (* resized)(const char *,uint64_t length,void * host),Error ** errp)1604 bool memory_region_init_resizeable_ram(MemoryRegion *mr,
1605 Object *owner,
1606 const char *name,
1607 uint64_t size,
1608 uint64_t max_size,
1609 void (*resized)(const char*,
1610 uint64_t length,
1611 void *host),
1612 Error **errp)
1613 {
1614 Error *err = NULL;
1615 memory_region_init(mr, owner, name, size);
1616 mr->ram = true;
1617 mr->terminates = true;
1618 mr->destructor = memory_region_destructor_ram;
1619 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1620 mr, &err);
1621 if (err) {
1622 mr->size = int128_zero();
1623 object_unparent(OBJECT(mr));
1624 error_propagate(errp, err);
1625 return false;
1626 }
1627 return true;
1628 }
1629
1630 #if defined(CONFIG_POSIX) && !defined(EMSCRIPTEN)
memory_region_init_ram_from_file(MemoryRegion * mr,Object * owner,const char * name,uint64_t size,uint64_t align,uint32_t ram_flags,const char * path,ram_addr_t offset,Error ** errp)1631 bool memory_region_init_ram_from_file(MemoryRegion *mr,
1632 Object *owner,
1633 const char *name,
1634 uint64_t size,
1635 uint64_t align,
1636 uint32_t ram_flags,
1637 const char *path,
1638 ram_addr_t offset,
1639 Error **errp)
1640 {
1641 Error *err = NULL;
1642 memory_region_init(mr, owner, name, size);
1643 mr->ram = true;
1644 mr->readonly = !!(ram_flags & RAM_READONLY);
1645 mr->terminates = true;
1646 mr->destructor = memory_region_destructor_ram;
1647 mr->align = align;
1648 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1649 offset, &err);
1650 if (err) {
1651 mr->size = int128_zero();
1652 object_unparent(OBJECT(mr));
1653 error_propagate(errp, err);
1654 return false;
1655 }
1656 return true;
1657 }
1658
memory_region_init_ram_from_fd(MemoryRegion * mr,Object * owner,const char * name,uint64_t size,uint32_t ram_flags,int fd,ram_addr_t offset,Error ** errp)1659 bool memory_region_init_ram_from_fd(MemoryRegion *mr,
1660 Object *owner,
1661 const char *name,
1662 uint64_t size,
1663 uint32_t ram_flags,
1664 int fd,
1665 ram_addr_t offset,
1666 Error **errp)
1667 {
1668 Error *err = NULL;
1669 memory_region_init(mr, owner, name, size);
1670 mr->ram = true;
1671 mr->readonly = !!(ram_flags & RAM_READONLY);
1672 mr->terminates = true;
1673 mr->destructor = memory_region_destructor_ram;
1674 mr->ram_block = qemu_ram_alloc_from_fd(size, size, NULL, mr, ram_flags, fd,
1675 offset, false, &err);
1676 if (err) {
1677 mr->size = int128_zero();
1678 object_unparent(OBJECT(mr));
1679 error_propagate(errp, err);
1680 return false;
1681 }
1682 return true;
1683 }
1684 #endif
1685
memory_region_init_ram_ptr(MemoryRegion * mr,Object * owner,const char * name,uint64_t size,void * ptr)1686 void memory_region_init_ram_ptr(MemoryRegion *mr,
1687 Object *owner,
1688 const char *name,
1689 uint64_t size,
1690 void *ptr)
1691 {
1692 memory_region_init(mr, owner, name, size);
1693 mr->ram = true;
1694 mr->terminates = true;
1695 mr->destructor = memory_region_destructor_ram;
1696
1697 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1698 assert(ptr != NULL);
1699 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1700 }
1701
memory_region_init_ram_device_ptr(MemoryRegion * mr,Object * owner,const char * name,uint64_t size,void * ptr)1702 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1703 Object *owner,
1704 const char *name,
1705 uint64_t size,
1706 void *ptr)
1707 {
1708 memory_region_init(mr, owner, name, size);
1709 mr->ram = true;
1710 mr->terminates = true;
1711 mr->ram_device = true;
1712 mr->ops = &ram_device_mem_ops;
1713 mr->opaque = mr;
1714 mr->destructor = memory_region_destructor_ram;
1715
1716 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1717 assert(ptr != NULL);
1718 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1719 }
1720
memory_region_init_alias(MemoryRegion * mr,Object * owner,const char * name,MemoryRegion * orig,hwaddr offset,uint64_t size)1721 void memory_region_init_alias(MemoryRegion *mr,
1722 Object *owner,
1723 const char *name,
1724 MemoryRegion *orig,
1725 hwaddr offset,
1726 uint64_t size)
1727 {
1728 memory_region_init(mr, owner, name, size);
1729 mr->alias = orig;
1730 mr->alias_offset = offset;
1731 }
1732
memory_region_init_rom_nomigrate(MemoryRegion * mr,Object * owner,const char * name,uint64_t size,Error ** errp)1733 bool memory_region_init_rom_nomigrate(MemoryRegion *mr,
1734 Object *owner,
1735 const char *name,
1736 uint64_t size,
1737 Error **errp)
1738 {
1739 if (!memory_region_init_ram_flags_nomigrate(mr, owner, name,
1740 size, 0, errp)) {
1741 return false;
1742 }
1743 mr->readonly = true;
1744
1745 return true;
1746 }
1747
memory_region_init_rom_device_nomigrate(MemoryRegion * mr,Object * owner,const MemoryRegionOps * ops,void * opaque,const char * name,uint64_t size,Error ** errp)1748 bool memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1749 Object *owner,
1750 const MemoryRegionOps *ops,
1751 void *opaque,
1752 const char *name,
1753 uint64_t size,
1754 Error **errp)
1755 {
1756 Error *err = NULL;
1757 assert(ops);
1758 memory_region_init(mr, owner, name, size);
1759 mr->ops = ops;
1760 mr->opaque = opaque;
1761 mr->terminates = true;
1762 mr->rom_device = true;
1763 mr->destructor = memory_region_destructor_ram;
1764 mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1765 if (err) {
1766 mr->size = int128_zero();
1767 object_unparent(OBJECT(mr));
1768 error_propagate(errp, err);
1769 return false;
1770 }
1771 return true;
1772 }
1773
memory_region_init_iommu(void * _iommu_mr,size_t instance_size,const char * mrtypename,Object * owner,const char * name,uint64_t size)1774 void memory_region_init_iommu(void *_iommu_mr,
1775 size_t instance_size,
1776 const char *mrtypename,
1777 Object *owner,
1778 const char *name,
1779 uint64_t size)
1780 {
1781 struct IOMMUMemoryRegion *iommu_mr;
1782 struct MemoryRegion *mr;
1783
1784 object_initialize(_iommu_mr, instance_size, mrtypename);
1785 mr = MEMORY_REGION(_iommu_mr);
1786 memory_region_do_init(mr, owner, name, size);
1787 iommu_mr = IOMMU_MEMORY_REGION(mr);
1788 mr->terminates = true; /* then re-forwards */
1789 QLIST_INIT(&iommu_mr->iommu_notify);
1790 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1791 }
1792
memory_region_finalize(Object * obj)1793 static void memory_region_finalize(Object *obj)
1794 {
1795 MemoryRegion *mr = MEMORY_REGION(obj);
1796
1797 assert(!mr->container);
1798
1799 /* We know the region is not visible in any address space (it
1800 * does not have a container and cannot be a root either because
1801 * it has no references, so we can blindly clear mr->enabled.
1802 * memory_region_set_enabled instead could trigger a transaction
1803 * and cause an infinite loop.
1804 */
1805 mr->enabled = false;
1806 memory_region_transaction_begin();
1807 while (!QTAILQ_EMPTY(&mr->subregions)) {
1808 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1809 memory_region_del_subregion(mr, subregion);
1810 }
1811 memory_region_transaction_commit();
1812
1813 mr->destructor(mr);
1814 memory_region_clear_coalescing(mr);
1815 g_free((char *)mr->name);
1816 g_free(mr->ioeventfds);
1817 }
1818
memory_region_owner(MemoryRegion * mr)1819 Object *memory_region_owner(MemoryRegion *mr)
1820 {
1821 Object *obj = OBJECT(mr);
1822 return obj->parent;
1823 }
1824
memory_region_ref(MemoryRegion * mr)1825 void memory_region_ref(MemoryRegion *mr)
1826 {
1827 /* MMIO callbacks most likely will access data that belongs
1828 * to the owner, hence the need to ref/unref the owner whenever
1829 * the memory region is in use.
1830 *
1831 * The memory region is a child of its owner. As long as the
1832 * owner doesn't call unparent itself on the memory region,
1833 * ref-ing the owner will also keep the memory region alive.
1834 * Memory regions without an owner are supposed to never go away;
1835 * we do not ref/unref them because it slows down DMA sensibly.
1836 */
1837 if (mr && mr->owner) {
1838 object_ref(mr->owner);
1839 }
1840 }
1841
memory_region_unref(MemoryRegion * mr)1842 void memory_region_unref(MemoryRegion *mr)
1843 {
1844 if (mr && mr->owner) {
1845 object_unref(mr->owner);
1846 }
1847 }
1848
memory_region_size(MemoryRegion * mr)1849 uint64_t memory_region_size(MemoryRegion *mr)
1850 {
1851 if (int128_eq(mr->size, int128_2_64())) {
1852 return UINT64_MAX;
1853 }
1854 return int128_get64(mr->size);
1855 }
1856
memory_region_name(const MemoryRegion * mr)1857 const char *memory_region_name(const MemoryRegion *mr)
1858 {
1859 if (!mr->name) {
1860 ((MemoryRegion *)mr)->name =
1861 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1862 }
1863 return mr->name;
1864 }
1865
memory_region_is_ram_device(MemoryRegion * mr)1866 bool memory_region_is_ram_device(MemoryRegion *mr)
1867 {
1868 return mr->ram_device;
1869 }
1870
memory_region_is_protected(MemoryRegion * mr)1871 bool memory_region_is_protected(MemoryRegion *mr)
1872 {
1873 return mr->ram && (mr->ram_block->flags & RAM_PROTECTED);
1874 }
1875
memory_region_has_guest_memfd(MemoryRegion * mr)1876 bool memory_region_has_guest_memfd(MemoryRegion *mr)
1877 {
1878 return mr->ram_block && mr->ram_block->guest_memfd >= 0;
1879 }
1880
memory_region_get_dirty_log_mask(MemoryRegion * mr)1881 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1882 {
1883 uint8_t mask = mr->dirty_log_mask;
1884 RAMBlock *rb = mr->ram_block;
1885
1886 if (global_dirty_tracking && ((rb && qemu_ram_is_migratable(rb)) ||
1887 memory_region_is_iommu(mr))) {
1888 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1889 }
1890
1891 if (tcg_enabled() && rb) {
1892 /* TCG only cares about dirty memory logging for RAM, not IOMMU. */
1893 mask |= (1 << DIRTY_MEMORY_CODE);
1894 }
1895 return mask;
1896 }
1897
memory_region_is_logging(MemoryRegion * mr,uint8_t client)1898 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1899 {
1900 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1901 }
1902
memory_region_update_iommu_notify_flags(IOMMUMemoryRegion * iommu_mr,Error ** errp)1903 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1904 Error **errp)
1905 {
1906 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1907 IOMMUNotifier *iommu_notifier;
1908 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1909 int ret = 0;
1910
1911 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1912 flags |= iommu_notifier->notifier_flags;
1913 }
1914
1915 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1916 ret = imrc->notify_flag_changed(iommu_mr,
1917 iommu_mr->iommu_notify_flags,
1918 flags, errp);
1919 }
1920
1921 if (!ret) {
1922 iommu_mr->iommu_notify_flags = flags;
1923 }
1924 return ret;
1925 }
1926
memory_region_register_iommu_notifier(MemoryRegion * mr,IOMMUNotifier * n,Error ** errp)1927 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1928 IOMMUNotifier *n, Error **errp)
1929 {
1930 IOMMUMemoryRegion *iommu_mr;
1931 int ret;
1932
1933 if (mr->alias) {
1934 return memory_region_register_iommu_notifier(mr->alias, n, errp);
1935 }
1936
1937 /* We need to register for at least one bitfield */
1938 iommu_mr = IOMMU_MEMORY_REGION(mr);
1939 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1940 assert(n->start <= n->end);
1941 assert(n->iommu_idx >= 0 &&
1942 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1943
1944 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1945 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1946 if (ret) {
1947 QLIST_REMOVE(n, node);
1948 }
1949 return ret;
1950 }
1951
memory_region_iommu_get_min_page_size(IOMMUMemoryRegion * iommu_mr)1952 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1953 {
1954 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1955
1956 if (imrc->get_min_page_size) {
1957 return imrc->get_min_page_size(iommu_mr);
1958 }
1959 return TARGET_PAGE_SIZE;
1960 }
1961
memory_region_iommu_replay(IOMMUMemoryRegion * iommu_mr,IOMMUNotifier * n)1962 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1963 {
1964 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1965 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1966 hwaddr addr, granularity;
1967 IOMMUTLBEntry iotlb;
1968
1969 /* If the IOMMU has its own replay callback, override */
1970 if (imrc->replay) {
1971 imrc->replay(iommu_mr, n);
1972 return;
1973 }
1974
1975 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1976
1977 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1978 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1979 if (iotlb.perm != IOMMU_NONE) {
1980 n->notify(n, &iotlb);
1981 }
1982
1983 /* if (2^64 - MR size) < granularity, it's possible to get an
1984 * infinite loop here. This should catch such a wraparound */
1985 if ((addr + granularity) < addr) {
1986 break;
1987 }
1988 }
1989 }
1990
memory_region_unregister_iommu_notifier(MemoryRegion * mr,IOMMUNotifier * n)1991 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1992 IOMMUNotifier *n)
1993 {
1994 IOMMUMemoryRegion *iommu_mr;
1995
1996 if (mr->alias) {
1997 memory_region_unregister_iommu_notifier(mr->alias, n);
1998 return;
1999 }
2000 QLIST_REMOVE(n, node);
2001 iommu_mr = IOMMU_MEMORY_REGION(mr);
2002 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
2003 }
2004
memory_region_notify_iommu_one(IOMMUNotifier * notifier,const IOMMUTLBEvent * event)2005 void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
2006 const IOMMUTLBEvent *event)
2007 {
2008 const IOMMUTLBEntry *entry = &event->entry;
2009 hwaddr entry_end = entry->iova + entry->addr_mask;
2010 IOMMUTLBEntry tmp = *entry;
2011
2012 if (event->type == IOMMU_NOTIFIER_UNMAP) {
2013 assert(entry->perm == IOMMU_NONE);
2014 }
2015
2016 /*
2017 * Skip the notification if the notification does not overlap
2018 * with registered range.
2019 */
2020 if (notifier->start > entry_end || notifier->end < entry->iova) {
2021 return;
2022 }
2023
2024 if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
2025 /* Crop (iova, addr_mask) to range */
2026 tmp.iova = MAX(tmp.iova, notifier->start);
2027 tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
2028 } else {
2029 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
2030 }
2031
2032 if (event->type & notifier->notifier_flags) {
2033 notifier->notify(notifier, &tmp);
2034 }
2035 }
2036
memory_region_unmap_iommu_notifier_range(IOMMUNotifier * notifier)2037 void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *notifier)
2038 {
2039 IOMMUTLBEvent event;
2040
2041 event.type = IOMMU_NOTIFIER_UNMAP;
2042 event.entry.target_as = &address_space_memory;
2043 event.entry.iova = notifier->start;
2044 event.entry.perm = IOMMU_NONE;
2045 event.entry.addr_mask = notifier->end - notifier->start;
2046
2047 memory_region_notify_iommu_one(notifier, &event);
2048 }
2049
memory_region_notify_iommu(IOMMUMemoryRegion * iommu_mr,int iommu_idx,const IOMMUTLBEvent event)2050 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
2051 int iommu_idx,
2052 const IOMMUTLBEvent event)
2053 {
2054 IOMMUNotifier *iommu_notifier;
2055
2056 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
2057
2058 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
2059 if (iommu_notifier->iommu_idx == iommu_idx) {
2060 memory_region_notify_iommu_one(iommu_notifier, &event);
2061 }
2062 }
2063 }
2064
memory_region_iommu_get_attr(IOMMUMemoryRegion * iommu_mr,enum IOMMUMemoryRegionAttr attr,void * data)2065 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2066 enum IOMMUMemoryRegionAttr attr,
2067 void *data)
2068 {
2069 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2070
2071 if (!imrc->get_attr) {
2072 return -EINVAL;
2073 }
2074
2075 return imrc->get_attr(iommu_mr, attr, data);
2076 }
2077
memory_region_iommu_attrs_to_index(IOMMUMemoryRegion * iommu_mr,MemTxAttrs attrs)2078 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2079 MemTxAttrs attrs)
2080 {
2081 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2082
2083 if (!imrc->attrs_to_index) {
2084 return 0;
2085 }
2086
2087 return imrc->attrs_to_index(iommu_mr, attrs);
2088 }
2089
memory_region_iommu_num_indexes(IOMMUMemoryRegion * iommu_mr)2090 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2091 {
2092 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2093
2094 if (!imrc->num_indexes) {
2095 return 1;
2096 }
2097
2098 return imrc->num_indexes(iommu_mr);
2099 }
2100
memory_region_get_ram_discard_manager(MemoryRegion * mr)2101 RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2102 {
2103 if (!memory_region_is_ram(mr)) {
2104 return NULL;
2105 }
2106 return mr->rdm;
2107 }
2108
memory_region_set_ram_discard_manager(MemoryRegion * mr,RamDiscardManager * rdm)2109 void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2110 RamDiscardManager *rdm)
2111 {
2112 g_assert(memory_region_is_ram(mr));
2113 g_assert(!rdm || !mr->rdm);
2114 mr->rdm = rdm;
2115 }
2116
ram_discard_manager_get_min_granularity(const RamDiscardManager * rdm,const MemoryRegion * mr)2117 uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2118 const MemoryRegion *mr)
2119 {
2120 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2121
2122 g_assert(rdmc->get_min_granularity);
2123 return rdmc->get_min_granularity(rdm, mr);
2124 }
2125
ram_discard_manager_is_populated(const RamDiscardManager * rdm,const MemoryRegionSection * section)2126 bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2127 const MemoryRegionSection *section)
2128 {
2129 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2130
2131 g_assert(rdmc->is_populated);
2132 return rdmc->is_populated(rdm, section);
2133 }
2134
ram_discard_manager_replay_populated(const RamDiscardManager * rdm,MemoryRegionSection * section,ReplayRamPopulate replay_fn,void * opaque)2135 int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2136 MemoryRegionSection *section,
2137 ReplayRamPopulate replay_fn,
2138 void *opaque)
2139 {
2140 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2141
2142 g_assert(rdmc->replay_populated);
2143 return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2144 }
2145
ram_discard_manager_replay_discarded(const RamDiscardManager * rdm,MemoryRegionSection * section,ReplayRamDiscard replay_fn,void * opaque)2146 void ram_discard_manager_replay_discarded(const RamDiscardManager *rdm,
2147 MemoryRegionSection *section,
2148 ReplayRamDiscard replay_fn,
2149 void *opaque)
2150 {
2151 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2152
2153 g_assert(rdmc->replay_discarded);
2154 rdmc->replay_discarded(rdm, section, replay_fn, opaque);
2155 }
2156
ram_discard_manager_register_listener(RamDiscardManager * rdm,RamDiscardListener * rdl,MemoryRegionSection * section)2157 void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2158 RamDiscardListener *rdl,
2159 MemoryRegionSection *section)
2160 {
2161 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2162
2163 g_assert(rdmc->register_listener);
2164 rdmc->register_listener(rdm, rdl, section);
2165 }
2166
ram_discard_manager_unregister_listener(RamDiscardManager * rdm,RamDiscardListener * rdl)2167 void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2168 RamDiscardListener *rdl)
2169 {
2170 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2171
2172 g_assert(rdmc->unregister_listener);
2173 rdmc->unregister_listener(rdm, rdl);
2174 }
2175
2176 /* Called with rcu_read_lock held. */
memory_get_xlat_addr(IOMMUTLBEntry * iotlb,void ** vaddr,ram_addr_t * ram_addr,bool * read_only,bool * mr_has_discard_manager,Error ** errp)2177 bool memory_get_xlat_addr(IOMMUTLBEntry *iotlb, void **vaddr,
2178 ram_addr_t *ram_addr, bool *read_only,
2179 bool *mr_has_discard_manager, Error **errp)
2180 {
2181 MemoryRegion *mr;
2182 hwaddr xlat;
2183 hwaddr len = iotlb->addr_mask + 1;
2184 bool writable = iotlb->perm & IOMMU_WO;
2185
2186 if (mr_has_discard_manager) {
2187 *mr_has_discard_manager = false;
2188 }
2189 /*
2190 * The IOMMU TLB entry we have just covers translation through
2191 * this IOMMU to its immediate target. We need to translate
2192 * it the rest of the way through to memory.
2193 */
2194 mr = address_space_translate(&address_space_memory, iotlb->translated_addr,
2195 &xlat, &len, writable, MEMTXATTRS_UNSPECIFIED);
2196 if (!memory_region_is_ram(mr)) {
2197 error_setg(errp, "iommu map to non memory area %" HWADDR_PRIx "", xlat);
2198 return false;
2199 } else if (memory_region_has_ram_discard_manager(mr)) {
2200 RamDiscardManager *rdm = memory_region_get_ram_discard_manager(mr);
2201 MemoryRegionSection tmp = {
2202 .mr = mr,
2203 .offset_within_region = xlat,
2204 .size = int128_make64(len),
2205 };
2206 if (mr_has_discard_manager) {
2207 *mr_has_discard_manager = true;
2208 }
2209 /*
2210 * Malicious VMs can map memory into the IOMMU, which is expected
2211 * to remain discarded. vfio will pin all pages, populating memory.
2212 * Disallow that. vmstate priorities make sure any RamDiscardManager
2213 * were already restored before IOMMUs are restored.
2214 */
2215 if (!ram_discard_manager_is_populated(rdm, &tmp)) {
2216 error_setg(errp, "iommu map to discarded memory (e.g., unplugged"
2217 " via virtio-mem): %" HWADDR_PRIx "",
2218 iotlb->translated_addr);
2219 return false;
2220 }
2221 }
2222
2223 /*
2224 * Translation truncates length to the IOMMU page size,
2225 * check that it did not truncate too much.
2226 */
2227 if (len & iotlb->addr_mask) {
2228 error_setg(errp, "iommu has granularity incompatible with target AS");
2229 return false;
2230 }
2231
2232 if (vaddr) {
2233 *vaddr = memory_region_get_ram_ptr(mr) + xlat;
2234 }
2235
2236 if (ram_addr) {
2237 *ram_addr = memory_region_get_ram_addr(mr) + xlat;
2238 }
2239
2240 if (read_only) {
2241 *read_only = !writable || mr->readonly;
2242 }
2243
2244 return true;
2245 }
2246
memory_region_set_log(MemoryRegion * mr,bool log,unsigned client)2247 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2248 {
2249 uint8_t mask = 1 << client;
2250 uint8_t old_logging;
2251
2252 assert(client == DIRTY_MEMORY_VGA);
2253 old_logging = mr->vga_logging_count;
2254 mr->vga_logging_count += log ? 1 : -1;
2255 if (!!old_logging == !!mr->vga_logging_count) {
2256 return;
2257 }
2258
2259 memory_region_transaction_begin();
2260 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2261 memory_region_update_pending |= mr->enabled;
2262 memory_region_transaction_commit();
2263 }
2264
memory_region_set_dirty(MemoryRegion * mr,hwaddr addr,hwaddr size)2265 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2266 hwaddr size)
2267 {
2268 assert(mr->ram_block);
2269 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2270 size,
2271 memory_region_get_dirty_log_mask(mr));
2272 }
2273
2274 /*
2275 * If memory region `mr' is NULL, do global sync. Otherwise, sync
2276 * dirty bitmap for the specified memory region.
2277 */
memory_region_sync_dirty_bitmap(MemoryRegion * mr,bool last_stage)2278 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr, bool last_stage)
2279 {
2280 MemoryListener *listener;
2281 AddressSpace *as;
2282 FlatView *view;
2283 FlatRange *fr;
2284
2285 /* If the same address space has multiple log_sync listeners, we
2286 * visit that address space's FlatView multiple times. But because
2287 * log_sync listeners are rare, it's still cheaper than walking each
2288 * address space once.
2289 */
2290 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2291 if (listener->log_sync) {
2292 as = listener->address_space;
2293 view = address_space_get_flatview(as);
2294 FOR_EACH_FLAT_RANGE(fr, view) {
2295 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2296 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2297 listener->log_sync(listener, &mrs);
2298 }
2299 }
2300 flatview_unref(view);
2301 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 0);
2302 } else if (listener->log_sync_global) {
2303 /*
2304 * No matter whether MR is specified, what we can do here
2305 * is to do a global sync, because we are not capable to
2306 * sync in a finer granularity.
2307 */
2308 listener->log_sync_global(listener, last_stage);
2309 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 1);
2310 }
2311 }
2312 }
2313
memory_region_clear_dirty_bitmap(MemoryRegion * mr,hwaddr start,hwaddr len)2314 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2315 hwaddr len)
2316 {
2317 MemoryRegionSection mrs;
2318 MemoryListener *listener;
2319 AddressSpace *as;
2320 FlatView *view;
2321 FlatRange *fr;
2322 hwaddr sec_start, sec_end, sec_size;
2323
2324 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2325 if (!listener->log_clear) {
2326 continue;
2327 }
2328 as = listener->address_space;
2329 view = address_space_get_flatview(as);
2330 FOR_EACH_FLAT_RANGE(fr, view) {
2331 if (!fr->dirty_log_mask || fr->mr != mr) {
2332 /*
2333 * Clear dirty bitmap operation only applies to those
2334 * regions whose dirty logging is at least enabled
2335 */
2336 continue;
2337 }
2338
2339 mrs = section_from_flat_range(fr, view);
2340
2341 sec_start = MAX(mrs.offset_within_region, start);
2342 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2343 sec_end = MIN(sec_end, start + len);
2344
2345 if (sec_start >= sec_end) {
2346 /*
2347 * If this memory region section has no intersection
2348 * with the requested range, skip.
2349 */
2350 continue;
2351 }
2352
2353 /* Valid case; shrink the section if needed */
2354 mrs.offset_within_address_space +=
2355 sec_start - mrs.offset_within_region;
2356 mrs.offset_within_region = sec_start;
2357 sec_size = sec_end - sec_start;
2358 mrs.size = int128_make64(sec_size);
2359 listener->log_clear(listener, &mrs);
2360 }
2361 flatview_unref(view);
2362 }
2363 }
2364
memory_region_snapshot_and_clear_dirty(MemoryRegion * mr,hwaddr addr,hwaddr size,unsigned client)2365 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2366 hwaddr addr,
2367 hwaddr size,
2368 unsigned client)
2369 {
2370 DirtyBitmapSnapshot *snapshot;
2371 assert(mr->ram_block);
2372 memory_region_sync_dirty_bitmap(mr, false);
2373 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2374 memory_global_after_dirty_log_sync();
2375 return snapshot;
2376 }
2377
memory_region_snapshot_get_dirty(MemoryRegion * mr,DirtyBitmapSnapshot * snap,hwaddr addr,hwaddr size)2378 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2379 hwaddr addr, hwaddr size)
2380 {
2381 assert(mr->ram_block);
2382 return cpu_physical_memory_snapshot_get_dirty(snap,
2383 memory_region_get_ram_addr(mr) + addr, size);
2384 }
2385
memory_region_set_readonly(MemoryRegion * mr,bool readonly)2386 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2387 {
2388 if (mr->readonly != readonly) {
2389 memory_region_transaction_begin();
2390 mr->readonly = readonly;
2391 memory_region_update_pending |= mr->enabled;
2392 memory_region_transaction_commit();
2393 }
2394 }
2395
memory_region_set_nonvolatile(MemoryRegion * mr,bool nonvolatile)2396 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2397 {
2398 if (mr->nonvolatile != nonvolatile) {
2399 memory_region_transaction_begin();
2400 mr->nonvolatile = nonvolatile;
2401 memory_region_update_pending |= mr->enabled;
2402 memory_region_transaction_commit();
2403 }
2404 }
2405
memory_region_rom_device_set_romd(MemoryRegion * mr,bool romd_mode)2406 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2407 {
2408 if (mr->romd_mode != romd_mode) {
2409 memory_region_transaction_begin();
2410 mr->romd_mode = romd_mode;
2411 memory_region_update_pending |= mr->enabled;
2412 memory_region_transaction_commit();
2413 }
2414 }
2415
memory_region_reset_dirty(MemoryRegion * mr,hwaddr addr,hwaddr size,unsigned client)2416 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2417 hwaddr size, unsigned client)
2418 {
2419 assert(mr->ram_block);
2420 cpu_physical_memory_test_and_clear_dirty(
2421 memory_region_get_ram_addr(mr) + addr, size, client);
2422 }
2423
memory_region_get_fd(MemoryRegion * mr)2424 int memory_region_get_fd(MemoryRegion *mr)
2425 {
2426 RCU_READ_LOCK_GUARD();
2427 while (mr->alias) {
2428 mr = mr->alias;
2429 }
2430 return mr->ram_block->fd;
2431 }
2432
memory_region_get_ram_ptr(MemoryRegion * mr)2433 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2434 {
2435 uint64_t offset = 0;
2436
2437 RCU_READ_LOCK_GUARD();
2438 while (mr->alias) {
2439 offset += mr->alias_offset;
2440 mr = mr->alias;
2441 }
2442 assert(mr->ram_block);
2443 return qemu_map_ram_ptr(mr->ram_block, offset);
2444 }
2445
memory_region_from_host(void * ptr,ram_addr_t * offset)2446 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2447 {
2448 RAMBlock *block;
2449
2450 block = qemu_ram_block_from_host(ptr, false, offset);
2451 if (!block) {
2452 return NULL;
2453 }
2454
2455 return block->mr;
2456 }
2457
memory_region_get_ram_addr(MemoryRegion * mr)2458 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2459 {
2460 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2461 }
2462
memory_region_ram_resize(MemoryRegion * mr,ram_addr_t newsize,Error ** errp)2463 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2464 {
2465 assert(mr->ram_block);
2466
2467 qemu_ram_resize(mr->ram_block, newsize, errp);
2468 }
2469
memory_region_msync(MemoryRegion * mr,hwaddr addr,hwaddr size)2470 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2471 {
2472 if (mr->ram_block) {
2473 qemu_ram_msync(mr->ram_block, addr, size);
2474 }
2475 }
2476
memory_region_writeback(MemoryRegion * mr,hwaddr addr,hwaddr size)2477 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2478 {
2479 /*
2480 * Might be extended case needed to cover
2481 * different types of memory regions
2482 */
2483 if (mr->dirty_log_mask) {
2484 memory_region_msync(mr, addr, size);
2485 }
2486 }
2487
2488 /*
2489 * Call proper memory listeners about the change on the newly
2490 * added/removed CoalescedMemoryRange.
2491 */
memory_region_update_coalesced_range(MemoryRegion * mr,CoalescedMemoryRange * cmr,bool add)2492 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2493 CoalescedMemoryRange *cmr,
2494 bool add)
2495 {
2496 AddressSpace *as;
2497 FlatView *view;
2498 FlatRange *fr;
2499
2500 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2501 view = address_space_get_flatview(as);
2502 FOR_EACH_FLAT_RANGE(fr, view) {
2503 if (fr->mr == mr) {
2504 flat_range_coalesced_io_notify(fr, as, cmr, add);
2505 }
2506 }
2507 flatview_unref(view);
2508 }
2509 }
2510
memory_region_set_coalescing(MemoryRegion * mr)2511 void memory_region_set_coalescing(MemoryRegion *mr)
2512 {
2513 memory_region_clear_coalescing(mr);
2514 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2515 }
2516
memory_region_add_coalescing(MemoryRegion * mr,hwaddr offset,uint64_t size)2517 void memory_region_add_coalescing(MemoryRegion *mr,
2518 hwaddr offset,
2519 uint64_t size)
2520 {
2521 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2522
2523 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2524 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2525 memory_region_update_coalesced_range(mr, cmr, true);
2526 memory_region_set_flush_coalesced(mr);
2527 }
2528
memory_region_clear_coalescing(MemoryRegion * mr)2529 void memory_region_clear_coalescing(MemoryRegion *mr)
2530 {
2531 CoalescedMemoryRange *cmr;
2532
2533 if (QTAILQ_EMPTY(&mr->coalesced)) {
2534 return;
2535 }
2536
2537 qemu_flush_coalesced_mmio_buffer();
2538 mr->flush_coalesced_mmio = false;
2539
2540 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2541 cmr = QTAILQ_FIRST(&mr->coalesced);
2542 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2543 memory_region_update_coalesced_range(mr, cmr, false);
2544 g_free(cmr);
2545 }
2546 }
2547
memory_region_set_flush_coalesced(MemoryRegion * mr)2548 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2549 {
2550 mr->flush_coalesced_mmio = true;
2551 }
2552
memory_region_clear_flush_coalesced(MemoryRegion * mr)2553 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2554 {
2555 qemu_flush_coalesced_mmio_buffer();
2556 if (QTAILQ_EMPTY(&mr->coalesced)) {
2557 mr->flush_coalesced_mmio = false;
2558 }
2559 }
2560
memory_region_add_eventfd(MemoryRegion * mr,hwaddr addr,unsigned size,bool match_data,uint64_t data,EventNotifier * e)2561 void memory_region_add_eventfd(MemoryRegion *mr,
2562 hwaddr addr,
2563 unsigned size,
2564 bool match_data,
2565 uint64_t data,
2566 EventNotifier *e)
2567 {
2568 MemoryRegionIoeventfd mrfd = {
2569 .addr.start = int128_make64(addr),
2570 .addr.size = int128_make64(size),
2571 .match_data = match_data,
2572 .data = data,
2573 .e = e,
2574 };
2575 unsigned i;
2576
2577 if (size) {
2578 MemOp mop = (target_big_endian() ? MO_BE : MO_LE) | size_memop(size);
2579 adjust_endianness(mr, &mrfd.data, mop);
2580 }
2581 memory_region_transaction_begin();
2582 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2583 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2584 break;
2585 }
2586 }
2587 ++mr->ioeventfd_nb;
2588 mr->ioeventfds = g_realloc(mr->ioeventfds,
2589 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2590 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2591 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2592 mr->ioeventfds[i] = mrfd;
2593 ioeventfd_update_pending |= mr->enabled;
2594 memory_region_transaction_commit();
2595 }
2596
memory_region_del_eventfd(MemoryRegion * mr,hwaddr addr,unsigned size,bool match_data,uint64_t data,EventNotifier * e)2597 void memory_region_del_eventfd(MemoryRegion *mr,
2598 hwaddr addr,
2599 unsigned size,
2600 bool match_data,
2601 uint64_t data,
2602 EventNotifier *e)
2603 {
2604 MemoryRegionIoeventfd mrfd = {
2605 .addr.start = int128_make64(addr),
2606 .addr.size = int128_make64(size),
2607 .match_data = match_data,
2608 .data = data,
2609 .e = e,
2610 };
2611 unsigned i;
2612
2613 if (size) {
2614 MemOp mop = (target_big_endian() ? MO_BE : MO_LE) | size_memop(size);
2615 adjust_endianness(mr, &mrfd.data, mop);
2616 }
2617 memory_region_transaction_begin();
2618 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2619 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2620 break;
2621 }
2622 }
2623 assert(i != mr->ioeventfd_nb);
2624 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2625 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2626 --mr->ioeventfd_nb;
2627 mr->ioeventfds = g_realloc(mr->ioeventfds,
2628 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2629 ioeventfd_update_pending |= mr->enabled;
2630 memory_region_transaction_commit();
2631 }
2632
memory_region_update_container_subregions(MemoryRegion * subregion)2633 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2634 {
2635 MemoryRegion *mr = subregion->container;
2636 MemoryRegion *other;
2637
2638 memory_region_transaction_begin();
2639
2640 memory_region_ref(subregion);
2641 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2642 if (subregion->priority >= other->priority) {
2643 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2644 goto done;
2645 }
2646 }
2647 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2648 done:
2649 memory_region_update_pending |= mr->enabled && subregion->enabled;
2650 memory_region_transaction_commit();
2651 }
2652
memory_region_add_subregion_common(MemoryRegion * mr,hwaddr offset,MemoryRegion * subregion)2653 static void memory_region_add_subregion_common(MemoryRegion *mr,
2654 hwaddr offset,
2655 MemoryRegion *subregion)
2656 {
2657 MemoryRegion *alias;
2658
2659 assert(!subregion->container);
2660 subregion->container = mr;
2661 for (alias = subregion->alias; alias; alias = alias->alias) {
2662 alias->mapped_via_alias++;
2663 }
2664 subregion->addr = offset;
2665 memory_region_update_container_subregions(subregion);
2666 }
2667
memory_region_add_subregion(MemoryRegion * mr,hwaddr offset,MemoryRegion * subregion)2668 void memory_region_add_subregion(MemoryRegion *mr,
2669 hwaddr offset,
2670 MemoryRegion *subregion)
2671 {
2672 subregion->priority = 0;
2673 memory_region_add_subregion_common(mr, offset, subregion);
2674 }
2675
memory_region_add_subregion_overlap(MemoryRegion * mr,hwaddr offset,MemoryRegion * subregion,int priority)2676 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2677 hwaddr offset,
2678 MemoryRegion *subregion,
2679 int priority)
2680 {
2681 subregion->priority = priority;
2682 memory_region_add_subregion_common(mr, offset, subregion);
2683 }
2684
memory_region_del_subregion(MemoryRegion * mr,MemoryRegion * subregion)2685 void memory_region_del_subregion(MemoryRegion *mr,
2686 MemoryRegion *subregion)
2687 {
2688 MemoryRegion *alias;
2689
2690 memory_region_transaction_begin();
2691 assert(subregion->container == mr);
2692 subregion->container = NULL;
2693 for (alias = subregion->alias; alias; alias = alias->alias) {
2694 alias->mapped_via_alias--;
2695 assert(alias->mapped_via_alias >= 0);
2696 }
2697 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2698 memory_region_unref(subregion);
2699 memory_region_update_pending |= mr->enabled && subregion->enabled;
2700 memory_region_transaction_commit();
2701 }
2702
memory_region_set_enabled(MemoryRegion * mr,bool enabled)2703 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2704 {
2705 if (enabled == mr->enabled) {
2706 return;
2707 }
2708 memory_region_transaction_begin();
2709 mr->enabled = enabled;
2710 memory_region_update_pending = true;
2711 memory_region_transaction_commit();
2712 }
2713
memory_region_set_size(MemoryRegion * mr,uint64_t size)2714 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2715 {
2716 Int128 s = int128_make64(size);
2717
2718 if (size == UINT64_MAX) {
2719 s = int128_2_64();
2720 }
2721 if (int128_eq(s, mr->size)) {
2722 return;
2723 }
2724 memory_region_transaction_begin();
2725 mr->size = s;
2726 memory_region_update_pending = true;
2727 memory_region_transaction_commit();
2728 }
2729
memory_region_readd_subregion(MemoryRegion * mr)2730 static void memory_region_readd_subregion(MemoryRegion *mr)
2731 {
2732 MemoryRegion *container = mr->container;
2733
2734 if (container) {
2735 memory_region_transaction_begin();
2736 memory_region_ref(mr);
2737 memory_region_del_subregion(container, mr);
2738 memory_region_add_subregion_common(container, mr->addr, mr);
2739 memory_region_unref(mr);
2740 memory_region_transaction_commit();
2741 }
2742 }
2743
memory_region_set_address(MemoryRegion * mr,hwaddr addr)2744 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2745 {
2746 if (addr != mr->addr) {
2747 mr->addr = addr;
2748 memory_region_readd_subregion(mr);
2749 }
2750 }
2751
memory_region_set_alias_offset(MemoryRegion * mr,hwaddr offset)2752 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2753 {
2754 assert(mr->alias);
2755
2756 if (offset == mr->alias_offset) {
2757 return;
2758 }
2759
2760 memory_region_transaction_begin();
2761 mr->alias_offset = offset;
2762 memory_region_update_pending |= mr->enabled;
2763 memory_region_transaction_commit();
2764 }
2765
memory_region_set_unmergeable(MemoryRegion * mr,bool unmergeable)2766 void memory_region_set_unmergeable(MemoryRegion *mr, bool unmergeable)
2767 {
2768 if (unmergeable == mr->unmergeable) {
2769 return;
2770 }
2771
2772 memory_region_transaction_begin();
2773 mr->unmergeable = unmergeable;
2774 memory_region_update_pending |= mr->enabled;
2775 memory_region_transaction_commit();
2776 }
2777
memory_region_get_alignment(const MemoryRegion * mr)2778 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2779 {
2780 return mr->align;
2781 }
2782
cmp_flatrange_addr(const void * addr_,const void * fr_)2783 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2784 {
2785 const AddrRange *addr = addr_;
2786 const FlatRange *fr = fr_;
2787
2788 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2789 return -1;
2790 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2791 return 1;
2792 }
2793 return 0;
2794 }
2795
flatview_lookup(FlatView * view,AddrRange addr)2796 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2797 {
2798 return bsearch(&addr, view->ranges, view->nr,
2799 sizeof(FlatRange), cmp_flatrange_addr);
2800 }
2801
memory_region_is_mapped(MemoryRegion * mr)2802 bool memory_region_is_mapped(MemoryRegion *mr)
2803 {
2804 return !!mr->container || mr->mapped_via_alias;
2805 }
2806
2807 /* Same as memory_region_find, but it does not add a reference to the
2808 * returned region. It must be called from an RCU critical section.
2809 */
memory_region_find_rcu(MemoryRegion * mr,hwaddr addr,uint64_t size)2810 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2811 hwaddr addr, uint64_t size)
2812 {
2813 MemoryRegionSection ret = { .mr = NULL };
2814 MemoryRegion *root;
2815 AddressSpace *as;
2816 AddrRange range;
2817 FlatView *view;
2818 FlatRange *fr;
2819
2820 addr += mr->addr;
2821 for (root = mr; root->container; ) {
2822 root = root->container;
2823 addr += root->addr;
2824 }
2825
2826 as = memory_region_to_address_space(root);
2827 if (!as) {
2828 return ret;
2829 }
2830 range = addrrange_make(int128_make64(addr), int128_make64(size));
2831
2832 view = address_space_to_flatview(as);
2833 fr = flatview_lookup(view, range);
2834 if (!fr) {
2835 return ret;
2836 }
2837
2838 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2839 --fr;
2840 }
2841
2842 ret.mr = fr->mr;
2843 ret.fv = view;
2844 range = addrrange_intersection(range, fr->addr);
2845 ret.offset_within_region = fr->offset_in_region;
2846 ret.offset_within_region += int128_get64(int128_sub(range.start,
2847 fr->addr.start));
2848 ret.size = range.size;
2849 ret.offset_within_address_space = int128_get64(range.start);
2850 ret.readonly = fr->readonly;
2851 ret.nonvolatile = fr->nonvolatile;
2852 return ret;
2853 }
2854
memory_region_find(MemoryRegion * mr,hwaddr addr,uint64_t size)2855 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2856 hwaddr addr, uint64_t size)
2857 {
2858 MemoryRegionSection ret;
2859 RCU_READ_LOCK_GUARD();
2860 ret = memory_region_find_rcu(mr, addr, size);
2861 if (ret.mr) {
2862 memory_region_ref(ret.mr);
2863 }
2864 return ret;
2865 }
2866
memory_region_section_new_copy(MemoryRegionSection * s)2867 MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2868 {
2869 MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2870
2871 *tmp = *s;
2872 if (tmp->mr) {
2873 memory_region_ref(tmp->mr);
2874 }
2875 if (tmp->fv) {
2876 bool ret = flatview_ref(tmp->fv);
2877
2878 g_assert(ret);
2879 }
2880 return tmp;
2881 }
2882
memory_region_section_free_copy(MemoryRegionSection * s)2883 void memory_region_section_free_copy(MemoryRegionSection *s)
2884 {
2885 if (s->fv) {
2886 flatview_unref(s->fv);
2887 }
2888 if (s->mr) {
2889 memory_region_unref(s->mr);
2890 }
2891 g_free(s);
2892 }
2893
memory_region_present(MemoryRegion * container,hwaddr addr)2894 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2895 {
2896 MemoryRegion *mr;
2897
2898 RCU_READ_LOCK_GUARD();
2899 mr = memory_region_find_rcu(container, addr, 1).mr;
2900 return mr && mr != container;
2901 }
2902
memory_global_dirty_log_sync(bool last_stage)2903 void memory_global_dirty_log_sync(bool last_stage)
2904 {
2905 memory_region_sync_dirty_bitmap(NULL, last_stage);
2906 }
2907
memory_global_after_dirty_log_sync(void)2908 void memory_global_after_dirty_log_sync(void)
2909 {
2910 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2911 }
2912
2913 /*
2914 * Dirty track stop flags that are postponed due to VM being stopped. Should
2915 * only be used within vmstate_change hook.
2916 */
2917 static unsigned int postponed_stop_flags;
2918 static VMChangeStateEntry *vmstate_change;
2919 static void memory_global_dirty_log_stop_postponed_run(void);
2920
memory_global_dirty_log_do_start(Error ** errp)2921 static bool memory_global_dirty_log_do_start(Error **errp)
2922 {
2923 MemoryListener *listener;
2924
2925 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2926 if (listener->log_global_start) {
2927 if (!listener->log_global_start(listener, errp)) {
2928 goto err;
2929 }
2930 }
2931 }
2932 return true;
2933
2934 err:
2935 while ((listener = QTAILQ_PREV(listener, link)) != NULL) {
2936 if (listener->log_global_stop) {
2937 listener->log_global_stop(listener);
2938 }
2939 }
2940
2941 return false;
2942 }
2943
memory_global_dirty_log_start(unsigned int flags,Error ** errp)2944 bool memory_global_dirty_log_start(unsigned int flags, Error **errp)
2945 {
2946 unsigned int old_flags;
2947
2948 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2949
2950 if (vmstate_change) {
2951 /* If there is postponed stop(), operate on it first */
2952 postponed_stop_flags &= ~flags;
2953 memory_global_dirty_log_stop_postponed_run();
2954 }
2955
2956 flags &= ~global_dirty_tracking;
2957 if (!flags) {
2958 return true;
2959 }
2960
2961 old_flags = global_dirty_tracking;
2962 global_dirty_tracking |= flags;
2963 trace_global_dirty_changed(global_dirty_tracking);
2964
2965 if (!old_flags) {
2966 if (!memory_global_dirty_log_do_start(errp)) {
2967 global_dirty_tracking &= ~flags;
2968 trace_global_dirty_changed(global_dirty_tracking);
2969 return false;
2970 }
2971
2972 memory_region_transaction_begin();
2973 memory_region_update_pending = true;
2974 memory_region_transaction_commit();
2975 }
2976 return true;
2977 }
2978
memory_global_dirty_log_do_stop(unsigned int flags)2979 static void memory_global_dirty_log_do_stop(unsigned int flags)
2980 {
2981 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2982 assert((global_dirty_tracking & flags) == flags);
2983 global_dirty_tracking &= ~flags;
2984
2985 trace_global_dirty_changed(global_dirty_tracking);
2986
2987 if (!global_dirty_tracking) {
2988 memory_region_transaction_begin();
2989 memory_region_update_pending = true;
2990 memory_region_transaction_commit();
2991 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2992 }
2993 }
2994
2995 /*
2996 * Execute the postponed dirty log stop operations if there is, then reset
2997 * everything (including the flags and the vmstate change hook).
2998 */
memory_global_dirty_log_stop_postponed_run(void)2999 static void memory_global_dirty_log_stop_postponed_run(void)
3000 {
3001 /* This must be called with the vmstate handler registered */
3002 assert(vmstate_change);
3003
3004 /* Note: postponed_stop_flags can be cleared in log start routine */
3005 if (postponed_stop_flags) {
3006 memory_global_dirty_log_do_stop(postponed_stop_flags);
3007 postponed_stop_flags = 0;
3008 }
3009
3010 qemu_del_vm_change_state_handler(vmstate_change);
3011 vmstate_change = NULL;
3012 }
3013
memory_vm_change_state_handler(void * opaque,bool running,RunState state)3014 static void memory_vm_change_state_handler(void *opaque, bool running,
3015 RunState state)
3016 {
3017 if (running) {
3018 memory_global_dirty_log_stop_postponed_run();
3019 }
3020 }
3021
memory_global_dirty_log_stop(unsigned int flags)3022 void memory_global_dirty_log_stop(unsigned int flags)
3023 {
3024 if (!runstate_is_running()) {
3025 /* Postpone the dirty log stop, e.g., to when VM starts again */
3026 if (vmstate_change) {
3027 /* Batch with previous postponed flags */
3028 postponed_stop_flags |= flags;
3029 } else {
3030 postponed_stop_flags = flags;
3031 vmstate_change = qemu_add_vm_change_state_handler(
3032 memory_vm_change_state_handler, NULL);
3033 }
3034 return;
3035 }
3036
3037 memory_global_dirty_log_do_stop(flags);
3038 }
3039
listener_add_address_space(MemoryListener * listener,AddressSpace * as)3040 static void listener_add_address_space(MemoryListener *listener,
3041 AddressSpace *as)
3042 {
3043 unsigned i;
3044 FlatView *view;
3045 FlatRange *fr;
3046 MemoryRegionIoeventfd *fd;
3047
3048 if (listener->begin) {
3049 listener->begin(listener);
3050 }
3051 if (global_dirty_tracking) {
3052 /*
3053 * Currently only VFIO can fail log_global_start(), and it's not
3054 * yet allowed to hotplug any PCI device during migration. So this
3055 * should never fail when invoked, guard it with error_abort. If
3056 * it can start to fail in the future, we need to be able to fail
3057 * the whole listener_add_address_space() and its callers.
3058 */
3059 if (listener->log_global_start) {
3060 listener->log_global_start(listener, &error_abort);
3061 }
3062 }
3063
3064 view = address_space_get_flatview(as);
3065 FOR_EACH_FLAT_RANGE(fr, view) {
3066 MemoryRegionSection section = section_from_flat_range(fr, view);
3067
3068 if (listener->region_add) {
3069 listener->region_add(listener, §ion);
3070 }
3071
3072 /* send coalesced io add notifications */
3073 flat_range_coalesced_io_notify_listener_add_del(fr, §ion,
3074 listener, as, true);
3075
3076 if (fr->dirty_log_mask && listener->log_start) {
3077 listener->log_start(listener, §ion, 0, fr->dirty_log_mask);
3078 }
3079 }
3080
3081 /*
3082 * register all eventfds for this address space for the newly registered
3083 * listener.
3084 */
3085 for (i = 0; i < as->ioeventfd_nb; i++) {
3086 fd = &as->ioeventfds[i];
3087 MemoryRegionSection section = (MemoryRegionSection) {
3088 .fv = view,
3089 .offset_within_address_space = int128_get64(fd->addr.start),
3090 .size = fd->addr.size,
3091 };
3092
3093 if (listener->eventfd_add) {
3094 listener->eventfd_add(listener, §ion,
3095 fd->match_data, fd->data, fd->e);
3096 }
3097 }
3098
3099 if (listener->commit) {
3100 listener->commit(listener);
3101 }
3102 flatview_unref(view);
3103 }
3104
listener_del_address_space(MemoryListener * listener,AddressSpace * as)3105 static void listener_del_address_space(MemoryListener *listener,
3106 AddressSpace *as)
3107 {
3108 unsigned i;
3109 FlatView *view;
3110 FlatRange *fr;
3111 MemoryRegionIoeventfd *fd;
3112
3113 if (listener->begin) {
3114 listener->begin(listener);
3115 }
3116 view = address_space_get_flatview(as);
3117 FOR_EACH_FLAT_RANGE(fr, view) {
3118 MemoryRegionSection section = section_from_flat_range(fr, view);
3119
3120 if (fr->dirty_log_mask && listener->log_stop) {
3121 listener->log_stop(listener, §ion, fr->dirty_log_mask, 0);
3122 }
3123
3124 /* send coalesced io del notifications */
3125 flat_range_coalesced_io_notify_listener_add_del(fr, §ion,
3126 listener, as, false);
3127 if (listener->region_del) {
3128 listener->region_del(listener, §ion);
3129 }
3130 }
3131
3132 /*
3133 * de-register all eventfds for this address space for the current
3134 * listener.
3135 */
3136 for (i = 0; i < as->ioeventfd_nb; i++) {
3137 fd = &as->ioeventfds[i];
3138 MemoryRegionSection section = (MemoryRegionSection) {
3139 .fv = view,
3140 .offset_within_address_space = int128_get64(fd->addr.start),
3141 .size = fd->addr.size,
3142 };
3143
3144 if (listener->eventfd_del) {
3145 listener->eventfd_del(listener, §ion,
3146 fd->match_data, fd->data, fd->e);
3147 }
3148 }
3149
3150 if (listener->commit) {
3151 listener->commit(listener);
3152 }
3153 flatview_unref(view);
3154 }
3155
memory_listener_register(MemoryListener * listener,AddressSpace * as)3156 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
3157 {
3158 MemoryListener *other = NULL;
3159
3160 /* Only one of them can be defined for a listener */
3161 assert(!(listener->log_sync && listener->log_sync_global));
3162
3163 listener->address_space = as;
3164 if (QTAILQ_EMPTY(&memory_listeners)
3165 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
3166 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
3167 } else {
3168 QTAILQ_FOREACH(other, &memory_listeners, link) {
3169 if (listener->priority < other->priority) {
3170 break;
3171 }
3172 }
3173 QTAILQ_INSERT_BEFORE(other, listener, link);
3174 }
3175
3176 if (QTAILQ_EMPTY(&as->listeners)
3177 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
3178 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
3179 } else {
3180 QTAILQ_FOREACH(other, &as->listeners, link_as) {
3181 if (listener->priority < other->priority) {
3182 break;
3183 }
3184 }
3185 QTAILQ_INSERT_BEFORE(other, listener, link_as);
3186 }
3187
3188 listener_add_address_space(listener, as);
3189
3190 if (listener->eventfd_add || listener->eventfd_del) {
3191 as->ioeventfd_notifiers++;
3192 }
3193 }
3194
memory_listener_unregister(MemoryListener * listener)3195 void memory_listener_unregister(MemoryListener *listener)
3196 {
3197 if (!listener->address_space) {
3198 return;
3199 }
3200
3201 if (listener->eventfd_add || listener->eventfd_del) {
3202 listener->address_space->ioeventfd_notifiers--;
3203 }
3204
3205 listener_del_address_space(listener, listener->address_space);
3206 QTAILQ_REMOVE(&memory_listeners, listener, link);
3207 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
3208 listener->address_space = NULL;
3209 }
3210
address_space_remove_listeners(AddressSpace * as)3211 void address_space_remove_listeners(AddressSpace *as)
3212 {
3213 while (!QTAILQ_EMPTY(&as->listeners)) {
3214 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
3215 }
3216 }
3217
address_space_init(AddressSpace * as,MemoryRegion * root,const char * name)3218 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
3219 {
3220 memory_region_ref(root);
3221 as->root = root;
3222 as->current_map = NULL;
3223 as->ioeventfd_nb = 0;
3224 as->ioeventfds = NULL;
3225 QTAILQ_INIT(&as->listeners);
3226 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
3227 as->max_bounce_buffer_size = DEFAULT_MAX_BOUNCE_BUFFER_SIZE;
3228 as->bounce_buffer_size = 0;
3229 qemu_mutex_init(&as->map_client_list_lock);
3230 QLIST_INIT(&as->map_client_list);
3231 as->name = g_strdup(name ? name : "anonymous");
3232 address_space_update_topology(as);
3233 address_space_update_ioeventfds(as);
3234 }
3235
do_address_space_destroy(AddressSpace * as)3236 static void do_address_space_destroy(AddressSpace *as)
3237 {
3238 assert(qatomic_read(&as->bounce_buffer_size) == 0);
3239 assert(QLIST_EMPTY(&as->map_client_list));
3240 qemu_mutex_destroy(&as->map_client_list_lock);
3241
3242 assert(QTAILQ_EMPTY(&as->listeners));
3243
3244 flatview_unref(as->current_map);
3245 g_free(as->name);
3246 g_free(as->ioeventfds);
3247 memory_region_unref(as->root);
3248 }
3249
address_space_destroy(AddressSpace * as)3250 void address_space_destroy(AddressSpace *as)
3251 {
3252 MemoryRegion *root = as->root;
3253
3254 /* Flush out anything from MemoryListeners listening in on this */
3255 memory_region_transaction_begin();
3256 as->root = NULL;
3257 memory_region_transaction_commit();
3258 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
3259
3260 /* At this point, as->dispatch and as->current_map are dummy
3261 * entries that the guest should never use. Wait for the old
3262 * values to expire before freeing the data.
3263 */
3264 as->root = root;
3265 call_rcu(as, do_address_space_destroy, rcu);
3266 }
3267
memory_region_type(MemoryRegion * mr)3268 static const char *memory_region_type(MemoryRegion *mr)
3269 {
3270 if (mr->alias) {
3271 return memory_region_type(mr->alias);
3272 }
3273 if (memory_region_is_ram_device(mr)) {
3274 return "ramd";
3275 } else if (memory_region_is_romd(mr)) {
3276 return "romd";
3277 } else if (memory_region_is_rom(mr)) {
3278 return "rom";
3279 } else if (memory_region_is_ram(mr)) {
3280 return "ram";
3281 } else {
3282 return "i/o";
3283 }
3284 }
3285
3286 typedef struct MemoryRegionList MemoryRegionList;
3287
3288 struct MemoryRegionList {
3289 const MemoryRegion *mr;
3290 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
3291 };
3292
3293 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
3294
3295 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3296 int128_sub((size), int128_one())) : 0)
3297 #define MTREE_INDENT " "
3298
mtree_expand_owner(const char * label,Object * obj)3299 static void mtree_expand_owner(const char *label, Object *obj)
3300 {
3301 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3302
3303 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
3304 if (dev && dev->id) {
3305 qemu_printf(" id=%s", dev->id);
3306 } else {
3307 char *canonical_path = object_get_canonical_path(obj);
3308 if (canonical_path) {
3309 qemu_printf(" path=%s", canonical_path);
3310 g_free(canonical_path);
3311 } else {
3312 qemu_printf(" type=%s", object_get_typename(obj));
3313 }
3314 }
3315 qemu_printf("}");
3316 }
3317
mtree_print_mr_owner(const MemoryRegion * mr)3318 static void mtree_print_mr_owner(const MemoryRegion *mr)
3319 {
3320 Object *owner = mr->owner;
3321 Object *parent = memory_region_owner((MemoryRegion *)mr);
3322
3323 if (!owner && !parent) {
3324 qemu_printf(" orphan");
3325 return;
3326 }
3327 if (owner) {
3328 mtree_expand_owner("owner", owner);
3329 }
3330 if (parent && parent != owner) {
3331 mtree_expand_owner("parent", parent);
3332 }
3333 }
3334
mtree_print_mr(const MemoryRegion * mr,unsigned int level,hwaddr base,MemoryRegionListHead * alias_print_queue,bool owner,bool display_disabled)3335 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
3336 hwaddr base,
3337 MemoryRegionListHead *alias_print_queue,
3338 bool owner, bool display_disabled)
3339 {
3340 MemoryRegionList *new_ml, *ml, *next_ml;
3341 MemoryRegionListHead submr_print_queue;
3342 const MemoryRegion *submr;
3343 unsigned int i;
3344 hwaddr cur_start, cur_end;
3345
3346 if (!mr) {
3347 return;
3348 }
3349
3350 cur_start = base + mr->addr;
3351 cur_end = cur_start + MR_SIZE(mr->size);
3352
3353 /*
3354 * Try to detect overflow of memory region. This should never
3355 * happen normally. When it happens, we dump something to warn the
3356 * user who is observing this.
3357 */
3358 if (cur_start < base || cur_end < cur_start) {
3359 qemu_printf("[DETECTED OVERFLOW!] ");
3360 }
3361
3362 if (mr->alias) {
3363 bool found = false;
3364
3365 /* check if the alias is already in the queue */
3366 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
3367 if (ml->mr == mr->alias) {
3368 found = true;
3369 }
3370 }
3371
3372 if (!found) {
3373 ml = g_new(MemoryRegionList, 1);
3374 ml->mr = mr->alias;
3375 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
3376 }
3377 if (mr->enabled || display_disabled) {
3378 for (i = 0; i < level; i++) {
3379 qemu_printf(MTREE_INDENT);
3380 }
3381 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3382 " (prio %d, %s%s): alias %s @%s " HWADDR_FMT_plx
3383 "-" HWADDR_FMT_plx "%s",
3384 cur_start, cur_end,
3385 mr->priority,
3386 mr->nonvolatile ? "nv-" : "",
3387 memory_region_type((MemoryRegion *)mr),
3388 memory_region_name(mr),
3389 memory_region_name(mr->alias),
3390 mr->alias_offset,
3391 mr->alias_offset + MR_SIZE(mr->size),
3392 mr->enabled ? "" : " [disabled]");
3393 if (owner) {
3394 mtree_print_mr_owner(mr);
3395 }
3396 qemu_printf("\n");
3397 }
3398 } else {
3399 if (mr->enabled || display_disabled) {
3400 for (i = 0; i < level; i++) {
3401 qemu_printf(MTREE_INDENT);
3402 }
3403 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3404 " (prio %d, %s%s): %s%s",
3405 cur_start, cur_end,
3406 mr->priority,
3407 mr->nonvolatile ? "nv-" : "",
3408 memory_region_type((MemoryRegion *)mr),
3409 memory_region_name(mr),
3410 mr->enabled ? "" : " [disabled]");
3411 if (owner) {
3412 mtree_print_mr_owner(mr);
3413 }
3414 qemu_printf("\n");
3415 }
3416 }
3417
3418 QTAILQ_INIT(&submr_print_queue);
3419
3420 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3421 new_ml = g_new(MemoryRegionList, 1);
3422 new_ml->mr = submr;
3423 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3424 if (new_ml->mr->addr < ml->mr->addr ||
3425 (new_ml->mr->addr == ml->mr->addr &&
3426 new_ml->mr->priority > ml->mr->priority)) {
3427 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3428 new_ml = NULL;
3429 break;
3430 }
3431 }
3432 if (new_ml) {
3433 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3434 }
3435 }
3436
3437 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3438 mtree_print_mr(ml->mr, level + 1, cur_start,
3439 alias_print_queue, owner, display_disabled);
3440 }
3441
3442 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3443 g_free(ml);
3444 }
3445 }
3446
3447 struct FlatViewInfo {
3448 int counter;
3449 bool dispatch_tree;
3450 bool owner;
3451 AccelClass *ac;
3452 };
3453
mtree_print_flatview(gpointer key,gpointer value,gpointer user_data)3454 static void mtree_print_flatview(gpointer key, gpointer value,
3455 gpointer user_data)
3456 {
3457 FlatView *view = key;
3458 GArray *fv_address_spaces = value;
3459 struct FlatViewInfo *fvi = user_data;
3460 FlatRange *range = &view->ranges[0];
3461 MemoryRegion *mr;
3462 int n = view->nr;
3463 int i;
3464 AddressSpace *as;
3465
3466 qemu_printf("FlatView #%d\n", fvi->counter);
3467 ++fvi->counter;
3468
3469 for (i = 0; i < fv_address_spaces->len; ++i) {
3470 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3471 qemu_printf(" AS \"%s\", root: %s",
3472 as->name, memory_region_name(as->root));
3473 if (as->root->alias) {
3474 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3475 }
3476 qemu_printf("\n");
3477 }
3478
3479 qemu_printf(" Root memory region: %s\n",
3480 view->root ? memory_region_name(view->root) : "(none)");
3481
3482 if (n <= 0) {
3483 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3484 return;
3485 }
3486
3487 while (n--) {
3488 mr = range->mr;
3489 if (range->offset_in_region) {
3490 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3491 " (prio %d, %s%s): %s @" HWADDR_FMT_plx,
3492 int128_get64(range->addr.start),
3493 int128_get64(range->addr.start)
3494 + MR_SIZE(range->addr.size),
3495 mr->priority,
3496 range->nonvolatile ? "nv-" : "",
3497 range->readonly ? "rom" : memory_region_type(mr),
3498 memory_region_name(mr),
3499 range->offset_in_region);
3500 } else {
3501 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3502 " (prio %d, %s%s): %s",
3503 int128_get64(range->addr.start),
3504 int128_get64(range->addr.start)
3505 + MR_SIZE(range->addr.size),
3506 mr->priority,
3507 range->nonvolatile ? "nv-" : "",
3508 range->readonly ? "rom" : memory_region_type(mr),
3509 memory_region_name(mr));
3510 }
3511 if (fvi->owner) {
3512 mtree_print_mr_owner(mr);
3513 }
3514
3515 if (fvi->ac) {
3516 for (i = 0; i < fv_address_spaces->len; ++i) {
3517 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3518 if (fvi->ac->has_memory(current_machine, as,
3519 int128_get64(range->addr.start),
3520 MR_SIZE(range->addr.size) + 1)) {
3521 qemu_printf(" %s", fvi->ac->name);
3522 }
3523 }
3524 }
3525 qemu_printf("\n");
3526 range++;
3527 }
3528
3529 #if !defined(CONFIG_USER_ONLY)
3530 if (fvi->dispatch_tree && view->root) {
3531 mtree_print_dispatch(view->dispatch, view->root);
3532 }
3533 #endif
3534
3535 qemu_printf("\n");
3536 }
3537
mtree_info_flatview_free(gpointer key,gpointer value,gpointer user_data)3538 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3539 gpointer user_data)
3540 {
3541 FlatView *view = key;
3542 GArray *fv_address_spaces = value;
3543
3544 g_array_unref(fv_address_spaces);
3545 flatview_unref(view);
3546
3547 return true;
3548 }
3549
mtree_info_flatview(bool dispatch_tree,bool owner)3550 static void mtree_info_flatview(bool dispatch_tree, bool owner)
3551 {
3552 struct FlatViewInfo fvi = {
3553 .counter = 0,
3554 .dispatch_tree = dispatch_tree,
3555 .owner = owner,
3556 };
3557 AddressSpace *as;
3558 FlatView *view;
3559 GArray *fv_address_spaces;
3560 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3561 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3562
3563 if (ac->has_memory) {
3564 fvi.ac = ac;
3565 }
3566
3567 /* Gather all FVs in one table */
3568 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3569 view = address_space_get_flatview(as);
3570
3571 fv_address_spaces = g_hash_table_lookup(views, view);
3572 if (!fv_address_spaces) {
3573 fv_address_spaces = g_array_new(false, false, sizeof(as));
3574 g_hash_table_insert(views, view, fv_address_spaces);
3575 }
3576
3577 g_array_append_val(fv_address_spaces, as);
3578 }
3579
3580 /* Print */
3581 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3582
3583 /* Free */
3584 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3585 g_hash_table_unref(views);
3586 }
3587
3588 struct AddressSpaceInfo {
3589 MemoryRegionListHead *ml_head;
3590 bool owner;
3591 bool disabled;
3592 };
3593
3594 /* Returns negative value if a < b; zero if a = b; positive value if a > b. */
address_space_compare_name(gconstpointer a,gconstpointer b)3595 static gint address_space_compare_name(gconstpointer a, gconstpointer b)
3596 {
3597 const AddressSpace *as_a = a;
3598 const AddressSpace *as_b = b;
3599
3600 return g_strcmp0(as_a->name, as_b->name);
3601 }
3602
mtree_print_as_name(gpointer data,gpointer user_data)3603 static void mtree_print_as_name(gpointer data, gpointer user_data)
3604 {
3605 AddressSpace *as = data;
3606
3607 qemu_printf("address-space: %s\n", as->name);
3608 }
3609
mtree_print_as(gpointer key,gpointer value,gpointer user_data)3610 static void mtree_print_as(gpointer key, gpointer value, gpointer user_data)
3611 {
3612 MemoryRegion *mr = key;
3613 GSList *as_same_root_mr_list = value;
3614 struct AddressSpaceInfo *asi = user_data;
3615
3616 g_slist_foreach(as_same_root_mr_list, mtree_print_as_name, NULL);
3617 mtree_print_mr(mr, 1, 0, asi->ml_head, asi->owner, asi->disabled);
3618 qemu_printf("\n");
3619 }
3620
mtree_info_as_free(gpointer key,gpointer value,gpointer user_data)3621 static gboolean mtree_info_as_free(gpointer key, gpointer value,
3622 gpointer user_data)
3623 {
3624 GSList *as_same_root_mr_list = value;
3625
3626 g_slist_free(as_same_root_mr_list);
3627
3628 return true;
3629 }
3630
mtree_info_as(bool dispatch_tree,bool owner,bool disabled)3631 static void mtree_info_as(bool dispatch_tree, bool owner, bool disabled)
3632 {
3633 MemoryRegionListHead ml_head;
3634 MemoryRegionList *ml, *ml2;
3635 AddressSpace *as;
3636 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3637 GSList *as_same_root_mr_list;
3638 struct AddressSpaceInfo asi = {
3639 .ml_head = &ml_head,
3640 .owner = owner,
3641 .disabled = disabled,
3642 };
3643
3644 QTAILQ_INIT(&ml_head);
3645
3646 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3647 /* Create hashtable, key=AS root MR, value = list of AS */
3648 as_same_root_mr_list = g_hash_table_lookup(views, as->root);
3649 as_same_root_mr_list = g_slist_insert_sorted(as_same_root_mr_list, as,
3650 address_space_compare_name);
3651 g_hash_table_insert(views, as->root, as_same_root_mr_list);
3652 }
3653
3654 /* print address spaces */
3655 g_hash_table_foreach(views, mtree_print_as, &asi);
3656 g_hash_table_foreach_remove(views, mtree_info_as_free, 0);
3657 g_hash_table_unref(views);
3658
3659 /* print aliased regions */
3660 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3661 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3662 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3663 qemu_printf("\n");
3664 }
3665
3666 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3667 g_free(ml);
3668 }
3669 }
3670
mtree_info(bool flatview,bool dispatch_tree,bool owner,bool disabled)3671 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3672 {
3673 if (flatview) {
3674 mtree_info_flatview(dispatch_tree, owner);
3675 } else {
3676 mtree_info_as(dispatch_tree, owner, disabled);
3677 }
3678 }
3679
memory_region_init_ram(MemoryRegion * mr,Object * owner,const char * name,uint64_t size,Error ** errp)3680 bool memory_region_init_ram(MemoryRegion *mr,
3681 Object *owner,
3682 const char *name,
3683 uint64_t size,
3684 Error **errp)
3685 {
3686 DeviceState *owner_dev;
3687
3688 if (!memory_region_init_ram_nomigrate(mr, owner, name, size, errp)) {
3689 return false;
3690 }
3691 /* This will assert if owner is neither NULL nor a DeviceState.
3692 * We only want the owner here for the purposes of defining a
3693 * unique name for migration. TODO: Ideally we should implement
3694 * a naming scheme for Objects which are not DeviceStates, in
3695 * which case we can relax this restriction.
3696 */
3697 owner_dev = DEVICE(owner);
3698 vmstate_register_ram(mr, owner_dev);
3699
3700 return true;
3701 }
3702
memory_region_init_ram_guest_memfd(MemoryRegion * mr,Object * owner,const char * name,uint64_t size,Error ** errp)3703 bool memory_region_init_ram_guest_memfd(MemoryRegion *mr,
3704 Object *owner,
3705 const char *name,
3706 uint64_t size,
3707 Error **errp)
3708 {
3709 DeviceState *owner_dev;
3710
3711 if (!memory_region_init_ram_flags_nomigrate(mr, owner, name, size,
3712 RAM_GUEST_MEMFD, errp)) {
3713 return false;
3714 }
3715 /* This will assert if owner is neither NULL nor a DeviceState.
3716 * We only want the owner here for the purposes of defining a
3717 * unique name for migration. TODO: Ideally we should implement
3718 * a naming scheme for Objects which are not DeviceStates, in
3719 * which case we can relax this restriction.
3720 */
3721 owner_dev = DEVICE(owner);
3722 vmstate_register_ram(mr, owner_dev);
3723
3724 return true;
3725 }
3726
memory_region_init_rom(MemoryRegion * mr,Object * owner,const char * name,uint64_t size,Error ** errp)3727 bool memory_region_init_rom(MemoryRegion *mr,
3728 Object *owner,
3729 const char *name,
3730 uint64_t size,
3731 Error **errp)
3732 {
3733 DeviceState *owner_dev;
3734
3735 if (!memory_region_init_rom_nomigrate(mr, owner, name, size, errp)) {
3736 return false;
3737 }
3738 /* This will assert if owner is neither NULL nor a DeviceState.
3739 * We only want the owner here for the purposes of defining a
3740 * unique name for migration. TODO: Ideally we should implement
3741 * a naming scheme for Objects which are not DeviceStates, in
3742 * which case we can relax this restriction.
3743 */
3744 owner_dev = DEVICE(owner);
3745 vmstate_register_ram(mr, owner_dev);
3746
3747 return true;
3748 }
3749
memory_region_init_rom_device(MemoryRegion * mr,Object * owner,const MemoryRegionOps * ops,void * opaque,const char * name,uint64_t size,Error ** errp)3750 bool memory_region_init_rom_device(MemoryRegion *mr,
3751 Object *owner,
3752 const MemoryRegionOps *ops,
3753 void *opaque,
3754 const char *name,
3755 uint64_t size,
3756 Error **errp)
3757 {
3758 DeviceState *owner_dev;
3759
3760 if (!memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3761 name, size, errp)) {
3762 return false;
3763 }
3764 /* This will assert if owner is neither NULL nor a DeviceState.
3765 * We only want the owner here for the purposes of defining a
3766 * unique name for migration. TODO: Ideally we should implement
3767 * a naming scheme for Objects which are not DeviceStates, in
3768 * which case we can relax this restriction.
3769 */
3770 owner_dev = DEVICE(owner);
3771 vmstate_register_ram(mr, owner_dev);
3772
3773 return true;
3774 }
3775
3776 /*
3777 * Support system builds with CONFIG_FUZZ using a weak symbol and a stub for
3778 * the fuzz_dma_read_cb callback
3779 */
3780 #ifdef CONFIG_FUZZ
fuzz_dma_read_cb(size_t addr,size_t len,MemoryRegion * mr)3781 void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3782 size_t len,
3783 MemoryRegion *mr)
3784 {
3785 }
3786 #endif
3787
3788 static const TypeInfo memory_region_info = {
3789 .parent = TYPE_OBJECT,
3790 .name = TYPE_MEMORY_REGION,
3791 .class_size = sizeof(MemoryRegionClass),
3792 .instance_size = sizeof(MemoryRegion),
3793 .instance_init = memory_region_initfn,
3794 .instance_finalize = memory_region_finalize,
3795 };
3796
3797 static const TypeInfo iommu_memory_region_info = {
3798 .parent = TYPE_MEMORY_REGION,
3799 .name = TYPE_IOMMU_MEMORY_REGION,
3800 .class_size = sizeof(IOMMUMemoryRegionClass),
3801 .instance_size = sizeof(IOMMUMemoryRegion),
3802 .instance_init = iommu_memory_region_initfn,
3803 .abstract = true,
3804 };
3805
3806 static const TypeInfo ram_discard_manager_info = {
3807 .parent = TYPE_INTERFACE,
3808 .name = TYPE_RAM_DISCARD_MANAGER,
3809 .class_size = sizeof(RamDiscardManagerClass),
3810 };
3811
memory_register_types(void)3812 static void memory_register_types(void)
3813 {
3814 type_register_static(&memory_region_info);
3815 type_register_static(&iommu_memory_region_info);
3816 type_register_static(&ram_discard_manager_info);
3817 }
3818
3819 type_init(memory_register_types)
3820