1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Driver for Digigram miXart soundcards
4 *
5 * low level interface with interrupt handling and mail box implementation
6 *
7 * Copyright (c) 2003 by Digigram <alsa@digigram.com>
8 */
9
10 #include <linux/interrupt.h>
11 #include <linux/mutex.h>
12 #include <linux/pci.h>
13 #include <linux/io.h>
14
15 #include <sound/core.h>
16 #include "mixart.h"
17 #include "mixart_hwdep.h"
18 #include "mixart_core.h"
19
20
21 #define MSG_TIMEOUT_JIFFIES (400 * HZ) / 1000 /* 400 ms */
22
23 #define MSG_DESCRIPTOR_SIZE 0x24
24 #define MSG_HEADER_SIZE (MSG_DESCRIPTOR_SIZE + 4)
25
26 #define MSG_TYPE_MASK 0x00000003 /* mask for following types */
27 #define MSG_TYPE_NOTIFY 0 /* embedded -> driver (only notification, do not get_msg() !) */
28 #define MSG_TYPE_COMMAND 1 /* driver <-> embedded (a command has no answer) */
29 #define MSG_TYPE_REQUEST 2 /* driver -> embedded (request will get an answer back) */
30 #define MSG_TYPE_ANSWER 3 /* embedded -> driver */
31 #define MSG_CANCEL_NOTIFY_MASK 0x80000000 /* this bit is set for a notification that has been canceled */
32
33
retrieve_msg_frame(struct mixart_mgr * mgr,u32 * msg_frame)34 static int retrieve_msg_frame(struct mixart_mgr *mgr, u32 *msg_frame)
35 {
36 /* read the message frame fifo */
37 u32 headptr, tailptr;
38
39 tailptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL));
40 headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_POST_HEAD));
41
42 if (tailptr == headptr)
43 return 0; /* no message posted */
44
45 if (tailptr < MSG_OUTBOUND_POST_STACK)
46 return 0; /* error */
47 if (tailptr >= MSG_OUTBOUND_POST_STACK + MSG_BOUND_STACK_SIZE)
48 return 0; /* error */
49
50 *msg_frame = readl_be(MIXART_MEM(mgr, tailptr));
51
52 /* increment the tail index */
53 tailptr += 4;
54 if( tailptr >= (MSG_OUTBOUND_POST_STACK+MSG_BOUND_STACK_SIZE) )
55 tailptr = MSG_OUTBOUND_POST_STACK;
56 writel_be(tailptr, MIXART_MEM(mgr, MSG_OUTBOUND_POST_TAIL));
57
58 return 1;
59 }
60
get_msg(struct mixart_mgr * mgr,struct mixart_msg * resp,u32 msg_frame_address)61 static int get_msg(struct mixart_mgr *mgr, struct mixart_msg *resp,
62 u32 msg_frame_address )
63 {
64 u32 headptr;
65 u32 size;
66 int err;
67 #ifndef __BIG_ENDIAN
68 unsigned int i;
69 #endif
70
71 err = 0;
72
73 /* copy message descriptor from miXart to driver */
74 size = readl_be(MIXART_MEM(mgr, msg_frame_address)); /* size of descriptor + response */
75 resp->message_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 4)); /* dwMessageID */
76 resp->uid.object_id = readl_be(MIXART_MEM(mgr, msg_frame_address + 8)); /* uidDest */
77 resp->uid.desc = readl_be(MIXART_MEM(mgr, msg_frame_address + 12)); /* */
78
79 if( (size < MSG_DESCRIPTOR_SIZE) || (resp->size < (size - MSG_DESCRIPTOR_SIZE))) {
80 err = -EINVAL;
81 dev_err(&mgr->pci->dev,
82 "problem with response size = %d\n", size);
83 goto _clean_exit;
84 }
85 size -= MSG_DESCRIPTOR_SIZE;
86
87 memcpy_fromio(resp->data, MIXART_MEM(mgr, msg_frame_address + MSG_HEADER_SIZE ), size);
88 resp->size = size;
89
90 /* swap if necessary */
91 #ifndef __BIG_ENDIAN
92 size /= 4; /* u32 size */
93 for(i=0; i < size; i++) {
94 ((u32*)resp->data)[i] = be32_to_cpu(((__be32*)resp->data)[i]);
95 }
96 #endif
97
98 /*
99 * free message frame address
100 */
101 headptr = readl_be(MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD));
102
103 if( (headptr < MSG_OUTBOUND_FREE_STACK) || ( headptr >= (MSG_OUTBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE))) {
104 err = -EINVAL;
105 goto _clean_exit;
106 }
107
108 /* give address back to outbound fifo */
109 writel_be(msg_frame_address, MIXART_MEM(mgr, headptr));
110
111 /* increment the outbound free head */
112 headptr += 4;
113 if( headptr >= (MSG_OUTBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE) )
114 headptr = MSG_OUTBOUND_FREE_STACK;
115
116 writel_be(headptr, MIXART_MEM(mgr, MSG_OUTBOUND_FREE_HEAD));
117
118 _clean_exit:
119 return err;
120 }
121
122
123 /*
124 * send a message to miXart. return: the msg_frame used for this message
125 */
126 /* call with mgr->msg_lock held! */
send_msg(struct mixart_mgr * mgr,struct mixart_msg * msg,int max_answersize,int mark_pending,u32 * msg_event)127 static int send_msg( struct mixart_mgr *mgr,
128 struct mixart_msg *msg,
129 int max_answersize,
130 int mark_pending,
131 u32 *msg_event)
132 {
133 u32 headptr, tailptr;
134 u32 msg_frame_address;
135 int i;
136
137 if (snd_BUG_ON(msg->size % 4))
138 return -EINVAL;
139
140 /* get message frame address */
141 tailptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL));
142 headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_FREE_HEAD));
143
144 if (tailptr == headptr) {
145 dev_err(&mgr->pci->dev, "error: no message frame available\n");
146 return -EBUSY;
147 }
148
149 if( (tailptr < MSG_INBOUND_FREE_STACK) || (tailptr >= (MSG_INBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE))) {
150 return -EINVAL;
151 }
152
153 msg_frame_address = readl_be(MIXART_MEM(mgr, tailptr));
154 writel(0, MIXART_MEM(mgr, tailptr)); /* set address to zero on this fifo position */
155
156 /* increment the inbound free tail */
157 tailptr += 4;
158 if( tailptr >= (MSG_INBOUND_FREE_STACK+MSG_BOUND_STACK_SIZE) )
159 tailptr = MSG_INBOUND_FREE_STACK;
160
161 writel_be(tailptr, MIXART_MEM(mgr, MSG_INBOUND_FREE_TAIL));
162
163 /* TODO : use memcpy_toio() with intermediate buffer to copy the message */
164
165 /* copy message descriptor to card memory */
166 writel_be( msg->size + MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address) ); /* size of descriptor + request */
167 writel_be( msg->message_id , MIXART_MEM(mgr, msg_frame_address + 4) ); /* dwMessageID */
168 writel_be( msg->uid.object_id, MIXART_MEM(mgr, msg_frame_address + 8) ); /* uidDest */
169 writel_be( msg->uid.desc, MIXART_MEM(mgr, msg_frame_address + 12) ); /* */
170 writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 16) ); /* SizeHeader */
171 writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 20) ); /* OffsetDLL_T16 */
172 writel_be( msg->size, MIXART_MEM(mgr, msg_frame_address + 24) ); /* SizeDLL_T16 */
173 writel_be( MSG_DESCRIPTOR_SIZE, MIXART_MEM(mgr, msg_frame_address + 28) ); /* OffsetDLL_DRV */
174 writel_be( 0, MIXART_MEM(mgr, msg_frame_address + 32) ); /* SizeDLL_DRV */
175 writel_be( MSG_DESCRIPTOR_SIZE + max_answersize, MIXART_MEM(mgr, msg_frame_address + 36) ); /* dwExpectedAnswerSize */
176
177 /* copy message data to card memory */
178 for( i=0; i < msg->size; i+=4 ) {
179 writel_be( *(u32*)(msg->data + i), MIXART_MEM(mgr, MSG_HEADER_SIZE + msg_frame_address + i) );
180 }
181
182 if( mark_pending ) {
183 if( *msg_event ) {
184 /* the pending event is the notification we wait for ! */
185 mgr->pending_event = *msg_event;
186 }
187 else {
188 /* the pending event is the answer we wait for (same address than the request)! */
189 mgr->pending_event = msg_frame_address;
190
191 /* copy address back to caller */
192 *msg_event = msg_frame_address;
193 }
194 }
195
196 /* mark the frame as a request (will have an answer) */
197 msg_frame_address |= MSG_TYPE_REQUEST;
198
199 /* post the frame */
200 headptr = readl_be(MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD));
201
202 if( (headptr < MSG_INBOUND_POST_STACK) || (headptr >= (MSG_INBOUND_POST_STACK+MSG_BOUND_STACK_SIZE))) {
203 return -EINVAL;
204 }
205
206 writel_be(msg_frame_address, MIXART_MEM(mgr, headptr));
207
208 /* increment the inbound post head */
209 headptr += 4;
210 if( headptr >= (MSG_INBOUND_POST_STACK+MSG_BOUND_STACK_SIZE) )
211 headptr = MSG_INBOUND_POST_STACK;
212
213 writel_be(headptr, MIXART_MEM(mgr, MSG_INBOUND_POST_HEAD));
214
215 return 0;
216 }
217
218
snd_mixart_send_msg(struct mixart_mgr * mgr,struct mixart_msg * request,int max_resp_size,void * resp_data)219 int snd_mixart_send_msg(struct mixart_mgr *mgr, struct mixart_msg *request, int max_resp_size, void *resp_data)
220 {
221 struct mixart_msg resp;
222 u32 msg_frame = 0; /* set to 0, so it's no notification to wait for, but the answer */
223 int err;
224 wait_queue_entry_t wait;
225 long timeout;
226
227 init_waitqueue_entry(&wait, current);
228
229 scoped_guard(mutex, &mgr->msg_lock) {
230 /* send the message */
231 err = send_msg(mgr, request, max_resp_size, 1, &msg_frame); /* send and mark the answer pending */
232 if (err)
233 return err;
234
235 set_current_state(TASK_UNINTERRUPTIBLE);
236 add_wait_queue(&mgr->msg_sleep, &wait);
237 }
238
239 timeout = schedule_timeout(MSG_TIMEOUT_JIFFIES);
240 remove_wait_queue(&mgr->msg_sleep, &wait);
241
242 if (! timeout) {
243 /* error - no ack */
244 dev_err(&mgr->pci->dev,
245 "error: no response on msg %x\n", msg_frame);
246 return -EIO;
247 }
248
249 /* retrieve the answer into the same struct mixart_msg */
250 resp.message_id = 0;
251 resp.uid = (struct mixart_uid){0,0};
252 resp.data = resp_data;
253 resp.size = max_resp_size;
254
255 scoped_guard(mutex, &mgr->msg_lock) {
256 err = get_msg(mgr, &resp, msg_frame);
257 }
258
259 if( request->message_id != resp.message_id )
260 dev_err(&mgr->pci->dev, "RESPONSE ERROR!\n");
261
262 return err;
263 }
264
265
snd_mixart_send_msg_wait_notif(struct mixart_mgr * mgr,struct mixart_msg * request,u32 notif_event)266 int snd_mixart_send_msg_wait_notif(struct mixart_mgr *mgr,
267 struct mixart_msg *request, u32 notif_event)
268 {
269 int err;
270 wait_queue_entry_t wait;
271 long timeout;
272
273 if (snd_BUG_ON(!notif_event))
274 return -EINVAL;
275 if (snd_BUG_ON((notif_event & MSG_TYPE_MASK) != MSG_TYPE_NOTIFY))
276 return -EINVAL;
277 if (snd_BUG_ON(notif_event & MSG_CANCEL_NOTIFY_MASK))
278 return -EINVAL;
279
280 init_waitqueue_entry(&wait, current);
281
282 scoped_guard(mutex, &mgr->msg_lock) {
283 /* send the message */
284 err = send_msg(mgr, request, MSG_DEFAULT_SIZE, 1, ¬if_event); /* send and mark the notification event pending */
285 if (err)
286 return err;
287
288 set_current_state(TASK_UNINTERRUPTIBLE);
289 add_wait_queue(&mgr->msg_sleep, &wait);
290 }
291
292 timeout = schedule_timeout(MSG_TIMEOUT_JIFFIES);
293 remove_wait_queue(&mgr->msg_sleep, &wait);
294
295 if (! timeout) {
296 /* error - no ack */
297 dev_err(&mgr->pci->dev,
298 "error: notification %x not received\n", notif_event);
299 return -EIO;
300 }
301
302 return 0;
303 }
304
305
snd_mixart_send_msg_nonblock(struct mixart_mgr * mgr,struct mixart_msg * request)306 int snd_mixart_send_msg_nonblock(struct mixart_mgr *mgr, struct mixart_msg *request)
307 {
308 u32 message_frame;
309 int err;
310
311 /* just send the message (do not mark it as a pending one) */
312 guard(mutex)(&mgr->msg_lock);
313 err = send_msg(mgr, request, MSG_DEFAULT_SIZE, 0, &message_frame);
314
315 /* the answer will be handled by snd_struct mixart_msgasklet() */
316 atomic_inc(&mgr->msg_processed);
317
318 return err;
319 }
320
321
322 /* common buffer of interrupt to send/receive messages */
323 static u32 mixart_msg_data[MSG_DEFAULT_SIZE / 4];
324
325
snd_mixart_process_msg(struct mixart_mgr * mgr)326 static void snd_mixart_process_msg(struct mixart_mgr *mgr)
327 {
328 struct mixart_msg resp;
329 u32 msg, addr, type;
330 int err;
331
332 while (mgr->msg_fifo_readptr != mgr->msg_fifo_writeptr) {
333 msg = mgr->msg_fifo[mgr->msg_fifo_readptr];
334 mgr->msg_fifo_readptr++;
335 mgr->msg_fifo_readptr %= MSG_FIFO_SIZE;
336
337 /* process the message ... */
338 addr = msg & ~MSG_TYPE_MASK;
339 type = msg & MSG_TYPE_MASK;
340
341 switch (type) {
342 case MSG_TYPE_ANSWER:
343 /* answer to a message on that we did not wait for (send_msg_nonblock) */
344 resp.message_id = 0;
345 resp.data = mixart_msg_data;
346 resp.size = sizeof(mixart_msg_data);
347 err = get_msg(mgr, &resp, addr);
348 if( err < 0 ) {
349 dev_err(&mgr->pci->dev,
350 "error(%d) reading mf %x\n",
351 err, msg);
352 break;
353 }
354
355 switch(resp.message_id) {
356 case MSG_STREAM_START_INPUT_STAGE_PACKET:
357 case MSG_STREAM_START_OUTPUT_STAGE_PACKET:
358 case MSG_STREAM_STOP_INPUT_STAGE_PACKET:
359 case MSG_STREAM_STOP_OUTPUT_STAGE_PACKET:
360 if(mixart_msg_data[0])
361 dev_err(&mgr->pci->dev,
362 "error MSG_STREAM_ST***_***PUT_STAGE_PACKET status=%x\n",
363 mixart_msg_data[0]);
364 break;
365 default:
366 dev_dbg(&mgr->pci->dev,
367 "received mf(%x) : msg_id(%x) uid(%x, %x) size(%zd)\n",
368 msg, resp.message_id, resp.uid.object_id, resp.uid.desc, resp.size);
369 break;
370 }
371 break;
372 case MSG_TYPE_NOTIFY:
373 /* msg contains no address ! do not get_msg() ! */
374 case MSG_TYPE_COMMAND:
375 /* get_msg() necessary */
376 default:
377 dev_err(&mgr->pci->dev,
378 "doesn't know what to do with message %x\n",
379 msg);
380 } /* switch type */
381
382 /* decrement counter */
383 atomic_dec(&mgr->msg_processed);
384
385 } /* while there is a msg in fifo */
386 }
387
388
snd_mixart_interrupt(int irq,void * dev_id)389 irqreturn_t snd_mixart_interrupt(int irq, void *dev_id)
390 {
391 struct mixart_mgr *mgr = dev_id;
392 u32 it_reg;
393
394 it_reg = readl_le(MIXART_REG(mgr, MIXART_PCI_OMISR_OFFSET));
395 if( !(it_reg & MIXART_OIDI) ) {
396 /* this device did not cause the interrupt */
397 return IRQ_NONE;
398 }
399
400 /* mask all interrupts */
401 writel_le(MIXART_HOST_ALL_INTERRUPT_MASKED, MIXART_REG(mgr, MIXART_PCI_OMIMR_OFFSET));
402
403 /* outdoorbell register clear */
404 it_reg = readl(MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET));
405 writel(it_reg, MIXART_REG(mgr, MIXART_PCI_ODBR_OFFSET));
406
407 /* clear interrupt */
408 writel_le( MIXART_OIDI, MIXART_REG(mgr, MIXART_PCI_OMISR_OFFSET) );
409
410 return IRQ_WAKE_THREAD;
411 }
412
snd_mixart_threaded_irq(int irq,void * dev_id)413 irqreturn_t snd_mixart_threaded_irq(int irq, void *dev_id)
414 {
415 struct mixart_mgr *mgr = dev_id;
416 int err;
417 struct mixart_msg resp;
418 u32 msg;
419
420 guard(mutex)(&mgr->lock);
421 /* process interrupt */
422 while (retrieve_msg_frame(mgr, &msg)) {
423
424 switch (msg & MSG_TYPE_MASK) {
425 case MSG_TYPE_COMMAND:
426 resp.message_id = 0;
427 resp.data = mixart_msg_data;
428 resp.size = sizeof(mixart_msg_data);
429 err = get_msg(mgr, &resp, msg & ~MSG_TYPE_MASK);
430 if( err < 0 ) {
431 dev_err(&mgr->pci->dev,
432 "interrupt: error(%d) reading mf %x\n",
433 err, msg);
434 break;
435 }
436
437 if(resp.message_id == MSG_SERVICES_TIMER_NOTIFY) {
438 int i;
439 struct mixart_timer_notify *notify;
440 notify = (struct mixart_timer_notify *)mixart_msg_data;
441
442 BUILD_BUG_ON(sizeof(notify) > sizeof(mixart_msg_data));
443 if (snd_BUG_ON(notify->stream_count > ARRAY_SIZE(notify->streams)))
444 break;
445 for(i=0; i<notify->stream_count; i++) {
446
447 u32 buffer_id = notify->streams[i].buffer_id;
448 unsigned int chip_number = (buffer_id & MIXART_NOTIFY_CARD_MASK) >> MIXART_NOTIFY_CARD_OFFSET; /* card0 to 3 */
449 unsigned int pcm_number = (buffer_id & MIXART_NOTIFY_PCM_MASK ) >> MIXART_NOTIFY_PCM_OFFSET; /* pcm0 to 3 */
450 unsigned int sub_number = buffer_id & MIXART_NOTIFY_SUBS_MASK; /* 0 to MIXART_PLAYBACK_STREAMS */
451 unsigned int is_capture = ((buffer_id & MIXART_NOTIFY_CAPT_MASK) != 0); /* playback == 0 / capture == 1 */
452
453 struct snd_mixart *chip = mgr->chip[chip_number];
454 struct mixart_stream *stream;
455
456 if ((chip_number >= mgr->num_cards) || (pcm_number >= MIXART_PCM_TOTAL) || (sub_number >= MIXART_PLAYBACK_STREAMS)) {
457 dev_err(&mgr->pci->dev,
458 "error MSG_SERVICES_TIMER_NOTIFY buffer_id (%x) pos(%d)\n",
459 buffer_id, notify->streams[i].sample_pos_low_part);
460 break;
461 }
462
463 if (is_capture)
464 stream = &chip->capture_stream[pcm_number];
465 else
466 stream = &chip->playback_stream[pcm_number][sub_number];
467
468 if (stream->substream && (stream->status == MIXART_STREAM_STATUS_RUNNING)) {
469 struct snd_pcm_runtime *runtime = stream->substream->runtime;
470 int elapsed = 0;
471 u64 sample_count = ((u64)notify->streams[i].sample_pos_high_part) << 32;
472 sample_count |= notify->streams[i].sample_pos_low_part;
473
474 while (1) {
475 u64 new_elapse_pos = stream->abs_period_elapsed + runtime->period_size;
476
477 if (new_elapse_pos > sample_count) {
478 break; /* while */
479 }
480 else {
481 elapsed = 1;
482 stream->buf_periods++;
483 if (stream->buf_periods >= runtime->periods)
484 stream->buf_periods = 0;
485
486 stream->abs_period_elapsed = new_elapse_pos;
487 }
488 }
489 stream->buf_period_frag = (u32)( sample_count - stream->abs_period_elapsed );
490
491 if(elapsed) {
492 mutex_unlock(&mgr->lock);
493 snd_pcm_period_elapsed(stream->substream);
494 mutex_lock(&mgr->lock);
495 }
496 }
497 }
498 break;
499 }
500 if(resp.message_id == MSG_SERVICES_REPORT_TRACES) {
501 if(resp.size > 1) {
502 #ifndef __BIG_ENDIAN
503 /* Traces are text: the swapped msg_data has to be swapped back ! */
504 int i;
505 for(i=0; i<(resp.size/4); i++) {
506 ((__be32*)mixart_msg_data)[i] = cpu_to_be32((mixart_msg_data)[i]);
507 }
508 #endif
509 ((char*)mixart_msg_data)[resp.size - 1] = 0;
510 dev_dbg(&mgr->pci->dev,
511 "MIXART TRACE : %s\n",
512 (char *)mixart_msg_data);
513 }
514 break;
515 }
516
517 dev_dbg(&mgr->pci->dev, "command %x not handled\n",
518 resp.message_id);
519 break;
520
521 case MSG_TYPE_NOTIFY:
522 if(msg & MSG_CANCEL_NOTIFY_MASK) {
523 msg &= ~MSG_CANCEL_NOTIFY_MASK;
524 dev_err(&mgr->pci->dev,
525 "canceled notification %x !\n", msg);
526 }
527 fallthrough;
528 case MSG_TYPE_ANSWER:
529 /* answer or notification to a message we are waiting for*/
530 scoped_guard(mutex, &mgr->msg_lock) {
531 if ((msg & ~MSG_TYPE_MASK) == mgr->pending_event) {
532 wake_up(&mgr->msg_sleep);
533 mgr->pending_event = 0;
534 }
535 /* answer to a message we did't want to wait for */
536 else {
537 mgr->msg_fifo[mgr->msg_fifo_writeptr] = msg;
538 mgr->msg_fifo_writeptr++;
539 mgr->msg_fifo_writeptr %= MSG_FIFO_SIZE;
540 snd_mixart_process_msg(mgr);
541 }
542 }
543 break;
544 case MSG_TYPE_REQUEST:
545 default:
546 dev_dbg(&mgr->pci->dev,
547 "interrupt received request %x\n", msg);
548 /* TODO : are there things to do here ? */
549 break;
550 } /* switch on msg type */
551 } /* while there are msgs */
552
553 /* allow interrupt again */
554 writel_le( MIXART_ALLOW_OUTBOUND_DOORBELL, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
555
556 return IRQ_HANDLED;
557 }
558
559
snd_mixart_init_mailbox(struct mixart_mgr * mgr)560 void snd_mixart_init_mailbox(struct mixart_mgr *mgr)
561 {
562 writel( 0, MIXART_MEM( mgr, MSG_HOST_RSC_PROTECTION ) );
563 writel( 0, MIXART_MEM( mgr, MSG_AGENT_RSC_PROTECTION ) );
564
565 /* allow outbound messagebox to generate interrupts */
566 if(mgr->irq >= 0) {
567 writel_le( MIXART_ALLOW_OUTBOUND_DOORBELL, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
568 }
569 return;
570 }
571
snd_mixart_exit_mailbox(struct mixart_mgr * mgr)572 void snd_mixart_exit_mailbox(struct mixart_mgr *mgr)
573 {
574 /* no more interrupts on outbound messagebox */
575 writel_le( MIXART_HOST_ALL_INTERRUPT_MASKED, MIXART_REG( mgr, MIXART_PCI_OMIMR_OFFSET));
576 return;
577 }
578
snd_mixart_reset_board(struct mixart_mgr * mgr)579 void snd_mixart_reset_board(struct mixart_mgr *mgr)
580 {
581 /* reset miXart */
582 writel_be( 1, MIXART_REG(mgr, MIXART_BA1_BRUTAL_RESET_OFFSET) );
583 return;
584 }
585