1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
3 
4 #ifndef __SOUNDWIRE_H
5 #define __SOUNDWIRE_H
6 
7 #include <linux/bitfield.h>
8 #include <linux/bug.h>
9 #include <linux/completion.h>
10 #include <linux/device.h>
11 #include <linux/irq.h>
12 #include <linux/irqdomain.h>
13 #include <linux/lockdep_types.h>
14 #include <linux/mod_devicetable.h>
15 #include <linux/mutex.h>
16 #include <linux/types.h>
17 #include <sound/sdca.h>
18 
19 struct dentry;
20 struct fwnode_handle;
21 
22 struct sdw_bus;
23 struct sdw_slave;
24 
25 /* SDW spec defines and enums, as defined by MIPI 1.1. Spec */
26 
27 /* SDW Broadcast Device Number */
28 #define SDW_BROADCAST_DEV_NUM		15
29 
30 /* SDW Enumeration Device Number */
31 #define SDW_ENUM_DEV_NUM		0
32 
33 /* SDW Group Device Numbers */
34 #define SDW_GROUP12_DEV_NUM		12
35 #define SDW_GROUP13_DEV_NUM		13
36 
37 /* SDW Master Device Number, not supported yet */
38 #define SDW_MASTER_DEV_NUM		14
39 
40 #define SDW_NUM_DEV_ID_REGISTERS	6
41 /* frame shape defines */
42 
43 /*
44  * Note: The maximum row define in SoundWire spec 1.1 is 23. In order to
45  * fill hole with 0, one more dummy entry is added
46  */
47 #define SDW_FRAME_ROWS		24
48 #define SDW_FRAME_COLS		8
49 #define SDW_FRAME_ROW_COLS		(SDW_FRAME_ROWS * SDW_FRAME_COLS)
50 
51 #define SDW_FRAME_CTRL_BITS		48
52 #define SDW_MAX_DEVICES			11
53 
54 #define SDW_MAX_PORTS			15
55 #define SDW_VALID_PORT_RANGE(n)		((n) < SDW_MAX_PORTS && (n) >= 1)
56 
57 #define SDW_MAX_LANES		8
58 
59 enum {
60 	SDW_PORT_DIRN_SINK = 0,
61 	SDW_PORT_DIRN_SOURCE,
62 	SDW_PORT_DIRN_MAX,
63 };
64 
65 /*
66  * constants for flow control, ports and transport
67  *
68  * these are bit masks as devices can have multiple capabilities
69  */
70 
71 /*
72  * flow modes for SDW port. These can be isochronous, tx controlled,
73  * rx controlled or async
74  */
75 #define SDW_PORT_FLOW_MODE_ISOCH	0
76 #define SDW_PORT_FLOW_MODE_TX_CNTRL	BIT(0)
77 #define SDW_PORT_FLOW_MODE_RX_CNTRL	BIT(1)
78 #define SDW_PORT_FLOW_MODE_ASYNC	GENMASK(1, 0)
79 
80 /* sample packaging for block. It can be per port or per channel */
81 #define SDW_BLOCK_PACKG_PER_PORT	BIT(0)
82 #define SDW_BLOCK_PACKG_PER_CH		BIT(1)
83 
84 /**
85  * enum sdw_slave_status - Slave status
86  * @SDW_SLAVE_UNATTACHED: Slave is not attached with the bus.
87  * @SDW_SLAVE_ATTACHED: Slave is attached with bus.
88  * @SDW_SLAVE_ALERT: Some alert condition on the Slave
89  * @SDW_SLAVE_RESERVED: Reserved for future use
90  */
91 enum sdw_slave_status {
92 	SDW_SLAVE_UNATTACHED = 0,
93 	SDW_SLAVE_ATTACHED = 1,
94 	SDW_SLAVE_ALERT = 2,
95 	SDW_SLAVE_RESERVED = 3,
96 };
97 
98 /**
99  * enum sdw_clk_stop_type: clock stop operations
100  *
101  * @SDW_CLK_PRE_PREPARE: pre clock stop prepare
102  * @SDW_CLK_POST_PREPARE: post clock stop prepare
103  * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
104  * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
105  */
106 enum sdw_clk_stop_type {
107 	SDW_CLK_PRE_PREPARE = 0,
108 	SDW_CLK_POST_PREPARE,
109 	SDW_CLK_PRE_DEPREPARE,
110 	SDW_CLK_POST_DEPREPARE,
111 };
112 
113 /**
114  * enum sdw_command_response - Command response as defined by SDW spec
115  * @SDW_CMD_OK: cmd was successful
116  * @SDW_CMD_IGNORED: cmd was ignored
117  * @SDW_CMD_FAIL: cmd was NACKed
118  * @SDW_CMD_TIMEOUT: cmd timedout
119  * @SDW_CMD_FAIL_OTHER: cmd failed due to other reason than above
120  *
121  * NOTE: The enum is different than actual Spec as response in the Spec is
122  * combination of ACK/NAK bits
123  *
124  * SDW_CMD_TIMEOUT/FAIL_OTHER is defined for SW use, not in spec
125  */
126 enum sdw_command_response {
127 	SDW_CMD_OK = 0,
128 	SDW_CMD_IGNORED = 1,
129 	SDW_CMD_FAIL = 2,
130 	SDW_CMD_TIMEOUT = 3,
131 	SDW_CMD_FAIL_OTHER = 4,
132 };
133 
134 /* block group count enum */
135 enum sdw_dpn_grouping {
136 	SDW_BLK_GRP_CNT_1 = 0,
137 	SDW_BLK_GRP_CNT_2 = 1,
138 	SDW_BLK_GRP_CNT_3 = 2,
139 	SDW_BLK_GRP_CNT_4 = 3,
140 };
141 
142 /* block packing mode enum */
143 enum sdw_dpn_pkg_mode {
144 	SDW_BLK_PKG_PER_PORT = 0,
145 	SDW_BLK_PKG_PER_CHANNEL = 1
146 };
147 
148 /**
149  * enum sdw_stream_type: data stream type
150  *
151  * @SDW_STREAM_PCM: PCM data stream
152  * @SDW_STREAM_PDM: PDM data stream
153  * @SDW_STREAM_BPT: BPT data stream
154  *
155  * spec doesn't define this, but is used in implementation
156  */
157 enum sdw_stream_type {
158 	SDW_STREAM_PCM = 0,
159 	SDW_STREAM_PDM = 1,
160 	SDW_STREAM_BPT = 2,
161 };
162 
163 /**
164  * enum sdw_data_direction: Data direction
165  *
166  * @SDW_DATA_DIR_RX: Data into Port
167  * @SDW_DATA_DIR_TX: Data out of Port
168  */
169 enum sdw_data_direction {
170 	SDW_DATA_DIR_RX = 0,
171 	SDW_DATA_DIR_TX = 1,
172 };
173 
174 /**
175  * enum sdw_port_data_mode: Data Port mode
176  *
177  * @SDW_PORT_DATA_MODE_NORMAL: Normal data mode where audio data is received
178  * and transmitted.
179  * @SDW_PORT_DATA_MODE_PRBS: Test mode which uses a PRBS generator to produce
180  * a pseudo random data pattern that is transferred
181  * @SDW_PORT_DATA_MODE_STATIC_0: Simple test mode which uses static value of
182  * logic 0. The encoding will result in no signal transitions
183  * @SDW_PORT_DATA_MODE_STATIC_1: Simple test mode which uses static value of
184  * logic 1. The encoding will result in signal transitions at every bitslot
185  * owned by this Port
186  */
187 enum sdw_port_data_mode {
188 	SDW_PORT_DATA_MODE_NORMAL = 0,
189 	SDW_PORT_DATA_MODE_PRBS = 1,
190 	SDW_PORT_DATA_MODE_STATIC_0 = 2,
191 	SDW_PORT_DATA_MODE_STATIC_1 = 3,
192 };
193 
194 /*
195  * SDW properties, defined in MIPI DisCo spec v1.0
196  */
197 enum sdw_clk_stop_reset_behave {
198 	SDW_CLK_STOP_KEEP_STATUS = 1,
199 };
200 
201 /**
202  * enum sdw_p15_behave - Slave Port 15 behaviour when the Master attempts a
203  * read
204  * @SDW_P15_READ_IGNORED: Read is ignored
205  * @SDW_P15_CMD_OK: Command is ok
206  */
207 enum sdw_p15_behave {
208 	SDW_P15_READ_IGNORED = 0,
209 	SDW_P15_CMD_OK = 1,
210 };
211 
212 /**
213  * enum sdw_dpn_type - Data port types
214  * @SDW_DPN_FULL: Full Data Port is supported
215  * @SDW_DPN_SIMPLE: Simplified Data Port as defined in spec.
216  * DPN_SampleCtrl2, DPN_OffsetCtrl2, DPN_HCtrl and DPN_BlockCtrl3
217  * are not implemented.
218  * @SDW_DPN_REDUCED: Reduced Data Port as defined in spec.
219  * DPN_SampleCtrl2, DPN_HCtrl are not implemented.
220  */
221 enum sdw_dpn_type {
222 	SDW_DPN_FULL = 0,
223 	SDW_DPN_SIMPLE = 1,
224 	SDW_DPN_REDUCED = 2,
225 };
226 
227 /**
228  * enum sdw_clk_stop_mode - Clock Stop modes
229  * @SDW_CLK_STOP_MODE0: Slave can continue operation seamlessly on clock
230  * restart
231  * @SDW_CLK_STOP_MODE1: Slave may have entered a deeper power-saving mode,
232  * not capable of continuing operation seamlessly when the clock restarts
233  */
234 enum sdw_clk_stop_mode {
235 	SDW_CLK_STOP_MODE0 = 0,
236 	SDW_CLK_STOP_MODE1 = 1,
237 };
238 
239 /**
240  * struct sdw_dp0_prop - DP0 properties
241  * @words: wordlengths supported
242  * @max_word: Maximum number of bits in a Payload Channel Sample, 1 to 64
243  * (inclusive)
244  * @min_word: Minimum number of bits in a Payload Channel Sample, 1 to 64
245  * (inclusive)
246  * @num_words: number of wordlengths supported
247  * @ch_prep_timeout: Port-specific timeout value, in milliseconds
248  * @BRA_flow_controlled: Slave implementation results in an OK_NotReady
249  * response
250  * @simple_ch_prep_sm: If channel prepare sequence is required
251  * @imp_def_interrupts: If set, each bit corresponds to support for
252  * implementation-defined interrupts
253  * @num_lanes: array size of @lane_list
254  * @lane_list: indicates which Lanes can be used by DP0
255  *
256  * The wordlengths are specified by Spec as max, min AND number of
257  * discrete values, implementation can define based on the wordlengths they
258  * support
259  */
260 struct sdw_dp0_prop {
261 	u32 *words;
262 	u32 max_word;
263 	u32 min_word;
264 	u32 num_words;
265 	u32 ch_prep_timeout;
266 	bool BRA_flow_controlled;
267 	bool simple_ch_prep_sm;
268 	bool imp_def_interrupts;
269 	int num_lanes;
270 	u32 *lane_list;
271 };
272 
273 /**
274  * struct sdw_dpn_prop - Data Port DPn properties
275  * @num: port number
276  * @max_word: Maximum number of bits in a Payload Channel Sample, 1 to 64
277  * (inclusive)
278  * @min_word: Minimum number of bits in a Payload Channel Sample, 1 to 64
279  * (inclusive)
280  * @num_words: Number of discrete supported wordlengths
281  * @words: Discrete supported wordlength
282  * @type: Data port type. Full, Simplified or Reduced
283  * @max_grouping: Maximum number of samples that can be grouped together for
284  * a full data port
285  * @ch_prep_timeout: Port-specific timeout value, in milliseconds
286  * @imp_def_interrupts: If set, each bit corresponds to support for
287  * implementation-defined interrupts
288  * @max_ch: Maximum channels supported
289  * @min_ch: Minimum channels supported
290  * @num_channels: Number of discrete channels supported
291  * @num_ch_combinations: Number of channel combinations supported
292  * @channels: Discrete channels supported
293  * @ch_combinations: Channel combinations supported
294  * @lane_list: indicates which Lanes can be used by DPn
295  * @num_lanes: array size of @lane_list
296  * @modes: SDW mode supported
297  * @max_async_buffer: Number of samples that this port can buffer in
298  * asynchronous modes
299  * @port_encoding: Payload Channel Sample encoding schemes supported
300  * @block_pack_mode: Type of block port mode supported
301  * @read_only_wordlength: Read Only wordlength field in DPN_BlockCtrl1 register
302  * @simple_ch_prep_sm: If the port supports simplified channel prepare state
303  * machine
304  */
305 struct sdw_dpn_prop {
306 	u32 num;
307 	u32 max_word;
308 	u32 min_word;
309 	u32 num_words;
310 	u32 *words;
311 	enum sdw_dpn_type type;
312 	u32 max_grouping;
313 	u32 ch_prep_timeout;
314 	u32 imp_def_interrupts;
315 	u32 max_ch;
316 	u32 min_ch;
317 	u32 num_channels;
318 	u32 num_ch_combinations;
319 	u32 *channels;
320 	u32 *ch_combinations;
321 	u32 *lane_list;
322 	int num_lanes;
323 	u32 modes;
324 	u32 max_async_buffer;
325 	u32 port_encoding;
326 	bool block_pack_mode;
327 	bool read_only_wordlength;
328 	bool simple_ch_prep_sm;
329 };
330 
331 /**
332  * struct sdw_slave_prop - SoundWire Slave properties
333  * @dp0_prop: Data Port 0 properties
334  * @src_dpn_prop: Source Data Port N properties
335  * @sink_dpn_prop: Sink Data Port N properties
336  * @mipi_revision: Spec version of the implementation
337  * @wake_capable: Wake-up events are supported
338  * @test_mode_capable: If test mode is supported
339  * @clk_stop_mode1: Clock-Stop Mode 1 is supported
340  * @simple_clk_stop_capable: Simple clock mode is supported
341  * @clk_stop_timeout: Worst-case latency of the Clock Stop Prepare State
342  * Machine transitions, in milliseconds
343  * @ch_prep_timeout: Worst-case latency of the Channel Prepare State Machine
344  * transitions, in milliseconds
345  * @reset_behave: Slave keeps the status of the SlaveStopClockPrepare
346  * state machine (P=1 SCSP_SM) after exit from clock-stop mode1
347  * @high_PHY_capable: Slave is HighPHY capable
348  * @paging_support: Slave implements paging registers SCP_AddrPage1 and
349  * SCP_AddrPage2
350  * @bank_delay_support: Slave implements bank delay/bridge support registers
351  * SCP_BankDelay and SCP_NextFrame
352  * @lane_control_support: Slave supports lane control
353  * @p15_behave: Slave behavior when the Master attempts a read to the Port15
354  * alias
355  * @master_count: Number of Masters present on this Slave
356  * @source_ports: Bitmap identifying source ports
357  * @sink_ports: Bitmap identifying sink ports
358  * @quirks: bitmask identifying deltas from the MIPI specification
359  * @sdca_interrupt_register_list: indicates which sets of SDCA interrupt status
360  * and masks are supported
361  * @commit_register_supported: is PCP_Commit register supported
362  * @scp_int1_mask: SCP_INT1_MASK desired settings
363  * @lane_maps: Lane mapping for the slave, only valid if lane_control_support is set
364  * @clock_reg_supported: the Peripheral implements the clock base and scale
365  * registers introduced with the SoundWire 1.2 specification. SDCA devices
366  * do not need to set this boolean property as the registers are required.
367  * @use_domain_irq: call actual IRQ handler on slave, as well as callback
368  */
369 struct sdw_slave_prop {
370 	struct sdw_dp0_prop *dp0_prop;
371 	struct sdw_dpn_prop *src_dpn_prop;
372 	struct sdw_dpn_prop *sink_dpn_prop;
373 	u32 mipi_revision;
374 	bool wake_capable;
375 	bool test_mode_capable;
376 	bool clk_stop_mode1;
377 	bool simple_clk_stop_capable;
378 	u32 clk_stop_timeout;
379 	u32 ch_prep_timeout;
380 	enum sdw_clk_stop_reset_behave reset_behave;
381 	bool high_PHY_capable;
382 	bool paging_support;
383 	bool bank_delay_support;
384 	bool lane_control_support;
385 	enum sdw_p15_behave p15_behave;
386 	u32 master_count;
387 	u32 source_ports;
388 	u32 sink_ports;
389 	u32 quirks;
390 	u32 sdca_interrupt_register_list;
391 	u8 commit_register_supported;
392 	u8 scp_int1_mask;
393 	u8 lane_maps[SDW_MAX_LANES];
394 	bool clock_reg_supported;
395 	bool use_domain_irq;
396 };
397 
398 #define SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY	BIT(0)
399 
400 /**
401  * struct sdw_master_prop - Master properties
402  * @clk_gears: Clock gears supported
403  * @clk_freq: Clock frequencies supported, in Hz
404  * @quirks: bitmask identifying optional behavior beyond the scope of the MIPI specification
405  * @revision: MIPI spec version of the implementation
406  * @clk_stop_modes: Bitmap, bit N set when clock-stop-modeN supported
407  * @max_clk_freq: Maximum Bus clock frequency, in Hz
408  * @num_clk_gears: Number of clock gears supported
409  * @num_clk_freq: Number of clock frequencies supported, in Hz
410  * @default_frame_rate: Controller default Frame rate, in Hz
411  * @default_row: Number of rows
412  * @default_col: Number of columns
413  * @dynamic_frame: Dynamic frame shape supported
414  * @err_threshold: Number of times that software may retry sending a single
415  * command
416  * @mclk_freq: clock reference passed to SoundWire Master, in Hz.
417  * @hw_disabled: if true, the Master is not functional, typically due to pin-mux
418  */
419 struct sdw_master_prop {
420 	u32 *clk_gears;
421 	u32 *clk_freq;
422 	u64 quirks;
423 	u32 revision;
424 	u32 clk_stop_modes;
425 	u32 max_clk_freq;
426 	u32 num_clk_gears;
427 	u32 num_clk_freq;
428 	u32 default_frame_rate;
429 	u32 default_row;
430 	u32 default_col;
431 	u32 err_threshold;
432 	u32 mclk_freq;
433 	bool dynamic_frame;
434 	bool hw_disabled;
435 };
436 
437 /* Definitions for Master quirks */
438 
439 /*
440  * In a number of platforms bus clashes are reported after a hardware
441  * reset but without any explanations or evidence of a real problem.
442  * The following quirk will discard all initial bus clash interrupts
443  * but will leave the detection on should real bus clashes happen
444  */
445 #define SDW_MASTER_QUIRKS_CLEAR_INITIAL_CLASH	BIT(0)
446 
447 /*
448  * Some Slave devices have known issues with incorrect parity errors
449  * reported after a hardware reset. However during integration unexplained
450  * parity errors can be reported by Slave devices, possibly due to electrical
451  * issues at the Master level.
452  * The following quirk will discard all initial parity errors but will leave
453  * the detection on should real parity errors happen.
454  */
455 #define SDW_MASTER_QUIRKS_CLEAR_INITIAL_PARITY	BIT(1)
456 
457 int sdw_master_read_prop(struct sdw_bus *bus);
458 int sdw_slave_read_prop(struct sdw_slave *slave);
459 int sdw_slave_read_lane_mapping(struct sdw_slave *slave);
460 
461 /*
462  * SDW Slave Structures and APIs
463  */
464 
465 #define SDW_IGNORED_UNIQUE_ID 0xFF
466 
467 /**
468  * struct sdw_slave_id - Slave ID
469  * @mfg_id: MIPI Manufacturer ID
470  * @part_id: Device Part ID
471  * @class_id: MIPI Class ID (defined starting with SoundWire 1.2 spec)
472  * @unique_id: Device unique ID
473  * @sdw_version: SDW version implemented
474  *
475  * The order of the IDs here does not follow the DisCo spec definitions
476  */
477 struct sdw_slave_id {
478 	__u16 mfg_id;
479 	__u16 part_id;
480 	__u8 class_id;
481 	__u8 unique_id;
482 	__u8 sdw_version:4;
483 };
484 
485 struct sdw_peripherals {
486 	int num_peripherals;
487 	struct sdw_slave *array[];
488 };
489 
490 /*
491  * Helper macros to extract the MIPI-defined IDs
492  *
493  * Spec definition
494  *   Register		Bit	Contents
495  *   DevId_0 [7:4]	47:44	sdw_version
496  *   DevId_0 [3:0]	43:40	unique_id
497  *   DevId_1		39:32	mfg_id [15:8]
498  *   DevId_2		31:24	mfg_id [7:0]
499  *   DevId_3		23:16	part_id [15:8]
500  *   DevId_4		15:08	part_id [7:0]
501  *   DevId_5		07:00	class_id
502  *
503  * The MIPI DisCo for SoundWire defines in addition the link_id as bits 51:48
504  */
505 #define SDW_DISCO_LINK_ID_MASK	GENMASK_ULL(51, 48)
506 #define SDW_VERSION_MASK	GENMASK_ULL(47, 44)
507 #define SDW_UNIQUE_ID_MASK	GENMASK_ULL(43, 40)
508 #define SDW_MFG_ID_MASK		GENMASK_ULL(39, 24)
509 #define SDW_PART_ID_MASK	GENMASK_ULL(23, 8)
510 #define SDW_CLASS_ID_MASK	GENMASK_ULL(7, 0)
511 
512 #define SDW_DISCO_LINK_ID(addr)	FIELD_GET(SDW_DISCO_LINK_ID_MASK, addr)
513 #define SDW_VERSION(addr)	FIELD_GET(SDW_VERSION_MASK, addr)
514 #define SDW_UNIQUE_ID(addr)	FIELD_GET(SDW_UNIQUE_ID_MASK, addr)
515 #define SDW_MFG_ID(addr)	FIELD_GET(SDW_MFG_ID_MASK, addr)
516 #define SDW_PART_ID(addr)	FIELD_GET(SDW_PART_ID_MASK, addr)
517 #define SDW_CLASS_ID(addr)	FIELD_GET(SDW_CLASS_ID_MASK, addr)
518 
519 /**
520  * struct sdw_slave_intr_status - Slave interrupt status
521  * @sdca_cascade: set if the Slave device reports an SDCA interrupt
522  * @control_port: control port status
523  * @port: data port status
524  */
525 struct sdw_slave_intr_status {
526 	bool sdca_cascade;
527 	u8 control_port;
528 	u8 port[15];
529 };
530 
531 /**
532  * sdw_reg_bank - SoundWire register banks
533  * @SDW_BANK0: Soundwire register bank 0
534  * @SDW_BANK1: Soundwire register bank 1
535  */
536 enum sdw_reg_bank {
537 	SDW_BANK0,
538 	SDW_BANK1,
539 };
540 
541 /**
542  * struct sdw_prepare_ch: Prepare/De-prepare Data Port channel
543  *
544  * @num: Port number
545  * @ch_mask: Active channel mask
546  * @prepare: Prepare (true) /de-prepare (false) channel
547  * @bank: Register bank, which bank Slave/Master driver should program for
548  * implementation defined registers. This is always updated to next_bank
549  * value read from bus params.
550  *
551  */
552 struct sdw_prepare_ch {
553 	unsigned int num;
554 	unsigned int ch_mask;
555 	bool prepare;
556 	unsigned int bank;
557 };
558 
559 /**
560  * enum sdw_port_prep_ops: Prepare operations for Data Port
561  *
562  * @SDW_OPS_PORT_PRE_PREP: Pre prepare operation for the Port
563  * @SDW_OPS_PORT_PRE_DEPREP: Pre deprepare operation for the Port
564  * @SDW_OPS_PORT_POST_PREP: Post prepare operation for the Port
565  * @SDW_OPS_PORT_POST_DEPREP: Post deprepare operation for the Port
566  */
567 enum sdw_port_prep_ops {
568 	SDW_OPS_PORT_PRE_PREP = 0,
569 	SDW_OPS_PORT_PRE_DEPREP,
570 	SDW_OPS_PORT_POST_PREP,
571 	SDW_OPS_PORT_POST_DEPREP,
572 };
573 
574 /**
575  * struct sdw_bus_params: Structure holding bus configuration
576  *
577  * @curr_bank: Current bank in use (BANK0/BANK1)
578  * @next_bank: Next bank to use (BANK0/BANK1). next_bank will always be
579  * set to !curr_bank
580  * @max_dr_freq: Maximum double rate clock frequency supported, in Hz
581  * @curr_dr_freq: Current double rate clock frequency, in Hz
582  * @bandwidth: Current bandwidth
583  * @col: Active columns
584  * @row: Active rows
585  * @s_data_mode: NORMAL, STATIC or PRBS mode for all Slave ports
586  * @m_data_mode: NORMAL, STATIC or PRBS mode for all Master ports. The value
587  * should be the same to detect transmission issues, but can be different to
588  * test the interrupt reports
589  */
590 struct sdw_bus_params {
591 	enum sdw_reg_bank curr_bank;
592 	enum sdw_reg_bank next_bank;
593 	unsigned int max_dr_freq;
594 	unsigned int curr_dr_freq;
595 	unsigned int bandwidth;
596 	unsigned int col;
597 	unsigned int row;
598 	int s_data_mode;
599 	int m_data_mode;
600 };
601 
602 /**
603  * struct sdw_slave_ops: Slave driver callback ops
604  *
605  * @read_prop: Read Slave properties
606  * @interrupt_callback: Device interrupt notification (invoked in thread
607  * context)
608  * @update_status: Update Slave status
609  * @bus_config: Update the bus config for Slave
610  * @port_prep: Prepare the port with parameters
611  * @clk_stop: handle imp-def sequences before and after prepare and de-prepare
612  */
613 struct sdw_slave_ops {
614 	int (*read_prop)(struct sdw_slave *sdw);
615 	int (*interrupt_callback)(struct sdw_slave *slave,
616 				  struct sdw_slave_intr_status *status);
617 	int (*update_status)(struct sdw_slave *slave,
618 			     enum sdw_slave_status status);
619 	int (*bus_config)(struct sdw_slave *slave,
620 			  struct sdw_bus_params *params);
621 	int (*port_prep)(struct sdw_slave *slave,
622 			 struct sdw_prepare_ch *prepare_ch,
623 			 enum sdw_port_prep_ops pre_ops);
624 	int (*clk_stop)(struct sdw_slave *slave,
625 			enum sdw_clk_stop_mode mode,
626 			enum sdw_clk_stop_type type);
627 };
628 
629 /**
630  * struct sdw_slave - SoundWire Slave
631  * @id: MIPI device ID
632  * @dev: Linux device
633  * @irq: IRQ number
634  * @status: Status reported by the Slave
635  * @bus: Bus handle
636  * @prop: Slave properties
637  * @debugfs: Slave debugfs
638  * @node: node for bus list
639  * @port_ready: Port ready completion flag for each Slave port
640  * @m_port_map: static Master port map for each Slave port
641  * @dev_num: Current Device Number, values can be 0 or dev_num_sticky
642  * @dev_num_sticky: one-time static Device Number assigned by Bus
643  * @probed: boolean tracking driver state
644  * @enumeration_complete: completion utility to control potential races
645  * on startup between device enumeration and read/write access to the
646  * Slave device
647  * @initialization_complete: completion utility to control potential races
648  * on startup between device enumeration and settings being restored
649  * @unattach_request: mask field to keep track why the Slave re-attached and
650  * was re-initialized. This is useful to deal with potential race conditions
651  * between the Master suspending and the codec resuming, and make sure that
652  * when the Master triggered a reset the Slave is properly enumerated and
653  * initialized
654  * @first_interrupt_done: status flag tracking if the interrupt handling
655  * for a Slave happens for the first time after enumeration
656  * @is_mockup_device: status flag used to squelch errors in the command/control
657  * protocol for SoundWire mockup devices
658  * @sdw_dev_lock: mutex used to protect callbacks/remove races
659  * @sdca_data: structure containing all device data for SDCA helpers
660  */
661 struct sdw_slave {
662 	struct sdw_slave_id id;
663 	struct device dev;
664 	int irq;
665 	enum sdw_slave_status status;
666 	struct sdw_bus *bus;
667 	struct sdw_slave_prop prop;
668 #ifdef CONFIG_DEBUG_FS
669 	struct dentry *debugfs;
670 #endif
671 	struct list_head node;
672 	struct completion port_ready[SDW_MAX_PORTS];
673 	unsigned int m_port_map[SDW_MAX_PORTS];
674 	u16 dev_num;
675 	u16 dev_num_sticky;
676 	bool probed;
677 	struct completion enumeration_complete;
678 	struct completion initialization_complete;
679 	u32 unattach_request;
680 	bool first_interrupt_done;
681 	bool is_mockup_device;
682 	struct mutex sdw_dev_lock; /* protect callbacks/remove races */
683 	struct sdca_device_data sdca_data;
684 };
685 
686 #define dev_to_sdw_dev(_dev) container_of(_dev, struct sdw_slave, dev)
687 
688 /**
689  * struct sdw_master_device - SoundWire 'Master Device' representation
690  * @dev: Linux device for this Master
691  * @bus: Bus handle shortcut
692  */
693 struct sdw_master_device {
694 	struct device dev;
695 	struct sdw_bus *bus;
696 };
697 
698 #define dev_to_sdw_master_device(d)	\
699 	container_of(d, struct sdw_master_device, dev)
700 
701 struct sdw_driver {
702 	int (*probe)(struct sdw_slave *sdw, const struct sdw_device_id *id);
703 	int (*remove)(struct sdw_slave *sdw);
704 	void (*shutdown)(struct sdw_slave *sdw);
705 
706 	const struct sdw_device_id *id_table;
707 	const struct sdw_slave_ops *ops;
708 
709 	struct device_driver driver;
710 };
711 
712 #define SDW_SLAVE_ENTRY_EXT(_mfg_id, _part_id, _version, _c_id, _drv_data) \
713 	{ .mfg_id = (_mfg_id), .part_id = (_part_id),		\
714 	  .sdw_version = (_version), .class_id = (_c_id),	\
715 	  .driver_data = (unsigned long)(_drv_data) }
716 
717 #define SDW_SLAVE_ENTRY(_mfg_id, _part_id, _drv_data)	\
718 	SDW_SLAVE_ENTRY_EXT((_mfg_id), (_part_id), 0, 0, (_drv_data))
719 
720 int sdw_handle_slave_status(struct sdw_bus *bus,
721 			    enum sdw_slave_status status[]);
722 
723 /*
724  * SDW master structures and APIs
725  */
726 
727 /**
728  * struct sdw_port_params: Data Port parameters
729  *
730  * @num: Port number
731  * @bps: Word length of the Port
732  * @flow_mode: Port Data flow mode
733  * @data_mode: Test modes or normal mode
734  *
735  * This is used to program the Data Port based on Data Port stream
736  * parameters.
737  */
738 struct sdw_port_params {
739 	unsigned int num;
740 	unsigned int bps;
741 	unsigned int flow_mode;
742 	unsigned int data_mode;
743 };
744 
745 /**
746  * struct sdw_transport_params: Data Port Transport Parameters
747  *
748  * @blk_grp_ctrl_valid: Port implements block group control
749  * @num: Port number
750  * @blk_grp_ctrl: Block group control value
751  * @sample_interval: Sample interval
752  * @offset1: Blockoffset of the payload data
753  * @offset2: Blockoffset of the payload data
754  * @hstart: Horizontal start of the payload data
755  * @hstop: Horizontal stop of the payload data
756  * @blk_pkg_mode: Block per channel or block per port
757  * @lane_ctrl: Data lane Port uses for Data transfer. Currently only single
758  * data lane is supported in bus
759  *
760  * This is used to program the Data Port based on Data Port transport
761  * parameters. All these parameters are banked and can be modified
762  * during a bank switch without any artifacts in audio stream.
763  */
764 struct sdw_transport_params {
765 	bool blk_grp_ctrl_valid;
766 	unsigned int port_num;
767 	unsigned int blk_grp_ctrl;
768 	unsigned int sample_interval;
769 	unsigned int offset1;
770 	unsigned int offset2;
771 	unsigned int hstart;
772 	unsigned int hstop;
773 	unsigned int blk_pkg_mode;
774 	unsigned int lane_ctrl;
775 };
776 
777 /**
778  * struct sdw_enable_ch: Enable/disable Data Port channel
779  *
780  * @num: Port number
781  * @ch_mask: Active channel mask
782  * @enable: Enable (true) /disable (false) channel
783  */
784 struct sdw_enable_ch {
785 	unsigned int port_num;
786 	unsigned int ch_mask;
787 	bool enable;
788 };
789 
790 /**
791  * struct sdw_master_port_ops: Callback functions from bus to Master
792  * driver to set Master Data ports.
793  *
794  * @dpn_set_port_params: Set the Port parameters for the Master Port.
795  * Mandatory callback
796  * @dpn_set_port_transport_params: Set transport parameters for the Master
797  * Port. Mandatory callback
798  * @dpn_port_prep: Port prepare operations for the Master Data Port.
799  * @dpn_port_enable_ch: Enable the channels of Master Port.
800  */
801 struct sdw_master_port_ops {
802 	int (*dpn_set_port_params)(struct sdw_bus *bus,
803 				   struct sdw_port_params *port_params,
804 				   unsigned int bank);
805 	int (*dpn_set_port_transport_params)(struct sdw_bus *bus,
806 					     struct sdw_transport_params *transport_params,
807 					     enum sdw_reg_bank bank);
808 	int (*dpn_port_prep)(struct sdw_bus *bus, struct sdw_prepare_ch *prepare_ch);
809 	int (*dpn_port_enable_ch)(struct sdw_bus *bus,
810 				  struct sdw_enable_ch *enable_ch, unsigned int bank);
811 };
812 
813 struct sdw_msg;
814 
815 /**
816  * struct sdw_defer - SDW deferred message
817  * @complete: message completion
818  * @msg: SDW message
819  * @length: message length
820  */
821 struct sdw_defer {
822 	struct sdw_msg *msg;
823 	int length;
824 	struct completion complete;
825 };
826 
827 /*
828  * Add a practical limit to BPT transfer sizes. BPT is typically used
829  * to transfer firmware, and larger firmware transfers will increase
830  * the cold latency beyond typical OS or user requirements.
831  */
832 #define SDW_BPT_MSG_MAX_BYTES  (1024 * 1024)
833 
834 struct sdw_bpt_msg;
835 
836 /**
837  * struct sdw_master_ops - Master driver ops
838  * @read_prop: Read Master properties
839  * @override_adr: Override value read from firmware (quirk for buggy firmware)
840  * @xfer_msg: Transfer message callback
841  * @xfer_msg_defer: Defer version of transfer message callback. The message is handled with the
842  * bus struct @sdw_defer
843  * @set_bus_conf: Set the bus configuration
844  * @pre_bank_switch: Callback for pre bank switch
845  * @post_bank_switch: Callback for post bank switch
846  * @read_ping_status: Read status from PING frames, reported with two bits per Device.
847  * Bits 31:24 are reserved.
848  * @get_device_num: Callback for vendor-specific device_number allocation
849  * @put_device_num: Callback for vendor-specific device_number release
850  * @new_peripheral_assigned: Callback to handle enumeration of new peripheral.
851  * @bpt_send_async: reserve resources for BPT stream and send message
852  * using BTP protocol
853  * @bpt_wait: wait for message completion using BTP protocol
854  * and release resources
855  */
856 struct sdw_master_ops {
857 	int (*read_prop)(struct sdw_bus *bus);
858 	u64 (*override_adr)(struct sdw_bus *bus, u64 addr);
859 	enum sdw_command_response (*xfer_msg)(struct sdw_bus *bus, struct sdw_msg *msg);
860 	enum sdw_command_response (*xfer_msg_defer)(struct sdw_bus *bus);
861 	int (*set_bus_conf)(struct sdw_bus *bus,
862 			    struct sdw_bus_params *params);
863 	int (*pre_bank_switch)(struct sdw_bus *bus);
864 	int (*post_bank_switch)(struct sdw_bus *bus);
865 	u32 (*read_ping_status)(struct sdw_bus *bus);
866 	int (*get_device_num)(struct sdw_bus *bus, struct sdw_slave *slave);
867 	void (*put_device_num)(struct sdw_bus *bus, struct sdw_slave *slave);
868 	void (*new_peripheral_assigned)(struct sdw_bus *bus,
869 					struct sdw_slave *slave,
870 					int dev_num);
871 	int (*bpt_send_async)(struct sdw_bus *bus, struct sdw_slave *slave,
872 			      struct sdw_bpt_msg *msg);
873 	int (*bpt_wait)(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg);
874 };
875 
876 int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
877 		       struct fwnode_handle *fwnode);
878 void sdw_bus_master_delete(struct sdw_bus *bus);
879 
880 void sdw_show_ping_status(struct sdw_bus *bus, bool sync_delay);
881 
882 /**
883  * sdw_port_config: Master or Slave Port configuration
884  *
885  * @num: Port number
886  * @ch_mask: channels mask for port
887  */
888 struct sdw_port_config {
889 	unsigned int num;
890 	unsigned int ch_mask;
891 };
892 
893 /**
894  * sdw_stream_config: Master or Slave stream configuration
895  *
896  * @frame_rate: Audio frame rate of the stream, in Hz
897  * @ch_count: Channel count of the stream
898  * @bps: Number of bits per audio sample
899  * @direction: Data direction
900  * @type: Stream type PCM, PDM or BPT
901  */
902 struct sdw_stream_config {
903 	unsigned int frame_rate;
904 	unsigned int ch_count;
905 	unsigned int bps;
906 	enum sdw_data_direction direction;
907 	enum sdw_stream_type type;
908 };
909 
910 /**
911  * sdw_stream_state: Stream states
912  *
913  * @SDW_STREAM_ALLOCATED: New stream allocated.
914  * @SDW_STREAM_CONFIGURED: Stream configured
915  * @SDW_STREAM_PREPARED: Stream prepared
916  * @SDW_STREAM_ENABLED: Stream enabled
917  * @SDW_STREAM_DISABLED: Stream disabled
918  * @SDW_STREAM_DEPREPARED: Stream de-prepared
919  * @SDW_STREAM_RELEASED: Stream released
920  */
921 enum sdw_stream_state {
922 	SDW_STREAM_ALLOCATED = 0,
923 	SDW_STREAM_CONFIGURED = 1,
924 	SDW_STREAM_PREPARED = 2,
925 	SDW_STREAM_ENABLED = 3,
926 	SDW_STREAM_DISABLED = 4,
927 	SDW_STREAM_DEPREPARED = 5,
928 	SDW_STREAM_RELEASED = 6,
929 };
930 
931 /**
932  * sdw_stream_params: Stream parameters
933  *
934  * @rate: Sampling frequency, in Hz
935  * @ch_count: Number of channels
936  * @bps: bits per channel sample
937  */
938 struct sdw_stream_params {
939 	unsigned int rate;
940 	unsigned int ch_count;
941 	unsigned int bps;
942 };
943 
944 /**
945  * sdw_stream_runtime: Runtime stream parameters
946  *
947  * @name: SoundWire stream name
948  * @params: Stream parameters
949  * @state: Current state of the stream
950  * @type: Stream type PCM, PDM or BPT
951  * @m_rt_count: Count of Master runtime(s) in this stream
952  * @master_list: List of Master runtime(s) in this stream.
953  * master_list can contain only one m_rt per Master instance
954  * for a stream
955  */
956 struct sdw_stream_runtime {
957 	const char *name;
958 	struct sdw_stream_params params;
959 	enum sdw_stream_state state;
960 	enum sdw_stream_type type;
961 	int m_rt_count;
962 	struct list_head master_list;
963 };
964 
965 /**
966  * struct sdw_bus - SoundWire bus
967  * @dev: Shortcut to &bus->md->dev to avoid changing the entire code.
968  * @md: Master device
969  * @bus_lock_key: bus lock key associated to @bus_lock
970  * @bus_lock: bus lock
971  * @slaves: list of Slaves on this bus
972  * @msg_lock_key: message lock key associated to @msg_lock
973  * @msg_lock: message lock
974  * @m_rt_list: List of Master instance of all stream(s) running on Bus. This
975  * is used to compute and program bus bandwidth, clock, frame shape,
976  * transport and port parameters
977  * @defer_msg: Defer message
978  * @params: Current bus parameters
979  * @stream_refcount: number of streams currently using this bus
980  * @btp_stream_refcount: number of BTP streams currently using this bus (should
981  * be zero or one, multiple streams per link is not supported).
982  * @bpt_stream: pointer stored to handle BTP streams.
983  * @ops: Master callback ops
984  * @port_ops: Master port callback ops
985  * @prop: Master properties
986  * @vendor_specific_prop: pointer to non-standard properties
987  * @hw_sync_min_links: Number of links used by a stream above which
988  * hardware-based synchronization is required. This value is only
989  * meaningful if multi_link is set. If set to 1, hardware-based
990  * synchronization will be used even if a stream only uses a single
991  * SoundWire segment.
992  * @controller_id: system-unique controller ID. If set to -1, the bus @id will be used.
993  * @link_id: Link id number, can be 0 to N, unique for each Controller
994  * @id: bus system-wide unique id
995  * @compute_params: points to Bus resource management implementation
996  * @assigned: Bitmap for Slave device numbers.
997  * Bit set implies used number, bit clear implies unused number.
998  * @clk_stop_timeout: Clock stop timeout computed
999  * @bank_switch_timeout: Bank switch timeout computed
1000  * @domain: IRQ domain
1001  * @irq_chip: IRQ chip
1002  * @debugfs: Bus debugfs (optional)
1003  * @multi_link: Store bus property that indicates if multi links
1004  * are supported. This flag is populated by drivers after reading
1005  * appropriate firmware (ACPI/DT).
1006  * @lane_used_bandwidth: how much bandwidth in bits per second is used by each lane
1007  */
1008 struct sdw_bus {
1009 	struct device *dev;
1010 	struct sdw_master_device *md;
1011 	struct lock_class_key bus_lock_key;
1012 	struct mutex bus_lock;
1013 	struct list_head slaves;
1014 	struct lock_class_key msg_lock_key;
1015 	struct mutex msg_lock;
1016 	struct list_head m_rt_list;
1017 	struct sdw_defer defer_msg;
1018 	struct sdw_bus_params params;
1019 	int stream_refcount;
1020 	int bpt_stream_refcount;
1021 	struct sdw_stream_runtime *bpt_stream;
1022 	const struct sdw_master_ops *ops;
1023 	const struct sdw_master_port_ops *port_ops;
1024 	struct sdw_master_prop prop;
1025 	void *vendor_specific_prop;
1026 	int hw_sync_min_links;
1027 	int controller_id;
1028 	unsigned int link_id;
1029 	int id;
1030 	int (*compute_params)(struct sdw_bus *bus, struct sdw_stream_runtime *stream);
1031 	DECLARE_BITMAP(assigned, SDW_MAX_DEVICES);
1032 	unsigned int clk_stop_timeout;
1033 	u32 bank_switch_timeout;
1034 	struct irq_chip irq_chip;
1035 	struct irq_domain *domain;
1036 #ifdef CONFIG_DEBUG_FS
1037 	struct dentry *debugfs;
1038 #endif
1039 	bool multi_link;
1040 	unsigned int lane_used_bandwidth[SDW_MAX_LANES];
1041 };
1042 
1043 struct sdw_stream_runtime *sdw_alloc_stream(const char *stream_name, enum sdw_stream_type type);
1044 void sdw_release_stream(struct sdw_stream_runtime *stream);
1045 
1046 int sdw_compute_params(struct sdw_bus *bus, struct sdw_stream_runtime *stream);
1047 
1048 int sdw_stream_add_master(struct sdw_bus *bus,
1049 			  struct sdw_stream_config *stream_config,
1050 			  const struct sdw_port_config *port_config,
1051 			  unsigned int num_ports,
1052 			  struct sdw_stream_runtime *stream);
1053 int sdw_stream_remove_master(struct sdw_bus *bus,
1054 			     struct sdw_stream_runtime *stream);
1055 int sdw_startup_stream(void *sdw_substream);
1056 int sdw_prepare_stream(struct sdw_stream_runtime *stream);
1057 int sdw_enable_stream(struct sdw_stream_runtime *stream);
1058 int sdw_disable_stream(struct sdw_stream_runtime *stream);
1059 int sdw_deprepare_stream(struct sdw_stream_runtime *stream);
1060 void sdw_shutdown_stream(void *sdw_substream);
1061 int sdw_bus_prep_clk_stop(struct sdw_bus *bus);
1062 int sdw_bus_clk_stop(struct sdw_bus *bus);
1063 int sdw_bus_exit_clk_stop(struct sdw_bus *bus);
1064 
1065 int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id);
1066 void sdw_extract_slave_id(struct sdw_bus *bus, u64 addr, struct sdw_slave_id *id);
1067 bool is_clock_scaling_supported_by_slave(struct sdw_slave *slave);
1068 
1069 int sdw_bpt_send_async(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg);
1070 int sdw_bpt_wait(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg);
1071 int sdw_bpt_send_sync(struct sdw_bus *bus, struct sdw_slave *slave, struct sdw_bpt_msg *msg);
1072 
1073 #if IS_ENABLED(CONFIG_SOUNDWIRE)
1074 
1075 int sdw_stream_add_slave(struct sdw_slave *slave,
1076 			 struct sdw_stream_config *stream_config,
1077 			 const struct sdw_port_config *port_config,
1078 			 unsigned int num_ports,
1079 			 struct sdw_stream_runtime *stream);
1080 int sdw_stream_remove_slave(struct sdw_slave *slave,
1081 			    struct sdw_stream_runtime *stream);
1082 
1083 int sdw_slave_get_scale_index(struct sdw_slave *slave, u8 *base);
1084 
1085 /* messaging and data APIs */
1086 int sdw_read(struct sdw_slave *slave, u32 addr);
1087 int sdw_write(struct sdw_slave *slave, u32 addr, u8 value);
1088 int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value);
1089 int sdw_read_no_pm(struct sdw_slave *slave, u32 addr);
1090 int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val);
1091 int sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val);
1092 int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val);
1093 int sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val);
1094 int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val);
1095 int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val);
1096 
1097 #else
1098 
sdw_stream_add_slave(struct sdw_slave * slave,struct sdw_stream_config * stream_config,const struct sdw_port_config * port_config,unsigned int num_ports,struct sdw_stream_runtime * stream)1099 static inline int sdw_stream_add_slave(struct sdw_slave *slave,
1100 				       struct sdw_stream_config *stream_config,
1101 				       const struct sdw_port_config *port_config,
1102 				       unsigned int num_ports,
1103 				       struct sdw_stream_runtime *stream)
1104 {
1105 	WARN_ONCE(1, "SoundWire API is disabled");
1106 	return -EINVAL;
1107 }
1108 
sdw_stream_remove_slave(struct sdw_slave * slave,struct sdw_stream_runtime * stream)1109 static inline int sdw_stream_remove_slave(struct sdw_slave *slave,
1110 					  struct sdw_stream_runtime *stream)
1111 {
1112 	WARN_ONCE(1, "SoundWire API is disabled");
1113 	return -EINVAL;
1114 }
1115 
1116 /* messaging and data APIs */
sdw_read(struct sdw_slave * slave,u32 addr)1117 static inline int sdw_read(struct sdw_slave *slave, u32 addr)
1118 {
1119 	WARN_ONCE(1, "SoundWire API is disabled");
1120 	return -EINVAL;
1121 }
1122 
sdw_write(struct sdw_slave * slave,u32 addr,u8 value)1123 static inline int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
1124 {
1125 	WARN_ONCE(1, "SoundWire API is disabled");
1126 	return -EINVAL;
1127 }
1128 
sdw_write_no_pm(struct sdw_slave * slave,u32 addr,u8 value)1129 static inline int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value)
1130 {
1131 	WARN_ONCE(1, "SoundWire API is disabled");
1132 	return -EINVAL;
1133 }
1134 
sdw_read_no_pm(struct sdw_slave * slave,u32 addr)1135 static inline int sdw_read_no_pm(struct sdw_slave *slave, u32 addr)
1136 {
1137 	WARN_ONCE(1, "SoundWire API is disabled");
1138 	return -EINVAL;
1139 }
1140 
sdw_nread(struct sdw_slave * slave,u32 addr,size_t count,u8 * val)1141 static inline int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
1142 {
1143 	WARN_ONCE(1, "SoundWire API is disabled");
1144 	return -EINVAL;
1145 }
1146 
sdw_nread_no_pm(struct sdw_slave * slave,u32 addr,size_t count,u8 * val)1147 static inline int sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
1148 {
1149 	WARN_ONCE(1, "SoundWire API is disabled");
1150 	return -EINVAL;
1151 }
1152 
sdw_nwrite(struct sdw_slave * slave,u32 addr,size_t count,const u8 * val)1153 static inline int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val)
1154 {
1155 	WARN_ONCE(1, "SoundWire API is disabled");
1156 	return -EINVAL;
1157 }
1158 
sdw_nwrite_no_pm(struct sdw_slave * slave,u32 addr,size_t count,const u8 * val)1159 static inline int sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, const u8 *val)
1160 {
1161 	WARN_ONCE(1, "SoundWire API is disabled");
1162 	return -EINVAL;
1163 }
1164 
sdw_update(struct sdw_slave * slave,u32 addr,u8 mask,u8 val)1165 static inline int sdw_update(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
1166 {
1167 	WARN_ONCE(1, "SoundWire API is disabled");
1168 	return -EINVAL;
1169 }
1170 
sdw_update_no_pm(struct sdw_slave * slave,u32 addr,u8 mask,u8 val)1171 static inline int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
1172 {
1173 	WARN_ONCE(1, "SoundWire API is disabled");
1174 	return -EINVAL;
1175 }
1176 
1177 #endif /* CONFIG_SOUNDWIRE */
1178 
1179 #endif /* __SOUNDWIRE_H */
1180