1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * phylink models the MAC to optional PHY connection, supporting
4 * technologies such as SFP cages where the PHY is hot-pluggable.
5 *
6 * Copyright (C) 2015 Russell King
7 */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22
23 #include "phy-caps.h"
24 #include "sfp.h"
25 #include "swphy.h"
26
27 enum {
28 PHYLINK_DISABLE_STOPPED,
29 PHYLINK_DISABLE_LINK,
30 PHYLINK_DISABLE_MAC_WOL,
31
32 PCS_STATE_DOWN = 0,
33 PCS_STATE_STARTING,
34 PCS_STATE_STARTED,
35 };
36
37 /**
38 * struct phylink - internal data type for phylink
39 */
40 struct phylink {
41 /* private: */
42 struct net_device *netdev;
43 const struct phylink_mac_ops *mac_ops;
44 struct phylink_config *config;
45 struct phylink_pcs *pcs;
46 struct device *dev;
47 unsigned int old_link_state:1;
48
49 unsigned long phylink_disable_state; /* bitmask of disables */
50 struct phy_device *phydev;
51 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
52 u8 cfg_link_an_mode; /* MLO_AN_xxx */
53 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */
54 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */
55 u8 link_port; /* The current non-phy ethtool port */
56 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi);
58
59 /* The link configuration settings */
60 struct phylink_link_state link_config;
61
62 /* The current settings */
63 phy_interface_t cur_interface;
64
65 struct gpio_desc *link_gpio;
66 unsigned int link_irq;
67 struct timer_list link_poll;
68
69 struct mutex state_mutex;
70 struct phylink_link_state phy_state;
71 unsigned int phy_ib_mode;
72 struct work_struct resolve;
73 unsigned int pcs_neg_mode;
74 unsigned int pcs_state;
75
76 bool link_failed;
77 bool suspend_link_up;
78 bool major_config_failed;
79 bool mac_supports_eee_ops;
80 bool mac_supports_eee;
81 bool phy_enable_tx_lpi;
82 bool mac_enable_tx_lpi;
83 bool mac_tx_clk_stop;
84 u32 mac_tx_lpi_timer;
85 u8 mac_rx_clk_stop_blocked;
86
87 struct sfp_bus *sfp_bus;
88 bool sfp_may_have_phy;
89 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
90 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
91 u8 sfp_port;
92
93 struct eee_config eee_cfg;
94 };
95
96 #define phylink_printk(level, pl, fmt, ...) \
97 do { \
98 if ((pl)->config->type == PHYLINK_NETDEV) \
99 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
100 else if ((pl)->config->type == PHYLINK_DEV) \
101 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
102 } while (0)
103
104 #define phylink_err(pl, fmt, ...) \
105 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
106 #define phylink_warn(pl, fmt, ...) \
107 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
108 #define phylink_info(pl, fmt, ...) \
109 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
110 #if defined(CONFIG_DYNAMIC_DEBUG)
111 #define phylink_dbg(pl, fmt, ...) \
112 do { \
113 if ((pl)->config->type == PHYLINK_NETDEV) \
114 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
115 else if ((pl)->config->type == PHYLINK_DEV) \
116 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
117 } while (0)
118 #elif defined(DEBUG)
119 #define phylink_dbg(pl, fmt, ...) \
120 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
121 #else
122 #define phylink_dbg(pl, fmt, ...) \
123 ({ \
124 if (0) \
125 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
126 })
127 #endif
128
129 static const phy_interface_t phylink_sfp_interface_preference[] = {
130 PHY_INTERFACE_MODE_100GBASEP,
131 PHY_INTERFACE_MODE_50GBASER,
132 PHY_INTERFACE_MODE_LAUI,
133 PHY_INTERFACE_MODE_25GBASER,
134 PHY_INTERFACE_MODE_USXGMII,
135 PHY_INTERFACE_MODE_10GBASER,
136 PHY_INTERFACE_MODE_5GBASER,
137 PHY_INTERFACE_MODE_2500BASEX,
138 PHY_INTERFACE_MODE_SGMII,
139 PHY_INTERFACE_MODE_1000BASEX,
140 PHY_INTERFACE_MODE_100BASEX,
141 };
142
143 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
144
145 /**
146 * phylink_set_port_modes() - set the port type modes in the ethtool mask
147 * @mask: ethtool link mode mask
148 *
149 * Sets all the port type modes in the ethtool mask. MAC drivers should
150 * use this in their 'validate' callback.
151 */
phylink_set_port_modes(unsigned long * mask)152 void phylink_set_port_modes(unsigned long *mask)
153 {
154 phylink_set(mask, TP);
155 phylink_set(mask, AUI);
156 phylink_set(mask, MII);
157 phylink_set(mask, FIBRE);
158 phylink_set(mask, BNC);
159 phylink_set(mask, Backplane);
160 }
161 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
162
phylink_is_empty_linkmode(const unsigned long * linkmode)163 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
164 {
165 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
166
167 phylink_set_port_modes(tmp);
168 phylink_set(tmp, Autoneg);
169 phylink_set(tmp, Pause);
170 phylink_set(tmp, Asym_Pause);
171
172 return linkmode_subset(linkmode, tmp);
173 }
174
phylink_an_mode_str(unsigned int mode)175 static const char *phylink_an_mode_str(unsigned int mode)
176 {
177 static const char *modestr[] = {
178 [MLO_AN_PHY] = "phy",
179 [MLO_AN_FIXED] = "fixed",
180 [MLO_AN_INBAND] = "inband",
181 };
182
183 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
184 }
185
phylink_pcs_mode_str(unsigned int mode)186 static const char *phylink_pcs_mode_str(unsigned int mode)
187 {
188 if (!mode)
189 return "none";
190
191 if (mode & PHYLINK_PCS_NEG_OUTBAND)
192 return "outband";
193
194 if (mode & PHYLINK_PCS_NEG_INBAND) {
195 if (mode & PHYLINK_PCS_NEG_ENABLED)
196 return "inband,an-enabled";
197 else
198 return "inband,an-disabled";
199 }
200
201 return "unknown";
202 }
203
phylink_interface_signal_rate(phy_interface_t interface)204 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
205 {
206 switch (interface) {
207 case PHY_INTERFACE_MODE_SGMII:
208 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
209 return 1250;
210 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
211 return 3125;
212 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
213 return 5156;
214 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
215 return 10313;
216 default:
217 return 0;
218 }
219 }
220
221 /**
222 * phylink_interface_max_speed() - get the maximum speed of a phy interface
223 * @interface: phy interface mode defined by &typedef phy_interface_t
224 *
225 * Determine the maximum speed of a phy interface. This is intended to help
226 * determine the correct speed to pass to the MAC when the phy is performing
227 * rate matching.
228 *
229 * Return: The maximum speed of @interface
230 */
phylink_interface_max_speed(phy_interface_t interface)231 static int phylink_interface_max_speed(phy_interface_t interface)
232 {
233 switch (interface) {
234 case PHY_INTERFACE_MODE_100BASEX:
235 case PHY_INTERFACE_MODE_REVRMII:
236 case PHY_INTERFACE_MODE_RMII:
237 case PHY_INTERFACE_MODE_SMII:
238 case PHY_INTERFACE_MODE_REVMII:
239 case PHY_INTERFACE_MODE_MII:
240 case PHY_INTERFACE_MODE_MIILITE:
241 return SPEED_100;
242
243 case PHY_INTERFACE_MODE_TBI:
244 case PHY_INTERFACE_MODE_MOCA:
245 case PHY_INTERFACE_MODE_RTBI:
246 case PHY_INTERFACE_MODE_1000BASEX:
247 case PHY_INTERFACE_MODE_1000BASEKX:
248 case PHY_INTERFACE_MODE_TRGMII:
249 case PHY_INTERFACE_MODE_RGMII_TXID:
250 case PHY_INTERFACE_MODE_RGMII_RXID:
251 case PHY_INTERFACE_MODE_RGMII_ID:
252 case PHY_INTERFACE_MODE_RGMII:
253 case PHY_INTERFACE_MODE_PSGMII:
254 case PHY_INTERFACE_MODE_QSGMII:
255 case PHY_INTERFACE_MODE_QUSGMII:
256 case PHY_INTERFACE_MODE_SGMII:
257 case PHY_INTERFACE_MODE_GMII:
258 return SPEED_1000;
259
260 case PHY_INTERFACE_MODE_2500BASEX:
261 case PHY_INTERFACE_MODE_10G_QXGMII:
262 return SPEED_2500;
263
264 case PHY_INTERFACE_MODE_5GBASER:
265 return SPEED_5000;
266
267 case PHY_INTERFACE_MODE_XGMII:
268 case PHY_INTERFACE_MODE_RXAUI:
269 case PHY_INTERFACE_MODE_XAUI:
270 case PHY_INTERFACE_MODE_10GBASER:
271 case PHY_INTERFACE_MODE_10GKR:
272 case PHY_INTERFACE_MODE_USXGMII:
273 return SPEED_10000;
274
275 case PHY_INTERFACE_MODE_25GBASER:
276 return SPEED_25000;
277
278 case PHY_INTERFACE_MODE_XLGMII:
279 return SPEED_40000;
280
281 case PHY_INTERFACE_MODE_50GBASER:
282 case PHY_INTERFACE_MODE_LAUI:
283 return SPEED_50000;
284
285 case PHY_INTERFACE_MODE_100GBASEP:
286 return SPEED_100000;
287
288 case PHY_INTERFACE_MODE_INTERNAL:
289 case PHY_INTERFACE_MODE_NA:
290 case PHY_INTERFACE_MODE_MAX:
291 /* No idea! Garbage in, unknown out */
292 return SPEED_UNKNOWN;
293 }
294
295 /* If we get here, someone forgot to add an interface mode above */
296 WARN_ON_ONCE(1);
297 return SPEED_UNKNOWN;
298 }
299
300 static struct {
301 unsigned long mask;
302 int speed;
303 unsigned int duplex;
304 unsigned int caps_bit;
305 } phylink_caps_params[] = {
306 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) },
307 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) },
308 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) },
309 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) },
310 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) },
311 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) },
312 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) },
313 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) },
314 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) },
315 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) },
316 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) },
317 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) },
318 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) },
319 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) },
320 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) },
321 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) },
322 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) },
323 };
324
325 /**
326 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps
327 * @caps: A set of MAC capabilities
328 *
329 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h
330 */
phylink_caps_to_link_caps(unsigned long caps)331 static unsigned long phylink_caps_to_link_caps(unsigned long caps)
332 {
333 unsigned long link_caps = 0;
334 int i;
335
336 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++)
337 if (caps & phylink_caps_params[i].mask)
338 link_caps |= phylink_caps_params[i].caps_bit;
339
340 return link_caps;
341 }
342
phylink_link_caps_to_mac_caps(unsigned long link_caps)343 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps)
344 {
345 unsigned long caps = 0;
346 int i;
347
348 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++)
349 if (link_caps & phylink_caps_params[i].caps_bit)
350 caps |= phylink_caps_params[i].mask;
351
352 return caps;
353 }
354
355 /**
356 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
357 * @linkmodes: ethtool linkmode mask (must be already initialised)
358 * @caps: bitmask of MAC capabilities
359 *
360 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
361 * supported by the @caps. @linkmodes must have been initialised previously.
362 */
phylink_caps_to_linkmodes(unsigned long * linkmodes,unsigned long caps)363 static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
364 unsigned long caps)
365 {
366 unsigned long link_caps = phylink_caps_to_link_caps(caps);
367
368 if (caps & MAC_SYM_PAUSE)
369 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
370
371 if (caps & MAC_ASYM_PAUSE)
372 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
373
374 phy_caps_linkmodes(link_caps, linkmodes);
375 }
376
377 /**
378 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
379 * @config: pointer to a &struct phylink_config
380 * @max_speed: maximum speed
381 *
382 * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
383 * Any further motifications of config.mac_capabilities will override this.
384 */
phylink_limit_mac_speed(struct phylink_config * config,u32 max_speed)385 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
386 {
387 int i;
388
389 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
390 phylink_caps_params[i].speed > max_speed; i++)
391 config->mac_capabilities &= ~phylink_caps_params[i].mask;
392 }
393 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
394
395 /**
396 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
397 * @speed: the speed to search for
398 * @duplex: the duplex to search for
399 *
400 * Find the mac capability for a given speed and duplex.
401 *
402 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
403 * there were no matches.
404 */
phylink_cap_from_speed_duplex(int speed,unsigned int duplex)405 static unsigned long phylink_cap_from_speed_duplex(int speed,
406 unsigned int duplex)
407 {
408 int i;
409
410 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
411 if (speed == phylink_caps_params[i].speed &&
412 duplex == phylink_caps_params[i].duplex)
413 return phylink_caps_params[i].mask;
414 }
415
416 return 0;
417 }
418
419 /**
420 * phylink_get_capabilities() - get capabilities for a given MAC
421 * @interface: phy interface mode defined by &typedef phy_interface_t
422 * @mac_capabilities: bitmask of MAC capabilities
423 * @rate_matching: type of rate matching being performed
424 *
425 * Get the MAC capabilities that are supported by the @interface mode and
426 * @mac_capabilities.
427 */
phylink_get_capabilities(phy_interface_t interface,unsigned long mac_capabilities,int rate_matching)428 static unsigned long phylink_get_capabilities(phy_interface_t interface,
429 unsigned long mac_capabilities,
430 int rate_matching)
431 {
432 unsigned long link_caps = phy_caps_from_interface(interface);
433 int max_speed = phylink_interface_max_speed(interface);
434 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
435 unsigned long matched_caps = 0;
436
437 caps |= phylink_link_caps_to_mac_caps(link_caps);
438
439 switch (rate_matching) {
440 case RATE_MATCH_OPEN_LOOP:
441 /* TODO */
442 fallthrough;
443 case RATE_MATCH_NONE:
444 matched_caps = 0;
445 break;
446 case RATE_MATCH_PAUSE: {
447 /* The MAC must support asymmetric pause towards the local
448 * device for this. We could allow just symmetric pause, but
449 * then we might have to renegotiate if the link partner
450 * doesn't support pause. This is because there's no way to
451 * accept pause frames without transmitting them if we only
452 * support symmetric pause.
453 */
454 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
455 !(mac_capabilities & MAC_ASYM_PAUSE))
456 break;
457
458 /* We can't adapt if the MAC doesn't support the interface's
459 * max speed at full duplex.
460 */
461 if (mac_capabilities &
462 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL))
463 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
464 break;
465 }
466 case RATE_MATCH_CRS:
467 /* The MAC must support half duplex at the interface's max
468 * speed.
469 */
470 if (mac_capabilities &
471 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
472 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
473 matched_caps &= mac_capabilities;
474 }
475 break;
476 }
477
478 return (caps & mac_capabilities) | matched_caps;
479 }
480
481 /**
482 * phylink_validate_mask_caps() - Restrict link modes based on caps
483 * @supported: ethtool bitmask for supported link modes.
484 * @state: pointer to a &struct phylink_link_state.
485 * @mac_capabilities: bitmask of MAC capabilities
486 *
487 * Calculate the supported link modes based on @mac_capabilities, and restrict
488 * @supported and @state based on that. Use this function if your capabiliies
489 * aren't constant, such as if they vary depending on the interface.
490 */
phylink_validate_mask_caps(unsigned long * supported,struct phylink_link_state * state,unsigned long mac_capabilities)491 static void phylink_validate_mask_caps(unsigned long *supported,
492 struct phylink_link_state *state,
493 unsigned long mac_capabilities)
494 {
495 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
496 unsigned long caps;
497
498 phylink_set_port_modes(mask);
499 phylink_set(mask, Autoneg);
500 caps = phylink_get_capabilities(state->interface, mac_capabilities,
501 state->rate_matching);
502 phylink_caps_to_linkmodes(mask, caps);
503
504 linkmode_and(supported, supported, mask);
505 linkmode_and(state->advertising, state->advertising, mask);
506 }
507
phylink_validate_mac_and_pcs(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)508 static int phylink_validate_mac_and_pcs(struct phylink *pl,
509 unsigned long *supported,
510 struct phylink_link_state *state)
511 {
512 struct phylink_pcs *pcs = NULL;
513 unsigned long capabilities;
514 int ret;
515
516 /* Get the PCS for this interface mode */
517 if (pl->mac_ops->mac_select_pcs) {
518 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
519 if (IS_ERR(pcs))
520 return PTR_ERR(pcs);
521 }
522
523 if (pcs) {
524 /* The PCS, if present, must be setup before phylink_create()
525 * has been called. If the ops is not initialised, print an
526 * error and backtrace rather than oopsing the kernel.
527 */
528 if (!pcs->ops) {
529 phylink_err(pl, "interface %s: uninitialised PCS\n",
530 phy_modes(state->interface));
531 dump_stack();
532 return -EINVAL;
533 }
534
535 /* Ensure that this PCS supports the interface which the MAC
536 * returned it for. It is an error for the MAC to return a PCS
537 * that does not support the interface mode.
538 */
539 if (!phy_interface_empty(pcs->supported_interfaces) &&
540 !test_bit(state->interface, pcs->supported_interfaces)) {
541 phylink_err(pl, "MAC returned PCS which does not support %s\n",
542 phy_modes(state->interface));
543 return -EINVAL;
544 }
545
546 /* Validate the link parameters with the PCS */
547 if (pcs->ops->pcs_validate) {
548 ret = pcs->ops->pcs_validate(pcs, supported, state);
549 if (ret < 0 || phylink_is_empty_linkmode(supported))
550 return -EINVAL;
551
552 /* Ensure the advertising mask is a subset of the
553 * supported mask.
554 */
555 linkmode_and(state->advertising, state->advertising,
556 supported);
557 }
558 }
559
560 /* Then validate the link parameters with the MAC */
561 if (pl->mac_ops->mac_get_caps)
562 capabilities = pl->mac_ops->mac_get_caps(pl->config,
563 state->interface);
564 else
565 capabilities = pl->config->mac_capabilities;
566
567 phylink_validate_mask_caps(supported, state, capabilities);
568
569 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
570 }
571
phylink_validate_one(struct phylink * pl,struct phy_device * phy,const unsigned long * supported,const struct phylink_link_state * state,phy_interface_t interface,unsigned long * accum_supported,unsigned long * accum_advertising)572 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
573 const unsigned long *supported,
574 const struct phylink_link_state *state,
575 phy_interface_t interface,
576 unsigned long *accum_supported,
577 unsigned long *accum_advertising)
578 {
579 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
580 struct phylink_link_state tmp_state;
581
582 linkmode_copy(tmp_supported, supported);
583
584 tmp_state = *state;
585 tmp_state.interface = interface;
586
587 if (phy)
588 tmp_state.rate_matching = phy_get_rate_matching(phy, interface);
589
590 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
591 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
592 interface, phy_modes(interface),
593 phy_rate_matching_to_str(tmp_state.rate_matching),
594 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
595
596 linkmode_or(accum_supported, accum_supported, tmp_supported);
597 linkmode_or(accum_advertising, accum_advertising,
598 tmp_state.advertising);
599 }
600 }
601
phylink_validate_mask(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state,const unsigned long * interfaces)602 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy,
603 unsigned long *supported,
604 struct phylink_link_state *state,
605 const unsigned long *interfaces)
606 {
607 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
608 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
609 int interface;
610
611 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
612 phylink_validate_one(pl, phy, supported, state, interface,
613 all_s, all_adv);
614
615 linkmode_copy(supported, all_s);
616 linkmode_copy(state->advertising, all_adv);
617
618 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
619 }
620
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)621 static int phylink_validate(struct phylink *pl, unsigned long *supported,
622 struct phylink_link_state *state)
623 {
624 const unsigned long *interfaces = pl->config->supported_interfaces;
625
626 if (state->interface == PHY_INTERFACE_MODE_NA)
627 return phylink_validate_mask(pl, NULL, supported, state,
628 interfaces);
629
630 if (!test_bit(state->interface, interfaces))
631 return -EINVAL;
632
633 return phylink_validate_mac_and_pcs(pl, supported, state);
634 }
635
phylink_fill_fixedlink_supported(unsigned long * supported)636 static void phylink_fill_fixedlink_supported(unsigned long *supported)
637 {
638 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported);
639 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported);
640 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported);
641 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported);
642 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported);
643 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported);
644 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported);
645 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported);
646 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported);
647 }
648
phylink_parse_fixedlink(struct phylink * pl,const struct fwnode_handle * fwnode)649 static int phylink_parse_fixedlink(struct phylink *pl,
650 const struct fwnode_handle *fwnode)
651 {
652 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, };
653 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
654 const struct link_capabilities *c;
655 struct fwnode_handle *fixed_node;
656 struct gpio_desc *desc;
657 u32 speed;
658 int ret;
659
660 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
661 if (fixed_node) {
662 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
663
664 pl->link_config.speed = speed;
665 pl->link_config.duplex = DUPLEX_HALF;
666
667 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
668 pl->link_config.duplex = DUPLEX_FULL;
669
670 /* We treat the "pause" and "asym-pause" terminology as
671 * defining the link partner's ability.
672 */
673 if (fwnode_property_read_bool(fixed_node, "pause"))
674 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
675 pl->link_config.lp_advertising);
676 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
677 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
678 pl->link_config.lp_advertising);
679
680 if (ret == 0) {
681 desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
682 GPIOD_IN, "?");
683
684 if (!IS_ERR(desc))
685 pl->link_gpio = desc;
686 else if (desc == ERR_PTR(-EPROBE_DEFER))
687 ret = -EPROBE_DEFER;
688 }
689 fwnode_handle_put(fixed_node);
690
691 if (ret)
692 return ret;
693 } else {
694 u32 prop[5];
695
696 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
697 NULL, 0);
698 if (ret != ARRAY_SIZE(prop)) {
699 phylink_err(pl, "broken fixed-link?\n");
700 return -EINVAL;
701 }
702
703 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
704 prop, ARRAY_SIZE(prop));
705 if (!ret) {
706 pl->link_config.duplex = prop[1] ?
707 DUPLEX_FULL : DUPLEX_HALF;
708 pl->link_config.speed = prop[2];
709 if (prop[3])
710 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
711 pl->link_config.lp_advertising);
712 if (prop[4])
713 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
714 pl->link_config.lp_advertising);
715 }
716 }
717
718 if (pl->link_config.speed > SPEED_1000 &&
719 pl->link_config.duplex != DUPLEX_FULL)
720 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
721 pl->link_config.speed);
722
723 linkmode_zero(pl->supported);
724 phylink_fill_fixedlink_supported(pl->supported);
725
726 linkmode_copy(pl->link_config.advertising, pl->supported);
727 phylink_validate(pl, pl->supported, &pl->link_config);
728
729 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex,
730 pl->supported, true);
731 if (c)
732 linkmode_and(match, pl->supported, c->linkmodes);
733
734 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask);
735 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask);
736 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask);
737 linkmode_and(pl->supported, pl->supported, mask);
738
739 phylink_set(pl->supported, MII);
740
741 if (c) {
742 linkmode_or(pl->supported, pl->supported, match);
743 linkmode_or(pl->link_config.lp_advertising,
744 pl->link_config.lp_advertising, match);
745 } else {
746 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
747 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
748 pl->link_config.speed);
749 }
750
751 linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
752 pl->supported);
753
754 pl->link_config.link = 1;
755 pl->link_config.an_complete = 1;
756
757 return 0;
758 }
759
phylink_parse_mode(struct phylink * pl,const struct fwnode_handle * fwnode)760 static int phylink_parse_mode(struct phylink *pl,
761 const struct fwnode_handle *fwnode)
762 {
763 struct fwnode_handle *dn;
764 const char *managed;
765 unsigned long caps;
766
767 if (pl->config->default_an_inband)
768 pl->cfg_link_an_mode = MLO_AN_INBAND;
769
770 dn = fwnode_get_named_child_node(fwnode, "fixed-link");
771 if (dn || fwnode_property_present(fwnode, "fixed-link"))
772 pl->cfg_link_an_mode = MLO_AN_FIXED;
773 fwnode_handle_put(dn);
774
775 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
776 strcmp(managed, "in-band-status") == 0)) {
777 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
778 phylink_err(pl,
779 "can't use both fixed-link and in-band-status\n");
780 return -EINVAL;
781 }
782
783 pl->cfg_link_an_mode = MLO_AN_INBAND;
784 }
785
786 if (pl->cfg_link_an_mode == MLO_AN_INBAND) {
787 linkmode_zero(pl->supported);
788 phylink_set(pl->supported, MII);
789 phylink_set(pl->supported, Autoneg);
790 phylink_set(pl->supported, Asym_Pause);
791 phylink_set(pl->supported, Pause);
792
793 switch (pl->link_config.interface) {
794 case PHY_INTERFACE_MODE_SGMII:
795 case PHY_INTERFACE_MODE_PSGMII:
796 case PHY_INTERFACE_MODE_QSGMII:
797 case PHY_INTERFACE_MODE_QUSGMII:
798 case PHY_INTERFACE_MODE_RGMII:
799 case PHY_INTERFACE_MODE_RGMII_ID:
800 case PHY_INTERFACE_MODE_RGMII_RXID:
801 case PHY_INTERFACE_MODE_RGMII_TXID:
802 case PHY_INTERFACE_MODE_RTBI:
803 case PHY_INTERFACE_MODE_1000BASEX:
804 case PHY_INTERFACE_MODE_2500BASEX:
805 case PHY_INTERFACE_MODE_5GBASER:
806 case PHY_INTERFACE_MODE_25GBASER:
807 case PHY_INTERFACE_MODE_USXGMII:
808 case PHY_INTERFACE_MODE_10G_QXGMII:
809 case PHY_INTERFACE_MODE_10GKR:
810 case PHY_INTERFACE_MODE_10GBASER:
811 case PHY_INTERFACE_MODE_XLGMII:
812 case PHY_INTERFACE_MODE_50GBASER:
813 case PHY_INTERFACE_MODE_LAUI:
814 case PHY_INTERFACE_MODE_100GBASEP:
815 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
816 caps = phylink_get_capabilities(pl->link_config.interface, caps,
817 RATE_MATCH_NONE);
818 phylink_caps_to_linkmodes(pl->supported, caps);
819 break;
820
821 default:
822 phylink_err(pl,
823 "incorrect link mode %s for in-band status\n",
824 phy_modes(pl->link_config.interface));
825 return -EINVAL;
826 }
827
828 linkmode_copy(pl->link_config.advertising, pl->supported);
829
830 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
831 phylink_err(pl,
832 "failed to validate link configuration for in-band status\n");
833 return -EINVAL;
834 }
835 }
836
837 return 0;
838 }
839
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)840 static void phylink_apply_manual_flow(struct phylink *pl,
841 struct phylink_link_state *state)
842 {
843 /* If autoneg is disabled, pause AN is also disabled */
844 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
845 state->advertising))
846 state->pause &= ~MLO_PAUSE_AN;
847
848 /* Manual configuration of pause modes */
849 if (!(pl->link_config.pause & MLO_PAUSE_AN))
850 state->pause = pl->link_config.pause;
851 }
852
phylink_resolve_an_pause(struct phylink_link_state * state)853 static void phylink_resolve_an_pause(struct phylink_link_state *state)
854 {
855 bool tx_pause, rx_pause;
856
857 if (state->duplex == DUPLEX_FULL) {
858 linkmode_resolve_pause(state->advertising,
859 state->lp_advertising,
860 &tx_pause, &rx_pause);
861 if (tx_pause)
862 state->pause |= MLO_PAUSE_TX;
863 if (rx_pause)
864 state->pause |= MLO_PAUSE_RX;
865 }
866 }
867
phylink_pcs_inband_caps(struct phylink_pcs * pcs,phy_interface_t interface)868 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs,
869 phy_interface_t interface)
870 {
871 if (pcs && pcs->ops->pcs_inband_caps)
872 return pcs->ops->pcs_inband_caps(pcs, interface);
873
874 return 0;
875 }
876
phylink_pcs_pre_config(struct phylink_pcs * pcs,phy_interface_t interface)877 static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
878 phy_interface_t interface)
879 {
880 if (pcs && pcs->ops->pcs_pre_config)
881 pcs->ops->pcs_pre_config(pcs, interface);
882 }
883
phylink_pcs_post_config(struct phylink_pcs * pcs,phy_interface_t interface)884 static int phylink_pcs_post_config(struct phylink_pcs *pcs,
885 phy_interface_t interface)
886 {
887 int err = 0;
888
889 if (pcs && pcs->ops->pcs_post_config)
890 err = pcs->ops->pcs_post_config(pcs, interface);
891
892 return err;
893 }
894
phylink_pcs_disable(struct phylink_pcs * pcs)895 static void phylink_pcs_disable(struct phylink_pcs *pcs)
896 {
897 if (pcs && pcs->ops->pcs_disable)
898 pcs->ops->pcs_disable(pcs);
899 }
900
phylink_pcs_enable(struct phylink_pcs * pcs)901 static int phylink_pcs_enable(struct phylink_pcs *pcs)
902 {
903 int err = 0;
904
905 if (pcs && pcs->ops->pcs_enable)
906 err = pcs->ops->pcs_enable(pcs);
907
908 return err;
909 }
910
phylink_pcs_config(struct phylink_pcs * pcs,unsigned int neg_mode,const struct phylink_link_state * state,bool permit_pause_to_mac)911 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
912 const struct phylink_link_state *state,
913 bool permit_pause_to_mac)
914 {
915 if (!pcs)
916 return 0;
917
918 return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
919 state->advertising, permit_pause_to_mac);
920 }
921
phylink_pcs_link_up(struct phylink_pcs * pcs,unsigned int neg_mode,phy_interface_t interface,int speed,int duplex)922 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
923 phy_interface_t interface, int speed,
924 int duplex)
925 {
926 if (pcs && pcs->ops->pcs_link_up)
927 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
928 }
929
phylink_pcs_disable_eee(struct phylink_pcs * pcs)930 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs)
931 {
932 if (pcs && pcs->ops->pcs_disable_eee)
933 pcs->ops->pcs_disable_eee(pcs);
934 }
935
phylink_pcs_enable_eee(struct phylink_pcs * pcs)936 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs)
937 {
938 if (pcs && pcs->ops->pcs_enable_eee)
939 pcs->ops->pcs_enable_eee(pcs);
940 }
941
942 /* Query inband for a specific interface mode, asking the MAC for the
943 * PCS which will be used to handle the interface mode.
944 */
phylink_inband_caps(struct phylink * pl,phy_interface_t interface)945 static unsigned int phylink_inband_caps(struct phylink *pl,
946 phy_interface_t interface)
947 {
948 struct phylink_pcs *pcs;
949
950 if (!pl->mac_ops->mac_select_pcs)
951 return 0;
952
953 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface);
954 if (!pcs)
955 return 0;
956
957 return phylink_pcs_inband_caps(pcs, interface);
958 }
959
phylink_pcs_poll_stop(struct phylink * pl)960 static void phylink_pcs_poll_stop(struct phylink *pl)
961 {
962 if (pl->cfg_link_an_mode == MLO_AN_INBAND)
963 timer_delete(&pl->link_poll);
964 }
965
phylink_pcs_poll_start(struct phylink * pl)966 static void phylink_pcs_poll_start(struct phylink *pl)
967 {
968 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
969 mod_timer(&pl->link_poll, jiffies + HZ);
970 }
971
phylink_pcs_pre_init(struct phylink * pl,struct phylink_pcs * pcs)972 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs)
973 {
974 int ret = 0;
975
976 /* Signal to PCS driver that MAC requires RX clock for init */
977 if (pl->config->mac_requires_rxc)
978 pcs->rxc_always_on = true;
979
980 if (pcs->ops->pcs_pre_init)
981 ret = pcs->ops->pcs_pre_init(pcs);
982
983 return ret;
984 }
985 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init);
986
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)987 static void phylink_mac_config(struct phylink *pl,
988 const struct phylink_link_state *state)
989 {
990 struct phylink_link_state st = *state;
991
992 /* Stop drivers incorrectly using these */
993 linkmode_zero(st.lp_advertising);
994 st.speed = SPEED_UNKNOWN;
995 st.duplex = DUPLEX_UNKNOWN;
996 st.an_complete = false;
997 st.link = false;
998
999 phylink_dbg(pl,
1000 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1001 __func__, phylink_an_mode_str(pl->act_link_an_mode),
1002 phy_modes(st.interface),
1003 phy_rate_matching_to_str(st.rate_matching),
1004 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1005 st.pause);
1006
1007 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st);
1008 }
1009
phylink_pcs_an_restart(struct phylink * pl)1010 static void phylink_pcs_an_restart(struct phylink *pl)
1011 {
1012 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1013 pl->link_config.advertising) &&
1014 phy_interface_mode_is_8023z(pl->link_config.interface) &&
1015 phylink_autoneg_inband(pl->act_link_an_mode))
1016 pl->pcs->ops->pcs_an_restart(pl->pcs);
1017 }
1018
1019 /**
1020 * phylink_pcs_neg_mode() - helper to determine PCS inband mode
1021 * @pl: a pointer to a &struct phylink returned from phylink_create()
1022 * @pcs: a pointer to &struct phylink_pcs
1023 * @interface: interface mode to be used
1024 * @advertising: adertisement ethtool link mode mask
1025 *
1026 * Determines the negotiation mode to be used by the PCS, and returns
1027 * one of:
1028 *
1029 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
1030 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
1031 * will be used.
1032 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
1033 * disabled
1034 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
1035 *
1036 * Note: this is for cases where the PCS itself is involved in negotiation
1037 * (e.g. Clause 37, SGMII and similar) not Clause 73.
1038 */
phylink_pcs_neg_mode(struct phylink * pl,struct phylink_pcs * pcs,phy_interface_t interface,const unsigned long * advertising)1039 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs,
1040 phy_interface_t interface,
1041 const unsigned long *advertising)
1042 {
1043 unsigned int pcs_ib_caps = 0;
1044 unsigned int phy_ib_caps = 0;
1045 unsigned int neg_mode, mode;
1046 enum {
1047 INBAND_CISCO_SGMII,
1048 INBAND_BASEX,
1049 } type;
1050
1051 mode = pl->req_link_an_mode;
1052
1053 pl->phy_ib_mode = 0;
1054
1055 switch (interface) {
1056 case PHY_INTERFACE_MODE_SGMII:
1057 case PHY_INTERFACE_MODE_QSGMII:
1058 case PHY_INTERFACE_MODE_QUSGMII:
1059 case PHY_INTERFACE_MODE_USXGMII:
1060 case PHY_INTERFACE_MODE_10G_QXGMII:
1061 /* These protocols are designed for use with a PHY which
1062 * communicates its negotiation result back to the MAC via
1063 * inband communication. Note: there exist PHYs that run
1064 * with SGMII but do not send the inband data.
1065 */
1066 type = INBAND_CISCO_SGMII;
1067 break;
1068
1069 case PHY_INTERFACE_MODE_1000BASEX:
1070 case PHY_INTERFACE_MODE_2500BASEX:
1071 /* 1000base-X is designed for use media-side for Fibre
1072 * connections, and thus the Autoneg bit needs to be
1073 * taken into account. We also do this for 2500base-X
1074 * as well, but drivers may not support this, so may
1075 * need to override this.
1076 */
1077 type = INBAND_BASEX;
1078 break;
1079
1080 default:
1081 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE;
1082 pl->act_link_an_mode = mode;
1083 return;
1084 }
1085
1086 if (pcs)
1087 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface);
1088
1089 if (pl->phydev)
1090 phy_ib_caps = phy_inband_caps(pl->phydev, interface);
1091
1092 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n",
1093 phy_modes(interface), pcs_ib_caps, phy_ib_caps);
1094
1095 if (!phylink_autoneg_inband(mode)) {
1096 bool pcs_ib_only = false;
1097 bool phy_ib_only = false;
1098
1099 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) {
1100 /* PCS supports reporting in-band capabilities, and
1101 * supports more than disable mode.
1102 */
1103 if (pcs_ib_caps & LINK_INBAND_DISABLE)
1104 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1105 else if (pcs_ib_caps & LINK_INBAND_ENABLE)
1106 pcs_ib_only = true;
1107 }
1108
1109 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) {
1110 /* PHY supports in-band capabilities, and supports
1111 * more than disable mode.
1112 */
1113 if (phy_ib_caps & LINK_INBAND_DISABLE)
1114 pl->phy_ib_mode = LINK_INBAND_DISABLE;
1115 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1116 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1117 else if (phy_ib_caps & LINK_INBAND_ENABLE)
1118 phy_ib_only = true;
1119 }
1120
1121 /* If either the PCS or PHY requires inband to be enabled,
1122 * this is an invalid configuration. Provide a diagnostic
1123 * message for this case, but don't try to force the issue.
1124 */
1125 if (pcs_ib_only || phy_ib_only)
1126 phylink_warn(pl,
1127 "firmware wants %s mode, but %s%s%s requires inband\n",
1128 phylink_an_mode_str(mode),
1129 pcs_ib_only ? "PCS" : "",
1130 pcs_ib_only && phy_ib_only ? " and " : "",
1131 phy_ib_only ? "PHY" : "");
1132
1133 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1134 } else if (type == INBAND_CISCO_SGMII || pl->phydev) {
1135 /* For SGMII modes which are designed to be used with PHYs, or
1136 * Base-X with a PHY, we try to use in-band mode where-ever
1137 * possible. However, there are some PHYs e.g. BCM84881 which
1138 * do not support in-band.
1139 */
1140 const unsigned int inband_ok = LINK_INBAND_ENABLE |
1141 LINK_INBAND_BYPASS;
1142 const unsigned int outband_ok = LINK_INBAND_DISABLE |
1143 LINK_INBAND_BYPASS;
1144 /* PCS PHY
1145 * D E D E
1146 * 0 0 0 0 no information inband enabled
1147 * 1 0 0 0 pcs doesn't support outband
1148 * 0 1 0 0 pcs required inband enabled
1149 * 1 1 0 0 pcs optional inband enabled
1150 * 0 0 1 0 phy doesn't support outband
1151 * 1 0 1 0 pcs+phy doesn't support outband
1152 * 0 1 1 0 pcs required, phy doesn't support, invalid
1153 * 1 1 1 0 pcs optional, phy doesn't support, outband
1154 * 0 0 0 1 phy required inband enabled
1155 * 1 0 0 1 pcs doesn't support, phy required, invalid
1156 * 0 1 0 1 pcs+phy required inband enabled
1157 * 1 1 0 1 pcs optional, phy required inband enabled
1158 * 0 0 1 1 phy optional inband enabled
1159 * 1 0 1 1 pcs doesn't support, phy optional, outband
1160 * 0 1 1 1 pcs required, phy optional inband enabled
1161 * 1 1 1 1 pcs+phy optional inband enabled
1162 */
1163 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) &&
1164 (!phy_ib_caps || phy_ib_caps & inband_ok)) {
1165 /* In-band supported or unknown at both ends. Enable
1166 * in-band mode with or without bypass at the PHY.
1167 */
1168 if (phy_ib_caps & LINK_INBAND_ENABLE)
1169 pl->phy_ib_mode = LINK_INBAND_ENABLE;
1170 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1171 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1172
1173 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1174 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) &&
1175 (!phy_ib_caps || phy_ib_caps & outband_ok)) {
1176 /* Either in-band not supported at at least one end.
1177 * In-band bypass at the other end is possible.
1178 */
1179 if (phy_ib_caps & LINK_INBAND_DISABLE)
1180 pl->phy_ib_mode = LINK_INBAND_DISABLE;
1181 else if (phy_ib_caps & LINK_INBAND_BYPASS)
1182 pl->phy_ib_mode = LINK_INBAND_BYPASS;
1183
1184 neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1185 if (pl->phydev)
1186 mode = MLO_AN_PHY;
1187 } else {
1188 /* invalid */
1189 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band",
1190 phy_modes(interface));
1191 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1192 }
1193 } else {
1194 /* For Base-X without a PHY */
1195 if (pcs_ib_caps == LINK_INBAND_DISABLE)
1196 /* If the PCS doesn't support inband, then inband must
1197 * be disabled.
1198 */
1199 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1200 else if (pcs_ib_caps == LINK_INBAND_ENABLE)
1201 /* If the PCS requires inband, then inband must always
1202 * be enabled.
1203 */
1204 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1205 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1206 advertising))
1207 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1208 else
1209 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1210 }
1211
1212 pl->pcs_neg_mode = neg_mode;
1213 pl->act_link_an_mode = mode;
1214 }
1215
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)1216 static void phylink_major_config(struct phylink *pl, bool restart,
1217 const struct phylink_link_state *state)
1218 {
1219 struct phylink_pcs *pcs = NULL;
1220 bool pcs_changed = false;
1221 unsigned int rate_kbd;
1222 int err;
1223
1224 phylink_dbg(pl, "major config, requested %s/%s\n",
1225 phylink_an_mode_str(pl->req_link_an_mode),
1226 phy_modes(state->interface));
1227
1228 pl->major_config_failed = false;
1229
1230 if (pl->mac_ops->mac_select_pcs) {
1231 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1232 if (IS_ERR(pcs)) {
1233 phylink_err(pl,
1234 "mac_select_pcs unexpectedly failed: %pe\n",
1235 pcs);
1236
1237 pl->major_config_failed = true;
1238 return;
1239 }
1240
1241 pcs_changed = pl->pcs != pcs;
1242 }
1243
1244 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising);
1245
1246 phylink_dbg(pl, "major config, active %s/%s/%s\n",
1247 phylink_an_mode_str(pl->act_link_an_mode),
1248 phylink_pcs_mode_str(pl->pcs_neg_mode),
1249 phy_modes(state->interface));
1250
1251 phylink_pcs_poll_stop(pl);
1252
1253 if (pl->mac_ops->mac_prepare) {
1254 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode,
1255 state->interface);
1256 if (err < 0) {
1257 phylink_err(pl, "mac_prepare failed: %pe\n",
1258 ERR_PTR(err));
1259 pl->major_config_failed = true;
1260 return;
1261 }
1262 }
1263
1264 /* If we have a new PCS, switch to the new PCS after preparing the MAC
1265 * for the change.
1266 */
1267 if (pcs_changed) {
1268 phylink_pcs_disable(pl->pcs);
1269
1270 if (pl->pcs)
1271 pl->pcs->phylink = NULL;
1272
1273 pcs->phylink = pl;
1274
1275 pl->pcs = pcs;
1276 }
1277
1278 if (pl->pcs)
1279 phylink_pcs_pre_config(pl->pcs, state->interface);
1280
1281 phylink_mac_config(pl, state);
1282
1283 if (pl->pcs) {
1284 err = phylink_pcs_post_config(pl->pcs, state->interface);
1285 if (err < 0) {
1286 phylink_err(pl, "pcs_post_config failed: %pe\n",
1287 ERR_PTR(err));
1288
1289 pl->major_config_failed = true;
1290 }
1291 }
1292
1293 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1294 phylink_pcs_enable(pl->pcs);
1295
1296 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state,
1297 !!(pl->link_config.pause & MLO_PAUSE_AN));
1298 if (err < 0) {
1299 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err));
1300 pl->major_config_failed = true;
1301 } else if (err > 0) {
1302 restart = true;
1303 }
1304
1305 if (restart)
1306 phylink_pcs_an_restart(pl);
1307
1308 if (pl->mac_ops->mac_finish) {
1309 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode,
1310 state->interface);
1311 if (err < 0) {
1312 phylink_err(pl, "mac_finish failed: %pe\n",
1313 ERR_PTR(err));
1314
1315 pl->major_config_failed = true;
1316 }
1317 }
1318
1319 if (pl->phydev && pl->phy_ib_mode) {
1320 err = phy_config_inband(pl->phydev, pl->phy_ib_mode);
1321 if (err < 0) {
1322 phylink_err(pl, "phy_config_inband: %pe\n",
1323 ERR_PTR(err));
1324
1325 pl->major_config_failed = true;
1326 }
1327 }
1328
1329 if (pl->sfp_bus) {
1330 rate_kbd = phylink_interface_signal_rate(state->interface);
1331 if (rate_kbd)
1332 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1333 }
1334
1335 phylink_pcs_poll_start(pl);
1336 }
1337
1338 /*
1339 * Reconfigure for a change of inband advertisement.
1340 * If we have a separate PCS, we only need to call its pcs_config() method,
1341 * and then restart AN if it indicates something changed. Otherwise, we do
1342 * the full MAC reconfiguration.
1343 */
phylink_change_inband_advert(struct phylink * pl)1344 static int phylink_change_inband_advert(struct phylink *pl)
1345 {
1346 int ret;
1347
1348 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1349 return 0;
1350
1351 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1352 phylink_an_mode_str(pl->req_link_an_mode),
1353 phy_modes(pl->link_config.interface),
1354 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1355 pl->link_config.pause);
1356
1357 /* Recompute the PCS neg mode */
1358 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface,
1359 pl->link_config.advertising);
1360
1361 /* Modern PCS-based method; update the advert at the PCS, and
1362 * restart negotiation if the pcs_config() helper indicates that
1363 * the programmed advertisement has changed.
1364 */
1365 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config,
1366 !!(pl->link_config.pause & MLO_PAUSE_AN));
1367 if (ret < 0)
1368 return ret;
1369
1370 if (ret > 0)
1371 phylink_pcs_an_restart(pl);
1372
1373 return 0;
1374 }
1375
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)1376 static void phylink_mac_pcs_get_state(struct phylink *pl,
1377 struct phylink_link_state *state)
1378 {
1379 struct phylink_pcs *pcs;
1380 bool autoneg;
1381
1382 linkmode_copy(state->advertising, pl->link_config.advertising);
1383 linkmode_zero(state->lp_advertising);
1384 state->interface = pl->link_config.interface;
1385 state->rate_matching = pl->link_config.rate_matching;
1386 state->an_complete = 0;
1387 state->link = 1;
1388
1389 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED;
1390 if (autoneg) {
1391 state->speed = SPEED_UNKNOWN;
1392 state->duplex = DUPLEX_UNKNOWN;
1393 state->pause = MLO_PAUSE_NONE;
1394 } else {
1395 state->speed = pl->link_config.speed;
1396 state->duplex = pl->link_config.duplex;
1397 state->pause = pl->link_config.pause;
1398 }
1399
1400 pcs = pl->pcs;
1401 if (pcs)
1402 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state);
1403 else
1404 state->link = 0;
1405 }
1406
1407 /* The fixed state is... fixed except for the link state,
1408 * which may be determined by a GPIO or a callback.
1409 */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)1410 static void phylink_get_fixed_state(struct phylink *pl,
1411 struct phylink_link_state *state)
1412 {
1413 *state = pl->link_config;
1414 if (pl->config->get_fixed_state)
1415 pl->config->get_fixed_state(pl->config, state);
1416 else if (pl->link_gpio)
1417 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1418
1419 state->pause = MLO_PAUSE_NONE;
1420 phylink_resolve_an_pause(state);
1421 }
1422
phylink_mac_initial_config(struct phylink * pl,bool force_restart)1423 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1424 {
1425 struct phylink_link_state link_state;
1426
1427 switch (pl->req_link_an_mode) {
1428 case MLO_AN_PHY:
1429 link_state = pl->phy_state;
1430 break;
1431
1432 case MLO_AN_FIXED:
1433 phylink_get_fixed_state(pl, &link_state);
1434 break;
1435
1436 case MLO_AN_INBAND:
1437 link_state = pl->link_config;
1438 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1439 link_state.pause = MLO_PAUSE_NONE;
1440 break;
1441
1442 default: /* can't happen */
1443 return;
1444 }
1445
1446 link_state.link = false;
1447
1448 phylink_apply_manual_flow(pl, &link_state);
1449 phylink_major_config(pl, force_restart, &link_state);
1450 }
1451
phylink_pause_to_str(int pause)1452 static const char *phylink_pause_to_str(int pause)
1453 {
1454 switch (pause & MLO_PAUSE_TXRX_MASK) {
1455 case MLO_PAUSE_TX | MLO_PAUSE_RX:
1456 return "rx/tx";
1457 case MLO_PAUSE_TX:
1458 return "tx";
1459 case MLO_PAUSE_RX:
1460 return "rx";
1461 default:
1462 return "off";
1463 }
1464 }
1465
phylink_deactivate_lpi(struct phylink * pl)1466 static void phylink_deactivate_lpi(struct phylink *pl)
1467 {
1468 if (pl->mac_enable_tx_lpi) {
1469 pl->mac_enable_tx_lpi = false;
1470
1471 phylink_dbg(pl, "disabling LPI\n");
1472
1473 pl->mac_ops->mac_disable_tx_lpi(pl->config);
1474
1475 phylink_pcs_disable_eee(pl->pcs);
1476 }
1477 }
1478
phylink_activate_lpi(struct phylink * pl)1479 static void phylink_activate_lpi(struct phylink *pl)
1480 {
1481 int err;
1482
1483 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) {
1484 phylink_dbg(pl, "MAC does not support LPI with %s\n",
1485 phy_modes(pl->cur_interface));
1486 return;
1487 }
1488
1489 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n",
1490 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop);
1491
1492 phylink_pcs_enable_eee(pl->pcs);
1493
1494 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer,
1495 pl->mac_tx_clk_stop);
1496 if (err) {
1497 phylink_pcs_disable_eee(pl->pcs);
1498 phylink_err(pl, "%ps() failed: %pe\n",
1499 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err));
1500 return;
1501 }
1502
1503 pl->mac_enable_tx_lpi = true;
1504 }
1505
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)1506 static void phylink_link_up(struct phylink *pl,
1507 struct phylink_link_state link_state)
1508 {
1509 struct net_device *ndev = pl->netdev;
1510 int speed, duplex;
1511 bool rx_pause;
1512
1513 speed = link_state.speed;
1514 duplex = link_state.duplex;
1515 rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1516
1517 switch (link_state.rate_matching) {
1518 case RATE_MATCH_PAUSE:
1519 /* The PHY is doing rate matchion from the media rate (in
1520 * the link_state) to the interface speed, and will send
1521 * pause frames to the MAC to limit its transmission speed.
1522 */
1523 speed = phylink_interface_max_speed(link_state.interface);
1524 duplex = DUPLEX_FULL;
1525 rx_pause = true;
1526 break;
1527
1528 case RATE_MATCH_CRS:
1529 /* The PHY is doing rate matchion from the media rate (in
1530 * the link_state) to the interface speed, and will cause
1531 * collisions to the MAC to limit its transmission speed.
1532 */
1533 speed = phylink_interface_max_speed(link_state.interface);
1534 duplex = DUPLEX_HALF;
1535 break;
1536 }
1537
1538 pl->cur_interface = link_state.interface;
1539
1540 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed,
1541 duplex);
1542
1543 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode,
1544 pl->cur_interface, speed, duplex,
1545 !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1546
1547 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi)
1548 phylink_activate_lpi(pl);
1549
1550 if (ndev)
1551 netif_carrier_on(ndev);
1552
1553 phylink_info(pl,
1554 "Link is Up - %s/%s - flow control %s\n",
1555 phy_speed_to_str(link_state.speed),
1556 phy_duplex_to_str(link_state.duplex),
1557 phylink_pause_to_str(link_state.pause));
1558 }
1559
phylink_link_down(struct phylink * pl)1560 static void phylink_link_down(struct phylink *pl)
1561 {
1562 struct net_device *ndev = pl->netdev;
1563
1564 if (ndev)
1565 netif_carrier_off(ndev);
1566
1567 phylink_deactivate_lpi(pl);
1568
1569 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode,
1570 pl->cur_interface);
1571 phylink_info(pl, "Link is Down\n");
1572 }
1573
phylink_link_is_up(struct phylink * pl)1574 static bool phylink_link_is_up(struct phylink *pl)
1575 {
1576 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state;
1577 }
1578
phylink_resolve(struct work_struct * w)1579 static void phylink_resolve(struct work_struct *w)
1580 {
1581 struct phylink *pl = container_of(w, struct phylink, resolve);
1582 struct phylink_link_state link_state;
1583 bool mac_config = false;
1584 bool retrigger = false;
1585 bool cur_link_state;
1586
1587 mutex_lock(&pl->state_mutex);
1588 cur_link_state = phylink_link_is_up(pl);
1589
1590 if (pl->phylink_disable_state) {
1591 pl->link_failed = false;
1592 link_state.link = false;
1593 } else if (pl->link_failed) {
1594 link_state.link = false;
1595 retrigger = true;
1596 } else if (pl->act_link_an_mode == MLO_AN_FIXED) {
1597 phylink_get_fixed_state(pl, &link_state);
1598 mac_config = link_state.link;
1599 } else if (pl->act_link_an_mode == MLO_AN_PHY) {
1600 link_state = pl->phy_state;
1601 mac_config = link_state.link;
1602 } else {
1603 phylink_mac_pcs_get_state(pl, &link_state);
1604
1605 /* The PCS may have a latching link-fail indicator. If the link
1606 * was up, bring the link down and re-trigger the resolve.
1607 * Otherwise, re-read the PCS state to get the current status
1608 * of the link.
1609 */
1610 if (!link_state.link) {
1611 if (cur_link_state)
1612 retrigger = true;
1613 else
1614 phylink_mac_pcs_get_state(pl, &link_state);
1615 }
1616
1617 /* If we have a phy, the "up" state is the union of both the
1618 * PHY and the MAC
1619 */
1620 if (pl->phydev)
1621 link_state.link &= pl->phy_state.link;
1622
1623 /* Only update if the PHY link is up */
1624 if (pl->phydev && pl->phy_state.link) {
1625 /* If the interface has changed, force a link down
1626 * event if the link isn't already down, and re-resolve.
1627 */
1628 if (link_state.interface != pl->phy_state.interface) {
1629 retrigger = true;
1630 link_state.link = false;
1631 }
1632
1633 link_state.interface = pl->phy_state.interface;
1634
1635 /* If we are doing rate matching, then the link
1636 * speed/duplex comes from the PHY
1637 */
1638 if (pl->phy_state.rate_matching) {
1639 link_state.rate_matching =
1640 pl->phy_state.rate_matching;
1641 link_state.speed = pl->phy_state.speed;
1642 link_state.duplex = pl->phy_state.duplex;
1643 }
1644
1645 /* If we have a PHY, we need to update with the PHY
1646 * flow control bits.
1647 */
1648 link_state.pause = pl->phy_state.pause;
1649 mac_config = true;
1650 }
1651 }
1652
1653 if (pl->act_link_an_mode != MLO_AN_FIXED)
1654 phylink_apply_manual_flow(pl, &link_state);
1655
1656 if (mac_config) {
1657 if (link_state.interface != pl->link_config.interface) {
1658 /* The interface has changed, force the link down and
1659 * then reconfigure.
1660 */
1661 if (cur_link_state) {
1662 phylink_link_down(pl);
1663 cur_link_state = false;
1664 }
1665 phylink_major_config(pl, false, &link_state);
1666 pl->link_config.interface = link_state.interface;
1667 }
1668 }
1669
1670 /* If configuration of the interface failed, force the link down
1671 * until we get a successful configuration.
1672 */
1673 if (pl->major_config_failed)
1674 link_state.link = false;
1675
1676 if (link_state.link != cur_link_state) {
1677 pl->old_link_state = link_state.link;
1678 if (!link_state.link)
1679 phylink_link_down(pl);
1680 else
1681 phylink_link_up(pl, link_state);
1682 }
1683 if (!link_state.link && retrigger) {
1684 pl->link_failed = false;
1685 queue_work(system_power_efficient_wq, &pl->resolve);
1686 }
1687 mutex_unlock(&pl->state_mutex);
1688 }
1689
phylink_run_resolve(struct phylink * pl)1690 static void phylink_run_resolve(struct phylink *pl)
1691 {
1692 if (!pl->phylink_disable_state)
1693 queue_work(system_power_efficient_wq, &pl->resolve);
1694 }
1695
phylink_run_resolve_and_disable(struct phylink * pl,int bit)1696 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1697 {
1698 unsigned long state = pl->phylink_disable_state;
1699
1700 set_bit(bit, &pl->phylink_disable_state);
1701 if (state == 0) {
1702 queue_work(system_power_efficient_wq, &pl->resolve);
1703 flush_work(&pl->resolve);
1704 }
1705 }
1706
phylink_enable_and_run_resolve(struct phylink * pl,int bit)1707 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1708 {
1709 clear_bit(bit, &pl->phylink_disable_state);
1710 phylink_run_resolve(pl);
1711 }
1712
phylink_fixed_poll(struct timer_list * t)1713 static void phylink_fixed_poll(struct timer_list *t)
1714 {
1715 struct phylink *pl = container_of(t, struct phylink, link_poll);
1716
1717 mod_timer(t, jiffies + HZ);
1718
1719 phylink_run_resolve(pl);
1720 }
1721
1722 static const struct sfp_upstream_ops sfp_phylink_ops;
1723
phylink_register_sfp(struct phylink * pl,const struct fwnode_handle * fwnode)1724 static int phylink_register_sfp(struct phylink *pl,
1725 const struct fwnode_handle *fwnode)
1726 {
1727 struct sfp_bus *bus;
1728 int ret;
1729
1730 if (!fwnode)
1731 return 0;
1732
1733 bus = sfp_bus_find_fwnode(fwnode);
1734 if (IS_ERR(bus)) {
1735 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1736 return PTR_ERR(bus);
1737 }
1738
1739 pl->sfp_bus = bus;
1740
1741 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1742 sfp_bus_put(bus);
1743
1744 return ret;
1745 }
1746
1747 /**
1748 * phylink_set_fixed_link() - set the fixed link
1749 * @pl: a pointer to a &struct phylink returned from phylink_create()
1750 * @state: a pointer to a struct phylink_link_state.
1751 *
1752 * This function is used when the link parameters are known and do not change,
1753 * making it suitable for certain types of network connections.
1754 *
1755 * Returns: zero on success or negative error code.
1756 */
phylink_set_fixed_link(struct phylink * pl,const struct phylink_link_state * state)1757 int phylink_set_fixed_link(struct phylink *pl,
1758 const struct phylink_link_state *state)
1759 {
1760 const struct link_capabilities *c;
1761 unsigned long *adv;
1762
1763 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state ||
1764 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1765 return -EINVAL;
1766
1767 c = phy_caps_lookup(state->speed, state->duplex,
1768 pl->supported, true);
1769 if (!c)
1770 return -EINVAL;
1771
1772 adv = pl->link_config.advertising;
1773 linkmode_and(adv, pl->supported, c->linkmodes);
1774 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv);
1775
1776 pl->link_config.speed = state->speed;
1777 pl->link_config.duplex = state->duplex;
1778 pl->link_config.link = 1;
1779 pl->link_config.an_complete = 1;
1780
1781 pl->cfg_link_an_mode = MLO_AN_FIXED;
1782 pl->req_link_an_mode = pl->cfg_link_an_mode;
1783
1784 return 0;
1785 }
1786 EXPORT_SYMBOL_GPL(phylink_set_fixed_link);
1787
1788 /**
1789 * phylink_create() - create a phylink instance
1790 * @config: a pointer to the target &struct phylink_config
1791 * @fwnode: a pointer to a &struct fwnode_handle describing the network
1792 * interface
1793 * @iface: the desired link mode defined by &typedef phy_interface_t
1794 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1795 *
1796 * Create a new phylink instance, and parse the link parameters found in @np.
1797 * This will parse in-band modes, fixed-link or SFP configuration.
1798 *
1799 * Note: the rtnl lock must not be held when calling this function.
1800 *
1801 * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1802 * must use IS_ERR() to check for errors from this function.
1803 */
phylink_create(struct phylink_config * config,const struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)1804 struct phylink *phylink_create(struct phylink_config *config,
1805 const struct fwnode_handle *fwnode,
1806 phy_interface_t iface,
1807 const struct phylink_mac_ops *mac_ops)
1808 {
1809 struct phylink *pl;
1810 int ret;
1811
1812 /* Validate the supplied configuration */
1813 if (phy_interface_empty(config->supported_interfaces)) {
1814 dev_err(config->dev,
1815 "phylink: error: empty supported_interfaces\n");
1816 return ERR_PTR(-EINVAL);
1817 }
1818
1819 pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1820 if (!pl)
1821 return ERR_PTR(-ENOMEM);
1822
1823 mutex_init(&pl->state_mutex);
1824 INIT_WORK(&pl->resolve, phylink_resolve);
1825
1826 pl->config = config;
1827 if (config->type == PHYLINK_NETDEV) {
1828 pl->netdev = to_net_dev(config->dev);
1829 netif_carrier_off(pl->netdev);
1830 } else if (config->type == PHYLINK_DEV) {
1831 pl->dev = config->dev;
1832 } else {
1833 kfree(pl);
1834 return ERR_PTR(-EINVAL);
1835 }
1836
1837 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops);
1838 pl->mac_supports_eee = pl->mac_supports_eee_ops &&
1839 pl->config->lpi_capabilities &&
1840 !phy_interface_empty(pl->config->lpi_interfaces);
1841
1842 /* Set the default EEE configuration */
1843 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default;
1844 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled;
1845 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default;
1846
1847 pl->phy_state.interface = iface;
1848 pl->link_interface = iface;
1849 if (iface == PHY_INTERFACE_MODE_MOCA)
1850 pl->link_port = PORT_BNC;
1851 else
1852 pl->link_port = PORT_MII;
1853 pl->link_config.interface = iface;
1854 pl->link_config.pause = MLO_PAUSE_AN;
1855 pl->link_config.speed = SPEED_UNKNOWN;
1856 pl->link_config.duplex = DUPLEX_UNKNOWN;
1857 pl->pcs_state = PCS_STATE_DOWN;
1858 pl->mac_ops = mac_ops;
1859 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1860 timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1861
1862 linkmode_fill(pl->supported);
1863 linkmode_copy(pl->link_config.advertising, pl->supported);
1864 phylink_validate(pl, pl->supported, &pl->link_config);
1865
1866 ret = phylink_parse_mode(pl, fwnode);
1867 if (ret < 0) {
1868 kfree(pl);
1869 return ERR_PTR(ret);
1870 }
1871
1872 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1873 ret = phylink_parse_fixedlink(pl, fwnode);
1874 if (ret < 0) {
1875 kfree(pl);
1876 return ERR_PTR(ret);
1877 }
1878 }
1879
1880 pl->req_link_an_mode = pl->cfg_link_an_mode;
1881
1882 ret = phylink_register_sfp(pl, fwnode);
1883 if (ret < 0) {
1884 kfree(pl);
1885 return ERR_PTR(ret);
1886 }
1887
1888 return pl;
1889 }
1890 EXPORT_SYMBOL_GPL(phylink_create);
1891
1892 /**
1893 * phylink_destroy() - cleanup and destroy the phylink instance
1894 * @pl: a pointer to a &struct phylink returned from phylink_create()
1895 *
1896 * Destroy a phylink instance. Any PHY that has been attached must have been
1897 * cleaned up via phylink_disconnect_phy() prior to calling this function.
1898 *
1899 * Note: the rtnl lock must not be held when calling this function.
1900 */
phylink_destroy(struct phylink * pl)1901 void phylink_destroy(struct phylink *pl)
1902 {
1903 sfp_bus_del_upstream(pl->sfp_bus);
1904 if (pl->link_gpio)
1905 gpiod_put(pl->link_gpio);
1906
1907 cancel_work_sync(&pl->resolve);
1908 kfree(pl);
1909 }
1910 EXPORT_SYMBOL_GPL(phylink_destroy);
1911
1912 /**
1913 * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1914 * @pl: a pointer to a &struct phylink returned from phylink_create()
1915 *
1916 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1917 * no PHY is needed.
1918 *
1919 * Returns true if phylink will be expecting a PHY.
1920 */
phylink_expects_phy(struct phylink * pl)1921 bool phylink_expects_phy(struct phylink *pl)
1922 {
1923 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1924 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1925 phy_interface_mode_is_8023z(pl->link_interface)))
1926 return false;
1927 return true;
1928 }
1929 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1930
phylink_phy_change(struct phy_device * phydev,bool up)1931 static void phylink_phy_change(struct phy_device *phydev, bool up)
1932 {
1933 struct phylink *pl = phydev->phylink;
1934 bool tx_pause, rx_pause;
1935
1936 phy_get_pause(phydev, &tx_pause, &rx_pause);
1937
1938 mutex_lock(&pl->state_mutex);
1939 pl->phy_state.speed = phydev->speed;
1940 pl->phy_state.duplex = phydev->duplex;
1941 pl->phy_state.rate_matching = phydev->rate_matching;
1942 pl->phy_state.pause = MLO_PAUSE_NONE;
1943 if (tx_pause)
1944 pl->phy_state.pause |= MLO_PAUSE_TX;
1945 if (rx_pause)
1946 pl->phy_state.pause |= MLO_PAUSE_RX;
1947 pl->phy_state.interface = phydev->interface;
1948 pl->phy_state.link = up;
1949 if (!up)
1950 pl->link_failed = true;
1951
1952 /* Get the LPI state from phylib */
1953 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi;
1954 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer;
1955 mutex_unlock(&pl->state_mutex);
1956
1957 phylink_run_resolve(pl);
1958
1959 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n",
1960 up ? "up" : "down",
1961 phy_modes(phydev->interface),
1962 phy_speed_to_str(phydev->speed),
1963 phy_duplex_to_str(phydev->duplex),
1964 phy_rate_matching_to_str(phydev->rate_matching),
1965 phylink_pause_to_str(pl->phy_state.pause),
1966 phydev->enable_tx_lpi ? "" : "no");
1967 }
1968
phylink_validate_phy(struct phylink * pl,struct phy_device * phy,unsigned long * supported,struct phylink_link_state * state)1969 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
1970 unsigned long *supported,
1971 struct phylink_link_state *state)
1972 {
1973 DECLARE_PHY_INTERFACE_MASK(interfaces);
1974
1975 /* If the PHY provides a bitmap of the interfaces it will be using
1976 * depending on the negotiated media speeds, use this to validate
1977 * which ethtool link modes can be used.
1978 */
1979 if (!phy_interface_empty(phy->possible_interfaces)) {
1980 /* We only care about the union of the PHY's interfaces and
1981 * those which the host supports.
1982 */
1983 phy_interface_and(interfaces, phy->possible_interfaces,
1984 pl->config->supported_interfaces);
1985
1986 if (phy_interface_empty(interfaces)) {
1987 phylink_err(pl, "PHY has no common interfaces\n");
1988 return -EINVAL;
1989 }
1990
1991 if (phy_on_sfp(phy)) {
1992 /* If the PHY is on a SFP, limit the interfaces to
1993 * those that can be used with a SFP module.
1994 */
1995 phy_interface_and(interfaces, interfaces,
1996 phylink_sfp_interfaces);
1997
1998 if (phy_interface_empty(interfaces)) {
1999 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n");
2000 return -EINVAL;
2001 }
2002 }
2003
2004 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n",
2005 phydev_name(phy),
2006 (int)PHY_INTERFACE_MODE_MAX,
2007 phy->possible_interfaces,
2008 (int)PHY_INTERFACE_MODE_MAX, interfaces);
2009
2010 return phylink_validate_mask(pl, phy, supported, state,
2011 interfaces);
2012 }
2013
2014 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n",
2015 phydev_name(phy));
2016
2017 /* Check whether we would use rate matching for the proposed interface
2018 * mode.
2019 */
2020 state->rate_matching = phy_get_rate_matching(phy, state->interface);
2021
2022 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
2023 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
2024 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
2025 * their Serdes is either unnecessary or not reasonable.
2026 *
2027 * For these which switch interface modes, we really need to know which
2028 * interface modes the PHY supports to properly work out which ethtool
2029 * linkmodes can be supported. For now, as a work-around, we validate
2030 * against all interface modes, which may lead to more ethtool link
2031 * modes being advertised than are actually supported.
2032 */
2033 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
2034 state->interface != PHY_INTERFACE_MODE_RXAUI &&
2035 state->interface != PHY_INTERFACE_MODE_XAUI &&
2036 state->interface != PHY_INTERFACE_MODE_USXGMII)
2037 state->interface = PHY_INTERFACE_MODE_NA;
2038
2039 return phylink_validate(pl, supported, state);
2040 }
2041
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)2042 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
2043 phy_interface_t interface)
2044 {
2045 struct phylink_link_state config;
2046 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
2047 char *irq_str;
2048 int ret;
2049
2050 /*
2051 * This is the new way of dealing with flow control for PHYs,
2052 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
2053 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
2054 * using our validate call to the MAC, we rely upon the MAC
2055 * clearing the bits from both supported and advertising fields.
2056 */
2057 phy_support_asym_pause(phy);
2058
2059 memset(&config, 0, sizeof(config));
2060 linkmode_copy(supported, phy->supported);
2061 linkmode_copy(config.advertising, phy->advertising);
2062 config.interface = interface;
2063
2064 ret = phylink_validate_phy(pl, phy, supported, &config);
2065 if (ret) {
2066 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
2067 phy_modes(config.interface),
2068 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
2069 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
2070 ERR_PTR(ret));
2071 return ret;
2072 }
2073
2074 phy->phylink = pl;
2075 phy->phy_link_change = phylink_phy_change;
2076
2077 irq_str = phy_attached_info_irq(phy);
2078 phylink_info(pl,
2079 "PHY [%s] driver [%s] (irq=%s)\n",
2080 dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
2081 kfree(irq_str);
2082
2083 mutex_lock(&phy->lock);
2084 mutex_lock(&pl->state_mutex);
2085 pl->phydev = phy;
2086 pl->phy_state.interface = interface;
2087 pl->phy_state.pause = MLO_PAUSE_NONE;
2088 pl->phy_state.speed = SPEED_UNKNOWN;
2089 pl->phy_state.duplex = DUPLEX_UNKNOWN;
2090 pl->phy_state.rate_matching = RATE_MATCH_NONE;
2091 linkmode_copy(pl->supported, supported);
2092 linkmode_copy(pl->link_config.advertising, config.advertising);
2093
2094 /* Restrict the phy advertisement according to the MAC support. */
2095 linkmode_copy(phy->advertising, config.advertising);
2096
2097 /* If the MAC supports phylink managed EEE, restrict the EEE
2098 * advertisement according to the MAC's LPI capabilities.
2099 */
2100 if (pl->mac_supports_eee) {
2101 /* If EEE is enabled, then we need to call phy_support_eee()
2102 * to ensure that the advertising mask is appropriately set.
2103 * This also enables EEE at the PHY.
2104 */
2105 if (pl->eee_cfg.eee_enabled)
2106 phy_support_eee(phy);
2107
2108 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled;
2109 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer;
2110
2111 /* Convert the MAC's LPI capabilities to linkmodes */
2112 linkmode_zero(pl->supported_lpi);
2113 phylink_caps_to_linkmodes(pl->supported_lpi,
2114 pl->config->lpi_capabilities);
2115
2116 /* Restrict the PHYs EEE support/advertisement to the modes
2117 * that the MAC supports.
2118 */
2119 linkmode_and(phy->advertising_eee, phy->advertising_eee,
2120 pl->supported_lpi);
2121 } else if (pl->mac_supports_eee_ops) {
2122 /* MAC supports phylink EEE, but wants EEE always disabled. */
2123 phy_disable_eee(phy);
2124 }
2125
2126 mutex_unlock(&pl->state_mutex);
2127 mutex_unlock(&phy->lock);
2128
2129 phylink_dbg(pl,
2130 "phy: %s setting supported %*pb advertising %*pb\n",
2131 phy_modes(interface),
2132 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
2133 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
2134
2135 if (phy_interrupt_is_valid(phy))
2136 phy_request_interrupt(phy);
2137
2138 if (pl->config->mac_managed_pm)
2139 phy->mac_managed_pm = true;
2140
2141 /* Allow the MAC to stop its clock if the PHY has the capability */
2142 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0;
2143
2144 if (pl->mac_supports_eee_ops) {
2145 /* Explicitly configure whether the PHY is allowed to stop it's
2146 * receive clock.
2147 */
2148 ret = phy_eee_rx_clock_stop(phy,
2149 pl->config->eee_rx_clk_stop_enable);
2150 if (ret == -EOPNOTSUPP)
2151 ret = 0;
2152 }
2153
2154 return ret;
2155 }
2156
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)2157 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
2158 phy_interface_t interface)
2159 {
2160 u32 flags = 0;
2161
2162 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
2163 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2164 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
2165 return -EINVAL;
2166
2167 if (pl->phydev)
2168 return -EBUSY;
2169
2170 if (pl->config->mac_requires_rxc)
2171 flags |= PHY_F_RXC_ALWAYS_ON;
2172
2173 return phy_attach_direct(pl->netdev, phy, flags, interface);
2174 }
2175
2176 /**
2177 * phylink_connect_phy() - connect a PHY to the phylink instance
2178 * @pl: a pointer to a &struct phylink returned from phylink_create()
2179 * @phy: a pointer to a &struct phy_device.
2180 *
2181 * Connect @phy to the phylink instance specified by @pl by calling
2182 * phy_attach_direct(). Configure the @phy according to the MAC driver's
2183 * capabilities, start the PHYLIB state machine and enable any interrupts
2184 * that the PHY supports.
2185 *
2186 * This updates the phylink's ethtool supported and advertising link mode
2187 * masks.
2188 *
2189 * Returns 0 on success or a negative errno.
2190 */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)2191 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
2192 {
2193 int ret;
2194
2195 /* Use PHY device/driver interface */
2196 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2197 pl->link_interface = phy->interface;
2198 pl->link_config.interface = pl->link_interface;
2199 }
2200
2201 ret = phylink_attach_phy(pl, phy, pl->link_interface);
2202 if (ret < 0)
2203 return ret;
2204
2205 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
2206 if (ret)
2207 phy_detach(phy);
2208
2209 return ret;
2210 }
2211 EXPORT_SYMBOL_GPL(phylink_connect_phy);
2212
2213 /**
2214 * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
2215 * @pl: a pointer to a &struct phylink returned from phylink_create()
2216 * @dn: a pointer to a &struct device_node.
2217 * @flags: PHY-specific flags to communicate to the PHY device driver
2218 *
2219 * Connect the phy specified in the device node @dn to the phylink instance
2220 * specified by @pl. Actions specified in phylink_connect_phy() will be
2221 * performed.
2222 *
2223 * Returns 0 on success or a negative errno.
2224 */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)2225 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
2226 u32 flags)
2227 {
2228 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
2229 }
2230 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
2231
2232 /**
2233 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
2234 * @pl: a pointer to a &struct phylink returned from phylink_create()
2235 * @fwnode: a pointer to a &struct fwnode_handle.
2236 * @flags: PHY-specific flags to communicate to the PHY device driver
2237 *
2238 * Connect the phy specified @fwnode to the phylink instance specified
2239 * by @pl.
2240 *
2241 * Returns 0 on success or a negative errno.
2242 */
phylink_fwnode_phy_connect(struct phylink * pl,const struct fwnode_handle * fwnode,u32 flags)2243 int phylink_fwnode_phy_connect(struct phylink *pl,
2244 const struct fwnode_handle *fwnode,
2245 u32 flags)
2246 {
2247 struct fwnode_handle *phy_fwnode;
2248 struct phy_device *phy_dev;
2249 int ret;
2250
2251 /* Fixed links and 802.3z are handled without needing a PHY */
2252 if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2253 (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2254 phy_interface_mode_is_8023z(pl->link_interface)))
2255 return 0;
2256
2257 phy_fwnode = fwnode_get_phy_node(fwnode);
2258 if (IS_ERR(phy_fwnode)) {
2259 if (pl->cfg_link_an_mode == MLO_AN_PHY)
2260 return -ENODEV;
2261 return 0;
2262 }
2263
2264 phy_dev = fwnode_phy_find_device(phy_fwnode);
2265 /* We're done with the phy_node handle */
2266 fwnode_handle_put(phy_fwnode);
2267 if (!phy_dev)
2268 return -ENODEV;
2269
2270 /* Use PHY device/driver interface */
2271 if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2272 pl->link_interface = phy_dev->interface;
2273 pl->link_config.interface = pl->link_interface;
2274 }
2275
2276 if (pl->config->mac_requires_rxc)
2277 flags |= PHY_F_RXC_ALWAYS_ON;
2278
2279 ret = phy_attach_direct(pl->netdev, phy_dev, flags,
2280 pl->link_interface);
2281 phy_device_free(phy_dev);
2282 if (ret)
2283 return ret;
2284
2285 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
2286 if (ret)
2287 phy_detach(phy_dev);
2288
2289 return ret;
2290 }
2291 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
2292
2293 /**
2294 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
2295 * instance.
2296 * @pl: a pointer to a &struct phylink returned from phylink_create()
2297 *
2298 * Disconnect any current PHY from the phylink instance described by @pl.
2299 */
phylink_disconnect_phy(struct phylink * pl)2300 void phylink_disconnect_phy(struct phylink *pl)
2301 {
2302 struct phy_device *phy;
2303
2304 ASSERT_RTNL();
2305
2306 phy = pl->phydev;
2307 if (phy) {
2308 mutex_lock(&phy->lock);
2309 mutex_lock(&pl->state_mutex);
2310 pl->phydev = NULL;
2311 pl->phy_enable_tx_lpi = false;
2312 pl->mac_tx_clk_stop = false;
2313 mutex_unlock(&pl->state_mutex);
2314 mutex_unlock(&phy->lock);
2315 flush_work(&pl->resolve);
2316
2317 phy_disconnect(phy);
2318 }
2319 }
2320 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2321
phylink_link_changed(struct phylink * pl,bool up,const char * what)2322 static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2323 {
2324 if (!up)
2325 pl->link_failed = true;
2326 phylink_run_resolve(pl);
2327 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2328 }
2329
2330 /**
2331 * phylink_mac_change() - notify phylink of a change in MAC state
2332 * @pl: a pointer to a &struct phylink returned from phylink_create()
2333 * @up: indicates whether the link is currently up.
2334 *
2335 * The MAC driver should call this driver when the state of its link
2336 * changes (eg, link failure, new negotiation results, etc.)
2337 */
phylink_mac_change(struct phylink * pl,bool up)2338 void phylink_mac_change(struct phylink *pl, bool up)
2339 {
2340 phylink_link_changed(pl, up, "mac");
2341 }
2342 EXPORT_SYMBOL_GPL(phylink_mac_change);
2343
2344 /**
2345 * phylink_pcs_change() - notify phylink of a change to PCS link state
2346 * @pcs: pointer to &struct phylink_pcs
2347 * @up: indicates whether the link is currently up.
2348 *
2349 * The PCS driver should call this when the state of its link changes
2350 * (e.g. link failure, new negotiation results, etc.) Note: it should
2351 * not determine "up" by reading the BMSR. If in doubt about the link
2352 * state at interrupt time, then pass true if pcs_get_state() returns
2353 * the latched link-down state, otherwise pass false.
2354 */
phylink_pcs_change(struct phylink_pcs * pcs,bool up)2355 void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2356 {
2357 struct phylink *pl = pcs->phylink;
2358
2359 if (pl)
2360 phylink_link_changed(pl, up, "pcs");
2361 }
2362 EXPORT_SYMBOL_GPL(phylink_pcs_change);
2363
phylink_link_handler(int irq,void * data)2364 static irqreturn_t phylink_link_handler(int irq, void *data)
2365 {
2366 struct phylink *pl = data;
2367
2368 phylink_run_resolve(pl);
2369
2370 return IRQ_HANDLED;
2371 }
2372
2373 /**
2374 * phylink_start() - start a phylink instance
2375 * @pl: a pointer to a &struct phylink returned from phylink_create()
2376 *
2377 * Start the phylink instance specified by @pl, configuring the MAC for the
2378 * desired link mode(s) and negotiation style. This should be called from the
2379 * network device driver's &struct net_device_ops ndo_open() method.
2380 */
phylink_start(struct phylink * pl)2381 void phylink_start(struct phylink *pl)
2382 {
2383 bool poll = false;
2384
2385 ASSERT_RTNL();
2386
2387 phylink_info(pl, "configuring for %s/%s link mode\n",
2388 phylink_an_mode_str(pl->req_link_an_mode),
2389 phy_modes(pl->link_config.interface));
2390
2391 /* Always set the carrier off */
2392 if (pl->netdev)
2393 netif_carrier_off(pl->netdev);
2394
2395 pl->pcs_state = PCS_STATE_STARTING;
2396
2397 /* Apply the link configuration to the MAC when starting. This allows
2398 * a fixed-link to start with the correct parameters, and also
2399 * ensures that we set the appropriate advertisement for Serdes links.
2400 *
2401 * Restart autonegotiation if using 802.3z to ensure that the link
2402 * parameters are properly negotiated. This is necessary for DSA
2403 * switches using 802.3z negotiation to ensure they see our modes.
2404 */
2405 phylink_mac_initial_config(pl, true);
2406
2407 pl->pcs_state = PCS_STATE_STARTED;
2408
2409 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2410
2411 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2412 int irq = gpiod_to_irq(pl->link_gpio);
2413
2414 if (irq > 0) {
2415 if (!request_irq(irq, phylink_link_handler,
2416 IRQF_TRIGGER_RISING |
2417 IRQF_TRIGGER_FALLING,
2418 "netdev link", pl))
2419 pl->link_irq = irq;
2420 else
2421 irq = 0;
2422 }
2423 if (irq <= 0)
2424 poll = true;
2425 }
2426
2427 if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2428 poll |= pl->config->poll_fixed_state;
2429
2430 if (poll)
2431 mod_timer(&pl->link_poll, jiffies + HZ);
2432 if (pl->phydev)
2433 phy_start(pl->phydev);
2434 if (pl->sfp_bus)
2435 sfp_upstream_start(pl->sfp_bus);
2436 }
2437 EXPORT_SYMBOL_GPL(phylink_start);
2438
2439 /**
2440 * phylink_stop() - stop a phylink instance
2441 * @pl: a pointer to a &struct phylink returned from phylink_create()
2442 *
2443 * Stop the phylink instance specified by @pl. This should be called from the
2444 * network device driver's &struct net_device_ops ndo_stop() method. The
2445 * network device's carrier state should not be changed prior to calling this
2446 * function.
2447 *
2448 * This will synchronously bring down the link if the link is not already
2449 * down (in other words, it will trigger a mac_link_down() method call.)
2450 */
phylink_stop(struct phylink * pl)2451 void phylink_stop(struct phylink *pl)
2452 {
2453 ASSERT_RTNL();
2454
2455 if (pl->sfp_bus)
2456 sfp_upstream_stop(pl->sfp_bus);
2457 if (pl->phydev)
2458 phy_stop(pl->phydev);
2459 timer_delete_sync(&pl->link_poll);
2460 if (pl->link_irq) {
2461 free_irq(pl->link_irq, pl);
2462 pl->link_irq = 0;
2463 }
2464
2465 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2466
2467 pl->pcs_state = PCS_STATE_DOWN;
2468
2469 phylink_pcs_disable(pl->pcs);
2470 }
2471 EXPORT_SYMBOL_GPL(phylink_stop);
2472
2473 /**
2474 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI
2475 * @pl: a pointer to a &struct phylink returned from phylink_create()
2476 *
2477 * Disable the PHY's ability to stop the receive clock while the receive path
2478 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block()
2479 * are balanced by calls to phylink_rx_clk_stop_unblock().
2480 */
phylink_rx_clk_stop_block(struct phylink * pl)2481 void phylink_rx_clk_stop_block(struct phylink *pl)
2482 {
2483 ASSERT_RTNL();
2484
2485 if (pl->mac_rx_clk_stop_blocked == U8_MAX) {
2486 phylink_warn(pl, "%s called too many times - ignoring\n",
2487 __func__);
2488 dump_stack();
2489 return;
2490 }
2491
2492 /* Disable PHY receive clock stop if this is the first time this
2493 * function has been called and clock-stop was previously enabled.
2494 */
2495 if (pl->mac_rx_clk_stop_blocked++ == 0 &&
2496 pl->mac_supports_eee_ops && pl->phydev &&
2497 pl->config->eee_rx_clk_stop_enable)
2498 phy_eee_rx_clock_stop(pl->phydev, false);
2499 }
2500 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block);
2501
2502 /**
2503 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock
2504 * @pl: a pointer to a &struct phylink returned from phylink_create()
2505 *
2506 * All calls to phylink_rx_clk_stop_block() must be balanced with a
2507 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs
2508 * ability to stop the receive clock when the receive path is in EEE LPI mode.
2509 */
phylink_rx_clk_stop_unblock(struct phylink * pl)2510 void phylink_rx_clk_stop_unblock(struct phylink *pl)
2511 {
2512 ASSERT_RTNL();
2513
2514 if (pl->mac_rx_clk_stop_blocked == 0) {
2515 phylink_warn(pl, "%s called too many times - ignoring\n",
2516 __func__);
2517 dump_stack();
2518 return;
2519 }
2520
2521 /* Re-enable PHY receive clock stop if the number of unblocks matches
2522 * the number of calls to the block function above.
2523 */
2524 if (--pl->mac_rx_clk_stop_blocked == 0 &&
2525 pl->mac_supports_eee_ops && pl->phydev &&
2526 pl->config->eee_rx_clk_stop_enable)
2527 phy_eee_rx_clock_stop(pl->phydev, true);
2528 }
2529 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock);
2530
2531 /**
2532 * phylink_suspend() - handle a network device suspend event
2533 * @pl: a pointer to a &struct phylink returned from phylink_create()
2534 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2535 *
2536 * Handle a network device suspend event. There are several cases:
2537 *
2538 * - If Wake-on-Lan is not active, we can bring down the link between
2539 * the MAC and PHY by calling phylink_stop().
2540 * - If Wake-on-Lan is active, and being handled only by the PHY, we
2541 * can also bring down the link between the MAC and PHY.
2542 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2543 * still needs to receive packets, so we can not bring the link down.
2544 */
phylink_suspend(struct phylink * pl,bool mac_wol)2545 void phylink_suspend(struct phylink *pl, bool mac_wol)
2546 {
2547 ASSERT_RTNL();
2548
2549 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) {
2550 /* Wake-on-Lan enabled, MAC handling */
2551 mutex_lock(&pl->state_mutex);
2552
2553 /* Stop the resolver bringing the link up */
2554 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2555
2556 pl->suspend_link_up = phylink_link_is_up(pl);
2557 if (pl->suspend_link_up) {
2558 /* Disable the carrier, to prevent transmit timeouts,
2559 * but one would hope all packets have been sent. This
2560 * also means phylink_resolve() will do nothing.
2561 */
2562 if (pl->netdev)
2563 netif_carrier_off(pl->netdev);
2564 pl->old_link_state = false;
2565 }
2566
2567 /* We do not call mac_link_down() here as we want the
2568 * link to remain up to receive the WoL packets.
2569 */
2570 mutex_unlock(&pl->state_mutex);
2571 } else {
2572 phylink_stop(pl);
2573 }
2574 }
2575 EXPORT_SYMBOL_GPL(phylink_suspend);
2576
2577 /**
2578 * phylink_prepare_resume() - prepare to resume a network device
2579 * @pl: a pointer to a &struct phylink returned from phylink_create()
2580 *
2581 * Optional, but if called must be called prior to phylink_resume().
2582 *
2583 * Prepare to resume a network device, preparing the PHY as necessary.
2584 */
phylink_prepare_resume(struct phylink * pl)2585 void phylink_prepare_resume(struct phylink *pl)
2586 {
2587 struct phy_device *phydev = pl->phydev;
2588
2589 ASSERT_RTNL();
2590
2591 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock
2592 * when PDOWN is set. However, some MACs require RXC to be running
2593 * in order to resume. If the MAC requires RXC, and we have a PHY,
2594 * then resume the PHY. Note that 802.3 allows PHYs 500ms before
2595 * the clock meets requirements. We do not implement this delay.
2596 */
2597 if (pl->config->mac_requires_rxc && phydev && phydev->suspended)
2598 phy_resume(phydev);
2599 }
2600 EXPORT_SYMBOL_GPL(phylink_prepare_resume);
2601
2602 /**
2603 * phylink_resume() - handle a network device resume event
2604 * @pl: a pointer to a &struct phylink returned from phylink_create()
2605 *
2606 * Undo the effects of phylink_suspend(), returning the link to an
2607 * operational state.
2608 */
phylink_resume(struct phylink * pl)2609 void phylink_resume(struct phylink *pl)
2610 {
2611 ASSERT_RTNL();
2612
2613 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2614 /* Wake-on-Lan enabled, MAC handling */
2615
2616 if (pl->suspend_link_up) {
2617 /* Call mac_link_down() so we keep the overall state
2618 * balanced. Do this under the state_mutex lock for
2619 * consistency. This will cause a "Link Down" message
2620 * to be printed during resume, which is harmless -
2621 * the true link state will be printed when we run a
2622 * resolve.
2623 */
2624 mutex_lock(&pl->state_mutex);
2625 phylink_link_down(pl);
2626 mutex_unlock(&pl->state_mutex);
2627 }
2628
2629 /* Re-apply the link parameters so that all the settings get
2630 * restored to the MAC.
2631 */
2632 phylink_mac_initial_config(pl, true);
2633
2634 /* Re-enable and re-resolve the link parameters */
2635 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2636 } else {
2637 phylink_start(pl);
2638 }
2639 }
2640 EXPORT_SYMBOL_GPL(phylink_resume);
2641
2642 /**
2643 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2644 * @pl: a pointer to a &struct phylink returned from phylink_create()
2645 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2646 *
2647 * Read the wake on lan parameters from the PHY attached to the phylink
2648 * instance specified by @pl. If no PHY is currently attached, report no
2649 * support for wake on lan.
2650 */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2651 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2652 {
2653 ASSERT_RTNL();
2654
2655 wol->supported = 0;
2656 wol->wolopts = 0;
2657
2658 if (pl->phydev)
2659 phy_ethtool_get_wol(pl->phydev, wol);
2660 }
2661 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2662
2663 /**
2664 * phylink_ethtool_set_wol() - set wake on lan parameters
2665 * @pl: a pointer to a &struct phylink returned from phylink_create()
2666 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2667 *
2668 * Set the wake on lan parameters for the PHY attached to the phylink
2669 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2670 * error.
2671 *
2672 * Returns zero on success or negative errno code.
2673 */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)2674 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2675 {
2676 int ret = -EOPNOTSUPP;
2677
2678 ASSERT_RTNL();
2679
2680 if (pl->phydev)
2681 ret = phy_ethtool_set_wol(pl->phydev, wol);
2682
2683 return ret;
2684 }
2685 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2686
phylink_sfp_select_interface(struct phylink * pl,const unsigned long * link_modes)2687 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl,
2688 const unsigned long *link_modes)
2689 {
2690 phy_interface_t interface;
2691
2692 interface = sfp_select_interface(pl->sfp_bus, link_modes);
2693 if (interface == PHY_INTERFACE_MODE_NA) {
2694 phylink_err(pl,
2695 "selection of interface failed, advertisement %*pb\n",
2696 __ETHTOOL_LINK_MODE_MASK_NBITS,
2697 link_modes);
2698 return interface;
2699 }
2700
2701 if (!test_bit(interface, pl->config->supported_interfaces)) {
2702 phylink_err(pl,
2703 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n",
2704 phy_modes(interface), interface,
2705 (int)PHY_INTERFACE_MODE_MAX,
2706 pl->config->supported_interfaces);
2707 return PHY_INTERFACE_MODE_NA;
2708 }
2709
2710 return interface;
2711 }
2712
phylink_sfp_select_interface_speed(struct phylink * pl,u32 speed)2713 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl,
2714 u32 speed)
2715 {
2716 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA;
2717 phy_interface_t interface;
2718 u32 max_speed;
2719 int i;
2720
2721 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) {
2722 interface = phylink_sfp_interface_preference[i];
2723 if (!test_bit(interface, pl->sfp_interfaces))
2724 continue;
2725
2726 max_speed = phylink_interface_max_speed(interface);
2727
2728 /* The logic here is: if speed == max_speed, then we've found
2729 * the best interface. Otherwise we find the interface that
2730 * can just support the requested speed.
2731 */
2732 if (max_speed >= speed)
2733 best_interface = interface;
2734
2735 if (max_speed <= speed)
2736 break;
2737 }
2738
2739 if (best_interface == PHY_INTERFACE_MODE_NA)
2740 phylink_err(pl, "selection of interface failed, speed %u\n",
2741 speed);
2742
2743 return best_interface;
2744 }
2745
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)2746 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2747 {
2748 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2749
2750 linkmode_zero(mask);
2751 phylink_set_port_modes(mask);
2752
2753 linkmode_and(dst, dst, mask);
2754 linkmode_or(dst, dst, b);
2755 }
2756
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)2757 static void phylink_get_ksettings(const struct phylink_link_state *state,
2758 struct ethtool_link_ksettings *kset)
2759 {
2760 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2761 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2762 if (kset->base.rate_matching == RATE_MATCH_NONE) {
2763 kset->base.speed = state->speed;
2764 kset->base.duplex = state->duplex;
2765 }
2766 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2767 state->advertising) ?
2768 AUTONEG_ENABLE : AUTONEG_DISABLE;
2769 }
2770
2771 /**
2772 * phylink_ethtool_ksettings_get() - get the current link settings
2773 * @pl: a pointer to a &struct phylink returned from phylink_create()
2774 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2775 *
2776 * Read the current link settings for the phylink instance specified by @pl.
2777 * This will be the link settings read from the MAC, PHY or fixed link
2778 * settings depending on the current negotiation mode.
2779 */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)2780 int phylink_ethtool_ksettings_get(struct phylink *pl,
2781 struct ethtool_link_ksettings *kset)
2782 {
2783 struct phylink_link_state link_state;
2784
2785 ASSERT_RTNL();
2786
2787 if (pl->phydev)
2788 phy_ethtool_ksettings_get(pl->phydev, kset);
2789 else
2790 kset->base.port = pl->link_port;
2791
2792 linkmode_copy(kset->link_modes.supported, pl->supported);
2793
2794 switch (pl->act_link_an_mode) {
2795 case MLO_AN_FIXED:
2796 /* We are using fixed settings. Report these as the
2797 * current link settings - and note that these also
2798 * represent the supported speeds/duplex/pause modes.
2799 */
2800 phylink_get_fixed_state(pl, &link_state);
2801 phylink_get_ksettings(&link_state, kset);
2802 break;
2803
2804 case MLO_AN_INBAND:
2805 /* If there is a phy attached, then use the reported
2806 * settings from the phy with no modification.
2807 */
2808 if (pl->phydev)
2809 break;
2810
2811 phylink_mac_pcs_get_state(pl, &link_state);
2812
2813 /* The MAC is reporting the link results from its own PCS
2814 * layer via in-band status. Report these as the current
2815 * link settings.
2816 */
2817 phylink_get_ksettings(&link_state, kset);
2818 break;
2819 }
2820
2821 return 0;
2822 }
2823 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2824
phylink_validate_pcs_inband_autoneg(struct phylink * pl,phy_interface_t interface,unsigned long * adv)2825 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl,
2826 phy_interface_t interface,
2827 unsigned long *adv)
2828 {
2829 unsigned int inband = phylink_inband_caps(pl, interface);
2830 unsigned int mask;
2831
2832 /* If the PCS doesn't implement inband support, be permissive. */
2833 if (!inband)
2834 return true;
2835
2836 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv))
2837 mask = LINK_INBAND_ENABLE;
2838 else
2839 mask = LINK_INBAND_DISABLE;
2840
2841 /* Check whether the PCS implements the required mode */
2842 return !!(inband & mask);
2843 }
2844
2845 /**
2846 * phylink_ethtool_ksettings_set() - set the link settings
2847 * @pl: a pointer to a &struct phylink returned from phylink_create()
2848 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2849 */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)2850 int phylink_ethtool_ksettings_set(struct phylink *pl,
2851 const struct ethtool_link_ksettings *kset)
2852 {
2853 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2854 const struct link_capabilities *c;
2855 struct phylink_link_state config;
2856
2857 ASSERT_RTNL();
2858
2859 if (pl->phydev) {
2860 struct ethtool_link_ksettings phy_kset = *kset;
2861
2862 linkmode_and(phy_kset.link_modes.advertising,
2863 phy_kset.link_modes.advertising,
2864 pl->supported);
2865
2866 /* We can rely on phylib for this update; we also do not need
2867 * to update the pl->link_config settings:
2868 * - the configuration returned via ksettings_get() will come
2869 * from phylib whenever a PHY is present.
2870 * - link_config.interface will be updated by the PHY calling
2871 * back via phylink_phy_change() and a subsequent resolve.
2872 * - initial link configuration for PHY mode comes from the
2873 * last phy state updated via phylink_phy_change().
2874 * - other configuration changes (e.g. pause modes) are
2875 * performed directly via phylib.
2876 * - if in in-band mode with a PHY, the link configuration
2877 * is passed on the link from the PHY, and all of
2878 * link_config.{speed,duplex,an_enabled,pause} are not used.
2879 * - the only possible use would be link_config.advertising
2880 * pause modes when in 1000base-X mode with a PHY, but in
2881 * the presence of a PHY, this should not be changed as that
2882 * should be determined from the media side advertisement.
2883 */
2884 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2885 }
2886
2887 config = pl->link_config;
2888 /* Mask out unsupported advertisements */
2889 linkmode_and(config.advertising, kset->link_modes.advertising,
2890 pl->supported);
2891
2892 /* FIXME: should we reject autoneg if phy/mac does not support it? */
2893 switch (kset->base.autoneg) {
2894 case AUTONEG_DISABLE:
2895 /* Autonegotiation disabled, select a suitable speed and
2896 * duplex.
2897 */
2898 c = phy_caps_lookup(kset->base.speed, kset->base.duplex,
2899 pl->supported, false);
2900 if (!c)
2901 return -EINVAL;
2902
2903 /* If we have a fixed link, refuse to change link parameters.
2904 * If the link parameters match, accept them but do nothing.
2905 */
2906 if (pl->req_link_an_mode == MLO_AN_FIXED) {
2907 if (c->speed != pl->link_config.speed ||
2908 c->duplex != pl->link_config.duplex)
2909 return -EINVAL;
2910 return 0;
2911 }
2912
2913 config.speed = c->speed;
2914 config.duplex = c->duplex;
2915 break;
2916
2917 case AUTONEG_ENABLE:
2918 /* If we have a fixed link, allow autonegotiation (since that
2919 * is our default case) but do not allow the advertisement to
2920 * be changed. If the advertisement matches, simply return.
2921 */
2922 if (pl->req_link_an_mode == MLO_AN_FIXED) {
2923 if (!linkmode_equal(config.advertising,
2924 pl->link_config.advertising))
2925 return -EINVAL;
2926 return 0;
2927 }
2928
2929 config.speed = SPEED_UNKNOWN;
2930 config.duplex = DUPLEX_UNKNOWN;
2931 break;
2932
2933 default:
2934 return -EINVAL;
2935 }
2936
2937 /* We have ruled out the case with a PHY attached, and the
2938 * fixed-link cases. All that is left are in-band links.
2939 */
2940 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2941 kset->base.autoneg == AUTONEG_ENABLE);
2942
2943 /* If this link is with an SFP, ensure that changes to advertised modes
2944 * also cause the associated interface to be selected such that the
2945 * link can be configured correctly.
2946 */
2947 if (pl->sfp_bus) {
2948 if (kset->base.autoneg == AUTONEG_ENABLE)
2949 config.interface =
2950 phylink_sfp_select_interface(pl,
2951 config.advertising);
2952 else
2953 config.interface =
2954 phylink_sfp_select_interface_speed(pl,
2955 config.speed);
2956 if (config.interface == PHY_INTERFACE_MODE_NA)
2957 return -EINVAL;
2958
2959 /* Revalidate with the selected interface */
2960 linkmode_copy(support, pl->supported);
2961 if (phylink_validate(pl, support, &config)) {
2962 phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2963 phylink_an_mode_str(pl->req_link_an_mode),
2964 phy_modes(config.interface),
2965 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2966 return -EINVAL;
2967 }
2968 } else {
2969 /* Validate without changing the current supported mask. */
2970 linkmode_copy(support, pl->supported);
2971 if (phylink_validate(pl, support, &config))
2972 return -EINVAL;
2973 }
2974
2975 /* If autonegotiation is enabled, we must have an advertisement */
2976 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2977 config.advertising) &&
2978 phylink_is_empty_linkmode(config.advertising))
2979 return -EINVAL;
2980
2981 /* Validate the autonegotiation state. We don't have a PHY in this
2982 * situation, so the PCS is the media-facing entity.
2983 */
2984 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface,
2985 config.advertising))
2986 return -EINVAL;
2987
2988 mutex_lock(&pl->state_mutex);
2989 pl->link_config.speed = config.speed;
2990 pl->link_config.duplex = config.duplex;
2991
2992 if (pl->link_config.interface != config.interface) {
2993 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2994 /* We need to force the link down, then change the interface */
2995 if (pl->old_link_state) {
2996 phylink_link_down(pl);
2997 pl->old_link_state = false;
2998 }
2999 if (!test_bit(PHYLINK_DISABLE_STOPPED,
3000 &pl->phylink_disable_state))
3001 phylink_major_config(pl, false, &config);
3002 pl->link_config.interface = config.interface;
3003 linkmode_copy(pl->link_config.advertising, config.advertising);
3004 } else if (!linkmode_equal(pl->link_config.advertising,
3005 config.advertising)) {
3006 linkmode_copy(pl->link_config.advertising, config.advertising);
3007 phylink_change_inband_advert(pl);
3008 }
3009 mutex_unlock(&pl->state_mutex);
3010
3011 return 0;
3012 }
3013 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
3014
3015 /**
3016 * phylink_ethtool_nway_reset() - restart negotiation
3017 * @pl: a pointer to a &struct phylink returned from phylink_create()
3018 *
3019 * Restart negotiation for the phylink instance specified by @pl. This will
3020 * cause any attached phy to restart negotiation with the link partner, and
3021 * if the MAC is in a BaseX mode, the MAC will also be requested to restart
3022 * negotiation.
3023 *
3024 * Returns zero on success, or negative error code.
3025 */
phylink_ethtool_nway_reset(struct phylink * pl)3026 int phylink_ethtool_nway_reset(struct phylink *pl)
3027 {
3028 int ret = 0;
3029
3030 ASSERT_RTNL();
3031
3032 if (pl->phydev)
3033 ret = phy_restart_aneg(pl->phydev);
3034 phylink_pcs_an_restart(pl);
3035
3036 return ret;
3037 }
3038 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
3039
3040 /**
3041 * phylink_ethtool_get_pauseparam() - get the current pause parameters
3042 * @pl: a pointer to a &struct phylink returned from phylink_create()
3043 * @pause: a pointer to a &struct ethtool_pauseparam
3044 */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)3045 void phylink_ethtool_get_pauseparam(struct phylink *pl,
3046 struct ethtool_pauseparam *pause)
3047 {
3048 ASSERT_RTNL();
3049
3050 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
3051 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
3052 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
3053 }
3054 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
3055
3056 /**
3057 * phylink_ethtool_set_pauseparam() - set the current pause parameters
3058 * @pl: a pointer to a &struct phylink returned from phylink_create()
3059 * @pause: a pointer to a &struct ethtool_pauseparam
3060 */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)3061 int phylink_ethtool_set_pauseparam(struct phylink *pl,
3062 struct ethtool_pauseparam *pause)
3063 {
3064 struct phylink_link_state *config = &pl->link_config;
3065 bool manual_changed;
3066 int pause_state;
3067
3068 ASSERT_RTNL();
3069
3070 if (pl->req_link_an_mode == MLO_AN_FIXED)
3071 return -EOPNOTSUPP;
3072
3073 if (!phylink_test(pl->supported, Pause) &&
3074 !phylink_test(pl->supported, Asym_Pause))
3075 return -EOPNOTSUPP;
3076
3077 if (!phylink_test(pl->supported, Asym_Pause) &&
3078 pause->rx_pause != pause->tx_pause)
3079 return -EINVAL;
3080
3081 pause_state = 0;
3082 if (pause->autoneg)
3083 pause_state |= MLO_PAUSE_AN;
3084 if (pause->rx_pause)
3085 pause_state |= MLO_PAUSE_RX;
3086 if (pause->tx_pause)
3087 pause_state |= MLO_PAUSE_TX;
3088
3089 mutex_lock(&pl->state_mutex);
3090 /*
3091 * See the comments for linkmode_set_pause(), wrt the deficiencies
3092 * with the current implementation. A solution to this issue would
3093 * be:
3094 * ethtool Local device
3095 * rx tx Pause AsymDir
3096 * 0 0 0 0
3097 * 1 0 1 1
3098 * 0 1 0 1
3099 * 1 1 1 1
3100 * and then use the ethtool rx/tx enablement status to mask the
3101 * rx/tx pause resolution.
3102 */
3103 linkmode_set_pause(config->advertising, pause->tx_pause,
3104 pause->rx_pause);
3105
3106 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
3107 (!(pause_state & MLO_PAUSE_AN) &&
3108 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
3109
3110 config->pause = pause_state;
3111
3112 /* Update our in-band advertisement, triggering a renegotiation if
3113 * the advertisement changed.
3114 */
3115 if (!pl->phydev)
3116 phylink_change_inband_advert(pl);
3117
3118 mutex_unlock(&pl->state_mutex);
3119
3120 /* If we have a PHY, a change of the pause frame advertisement will
3121 * cause phylib to renegotiate (if AN is enabled) which will in turn
3122 * call our phylink_phy_change() and trigger a resolve. Note that
3123 * we can't hold our state mutex while calling phy_set_asym_pause().
3124 */
3125 if (pl->phydev)
3126 phy_set_asym_pause(pl->phydev, pause->rx_pause,
3127 pause->tx_pause);
3128
3129 /* If the manual pause settings changed, make sure we trigger a
3130 * resolve to update their state; we can not guarantee that the
3131 * link will cycle.
3132 */
3133 if (manual_changed) {
3134 pl->link_failed = true;
3135 phylink_run_resolve(pl);
3136 }
3137
3138 return 0;
3139 }
3140 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
3141
3142 /**
3143 * phylink_get_eee_err() - read the energy efficient ethernet error
3144 * counter
3145 * @pl: a pointer to a &struct phylink returned from phylink_create().
3146 *
3147 * Read the Energy Efficient Ethernet error counter from the PHY associated
3148 * with the phylink instance specified by @pl.
3149 *
3150 * Returns positive error counter value, or negative error code.
3151 */
phylink_get_eee_err(struct phylink * pl)3152 int phylink_get_eee_err(struct phylink *pl)
3153 {
3154 int ret = 0;
3155
3156 ASSERT_RTNL();
3157
3158 if (pl->phydev)
3159 ret = phy_get_eee_err(pl->phydev);
3160
3161 return ret;
3162 }
3163 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
3164
3165 /**
3166 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
3167 * @pl: a pointer to a &struct phylink returned from phylink_create()
3168 * @eee: a pointer to a &struct ethtool_keee for the read parameters
3169 */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_keee * eee)3170 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee)
3171 {
3172 int ret = -EOPNOTSUPP;
3173
3174 ASSERT_RTNL();
3175
3176 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee)
3177 return ret;
3178
3179 if (pl->phydev) {
3180 ret = phy_ethtool_get_eee(pl->phydev, eee);
3181 /* Restrict supported linkmode mask */
3182 if (ret == 0 && pl->mac_supports_eee_ops)
3183 linkmode_and(eee->supported, eee->supported,
3184 pl->supported_lpi);
3185 }
3186
3187 return ret;
3188 }
3189 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
3190
3191 /**
3192 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
3193 * @pl: a pointer to a &struct phylink returned from phylink_create()
3194 * @eee: a pointer to a &struct ethtool_keee for the desired parameters
3195 */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_keee * eee)3196 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee)
3197 {
3198 bool mac_eee = pl->mac_supports_eee;
3199 int ret = -EOPNOTSUPP;
3200
3201 ASSERT_RTNL();
3202
3203 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n",
3204 mac_eee ? "supports" : "does not support",
3205 eee->eee_enabled ? ", enabled" : "",
3206 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised,
3207 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer);
3208
3209 if (pl->mac_supports_eee_ops && !mac_eee)
3210 return ret;
3211
3212 if (pl->phydev) {
3213 /* Restrict advertisement mask */
3214 if (pl->mac_supports_eee_ops)
3215 linkmode_and(eee->advertised, eee->advertised,
3216 pl->supported_lpi);
3217 ret = phy_ethtool_set_eee(pl->phydev, eee);
3218 if (ret == 0)
3219 eee_to_eeecfg(&pl->eee_cfg, eee);
3220 }
3221
3222 return ret;
3223 }
3224 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
3225
3226 /* This emulates MII registers for a fixed-mode phy operating as per the
3227 * passed in state. "aneg" defines if we report negotiation is possible.
3228 *
3229 * FIXME: should deal with negotiation state too.
3230 */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)3231 static int phylink_mii_emul_read(unsigned int reg,
3232 struct phylink_link_state *state)
3233 {
3234 struct fixed_phy_status fs;
3235 unsigned long *lpa = state->lp_advertising;
3236 int val;
3237
3238 fs.link = state->link;
3239 fs.speed = state->speed;
3240 fs.duplex = state->duplex;
3241 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
3242 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
3243
3244 val = swphy_read_reg(reg, &fs);
3245 if (reg == MII_BMSR) {
3246 if (!state->an_complete)
3247 val &= ~BMSR_ANEGCOMPLETE;
3248 }
3249 return val;
3250 }
3251
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)3252 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
3253 unsigned int reg)
3254 {
3255 struct phy_device *phydev = pl->phydev;
3256 int prtad, devad;
3257
3258 if (mdio_phy_id_is_c45(phy_id)) {
3259 prtad = mdio_phy_id_prtad(phy_id);
3260 devad = mdio_phy_id_devad(phy_id);
3261 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
3262 reg);
3263 }
3264
3265 if (phydev->is_c45) {
3266 switch (reg) {
3267 case MII_BMCR:
3268 case MII_BMSR:
3269 case MII_PHYSID1:
3270 case MII_PHYSID2:
3271 devad = __ffs(phydev->c45_ids.mmds_present);
3272 break;
3273 case MII_ADVERTISE:
3274 case MII_LPA:
3275 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3276 return -EINVAL;
3277 devad = MDIO_MMD_AN;
3278 if (reg == MII_ADVERTISE)
3279 reg = MDIO_AN_ADVERTISE;
3280 else
3281 reg = MDIO_AN_LPA;
3282 break;
3283 default:
3284 return -EINVAL;
3285 }
3286 prtad = phy_id;
3287 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
3288 reg);
3289 }
3290
3291 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
3292 }
3293
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)3294 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
3295 unsigned int reg, unsigned int val)
3296 {
3297 struct phy_device *phydev = pl->phydev;
3298 int prtad, devad;
3299
3300 if (mdio_phy_id_is_c45(phy_id)) {
3301 prtad = mdio_phy_id_prtad(phy_id);
3302 devad = mdio_phy_id_devad(phy_id);
3303 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
3304 reg, val);
3305 }
3306
3307 if (phydev->is_c45) {
3308 switch (reg) {
3309 case MII_BMCR:
3310 case MII_BMSR:
3311 case MII_PHYSID1:
3312 case MII_PHYSID2:
3313 devad = __ffs(phydev->c45_ids.mmds_present);
3314 break;
3315 case MII_ADVERTISE:
3316 case MII_LPA:
3317 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
3318 return -EINVAL;
3319 devad = MDIO_MMD_AN;
3320 if (reg == MII_ADVERTISE)
3321 reg = MDIO_AN_ADVERTISE;
3322 else
3323 reg = MDIO_AN_LPA;
3324 break;
3325 default:
3326 return -EINVAL;
3327 }
3328 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
3329 reg, val);
3330 }
3331
3332 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
3333 }
3334
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)3335 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
3336 unsigned int reg)
3337 {
3338 struct phylink_link_state state;
3339 int val = 0xffff;
3340
3341 switch (pl->act_link_an_mode) {
3342 case MLO_AN_FIXED:
3343 if (phy_id == 0) {
3344 phylink_get_fixed_state(pl, &state);
3345 val = phylink_mii_emul_read(reg, &state);
3346 }
3347 break;
3348
3349 case MLO_AN_PHY:
3350 return -EOPNOTSUPP;
3351
3352 case MLO_AN_INBAND:
3353 if (phy_id == 0) {
3354 phylink_mac_pcs_get_state(pl, &state);
3355 val = phylink_mii_emul_read(reg, &state);
3356 }
3357 break;
3358 }
3359
3360 return val & 0xffff;
3361 }
3362
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)3363 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
3364 unsigned int reg, unsigned int val)
3365 {
3366 switch (pl->act_link_an_mode) {
3367 case MLO_AN_FIXED:
3368 break;
3369
3370 case MLO_AN_PHY:
3371 return -EOPNOTSUPP;
3372
3373 case MLO_AN_INBAND:
3374 break;
3375 }
3376
3377 return 0;
3378 }
3379
3380 /**
3381 * phylink_mii_ioctl() - generic mii ioctl interface
3382 * @pl: a pointer to a &struct phylink returned from phylink_create()
3383 * @ifr: a pointer to a &struct ifreq for socket ioctls
3384 * @cmd: ioctl cmd to execute
3385 *
3386 * Perform the specified MII ioctl on the PHY attached to the phylink instance
3387 * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
3388 *
3389 * Returns: zero on success or negative error code.
3390 *
3391 * %SIOCGMIIPHY:
3392 * read register from the current PHY.
3393 * %SIOCGMIIREG:
3394 * read register from the specified PHY.
3395 * %SIOCSMIIREG:
3396 * set a register on the specified PHY.
3397 */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)3398 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
3399 {
3400 struct mii_ioctl_data *mii = if_mii(ifr);
3401 int ret;
3402
3403 ASSERT_RTNL();
3404
3405 if (pl->phydev) {
3406 /* PHYs only exist for MLO_AN_PHY and SGMII */
3407 switch (cmd) {
3408 case SIOCGMIIPHY:
3409 mii->phy_id = pl->phydev->mdio.addr;
3410 fallthrough;
3411
3412 case SIOCGMIIREG:
3413 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
3414 if (ret >= 0) {
3415 mii->val_out = ret;
3416 ret = 0;
3417 }
3418 break;
3419
3420 case SIOCSMIIREG:
3421 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
3422 mii->val_in);
3423 break;
3424
3425 default:
3426 ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
3427 break;
3428 }
3429 } else {
3430 switch (cmd) {
3431 case SIOCGMIIPHY:
3432 mii->phy_id = 0;
3433 fallthrough;
3434
3435 case SIOCGMIIREG:
3436 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
3437 if (ret >= 0) {
3438 mii->val_out = ret;
3439 ret = 0;
3440 }
3441 break;
3442
3443 case SIOCSMIIREG:
3444 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
3445 mii->val_in);
3446 break;
3447
3448 default:
3449 ret = -EOPNOTSUPP;
3450 break;
3451 }
3452 }
3453
3454 return ret;
3455 }
3456 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
3457
3458 /**
3459 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
3460 * link partners
3461 * @pl: a pointer to a &struct phylink returned from phylink_create()
3462 * @sync: perform action synchronously
3463 *
3464 * If we have a PHY that is not part of a SFP module, then set the speed
3465 * as described in the phy_speed_down() function. Please see this function
3466 * for a description of the @sync parameter.
3467 *
3468 * Returns zero if there is no PHY, otherwise as per phy_speed_down().
3469 */
phylink_speed_down(struct phylink * pl,bool sync)3470 int phylink_speed_down(struct phylink *pl, bool sync)
3471 {
3472 int ret = 0;
3473
3474 ASSERT_RTNL();
3475
3476 if (!pl->sfp_bus && pl->phydev)
3477 ret = phy_speed_down(pl->phydev, sync);
3478
3479 return ret;
3480 }
3481 EXPORT_SYMBOL_GPL(phylink_speed_down);
3482
3483 /**
3484 * phylink_speed_up() - restore the advertised speeds prior to the call to
3485 * phylink_speed_down()
3486 * @pl: a pointer to a &struct phylink returned from phylink_create()
3487 *
3488 * If we have a PHY that is not part of a SFP module, then restore the
3489 * PHY speeds as per phy_speed_up().
3490 *
3491 * Returns zero if there is no PHY, otherwise as per phy_speed_up().
3492 */
phylink_speed_up(struct phylink * pl)3493 int phylink_speed_up(struct phylink *pl)
3494 {
3495 int ret = 0;
3496
3497 ASSERT_RTNL();
3498
3499 if (!pl->sfp_bus && pl->phydev)
3500 ret = phy_speed_up(pl->phydev);
3501
3502 return ret;
3503 }
3504 EXPORT_SYMBOL_GPL(phylink_speed_up);
3505
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)3506 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3507 {
3508 struct phylink *pl = upstream;
3509
3510 pl->netdev->sfp_bus = bus;
3511 }
3512
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)3513 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3514 {
3515 struct phylink *pl = upstream;
3516
3517 pl->netdev->sfp_bus = NULL;
3518 }
3519
phylink_choose_sfp_interface(struct phylink * pl,const unsigned long * intf)3520 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3521 const unsigned long *intf)
3522 {
3523 phy_interface_t interface;
3524 size_t i;
3525
3526 interface = PHY_INTERFACE_MODE_NA;
3527 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3528 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3529 interface = phylink_sfp_interface_preference[i];
3530 break;
3531 }
3532
3533 return interface;
3534 }
3535
phylink_sfp_set_config(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state,bool changed)3536 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported,
3537 struct phylink_link_state *state,
3538 bool changed)
3539 {
3540 u8 mode = MLO_AN_INBAND;
3541
3542 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3543 phylink_an_mode_str(mode), phy_modes(state->interface),
3544 __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3545
3546 if (!linkmode_equal(pl->supported, supported)) {
3547 linkmode_copy(pl->supported, supported);
3548 changed = true;
3549 }
3550
3551 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3552 linkmode_copy(pl->link_config.advertising, state->advertising);
3553 changed = true;
3554 }
3555
3556 if (pl->req_link_an_mode != mode ||
3557 pl->link_config.interface != state->interface) {
3558 pl->req_link_an_mode = mode;
3559 pl->link_config.interface = state->interface;
3560
3561 changed = true;
3562
3563 phylink_info(pl, "switched to %s/%s link mode\n",
3564 phylink_an_mode_str(mode),
3565 phy_modes(state->interface));
3566 }
3567
3568 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3569 &pl->phylink_disable_state))
3570 phylink_mac_initial_config(pl, false);
3571 }
3572
phylink_sfp_config_phy(struct phylink * pl,struct phy_device * phy)3573 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy)
3574 {
3575 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3576 struct phylink_link_state config;
3577 int ret;
3578
3579 /* We're not using pl->sfp_interfaces, so clear it. */
3580 phy_interface_zero(pl->sfp_interfaces);
3581 linkmode_copy(support, phy->supported);
3582
3583 memset(&config, 0, sizeof(config));
3584 linkmode_copy(config.advertising, phy->advertising);
3585 config.interface = PHY_INTERFACE_MODE_NA;
3586 config.speed = SPEED_UNKNOWN;
3587 config.duplex = DUPLEX_UNKNOWN;
3588 config.pause = MLO_PAUSE_AN;
3589
3590 /* Ignore errors if we're expecting a PHY to attach later */
3591 ret = phylink_validate(pl, support, &config);
3592 if (ret) {
3593 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3594 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3595 ERR_PTR(ret));
3596 return ret;
3597 }
3598
3599 config.interface = phylink_sfp_select_interface(pl, config.advertising);
3600 if (config.interface == PHY_INTERFACE_MODE_NA)
3601 return -EINVAL;
3602
3603 /* Attach the PHY so that the PHY is present when we do the major
3604 * configuration step.
3605 */
3606 ret = phylink_attach_phy(pl, phy, config.interface);
3607 if (ret < 0)
3608 return ret;
3609
3610 /* This will validate the configuration for us. */
3611 ret = phylink_bringup_phy(pl, phy, config.interface);
3612 if (ret < 0) {
3613 phy_detach(phy);
3614 return ret;
3615 }
3616
3617 pl->link_port = pl->sfp_port;
3618
3619 phylink_sfp_set_config(pl, support, &config, true);
3620
3621 return 0;
3622 }
3623
phylink_sfp_config_optical(struct phylink * pl)3624 static int phylink_sfp_config_optical(struct phylink *pl)
3625 {
3626 __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3627 struct phylink_link_state config;
3628 phy_interface_t interface;
3629 int ret;
3630
3631 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3632 (int)PHY_INTERFACE_MODE_MAX,
3633 pl->config->supported_interfaces,
3634 (int)PHY_INTERFACE_MODE_MAX,
3635 pl->sfp_interfaces);
3636
3637 /* Find the union of the supported interfaces by the PCS/MAC and
3638 * the SFP module.
3639 */
3640 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces,
3641 pl->sfp_interfaces);
3642 if (phy_interface_empty(pl->sfp_interfaces)) {
3643 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3644 return -EINVAL;
3645 }
3646
3647 memset(&config, 0, sizeof(config));
3648 linkmode_copy(support, pl->sfp_support);
3649 linkmode_copy(config.advertising, pl->sfp_support);
3650 config.speed = SPEED_UNKNOWN;
3651 config.duplex = DUPLEX_UNKNOWN;
3652 config.pause = MLO_PAUSE_AN;
3653
3654 /* For all the interfaces that are supported, reduce the sfp_support
3655 * mask to only those link modes that can be supported.
3656 */
3657 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config,
3658 pl->sfp_interfaces);
3659 if (ret) {
3660 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3661 __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3662 return ret;
3663 }
3664
3665 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces);
3666 if (interface == PHY_INTERFACE_MODE_NA) {
3667 phylink_err(pl, "failed to select SFP interface\n");
3668 return -EINVAL;
3669 }
3670
3671 phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3672 phy_modes(interface));
3673
3674 if (!phylink_validate_pcs_inband_autoneg(pl, interface,
3675 config.advertising)) {
3676 phylink_err(pl, "autoneg setting not compatible with PCS");
3677 return -EINVAL;
3678 }
3679
3680 config.interface = interface;
3681
3682 /* Ignore errors if we're expecting a PHY to attach later */
3683 ret = phylink_validate(pl, support, &config);
3684 if (ret) {
3685 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3686 __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3687 ERR_PTR(ret));
3688 return ret;
3689 }
3690
3691 pl->link_port = pl->sfp_port;
3692
3693 phylink_sfp_set_config(pl, pl->sfp_support, &config, false);
3694
3695 return 0;
3696 }
3697
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)3698 static int phylink_sfp_module_insert(void *upstream,
3699 const struct sfp_eeprom_id *id)
3700 {
3701 struct phylink *pl = upstream;
3702
3703 ASSERT_RTNL();
3704
3705 linkmode_zero(pl->sfp_support);
3706 phy_interface_zero(pl->sfp_interfaces);
3707 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3708 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3709
3710 /* If this module may have a PHY connecting later, defer until later */
3711 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3712 if (pl->sfp_may_have_phy)
3713 return 0;
3714
3715 return phylink_sfp_config_optical(pl);
3716 }
3717
phylink_sfp_module_remove(void * upstream)3718 static void phylink_sfp_module_remove(void *upstream)
3719 {
3720 struct phylink *pl = upstream;
3721
3722 phy_interface_zero(pl->sfp_interfaces);
3723 }
3724
phylink_sfp_module_start(void * upstream)3725 static int phylink_sfp_module_start(void *upstream)
3726 {
3727 struct phylink *pl = upstream;
3728
3729 /* If this SFP module has a PHY, start the PHY now. */
3730 if (pl->phydev) {
3731 phy_start(pl->phydev);
3732 return 0;
3733 }
3734
3735 /* If the module may have a PHY but we didn't detect one we
3736 * need to configure the MAC here.
3737 */
3738 if (!pl->sfp_may_have_phy)
3739 return 0;
3740
3741 return phylink_sfp_config_optical(pl);
3742 }
3743
phylink_sfp_module_stop(void * upstream)3744 static void phylink_sfp_module_stop(void *upstream)
3745 {
3746 struct phylink *pl = upstream;
3747
3748 /* If this SFP module has a PHY, stop it. */
3749 if (pl->phydev)
3750 phy_stop(pl->phydev);
3751 }
3752
phylink_sfp_link_down(void * upstream)3753 static void phylink_sfp_link_down(void *upstream)
3754 {
3755 struct phylink *pl = upstream;
3756
3757 ASSERT_RTNL();
3758
3759 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3760 }
3761
phylink_sfp_link_up(void * upstream)3762 static void phylink_sfp_link_up(void *upstream)
3763 {
3764 struct phylink *pl = upstream;
3765
3766 ASSERT_RTNL();
3767
3768 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3769 }
3770
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)3771 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3772 {
3773 struct phylink *pl = upstream;
3774
3775 if (!phy->drv) {
3776 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n",
3777 phydev_name(phy), (unsigned long)phy->phy_id);
3778 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n");
3779 return -EINVAL;
3780 }
3781
3782 /*
3783 * This is the new way of dealing with flow control for PHYs,
3784 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3785 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3786 * using our validate call to the MAC, we rely upon the MAC
3787 * clearing the bits from both supported and advertising fields.
3788 */
3789 phy_support_asym_pause(phy);
3790
3791 /* Set the PHY's host supported interfaces */
3792 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3793 pl->config->supported_interfaces);
3794
3795 /* Do the initial configuration */
3796 return phylink_sfp_config_phy(pl, phy);
3797 }
3798
phylink_sfp_disconnect_phy(void * upstream,struct phy_device * phydev)3799 static void phylink_sfp_disconnect_phy(void *upstream,
3800 struct phy_device *phydev)
3801 {
3802 phylink_disconnect_phy(upstream);
3803 }
3804
3805 static const struct sfp_upstream_ops sfp_phylink_ops = {
3806 .attach = phylink_sfp_attach,
3807 .detach = phylink_sfp_detach,
3808 .module_insert = phylink_sfp_module_insert,
3809 .module_remove = phylink_sfp_module_remove,
3810 .module_start = phylink_sfp_module_start,
3811 .module_stop = phylink_sfp_module_stop,
3812 .link_up = phylink_sfp_link_up,
3813 .link_down = phylink_sfp_link_down,
3814 .connect_phy = phylink_sfp_connect_phy,
3815 .disconnect_phy = phylink_sfp_disconnect_phy,
3816 };
3817
3818 /* Helpers for MAC drivers */
3819
3820 static struct {
3821 int bit;
3822 int speed;
3823 } phylink_c73_priority_resolution[] = {
3824 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3825 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3826 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3827 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3828 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3829 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3830 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3831 /* 5GBASE-KR not supported */
3832 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3833 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3834 };
3835
phylink_resolve_c73(struct phylink_link_state * state)3836 void phylink_resolve_c73(struct phylink_link_state *state)
3837 {
3838 int i;
3839
3840 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3841 int bit = phylink_c73_priority_resolution[i].bit;
3842 if (linkmode_test_bit(bit, state->advertising) &&
3843 linkmode_test_bit(bit, state->lp_advertising))
3844 break;
3845 }
3846
3847 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3848 state->speed = phylink_c73_priority_resolution[i].speed;
3849 state->duplex = DUPLEX_FULL;
3850 } else {
3851 /* negotiation failure */
3852 state->link = false;
3853 }
3854
3855 phylink_resolve_an_pause(state);
3856 }
3857 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3858
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)3859 static void phylink_decode_c37_word(struct phylink_link_state *state,
3860 uint16_t config_reg, int speed)
3861 {
3862 int fd_bit;
3863
3864 if (speed == SPEED_2500)
3865 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3866 else
3867 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3868
3869 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3870
3871 if (linkmode_test_bit(fd_bit, state->advertising) &&
3872 linkmode_test_bit(fd_bit, state->lp_advertising)) {
3873 state->speed = speed;
3874 state->duplex = DUPLEX_FULL;
3875 } else {
3876 /* negotiation failure */
3877 state->link = false;
3878 }
3879
3880 phylink_resolve_an_pause(state);
3881 }
3882
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)3883 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3884 uint16_t config_reg)
3885 {
3886 if (!(config_reg & LPA_SGMII_LINK)) {
3887 state->link = false;
3888 return;
3889 }
3890
3891 switch (config_reg & LPA_SGMII_SPD_MASK) {
3892 case LPA_SGMII_10:
3893 state->speed = SPEED_10;
3894 break;
3895 case LPA_SGMII_100:
3896 state->speed = SPEED_100;
3897 break;
3898 case LPA_SGMII_1000:
3899 state->speed = SPEED_1000;
3900 break;
3901 default:
3902 state->link = false;
3903 return;
3904 }
3905 if (config_reg & LPA_SGMII_FULL_DUPLEX)
3906 state->duplex = DUPLEX_FULL;
3907 else
3908 state->duplex = DUPLEX_HALF;
3909 }
3910
3911 /**
3912 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3913 * @state: a pointer to a struct phylink_link_state.
3914 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3915 *
3916 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3917 * code word. Decode the USXGMII code word and populate the corresponding fields
3918 * (speed, duplex) into the phylink_link_state structure.
3919 */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)3920 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3921 uint16_t lpa)
3922 {
3923 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3924 case MDIO_USXGMII_10:
3925 state->speed = SPEED_10;
3926 break;
3927 case MDIO_USXGMII_100:
3928 state->speed = SPEED_100;
3929 break;
3930 case MDIO_USXGMII_1000:
3931 state->speed = SPEED_1000;
3932 break;
3933 case MDIO_USXGMII_2500:
3934 state->speed = SPEED_2500;
3935 break;
3936 case MDIO_USXGMII_5000:
3937 state->speed = SPEED_5000;
3938 break;
3939 case MDIO_USXGMII_10G:
3940 state->speed = SPEED_10000;
3941 break;
3942 default:
3943 state->link = false;
3944 return;
3945 }
3946
3947 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3948 state->duplex = DUPLEX_FULL;
3949 else
3950 state->duplex = DUPLEX_HALF;
3951 }
3952 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3953
3954 /**
3955 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3956 * @state: a pointer to a struct phylink_link_state.
3957 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3958 *
3959 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3960 * code word. Decode the USGMII code word and populate the corresponding fields
3961 * (speed, duplex) into the phylink_link_state structure. The structure for this
3962 * word is the same as the USXGMII word, except it only supports speeds up to
3963 * 1Gbps.
3964 */
phylink_decode_usgmii_word(struct phylink_link_state * state,uint16_t lpa)3965 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3966 uint16_t lpa)
3967 {
3968 switch (lpa & MDIO_USXGMII_SPD_MASK) {
3969 case MDIO_USXGMII_10:
3970 state->speed = SPEED_10;
3971 break;
3972 case MDIO_USXGMII_100:
3973 state->speed = SPEED_100;
3974 break;
3975 case MDIO_USXGMII_1000:
3976 state->speed = SPEED_1000;
3977 break;
3978 default:
3979 state->link = false;
3980 return;
3981 }
3982
3983 if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3984 state->duplex = DUPLEX_FULL;
3985 else
3986 state->duplex = DUPLEX_HALF;
3987 }
3988
3989 /**
3990 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3991 * @state: a pointer to a &struct phylink_link_state.
3992 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
3993 * @bmsr: The value of the %MII_BMSR register
3994 * @lpa: The value of the %MII_LPA register
3995 *
3996 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3997 * clause 37 negotiation and/or SGMII control.
3998 *
3999 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
4000 * the phylink @state structure. This is suitable to be used for implementing
4001 * the pcs_get_state() member of the struct phylink_pcs_ops structure if
4002 * accessing @bmsr and @lpa cannot be done with MDIO directly.
4003 */
phylink_mii_c22_pcs_decode_state(struct phylink_link_state * state,unsigned int neg_mode,u16 bmsr,u16 lpa)4004 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
4005 unsigned int neg_mode, u16 bmsr, u16 lpa)
4006 {
4007 state->link = !!(bmsr & BMSR_LSTATUS);
4008 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
4009
4010 /* If the link is down, the advertisement data is undefined. */
4011 if (!state->link)
4012 return;
4013
4014 switch (state->interface) {
4015 case PHY_INTERFACE_MODE_1000BASEX:
4016 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
4017 phylink_decode_c37_word(state, lpa, SPEED_1000);
4018 } else {
4019 state->speed = SPEED_1000;
4020 state->duplex = DUPLEX_FULL;
4021 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
4022 }
4023 break;
4024
4025 case PHY_INTERFACE_MODE_2500BASEX:
4026 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) {
4027 phylink_decode_c37_word(state, lpa, SPEED_2500);
4028 } else {
4029 state->speed = SPEED_2500;
4030 state->duplex = DUPLEX_FULL;
4031 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX;
4032 }
4033 break;
4034
4035 case PHY_INTERFACE_MODE_SGMII:
4036 case PHY_INTERFACE_MODE_QSGMII:
4037 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4038 phylink_decode_sgmii_word(state, lpa);
4039 break;
4040
4041 case PHY_INTERFACE_MODE_QUSGMII:
4042 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4043 phylink_decode_usgmii_word(state, lpa);
4044 break;
4045
4046 default:
4047 state->link = false;
4048 break;
4049 }
4050 }
4051 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
4052
4053 /**
4054 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
4055 * @pcs: a pointer to a &struct mdio_device.
4056 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx)
4057 * @state: a pointer to a &struct phylink_link_state.
4058 *
4059 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4060 * clause 37 negotiation and/or SGMII control.
4061 *
4062 * Read the MAC PCS state from the MII device configured in @config and
4063 * parse the Clause 37 or Cisco SGMII link partner negotiation word into
4064 * the phylink @state structure. This is suitable to be directly plugged
4065 * into the pcs_get_state() member of the struct phylink_pcs_ops
4066 * structure.
4067 */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,unsigned int neg_mode,struct phylink_link_state * state)4068 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
4069 unsigned int neg_mode,
4070 struct phylink_link_state *state)
4071 {
4072 int bmsr, lpa;
4073
4074 bmsr = mdiodev_read(pcs, MII_BMSR);
4075 lpa = mdiodev_read(pcs, MII_LPA);
4076 if (bmsr < 0 || lpa < 0) {
4077 state->link = false;
4078 return;
4079 }
4080
4081 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa);
4082 }
4083 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
4084
4085 /**
4086 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
4087 * advertisement
4088 * @interface: the PHY interface mode being configured
4089 * @advertising: the ethtool advertisement mask
4090 *
4091 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4092 * clause 37 negotiation and/or SGMII control.
4093 *
4094 * Encode the clause 37 PCS advertisement as specified by @interface and
4095 * @advertising.
4096 *
4097 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
4098 */
phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,const unsigned long * advertising)4099 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
4100 const unsigned long *advertising)
4101 {
4102 u16 adv;
4103
4104 switch (interface) {
4105 case PHY_INTERFACE_MODE_1000BASEX:
4106 case PHY_INTERFACE_MODE_2500BASEX:
4107 adv = ADVERTISE_1000XFULL;
4108 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
4109 advertising))
4110 adv |= ADVERTISE_1000XPAUSE;
4111 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
4112 advertising))
4113 adv |= ADVERTISE_1000XPSE_ASYM;
4114 return adv;
4115 case PHY_INTERFACE_MODE_SGMII:
4116 case PHY_INTERFACE_MODE_QSGMII:
4117 return 0x0001;
4118 default:
4119 /* Nothing to do for other modes */
4120 return -EINVAL;
4121 }
4122 }
4123 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
4124
4125 /**
4126 * phylink_mii_c22_pcs_config() - configure clause 22 PCS
4127 * @pcs: a pointer to a &struct mdio_device.
4128 * @interface: the PHY interface mode being configured
4129 * @advertising: the ethtool advertisement mask
4130 * @neg_mode: PCS negotiation mode
4131 *
4132 * Configure a Clause 22 PCS PHY with the appropriate negotiation
4133 * parameters for the @mode, @interface and @advertising parameters.
4134 * Returns negative error number on failure, zero if the advertisement
4135 * has not changed, or positive if there is a change.
4136 */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,phy_interface_t interface,const unsigned long * advertising,unsigned int neg_mode)4137 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
4138 phy_interface_t interface,
4139 const unsigned long *advertising,
4140 unsigned int neg_mode)
4141 {
4142 bool changed = 0;
4143 u16 bmcr;
4144 int ret, adv;
4145
4146 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
4147 if (adv >= 0) {
4148 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
4149 MII_ADVERTISE, 0xffff, adv);
4150 if (ret < 0)
4151 return ret;
4152 changed = ret;
4153 }
4154
4155 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
4156 bmcr = BMCR_ANENABLE;
4157 else
4158 bmcr = 0;
4159
4160 /* Configure the inband state. Ensure ISOLATE bit is disabled */
4161 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
4162 if (ret < 0)
4163 return ret;
4164
4165 return changed;
4166 }
4167 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
4168
4169 /**
4170 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
4171 * @pcs: a pointer to a &struct mdio_device.
4172 *
4173 * Helper for MAC PCS supporting the 802.3 clause 22 register set for
4174 * clause 37 negotiation.
4175 *
4176 * Restart the clause 37 negotiation with the link partner. This is
4177 * suitable to be directly plugged into the pcs_get_state() member
4178 * of the struct phylink_pcs_ops structure.
4179 */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)4180 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
4181 {
4182 int val = mdiodev_read(pcs, MII_BMCR);
4183
4184 if (val >= 0) {
4185 val |= BMCR_ANRESTART;
4186
4187 mdiodev_write(pcs, MII_BMCR, val);
4188 }
4189 }
4190 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
4191
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)4192 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
4193 struct phylink_link_state *state)
4194 {
4195 struct mii_bus *bus = pcs->bus;
4196 int addr = pcs->addr;
4197 int stat;
4198
4199 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
4200 if (stat < 0) {
4201 state->link = false;
4202 return;
4203 }
4204
4205 state->link = !!(stat & MDIO_STAT1_LSTATUS);
4206 if (!state->link)
4207 return;
4208
4209 switch (state->interface) {
4210 case PHY_INTERFACE_MODE_10GBASER:
4211 state->speed = SPEED_10000;
4212 state->duplex = DUPLEX_FULL;
4213 break;
4214
4215 default:
4216 break;
4217 }
4218 }
4219 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
4220
phylink_init(void)4221 static int __init phylink_init(void)
4222 {
4223 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
4224 __set_bit(phylink_sfp_interface_preference[i],
4225 phylink_sfp_interfaces);
4226
4227 return 0;
4228 }
4229
4230 module_init(phylink_init);
4231
4232 MODULE_LICENSE("GPL v2");
4233 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");
4234