1 /**********************************************************************
2 * Author: Cavium, Inc.
3 *
4 * Contact: support@cavium.com
5 * Please include "LiquidIO" in the subject.
6 *
7 * Copyright (c) 2003-2016 Cavium, Inc.
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 **********************************************************************/
19 #include <linux/pci.h>
20 #include <linux/netdevice.h>
21 #include "liquidio_common.h"
22 #include "octeon_droq.h"
23 #include "octeon_iq.h"
24 #include "response_manager.h"
25 #include "octeon_device.h"
26 #include "octeon_main.h"
27
28 static void oct_poll_req_completion(struct work_struct *work);
29
octeon_setup_response_list(struct octeon_device * oct)30 int octeon_setup_response_list(struct octeon_device *oct)
31 {
32 int i, ret = 0;
33 struct cavium_wq *cwq;
34
35 for (i = 0; i < MAX_RESPONSE_LISTS; i++) {
36 INIT_LIST_HEAD(&oct->response_list[i].head);
37 spin_lock_init(&oct->response_list[i].lock);
38 atomic_set(&oct->response_list[i].pending_req_count, 0);
39 }
40 spin_lock_init(&oct->cmd_resp_wqlock);
41
42 oct->dma_comp_wq.wq = alloc_workqueue("dma-comp",
43 WQ_MEM_RECLAIM | WQ_PERCPU, 0);
44 if (!oct->dma_comp_wq.wq) {
45 dev_err(&oct->pci_dev->dev, "failed to create wq thread\n");
46 return -ENOMEM;
47 }
48
49 cwq = &oct->dma_comp_wq;
50 INIT_DELAYED_WORK(&cwq->wk.work, oct_poll_req_completion);
51 cwq->wk.ctxptr = oct;
52 oct->cmd_resp_state = OCT_DRV_ONLINE;
53
54 return ret;
55 }
56 EXPORT_SYMBOL_GPL(octeon_setup_response_list);
57
octeon_delete_response_list(struct octeon_device * oct)58 void octeon_delete_response_list(struct octeon_device *oct)
59 {
60 cancel_delayed_work_sync(&oct->dma_comp_wq.wk.work);
61 destroy_workqueue(oct->dma_comp_wq.wq);
62 }
63 EXPORT_SYMBOL_GPL(octeon_delete_response_list);
64
lio_process_ordered_list(struct octeon_device * octeon_dev,u32 force_quit)65 int lio_process_ordered_list(struct octeon_device *octeon_dev,
66 u32 force_quit)
67 {
68 struct octeon_response_list *ordered_sc_list;
69 struct octeon_soft_command *sc;
70 int request_complete = 0;
71 int resp_to_process = MAX_ORD_REQS_TO_PROCESS;
72 u32 status;
73 u64 status64;
74
75 octeon_free_sc_done_list(octeon_dev);
76
77 ordered_sc_list = &octeon_dev->response_list[OCTEON_ORDERED_SC_LIST];
78
79 do {
80 spin_lock_bh(&ordered_sc_list->lock);
81
82 if (list_empty(&ordered_sc_list->head)) {
83 spin_unlock_bh(&ordered_sc_list->lock);
84 return 1;
85 }
86
87 sc = list_first_entry(&ordered_sc_list->head,
88 struct octeon_soft_command, node);
89
90 status = OCTEON_REQUEST_PENDING;
91
92 /* check if octeon has finished DMA'ing a response
93 * to where rptr is pointing to
94 */
95 status64 = *sc->status_word;
96
97 if (status64 != COMPLETION_WORD_INIT) {
98 /* This logic ensures that all 64b have been written.
99 * 1. check byte 0 for non-FF
100 * 2. if non-FF, then swap result from BE to host order
101 * 3. check byte 7 (swapped to 0) for non-FF
102 * 4. if non-FF, use the low 32-bit status code
103 * 5. if either byte 0 or byte 7 is FF, don't use status
104 */
105 if ((status64 & 0xff) != 0xff) {
106 octeon_swap_8B_data(&status64, 1);
107 if (((status64 & 0xff) != 0xff)) {
108 /* retrieve 16-bit firmware status */
109 status = (u32)(status64 & 0xffffULL);
110 if (status) {
111 status =
112 FIRMWARE_STATUS_CODE(status);
113 } else {
114 /* i.e. no error */
115 status = OCTEON_REQUEST_DONE;
116 }
117 }
118 }
119 } else if (unlikely(force_quit) || (sc->expiry_time &&
120 time_after(jiffies, (unsigned long)sc->expiry_time))) {
121 struct octeon_instr_irh *irh =
122 (struct octeon_instr_irh *)&sc->cmd.cmd3.irh;
123
124 dev_err(&octeon_dev->pci_dev->dev, "%s: ", __func__);
125 dev_err(&octeon_dev->pci_dev->dev,
126 "cmd %x/%x/%llx/%llx failed, ",
127 irh->opcode, irh->subcode,
128 sc->cmd.cmd3.ossp[0], sc->cmd.cmd3.ossp[1]);
129 dev_err(&octeon_dev->pci_dev->dev,
130 "timeout (%ld, %ld)\n",
131 (long)jiffies, (long)sc->expiry_time);
132 status = OCTEON_REQUEST_TIMEOUT;
133 }
134
135 if (status != OCTEON_REQUEST_PENDING) {
136 sc->sc_status = status;
137
138 /* we have received a response or we have timed out */
139 /* remove node from linked list */
140 list_del(&sc->node);
141 atomic_dec(&octeon_dev->response_list
142 [OCTEON_ORDERED_SC_LIST].
143 pending_req_count);
144
145 if (!sc->callback) {
146 atomic_inc(&octeon_dev->response_list
147 [OCTEON_DONE_SC_LIST].
148 pending_req_count);
149 list_add_tail(&sc->node,
150 &octeon_dev->response_list
151 [OCTEON_DONE_SC_LIST].head);
152
153 if (unlikely(READ_ONCE(sc->caller_is_done))) {
154 /* caller does not wait for response
155 * from firmware
156 */
157 if (status != OCTEON_REQUEST_DONE) {
158 struct octeon_instr_irh *irh;
159
160 irh =
161 (struct octeon_instr_irh *)
162 &sc->cmd.cmd3.irh;
163 dev_dbg
164 (&octeon_dev->pci_dev->dev,
165 "%s: sc failed: opcode=%x, ",
166 __func__, irh->opcode);
167 dev_dbg
168 (&octeon_dev->pci_dev->dev,
169 "subcode=%x, ossp[0]=%llx, ",
170 irh->subcode,
171 sc->cmd.cmd3.ossp[0]);
172 dev_dbg
173 (&octeon_dev->pci_dev->dev,
174 "ossp[1]=%llx, status=%d\n",
175 sc->cmd.cmd3.ossp[1],
176 status);
177 }
178 } else {
179 complete(&sc->complete);
180 }
181
182 spin_unlock_bh(&ordered_sc_list->lock);
183 } else {
184 /* sc with callback function */
185 if (status == OCTEON_REQUEST_TIMEOUT) {
186 atomic_inc(&octeon_dev->response_list
187 [OCTEON_ZOMBIE_SC_LIST].
188 pending_req_count);
189 list_add_tail(&sc->node,
190 &octeon_dev->response_list
191 [OCTEON_ZOMBIE_SC_LIST].
192 head);
193 }
194
195 spin_unlock_bh(&ordered_sc_list->lock);
196
197 sc->callback(octeon_dev, status,
198 sc->callback_arg);
199 /* sc is freed by caller */
200 }
201
202 request_complete++;
203
204 } else {
205 /* no response yet */
206 request_complete = 0;
207 spin_unlock_bh
208 (&ordered_sc_list->lock);
209 }
210
211 /* If we hit the Max Ordered requests to process every loop,
212 * we quit
213 * and let this function be invoked the next time the poll
214 * thread runs
215 * to process the remaining requests. This function can take up
216 * the entire CPU if there is no upper limit to the requests
217 * processed.
218 */
219 if (request_complete >= resp_to_process)
220 break;
221 } while (request_complete);
222
223 return 0;
224 }
225 EXPORT_SYMBOL_GPL(lio_process_ordered_list);
226
oct_poll_req_completion(struct work_struct * work)227 static void oct_poll_req_completion(struct work_struct *work)
228 {
229 struct cavium_wk *wk = (struct cavium_wk *)work;
230 struct octeon_device *oct = (struct octeon_device *)wk->ctxptr;
231 struct cavium_wq *cwq = &oct->dma_comp_wq;
232
233 lio_process_ordered_list(oct, 0);
234
235 if (atomic_read(&oct->response_list
236 [OCTEON_ORDERED_SC_LIST].pending_req_count))
237 queue_delayed_work(cwq->wq, &cwq->wk.work, msecs_to_jiffies(1));
238 }
239