1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2015, 2016 ARM Ltd.
4 */
5
6 #include <linux/uaccess.h>
7 #include <linux/interrupt.h>
8 #include <linux/cpu.h>
9 #include <linux/kvm_host.h>
10 #include <kvm/arm_vgic.h>
11 #include <asm/kvm_emulate.h>
12 #include <asm/kvm_mmu.h>
13 #include "vgic.h"
14
15 /*
16 * Initialization rules: there are multiple stages to the vgic
17 * initialization, both for the distributor and the CPU interfaces. The basic
18 * idea is that even though the VGIC is not functional or not requested from
19 * user space, the critical path of the run loop can still call VGIC functions
20 * that just won't do anything, without them having to check additional
21 * initialization flags to ensure they don't look at uninitialized data
22 * structures.
23 *
24 * Distributor:
25 *
26 * - kvm_vgic_early_init(): initialization of static data that doesn't
27 * depend on any sizing information or emulation type. No allocation
28 * is allowed there.
29 *
30 * - vgic_init(): allocation and initialization of the generic data
31 * structures that depend on sizing information (number of CPUs,
32 * number of interrupts). Also initializes the vcpu specific data
33 * structures. Can be executed lazily for GICv2.
34 *
35 * CPU Interface:
36 *
37 * - kvm_vgic_vcpu_init(): initialization of static data that doesn't depend
38 * on any sizing information. Private interrupts are allocated if not
39 * already allocated at vgic-creation time.
40 */
41
42 /* EARLY INIT */
43
44 /**
45 * kvm_vgic_early_init() - Initialize static VGIC VCPU data structures
46 * @kvm: The VM whose VGIC districutor should be initialized
47 *
48 * Only do initialization of static structures that don't require any
49 * allocation or sizing information from userspace. vgic_init() called
50 * kvm_vgic_dist_init() which takes care of the rest.
51 */
kvm_vgic_early_init(struct kvm * kvm)52 void kvm_vgic_early_init(struct kvm *kvm)
53 {
54 struct vgic_dist *dist = &kvm->arch.vgic;
55
56 xa_init_flags(&dist->lpi_xa, XA_FLAGS_LOCK_IRQ);
57 }
58
59 /* CREATION */
60
61 static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu, u32 type);
62
63 /**
64 * kvm_vgic_create: triggered by the instantiation of the VGIC device by
65 * user space, either through the legacy KVM_CREATE_IRQCHIP ioctl (v2 only)
66 * or through the generic KVM_CREATE_DEVICE API ioctl.
67 * irqchip_in_kernel() tells you if this function succeeded or not.
68 * @kvm: kvm struct pointer
69 * @type: KVM_DEV_TYPE_ARM_VGIC_V[23]
70 */
kvm_vgic_create(struct kvm * kvm,u32 type)71 int kvm_vgic_create(struct kvm *kvm, u32 type)
72 {
73 struct kvm_vcpu *vcpu;
74 unsigned long i;
75 int ret;
76
77 /*
78 * This function is also called by the KVM_CREATE_IRQCHIP handler,
79 * which had no chance yet to check the availability of the GICv2
80 * emulation. So check this here again. KVM_CREATE_DEVICE does
81 * the proper checks already.
82 */
83 if (type == KVM_DEV_TYPE_ARM_VGIC_V2 &&
84 !kvm_vgic_global_state.can_emulate_gicv2)
85 return -ENODEV;
86
87 /* Must be held to avoid race with vCPU creation */
88 lockdep_assert_held(&kvm->lock);
89
90 ret = -EBUSY;
91 if (!lock_all_vcpus(kvm))
92 return ret;
93
94 mutex_lock(&kvm->arch.config_lock);
95
96 if (irqchip_in_kernel(kvm)) {
97 ret = -EEXIST;
98 goto out_unlock;
99 }
100
101 kvm_for_each_vcpu(i, vcpu, kvm) {
102 if (vcpu_has_run_once(vcpu))
103 goto out_unlock;
104 }
105 ret = 0;
106
107 if (type == KVM_DEV_TYPE_ARM_VGIC_V2)
108 kvm->max_vcpus = VGIC_V2_MAX_CPUS;
109 else
110 kvm->max_vcpus = VGIC_V3_MAX_CPUS;
111
112 if (atomic_read(&kvm->online_vcpus) > kvm->max_vcpus) {
113 ret = -E2BIG;
114 goto out_unlock;
115 }
116
117 kvm_for_each_vcpu(i, vcpu, kvm) {
118 ret = vgic_allocate_private_irqs_locked(vcpu, type);
119 if (ret)
120 break;
121 }
122
123 if (ret) {
124 kvm_for_each_vcpu(i, vcpu, kvm) {
125 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
126 kfree(vgic_cpu->private_irqs);
127 vgic_cpu->private_irqs = NULL;
128 }
129
130 goto out_unlock;
131 }
132
133 kvm->arch.vgic.in_kernel = true;
134 kvm->arch.vgic.vgic_model = type;
135
136 kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF;
137
138 if (type == KVM_DEV_TYPE_ARM_VGIC_V2)
139 kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF;
140 else
141 INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions);
142
143 out_unlock:
144 mutex_unlock(&kvm->arch.config_lock);
145 unlock_all_vcpus(kvm);
146 return ret;
147 }
148
149 /* INIT/DESTROY */
150
151 /**
152 * kvm_vgic_dist_init: initialize the dist data structures
153 * @kvm: kvm struct pointer
154 * @nr_spis: number of spis, frozen by caller
155 */
kvm_vgic_dist_init(struct kvm * kvm,unsigned int nr_spis)156 static int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis)
157 {
158 struct vgic_dist *dist = &kvm->arch.vgic;
159 struct kvm_vcpu *vcpu0 = kvm_get_vcpu(kvm, 0);
160 int i;
161
162 dist->spis = kcalloc(nr_spis, sizeof(struct vgic_irq), GFP_KERNEL_ACCOUNT);
163 if (!dist->spis)
164 return -ENOMEM;
165
166 /*
167 * In the following code we do not take the irq struct lock since
168 * no other action on irq structs can happen while the VGIC is
169 * not initialized yet:
170 * If someone wants to inject an interrupt or does a MMIO access, we
171 * require prior initialization in case of a virtual GICv3 or trigger
172 * initialization when using a virtual GICv2.
173 */
174 for (i = 0; i < nr_spis; i++) {
175 struct vgic_irq *irq = &dist->spis[i];
176
177 irq->intid = i + VGIC_NR_PRIVATE_IRQS;
178 INIT_LIST_HEAD(&irq->ap_list);
179 raw_spin_lock_init(&irq->irq_lock);
180 irq->vcpu = NULL;
181 irq->target_vcpu = vcpu0;
182 kref_init(&irq->refcount);
183 switch (dist->vgic_model) {
184 case KVM_DEV_TYPE_ARM_VGIC_V2:
185 irq->targets = 0;
186 irq->group = 0;
187 break;
188 case KVM_DEV_TYPE_ARM_VGIC_V3:
189 irq->mpidr = 0;
190 irq->group = 1;
191 break;
192 default:
193 kfree(dist->spis);
194 dist->spis = NULL;
195 return -EINVAL;
196 }
197 }
198 return 0;
199 }
200
201 /* Default GICv3 Maintenance Interrupt INTID, as per SBSA */
202 #define DEFAULT_MI_INTID 25
203
kvm_vgic_vcpu_nv_init(struct kvm_vcpu * vcpu)204 int kvm_vgic_vcpu_nv_init(struct kvm_vcpu *vcpu)
205 {
206 int ret;
207
208 guard(mutex)(&vcpu->kvm->arch.config_lock);
209
210 /*
211 * Matching the tradition established with the timers, provide
212 * a default PPI for the maintenance interrupt. It makes
213 * things easier to reason about.
214 */
215 if (vcpu->kvm->arch.vgic.mi_intid == 0)
216 vcpu->kvm->arch.vgic.mi_intid = DEFAULT_MI_INTID;
217 ret = kvm_vgic_set_owner(vcpu, vcpu->kvm->arch.vgic.mi_intid, vcpu);
218
219 return ret;
220 }
221
vgic_allocate_private_irqs_locked(struct kvm_vcpu * vcpu,u32 type)222 static int vgic_allocate_private_irqs_locked(struct kvm_vcpu *vcpu, u32 type)
223 {
224 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
225 int i;
226
227 lockdep_assert_held(&vcpu->kvm->arch.config_lock);
228
229 if (vgic_cpu->private_irqs)
230 return 0;
231
232 vgic_cpu->private_irqs = kcalloc(VGIC_NR_PRIVATE_IRQS,
233 sizeof(struct vgic_irq),
234 GFP_KERNEL_ACCOUNT);
235
236 if (!vgic_cpu->private_irqs)
237 return -ENOMEM;
238
239 /*
240 * Enable and configure all SGIs to be edge-triggered and
241 * configure all PPIs as level-triggered.
242 */
243 for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
244 struct vgic_irq *irq = &vgic_cpu->private_irqs[i];
245
246 INIT_LIST_HEAD(&irq->ap_list);
247 raw_spin_lock_init(&irq->irq_lock);
248 irq->intid = i;
249 irq->vcpu = NULL;
250 irq->target_vcpu = vcpu;
251 kref_init(&irq->refcount);
252 if (vgic_irq_is_sgi(i)) {
253 /* SGIs */
254 irq->enabled = 1;
255 irq->config = VGIC_CONFIG_EDGE;
256 } else {
257 /* PPIs */
258 irq->config = VGIC_CONFIG_LEVEL;
259 }
260
261 switch (type) {
262 case KVM_DEV_TYPE_ARM_VGIC_V3:
263 irq->group = 1;
264 irq->mpidr = kvm_vcpu_get_mpidr_aff(vcpu);
265 break;
266 case KVM_DEV_TYPE_ARM_VGIC_V2:
267 irq->group = 0;
268 irq->targets = BIT(vcpu->vcpu_id);
269 break;
270 }
271 }
272
273 return 0;
274 }
275
vgic_allocate_private_irqs(struct kvm_vcpu * vcpu,u32 type)276 static int vgic_allocate_private_irqs(struct kvm_vcpu *vcpu, u32 type)
277 {
278 int ret;
279
280 mutex_lock(&vcpu->kvm->arch.config_lock);
281 ret = vgic_allocate_private_irqs_locked(vcpu, type);
282 mutex_unlock(&vcpu->kvm->arch.config_lock);
283
284 return ret;
285 }
286
287 /**
288 * kvm_vgic_vcpu_init() - Initialize static VGIC VCPU data
289 * structures and register VCPU-specific KVM iodevs
290 *
291 * @vcpu: pointer to the VCPU being created and initialized
292 *
293 * Only do initialization, but do not actually enable the
294 * VGIC CPU interface
295 */
kvm_vgic_vcpu_init(struct kvm_vcpu * vcpu)296 int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
297 {
298 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
299 struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
300 int ret = 0;
301
302 vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
303
304 INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
305 raw_spin_lock_init(&vgic_cpu->ap_list_lock);
306 atomic_set(&vgic_cpu->vgic_v3.its_vpe.vlpi_count, 0);
307
308 if (!irqchip_in_kernel(vcpu->kvm))
309 return 0;
310
311 ret = vgic_allocate_private_irqs(vcpu, dist->vgic_model);
312 if (ret)
313 return ret;
314
315 /*
316 * If we are creating a VCPU with a GICv3 we must also register the
317 * KVM io device for the redistributor that belongs to this VCPU.
318 */
319 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
320 mutex_lock(&vcpu->kvm->slots_lock);
321 ret = vgic_register_redist_iodev(vcpu);
322 mutex_unlock(&vcpu->kvm->slots_lock);
323 }
324 return ret;
325 }
326
kvm_vgic_vcpu_enable(struct kvm_vcpu * vcpu)327 static void kvm_vgic_vcpu_enable(struct kvm_vcpu *vcpu)
328 {
329 if (kvm_vgic_global_state.type == VGIC_V2)
330 vgic_v2_enable(vcpu);
331 else
332 vgic_v3_enable(vcpu);
333 }
334
335 /*
336 * vgic_init: allocates and initializes dist and vcpu data structures
337 * depending on two dimensioning parameters:
338 * - the number of spis
339 * - the number of vcpus
340 * The function is generally called when nr_spis has been explicitly set
341 * by the guest through the KVM DEVICE API. If not nr_spis is set to 256.
342 * vgic_initialized() returns true when this function has succeeded.
343 */
vgic_init(struct kvm * kvm)344 int vgic_init(struct kvm *kvm)
345 {
346 struct vgic_dist *dist = &kvm->arch.vgic;
347 struct kvm_vcpu *vcpu;
348 int ret = 0;
349 unsigned long idx;
350
351 lockdep_assert_held(&kvm->arch.config_lock);
352
353 if (vgic_initialized(kvm))
354 return 0;
355
356 /* Are we also in the middle of creating a VCPU? */
357 if (kvm->created_vcpus != atomic_read(&kvm->online_vcpus))
358 return -EBUSY;
359
360 /* freeze the number of spis */
361 if (!dist->nr_spis)
362 dist->nr_spis = VGIC_NR_IRQS_LEGACY - VGIC_NR_PRIVATE_IRQS;
363
364 ret = kvm_vgic_dist_init(kvm, dist->nr_spis);
365 if (ret)
366 goto out;
367
368 /*
369 * If we have GICv4.1 enabled, unconditionally request enable the
370 * v4 support so that we get HW-accelerated vSGIs. Otherwise, only
371 * enable it if we present a virtual ITS to the guest.
372 */
373 if (vgic_supports_direct_msis(kvm)) {
374 ret = vgic_v4_init(kvm);
375 if (ret)
376 goto out;
377 }
378
379 kvm_for_each_vcpu(idx, vcpu, kvm)
380 kvm_vgic_vcpu_enable(vcpu);
381
382 ret = kvm_vgic_setup_default_irq_routing(kvm);
383 if (ret)
384 goto out;
385
386 vgic_debug_init(kvm);
387
388 /*
389 * If userspace didn't set the GIC implementation revision,
390 * default to the latest and greatest. You know want it.
391 */
392 if (!dist->implementation_rev)
393 dist->implementation_rev = KVM_VGIC_IMP_REV_LATEST;
394 dist->initialized = true;
395
396 out:
397 return ret;
398 }
399
kvm_vgic_dist_destroy(struct kvm * kvm)400 static void kvm_vgic_dist_destroy(struct kvm *kvm)
401 {
402 struct vgic_dist *dist = &kvm->arch.vgic;
403 struct vgic_redist_region *rdreg, *next;
404
405 dist->ready = false;
406 dist->initialized = false;
407
408 kfree(dist->spis);
409 dist->spis = NULL;
410 dist->nr_spis = 0;
411 dist->vgic_dist_base = VGIC_ADDR_UNDEF;
412
413 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
414 list_for_each_entry_safe(rdreg, next, &dist->rd_regions, list)
415 vgic_v3_free_redist_region(kvm, rdreg);
416 INIT_LIST_HEAD(&dist->rd_regions);
417 } else {
418 dist->vgic_cpu_base = VGIC_ADDR_UNDEF;
419 }
420
421 if (vgic_supports_direct_msis(kvm))
422 vgic_v4_teardown(kvm);
423
424 xa_destroy(&dist->lpi_xa);
425 }
426
__kvm_vgic_vcpu_destroy(struct kvm_vcpu * vcpu)427 static void __kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
428 {
429 struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
430
431 /*
432 * Retire all pending LPIs on this vcpu anyway as we're
433 * going to destroy it.
434 */
435 vgic_flush_pending_lpis(vcpu);
436
437 INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
438 kfree(vgic_cpu->private_irqs);
439 vgic_cpu->private_irqs = NULL;
440
441 if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
442 /*
443 * If this vCPU is being destroyed because of a failed creation
444 * then unregister the redistributor to avoid leaving behind a
445 * dangling pointer to the vCPU struct.
446 *
447 * vCPUs that have been successfully created (i.e. added to
448 * kvm->vcpu_array) get unregistered in kvm_vgic_destroy(), as
449 * this function gets called while holding kvm->arch.config_lock
450 * in the VM teardown path and would otherwise introduce a lock
451 * inversion w.r.t. kvm->srcu.
452 *
453 * vCPUs that failed creation are torn down outside of the
454 * kvm->arch.config_lock and do not get unregistered in
455 * kvm_vgic_destroy(), meaning it is both safe and necessary to
456 * do so here.
457 */
458 if (kvm_get_vcpu_by_id(vcpu->kvm, vcpu->vcpu_id) != vcpu)
459 vgic_unregister_redist_iodev(vcpu);
460
461 vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
462 }
463 }
464
kvm_vgic_vcpu_destroy(struct kvm_vcpu * vcpu)465 void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
466 {
467 struct kvm *kvm = vcpu->kvm;
468
469 mutex_lock(&kvm->slots_lock);
470 __kvm_vgic_vcpu_destroy(vcpu);
471 mutex_unlock(&kvm->slots_lock);
472 }
473
kvm_vgic_destroy(struct kvm * kvm)474 void kvm_vgic_destroy(struct kvm *kvm)
475 {
476 struct kvm_vcpu *vcpu;
477 unsigned long i;
478
479 mutex_lock(&kvm->slots_lock);
480 mutex_lock(&kvm->arch.config_lock);
481
482 vgic_debug_destroy(kvm);
483
484 kvm_for_each_vcpu(i, vcpu, kvm)
485 __kvm_vgic_vcpu_destroy(vcpu);
486
487 kvm_vgic_dist_destroy(kvm);
488
489 mutex_unlock(&kvm->arch.config_lock);
490
491 if (kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)
492 kvm_for_each_vcpu(i, vcpu, kvm)
493 vgic_unregister_redist_iodev(vcpu);
494
495 mutex_unlock(&kvm->slots_lock);
496 }
497
498 /**
499 * vgic_lazy_init: Lazy init is only allowed if the GIC exposed to the guest
500 * is a GICv2. A GICv3 must be explicitly initialized by userspace using the
501 * KVM_DEV_ARM_VGIC_GRP_CTRL KVM_DEVICE group.
502 * @kvm: kvm struct pointer
503 */
vgic_lazy_init(struct kvm * kvm)504 int vgic_lazy_init(struct kvm *kvm)
505 {
506 int ret = 0;
507
508 if (unlikely(!vgic_initialized(kvm))) {
509 /*
510 * We only provide the automatic initialization of the VGIC
511 * for the legacy case of a GICv2. Any other type must
512 * be explicitly initialized once setup with the respective
513 * KVM device call.
514 */
515 if (kvm->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V2)
516 return -EBUSY;
517
518 mutex_lock(&kvm->arch.config_lock);
519 ret = vgic_init(kvm);
520 mutex_unlock(&kvm->arch.config_lock);
521 }
522
523 return ret;
524 }
525
526 /* RESOURCE MAPPING */
527
528 /**
529 * kvm_vgic_map_resources - map the MMIO regions
530 * @kvm: kvm struct pointer
531 *
532 * Map the MMIO regions depending on the VGIC model exposed to the guest
533 * called on the first VCPU run.
534 * Also map the virtual CPU interface into the VM.
535 * v2 calls vgic_init() if not already done.
536 * v3 and derivatives return an error if the VGIC is not initialized.
537 * vgic_ready() returns true if this function has succeeded.
538 */
kvm_vgic_map_resources(struct kvm * kvm)539 int kvm_vgic_map_resources(struct kvm *kvm)
540 {
541 struct vgic_dist *dist = &kvm->arch.vgic;
542 enum vgic_type type;
543 gpa_t dist_base;
544 int ret = 0;
545
546 if (likely(vgic_ready(kvm)))
547 return 0;
548
549 mutex_lock(&kvm->slots_lock);
550 mutex_lock(&kvm->arch.config_lock);
551 if (vgic_ready(kvm))
552 goto out;
553
554 if (!irqchip_in_kernel(kvm))
555 goto out;
556
557 if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) {
558 ret = vgic_v2_map_resources(kvm);
559 type = VGIC_V2;
560 } else {
561 ret = vgic_v3_map_resources(kvm);
562 type = VGIC_V3;
563 }
564
565 if (ret)
566 goto out;
567
568 dist_base = dist->vgic_dist_base;
569 mutex_unlock(&kvm->arch.config_lock);
570
571 ret = vgic_register_dist_iodev(kvm, dist_base, type);
572 if (ret) {
573 kvm_err("Unable to register VGIC dist MMIO regions\n");
574 goto out_slots;
575 }
576
577 /*
578 * kvm_io_bus_register_dev() guarantees all readers see the new MMIO
579 * registration before returning through synchronize_srcu(), which also
580 * implies a full memory barrier. As such, marking the distributor as
581 * 'ready' here is guaranteed to be ordered after all vCPUs having seen
582 * a completely configured distributor.
583 */
584 dist->ready = true;
585 goto out_slots;
586 out:
587 mutex_unlock(&kvm->arch.config_lock);
588 out_slots:
589 if (ret)
590 kvm_vm_dead(kvm);
591
592 mutex_unlock(&kvm->slots_lock);
593
594 return ret;
595 }
596
597 /* GENERIC PROBE */
598
kvm_vgic_cpu_up(void)599 void kvm_vgic_cpu_up(void)
600 {
601 enable_percpu_irq(kvm_vgic_global_state.maint_irq, 0);
602 }
603
604
kvm_vgic_cpu_down(void)605 void kvm_vgic_cpu_down(void)
606 {
607 disable_percpu_irq(kvm_vgic_global_state.maint_irq);
608 }
609
vgic_maintenance_handler(int irq,void * data)610 static irqreturn_t vgic_maintenance_handler(int irq, void *data)
611 {
612 struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)data;
613
614 /*
615 * We cannot rely on the vgic maintenance interrupt to be
616 * delivered synchronously. This means we can only use it to
617 * exit the VM, and we perform the handling of EOIed
618 * interrupts on the exit path (see vgic_fold_lr_state).
619 *
620 * Of course, NV throws a wrench in this plan, and needs
621 * something special.
622 */
623 if (vcpu && vgic_state_is_nested(vcpu))
624 vgic_v3_handle_nested_maint_irq(vcpu);
625
626 return IRQ_HANDLED;
627 }
628
629 static struct gic_kvm_info *gic_kvm_info;
630
vgic_set_kvm_info(const struct gic_kvm_info * info)631 void __init vgic_set_kvm_info(const struct gic_kvm_info *info)
632 {
633 BUG_ON(gic_kvm_info != NULL);
634 gic_kvm_info = kmalloc(sizeof(*info), GFP_KERNEL);
635 if (gic_kvm_info)
636 *gic_kvm_info = *info;
637 }
638
639 /**
640 * kvm_vgic_init_cpu_hardware - initialize the GIC VE hardware
641 *
642 * For a specific CPU, initialize the GIC VE hardware.
643 */
kvm_vgic_init_cpu_hardware(void)644 void kvm_vgic_init_cpu_hardware(void)
645 {
646 BUG_ON(preemptible());
647
648 /*
649 * We want to make sure the list registers start out clear so that we
650 * only have the program the used registers.
651 */
652 if (kvm_vgic_global_state.type == VGIC_V2)
653 vgic_v2_init_lrs();
654 else
655 kvm_call_hyp(__vgic_v3_init_lrs);
656 }
657
658 /**
659 * kvm_vgic_hyp_init: populates the kvm_vgic_global_state variable
660 * according to the host GIC model. Accordingly calls either
661 * vgic_v2/v3_probe which registers the KVM_DEVICE that can be
662 * instantiated by a guest later on .
663 */
kvm_vgic_hyp_init(void)664 int kvm_vgic_hyp_init(void)
665 {
666 bool has_mask;
667 int ret;
668
669 if (!gic_kvm_info)
670 return -ENODEV;
671
672 has_mask = !gic_kvm_info->no_maint_irq_mask;
673
674 if (has_mask && !gic_kvm_info->maint_irq) {
675 kvm_err("No vgic maintenance irq\n");
676 return -ENXIO;
677 }
678
679 /*
680 * If we get one of these oddball non-GICs, taint the kernel,
681 * as we have no idea of how they *really* behave.
682 */
683 if (gic_kvm_info->no_hw_deactivation) {
684 kvm_info("Non-architectural vgic, tainting kernel\n");
685 add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
686 kvm_vgic_global_state.no_hw_deactivation = true;
687 }
688
689 switch (gic_kvm_info->type) {
690 case GIC_V2:
691 ret = vgic_v2_probe(gic_kvm_info);
692 break;
693 case GIC_V3:
694 ret = vgic_v3_probe(gic_kvm_info);
695 if (!ret) {
696 static_branch_enable(&kvm_vgic_global_state.gicv3_cpuif);
697 kvm_info("GIC system register CPU interface enabled\n");
698 }
699 break;
700 default:
701 ret = -ENODEV;
702 }
703
704 kvm_vgic_global_state.maint_irq = gic_kvm_info->maint_irq;
705
706 kfree(gic_kvm_info);
707 gic_kvm_info = NULL;
708
709 if (ret)
710 return ret;
711
712 if (!has_mask && !kvm_vgic_global_state.maint_irq)
713 return 0;
714
715 ret = request_percpu_irq(kvm_vgic_global_state.maint_irq,
716 vgic_maintenance_handler,
717 "vgic", kvm_get_running_vcpus());
718 if (ret) {
719 kvm_err("Cannot register interrupt %d\n",
720 kvm_vgic_global_state.maint_irq);
721 return ret;
722 }
723
724 kvm_info("vgic interrupt IRQ%d\n", kvm_vgic_global_state.maint_irq);
725 return 0;
726 }
727