1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3  * Copyright (C) 2015 Intel Mobile Communications GmbH
4  * Copyright (C) 2016-2017 Intel Deutschland GmbH
5  * Copyright (C) 2019-2021, 2023-2025 Intel Corporation
6  */
7 #include <linux/kernel.h>
8 #include <linux/bsearch.h>
9 #include <linux/list.h>
10 
11 #include "fw/api/tx.h"
12 #include "iwl-trans.h"
13 #include "iwl-drv.h"
14 #include "iwl-fh.h"
15 #include <linux/dmapool.h>
16 #include "fw/api/commands.h"
17 #include "pcie/internal.h"
18 #include "iwl-context-info-gen3.h"
19 
20 struct iwl_trans_dev_restart_data {
21 	struct list_head list;
22 	unsigned int restart_count;
23 	time64_t last_error;
24 	bool backoff;
25 	char name[];
26 };
27 
28 static LIST_HEAD(restart_data_list);
29 static DEFINE_SPINLOCK(restart_data_lock);
30 
31 static struct iwl_trans_dev_restart_data *
iwl_trans_get_restart_data(struct device * dev)32 iwl_trans_get_restart_data(struct device *dev)
33 {
34 	struct iwl_trans_dev_restart_data *tmp, *data = NULL;
35 	const char *name = dev_name(dev);
36 
37 	spin_lock(&restart_data_lock);
38 	list_for_each_entry(tmp, &restart_data_list, list) {
39 		if (strcmp(tmp->name, name))
40 			continue;
41 		data = tmp;
42 		break;
43 	}
44 	spin_unlock(&restart_data_lock);
45 
46 	if (data)
47 		return data;
48 
49 	data = kzalloc(struct_size(data, name, strlen(name) + 1), GFP_ATOMIC);
50 	if (!data)
51 		return NULL;
52 
53 	strcpy(data->name, name);
54 	spin_lock(&restart_data_lock);
55 	list_add_tail(&data->list, &restart_data_list);
56 	spin_unlock(&restart_data_lock);
57 
58 	return data;
59 }
60 
iwl_trans_inc_restart_count(struct device * dev)61 static void iwl_trans_inc_restart_count(struct device *dev)
62 {
63 	struct iwl_trans_dev_restart_data *data;
64 
65 	data = iwl_trans_get_restart_data(dev);
66 	if (data) {
67 		data->last_error = ktime_get_boottime_seconds();
68 		data->restart_count++;
69 	}
70 }
71 
iwl_trans_free_restart_list(void)72 void iwl_trans_free_restart_list(void)
73 {
74 	struct iwl_trans_dev_restart_data *tmp;
75 
76 	while ((tmp = list_first_entry_or_null(&restart_data_list,
77 					       typeof(*tmp), list))) {
78 		list_del(&tmp->list);
79 		kfree(tmp);
80 	}
81 }
82 
83 struct iwl_trans_reprobe {
84 	struct device *dev;
85 	struct work_struct work;
86 };
87 
iwl_trans_reprobe_wk(struct work_struct * wk)88 static void iwl_trans_reprobe_wk(struct work_struct *wk)
89 {
90 	struct iwl_trans_reprobe *reprobe;
91 
92 	reprobe = container_of(wk, typeof(*reprobe), work);
93 
94 	if (device_reprobe(reprobe->dev))
95 		dev_err(reprobe->dev, "reprobe failed!\n");
96 	put_device(reprobe->dev);
97 	kfree(reprobe);
98 	module_put(THIS_MODULE);
99 }
100 
101 #define IWL_TRANS_RESET_OK_TIME	7 /* seconds */
102 
103 static enum iwl_reset_mode
iwl_trans_determine_restart_mode(struct iwl_trans * trans)104 iwl_trans_determine_restart_mode(struct iwl_trans *trans)
105 {
106 	struct iwl_trans_dev_restart_data *data;
107 	enum iwl_reset_mode at_least = 0;
108 	unsigned int index;
109 	static const enum iwl_reset_mode escalation_list[] = {
110 		IWL_RESET_MODE_SW_RESET,
111 		IWL_RESET_MODE_REPROBE,
112 		IWL_RESET_MODE_REPROBE,
113 		IWL_RESET_MODE_FUNC_RESET,
114 		/* FIXME: add TOP reset */
115 		IWL_RESET_MODE_PROD_RESET,
116 		/* FIXME: add TOP reset */
117 		IWL_RESET_MODE_PROD_RESET,
118 		/* FIXME: add TOP reset */
119 		IWL_RESET_MODE_PROD_RESET,
120 	};
121 
122 	if (trans->restart.during_reset)
123 		at_least = IWL_RESET_MODE_REPROBE;
124 
125 	data = iwl_trans_get_restart_data(trans->dev);
126 	if (!data)
127 		return at_least;
128 
129 	if (!data->backoff &&
130 	    ktime_get_boottime_seconds() - data->last_error >=
131 			IWL_TRANS_RESET_OK_TIME)
132 		data->restart_count = 0;
133 
134 	index = data->restart_count;
135 	if (index >= ARRAY_SIZE(escalation_list)) {
136 		index = ARRAY_SIZE(escalation_list) - 1;
137 		if (!data->backoff) {
138 			data->backoff = true;
139 			return IWL_RESET_MODE_BACKOFF;
140 		}
141 		data->backoff = false;
142 	}
143 
144 	return max(at_least, escalation_list[index]);
145 }
146 
147 #define IWL_TRANS_RESET_DELAY	(HZ * 60)
148 
iwl_trans_restart_wk(struct work_struct * wk)149 static void iwl_trans_restart_wk(struct work_struct *wk)
150 {
151 	struct iwl_trans *trans = container_of(wk, typeof(*trans),
152 					       restart.wk.work);
153 	struct iwl_trans_reprobe *reprobe;
154 	enum iwl_reset_mode mode;
155 
156 	if (!trans->op_mode)
157 		return;
158 
159 	/* might have been scheduled before marked as dead, re-check */
160 	if (test_bit(STATUS_TRANS_DEAD, &trans->status))
161 		return;
162 
163 	iwl_op_mode_dump_error(trans->op_mode, &trans->restart.mode);
164 
165 	/*
166 	 * If the opmode stopped the device while we were trying to dump and
167 	 * reset, then we'll have done the dump already (synchronized by the
168 	 * opmode lock that it will acquire in iwl_op_mode_dump_error()) and
169 	 * managed that via trans->restart.mode.
170 	 * Additionally, make sure that in such a case we won't attempt to do
171 	 * any resets now, since it's no longer requested.
172 	 */
173 	if (!test_and_clear_bit(STATUS_RESET_PENDING, &trans->status))
174 		return;
175 
176 	if (!iwlwifi_mod_params.fw_restart)
177 		return;
178 
179 	mode = iwl_trans_determine_restart_mode(trans);
180 	if (mode == IWL_RESET_MODE_BACKOFF) {
181 		IWL_ERR(trans, "Too many device errors - delay next reset\n");
182 		queue_delayed_work(system_unbound_wq, &trans->restart.wk,
183 				   IWL_TRANS_RESET_DELAY);
184 		return;
185 	}
186 
187 	iwl_trans_inc_restart_count(trans->dev);
188 
189 	switch (mode) {
190 	case IWL_RESET_MODE_SW_RESET:
191 		IWL_ERR(trans, "Device error - SW reset\n");
192 		iwl_trans_opmode_sw_reset(trans, trans->restart.mode.type);
193 		break;
194 	case IWL_RESET_MODE_REPROBE:
195 		IWL_ERR(trans, "Device error - reprobe!\n");
196 
197 		/*
198 		 * get a module reference to avoid doing this while unloading
199 		 * anyway and to avoid scheduling a work with code that's
200 		 * being removed.
201 		 */
202 		if (!try_module_get(THIS_MODULE)) {
203 			IWL_ERR(trans, "Module is being unloaded - abort\n");
204 			return;
205 		}
206 
207 		reprobe = kzalloc(sizeof(*reprobe), GFP_KERNEL);
208 		if (!reprobe) {
209 			module_put(THIS_MODULE);
210 			return;
211 		}
212 		reprobe->dev = get_device(trans->dev);
213 		INIT_WORK(&reprobe->work, iwl_trans_reprobe_wk);
214 		schedule_work(&reprobe->work);
215 		break;
216 	default:
217 		iwl_trans_pcie_reset(trans, mode);
218 		break;
219 	}
220 }
221 
iwl_trans_alloc(unsigned int priv_size,struct device * dev,const struct iwl_cfg_trans_params * cfg_trans)222 struct iwl_trans *iwl_trans_alloc(unsigned int priv_size,
223 				  struct device *dev,
224 				  const struct iwl_cfg_trans_params *cfg_trans)
225 {
226 	struct iwl_trans *trans;
227 #ifdef CONFIG_LOCKDEP
228 	static struct lock_class_key __sync_cmd_key;
229 #endif
230 
231 	trans = devm_kzalloc(dev, sizeof(*trans) + priv_size, GFP_KERNEL);
232 	if (!trans)
233 		return NULL;
234 
235 	trans->trans_cfg = cfg_trans;
236 
237 #ifdef CONFIG_LOCKDEP
238 	lockdep_init_map(&trans->sync_cmd_lockdep_map, "sync_cmd_lockdep_map",
239 			 &__sync_cmd_key, 0);
240 #endif
241 
242 	trans->dev = dev;
243 	trans->num_rx_queues = 1;
244 
245 	INIT_DELAYED_WORK(&trans->restart.wk, iwl_trans_restart_wk);
246 
247 	return trans;
248 }
249 
iwl_trans_init(struct iwl_trans * trans)250 int iwl_trans_init(struct iwl_trans *trans)
251 {
252 	int txcmd_size, txcmd_align;
253 
254 	if (!trans->trans_cfg->gen2) {
255 		txcmd_size = sizeof(struct iwl_tx_cmd);
256 		txcmd_align = sizeof(void *);
257 	} else if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) {
258 		txcmd_size = sizeof(struct iwl_tx_cmd_gen2);
259 		txcmd_align = 64;
260 	} else {
261 		txcmd_size = sizeof(struct iwl_tx_cmd_gen3);
262 		txcmd_align = 128;
263 	}
264 
265 	txcmd_size += sizeof(struct iwl_cmd_header);
266 	txcmd_size += 36; /* biggest possible 802.11 header */
267 
268 	/* Ensure device TX cmd cannot reach/cross a page boundary in gen2 */
269 	if (WARN_ON(trans->trans_cfg->gen2 && txcmd_size >= txcmd_align))
270 		return -EINVAL;
271 
272 	snprintf(trans->dev_cmd_pool_name, sizeof(trans->dev_cmd_pool_name),
273 		 "iwl_cmd_pool:%s", dev_name(trans->dev));
274 	trans->dev_cmd_pool =
275 		kmem_cache_create(trans->dev_cmd_pool_name,
276 				  txcmd_size, txcmd_align,
277 				  SLAB_HWCACHE_ALIGN, NULL);
278 	if (!trans->dev_cmd_pool)
279 		return -ENOMEM;
280 
281 	/* Initialize the wait queue for commands */
282 	init_waitqueue_head(&trans->wait_command_queue);
283 
284 	return 0;
285 }
286 
iwl_trans_free(struct iwl_trans * trans)287 void iwl_trans_free(struct iwl_trans *trans)
288 {
289 	cancel_delayed_work_sync(&trans->restart.wk);
290 	kmem_cache_destroy(trans->dev_cmd_pool);
291 }
292 
iwl_trans_send_cmd(struct iwl_trans * trans,struct iwl_host_cmd * cmd)293 int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)
294 {
295 	int ret;
296 
297 	if (unlikely(!(cmd->flags & CMD_SEND_IN_RFKILL) &&
298 		     test_bit(STATUS_RFKILL_OPMODE, &trans->status)))
299 		return -ERFKILL;
300 
301 	/*
302 	 * We can't test IWL_MVM_STATUS_IN_D3 in mvm->status because this
303 	 * bit is set early in the D3 flow, before we send all the commands
304 	 * that configure the firmware for D3 operation (power, patterns, ...)
305 	 * and we don't want to flag all those with CMD_SEND_IN_D3.
306 	 * So use the system_pm_mode instead. The only command sent after
307 	 * we set system_pm_mode is D3_CONFIG_CMD, which we now flag with
308 	 * CMD_SEND_IN_D3.
309 	 */
310 	if (unlikely(trans->system_pm_mode == IWL_PLAT_PM_MODE_D3 &&
311 		     !(cmd->flags & CMD_SEND_IN_D3)))
312 		return -EHOSTDOWN;
313 
314 	if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
315 		return -EIO;
316 
317 	if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
318 		      "bad state = %d\n", trans->state))
319 		return -EIO;
320 
321 	if (!(cmd->flags & CMD_ASYNC))
322 		lock_map_acquire_read(&trans->sync_cmd_lockdep_map);
323 
324 	if (trans->wide_cmd_header && !iwl_cmd_groupid(cmd->id)) {
325 		if (cmd->id != REPLY_ERROR)
326 			cmd->id = DEF_ID(cmd->id);
327 	}
328 
329 	ret = iwl_trans_pcie_send_hcmd(trans, cmd);
330 
331 	if (!(cmd->flags & CMD_ASYNC))
332 		lock_map_release(&trans->sync_cmd_lockdep_map);
333 
334 	if (WARN_ON((cmd->flags & CMD_WANT_SKB) && !ret && !cmd->resp_pkt))
335 		return -EIO;
336 
337 	return ret;
338 }
339 IWL_EXPORT_SYMBOL(iwl_trans_send_cmd);
340 
341 /* Comparator for struct iwl_hcmd_names.
342  * Used in the binary search over a list of host commands.
343  *
344  * @key: command_id that we're looking for.
345  * @elt: struct iwl_hcmd_names candidate for match.
346  *
347  * @return 0 iff equal.
348  */
iwl_hcmd_names_cmp(const void * key,const void * elt)349 static int iwl_hcmd_names_cmp(const void *key, const void *elt)
350 {
351 	const struct iwl_hcmd_names *name = elt;
352 	const u8 *cmd1 = key;
353 	u8 cmd2 = name->cmd_id;
354 
355 	return (*cmd1 - cmd2);
356 }
357 
iwl_get_cmd_string(struct iwl_trans * trans,u32 id)358 const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id)
359 {
360 	u8 grp, cmd;
361 	struct iwl_hcmd_names *ret;
362 	const struct iwl_hcmd_arr *arr;
363 	size_t size = sizeof(struct iwl_hcmd_names);
364 
365 	grp = iwl_cmd_groupid(id);
366 	cmd = iwl_cmd_opcode(id);
367 
368 	if (!trans->command_groups || grp >= trans->command_groups_size ||
369 	    !trans->command_groups[grp].arr)
370 		return "UNKNOWN";
371 
372 	arr = &trans->command_groups[grp];
373 	ret = bsearch(&cmd, arr->arr, arr->size, size, iwl_hcmd_names_cmp);
374 	if (!ret)
375 		return "UNKNOWN";
376 	return ret->cmd_name;
377 }
378 IWL_EXPORT_SYMBOL(iwl_get_cmd_string);
379 
iwl_cmd_groups_verify_sorted(const struct iwl_trans_config * trans)380 int iwl_cmd_groups_verify_sorted(const struct iwl_trans_config *trans)
381 {
382 	int i, j;
383 	const struct iwl_hcmd_arr *arr;
384 
385 	for (i = 0; i < trans->command_groups_size; i++) {
386 		arr = &trans->command_groups[i];
387 		if (!arr->arr)
388 			continue;
389 		for (j = 0; j < arr->size - 1; j++)
390 			if (arr->arr[j].cmd_id > arr->arr[j + 1].cmd_id)
391 				return -1;
392 	}
393 	return 0;
394 }
395 IWL_EXPORT_SYMBOL(iwl_cmd_groups_verify_sorted);
396 
iwl_trans_configure(struct iwl_trans * trans,const struct iwl_trans_config * trans_cfg)397 void iwl_trans_configure(struct iwl_trans *trans,
398 			 const struct iwl_trans_config *trans_cfg)
399 {
400 	trans->op_mode = trans_cfg->op_mode;
401 
402 	iwl_trans_pcie_configure(trans, trans_cfg);
403 	WARN_ON(iwl_cmd_groups_verify_sorted(trans_cfg));
404 }
405 IWL_EXPORT_SYMBOL(iwl_trans_configure);
406 
iwl_trans_start_hw(struct iwl_trans * trans)407 int iwl_trans_start_hw(struct iwl_trans *trans)
408 {
409 	might_sleep();
410 
411 	return iwl_trans_pcie_start_hw(trans);
412 }
413 IWL_EXPORT_SYMBOL(iwl_trans_start_hw);
414 
iwl_trans_op_mode_leave(struct iwl_trans * trans)415 void iwl_trans_op_mode_leave(struct iwl_trans *trans)
416 {
417 	might_sleep();
418 
419 	iwl_trans_pcie_op_mode_leave(trans);
420 
421 	cancel_delayed_work_sync(&trans->restart.wk);
422 
423 	trans->op_mode = NULL;
424 
425 	trans->state = IWL_TRANS_NO_FW;
426 }
427 IWL_EXPORT_SYMBOL(iwl_trans_op_mode_leave);
428 
iwl_trans_write8(struct iwl_trans * trans,u32 ofs,u8 val)429 void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val)
430 {
431 	iwl_trans_pcie_write8(trans, ofs, val);
432 }
433 IWL_EXPORT_SYMBOL(iwl_trans_write8);
434 
iwl_trans_write32(struct iwl_trans * trans,u32 ofs,u32 val)435 void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val)
436 {
437 	iwl_trans_pcie_write32(trans, ofs, val);
438 }
439 IWL_EXPORT_SYMBOL(iwl_trans_write32);
440 
iwl_trans_read32(struct iwl_trans * trans,u32 ofs)441 u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs)
442 {
443 	return iwl_trans_pcie_read32(trans, ofs);
444 }
445 IWL_EXPORT_SYMBOL(iwl_trans_read32);
446 
iwl_trans_read_prph(struct iwl_trans * trans,u32 ofs)447 u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs)
448 {
449 	return iwl_trans_pcie_read_prph(trans, ofs);
450 }
451 IWL_EXPORT_SYMBOL(iwl_trans_read_prph);
452 
iwl_trans_write_prph(struct iwl_trans * trans,u32 ofs,u32 val)453 void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
454 {
455 	return iwl_trans_pcie_write_prph(trans, ofs, val);
456 }
457 IWL_EXPORT_SYMBOL(iwl_trans_write_prph);
458 
iwl_trans_read_mem(struct iwl_trans * trans,u32 addr,void * buf,int dwords)459 int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr,
460 		       void *buf, int dwords)
461 {
462 	return iwl_trans_pcie_read_mem(trans, addr, buf, dwords);
463 }
464 IWL_EXPORT_SYMBOL(iwl_trans_read_mem);
465 
iwl_trans_write_mem(struct iwl_trans * trans,u32 addr,const void * buf,int dwords)466 int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr,
467 			const void *buf, int dwords)
468 {
469 	return iwl_trans_pcie_write_mem(trans, addr, buf, dwords);
470 }
471 IWL_EXPORT_SYMBOL(iwl_trans_write_mem);
472 
iwl_trans_set_pmi(struct iwl_trans * trans,bool state)473 void iwl_trans_set_pmi(struct iwl_trans *trans, bool state)
474 {
475 	if (state)
476 		set_bit(STATUS_TPOWER_PMI, &trans->status);
477 	else
478 		clear_bit(STATUS_TPOWER_PMI, &trans->status);
479 }
480 IWL_EXPORT_SYMBOL(iwl_trans_set_pmi);
481 
iwl_trans_sw_reset(struct iwl_trans * trans,bool retake_ownership)482 int iwl_trans_sw_reset(struct iwl_trans *trans, bool retake_ownership)
483 {
484 	return iwl_trans_pcie_sw_reset(trans, retake_ownership);
485 }
486 IWL_EXPORT_SYMBOL(iwl_trans_sw_reset);
487 
488 struct iwl_trans_dump_data *
iwl_trans_dump_data(struct iwl_trans * trans,u32 dump_mask,const struct iwl_dump_sanitize_ops * sanitize_ops,void * sanitize_ctx)489 iwl_trans_dump_data(struct iwl_trans *trans, u32 dump_mask,
490 		    const struct iwl_dump_sanitize_ops *sanitize_ops,
491 		    void *sanitize_ctx)
492 {
493 	return iwl_trans_pcie_dump_data(trans, dump_mask,
494 					sanitize_ops, sanitize_ctx);
495 }
496 IWL_EXPORT_SYMBOL(iwl_trans_dump_data);
497 
iwl_trans_d3_suspend(struct iwl_trans * trans,bool test,bool reset)498 int iwl_trans_d3_suspend(struct iwl_trans *trans, bool test, bool reset)
499 {
500 	might_sleep();
501 
502 	return iwl_trans_pcie_d3_suspend(trans, test, reset);
503 }
504 IWL_EXPORT_SYMBOL(iwl_trans_d3_suspend);
505 
iwl_trans_d3_resume(struct iwl_trans * trans,enum iwl_d3_status * status,bool test,bool reset)506 int iwl_trans_d3_resume(struct iwl_trans *trans, enum iwl_d3_status *status,
507 			bool test, bool reset)
508 {
509 	might_sleep();
510 
511 	return iwl_trans_pcie_d3_resume(trans, status, test, reset);
512 }
513 IWL_EXPORT_SYMBOL(iwl_trans_d3_resume);
514 
iwl_trans_interrupts(struct iwl_trans * trans,bool enable)515 void iwl_trans_interrupts(struct iwl_trans *trans, bool enable)
516 {
517 	iwl_trans_pci_interrupts(trans, enable);
518 }
519 IWL_EXPORT_SYMBOL(iwl_trans_interrupts);
520 
iwl_trans_sync_nmi(struct iwl_trans * trans)521 void iwl_trans_sync_nmi(struct iwl_trans *trans)
522 {
523 	iwl_trans_pcie_sync_nmi(trans);
524 }
525 IWL_EXPORT_SYMBOL(iwl_trans_sync_nmi);
526 
iwl_trans_write_imr_mem(struct iwl_trans * trans,u32 dst_addr,u64 src_addr,u32 byte_cnt)527 int iwl_trans_write_imr_mem(struct iwl_trans *trans, u32 dst_addr,
528 			    u64 src_addr, u32 byte_cnt)
529 {
530 	return iwl_trans_pcie_copy_imr(trans, dst_addr, src_addr, byte_cnt);
531 }
532 IWL_EXPORT_SYMBOL(iwl_trans_write_imr_mem);
533 
iwl_trans_set_bits_mask(struct iwl_trans * trans,u32 reg,u32 mask,u32 value)534 void iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg,
535 			     u32 mask, u32 value)
536 {
537 	iwl_trans_pcie_set_bits_mask(trans, reg, mask, value);
538 }
539 IWL_EXPORT_SYMBOL(iwl_trans_set_bits_mask);
540 
iwl_trans_read_config32(struct iwl_trans * trans,u32 ofs,u32 * val)541 int iwl_trans_read_config32(struct iwl_trans *trans, u32 ofs,
542 			    u32 *val)
543 {
544 	return iwl_trans_pcie_read_config32(trans, ofs, val);
545 }
546 IWL_EXPORT_SYMBOL(iwl_trans_read_config32);
547 
_iwl_trans_grab_nic_access(struct iwl_trans * trans)548 bool _iwl_trans_grab_nic_access(struct iwl_trans *trans)
549 {
550 	return iwl_trans_pcie_grab_nic_access(trans);
551 }
552 IWL_EXPORT_SYMBOL(_iwl_trans_grab_nic_access);
553 
__releases(nic_access)554 void __releases(nic_access)
555 iwl_trans_release_nic_access(struct iwl_trans *trans)
556 {
557 	iwl_trans_pcie_release_nic_access(trans);
558 }
559 IWL_EXPORT_SYMBOL(iwl_trans_release_nic_access);
560 
iwl_trans_fw_alive(struct iwl_trans * trans,u32 scd_addr)561 void iwl_trans_fw_alive(struct iwl_trans *trans, u32 scd_addr)
562 {
563 	might_sleep();
564 
565 	trans->state = IWL_TRANS_FW_ALIVE;
566 
567 	if (trans->trans_cfg->gen2)
568 		iwl_trans_pcie_gen2_fw_alive(trans);
569 	else
570 		iwl_trans_pcie_fw_alive(trans, scd_addr);
571 }
572 IWL_EXPORT_SYMBOL(iwl_trans_fw_alive);
573 
iwl_trans_start_fw(struct iwl_trans * trans,const struct fw_img * fw,bool run_in_rfkill)574 int iwl_trans_start_fw(struct iwl_trans *trans, const struct fw_img *fw,
575 		       bool run_in_rfkill)
576 {
577 	int ret;
578 
579 	might_sleep();
580 
581 	WARN_ON_ONCE(!trans->rx_mpdu_cmd);
582 
583 	clear_bit(STATUS_FW_ERROR, &trans->status);
584 
585 	if (trans->trans_cfg->gen2)
586 		ret = iwl_trans_pcie_gen2_start_fw(trans, fw, run_in_rfkill);
587 	else
588 		ret = iwl_trans_pcie_start_fw(trans, fw, run_in_rfkill);
589 
590 	if (ret == 0)
591 		trans->state = IWL_TRANS_FW_STARTED;
592 
593 	return ret;
594 }
595 IWL_EXPORT_SYMBOL(iwl_trans_start_fw);
596 
iwl_trans_stop_device(struct iwl_trans * trans)597 void iwl_trans_stop_device(struct iwl_trans *trans)
598 {
599 	might_sleep();
600 
601 	/*
602 	 * See also the comment in iwl_trans_restart_wk().
603 	 *
604 	 * When the opmode stops the device while a reset is pending, the
605 	 * worker (iwl_trans_restart_wk) might not have run yet or, more
606 	 * likely, will be blocked on the opmode lock. Due to the locking,
607 	 * we can't just flush the worker.
608 	 *
609 	 * If this is the case, then the test_and_clear_bit() ensures that
610 	 * the worker won't attempt to do anything after the stop.
611 	 *
612 	 * The trans->restart.mode is a handshake with the opmode, we set
613 	 * the context there to ABORT so that when the worker can finally
614 	 * acquire the lock in the opmode, the code there won't attempt to
615 	 * do any dumps. Since we'd really like to have the dump though,
616 	 * also do it inline here (with the opmode locks already held),
617 	 * but use a separate mode struct to avoid races.
618 	 */
619 	if (test_and_clear_bit(STATUS_RESET_PENDING, &trans->status)) {
620 		struct iwl_fw_error_dump_mode mode;
621 
622 		mode = trans->restart.mode;
623 		mode.context = IWL_ERR_CONTEXT_FROM_OPMODE;
624 		trans->restart.mode.context = IWL_ERR_CONTEXT_ABORT;
625 
626 		iwl_op_mode_dump_error(trans->op_mode, &mode);
627 	}
628 
629 	if (trans->trans_cfg->gen2)
630 		iwl_trans_pcie_gen2_stop_device(trans);
631 	else
632 		iwl_trans_pcie_stop_device(trans);
633 
634 	trans->state = IWL_TRANS_NO_FW;
635 }
636 IWL_EXPORT_SYMBOL(iwl_trans_stop_device);
637 
iwl_trans_tx(struct iwl_trans * trans,struct sk_buff * skb,struct iwl_device_tx_cmd * dev_cmd,int queue)638 int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb,
639 		 struct iwl_device_tx_cmd *dev_cmd, int queue)
640 {
641 	if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
642 		return -EIO;
643 
644 	if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
645 		      "bad state = %d\n", trans->state))
646 		return -EIO;
647 
648 	if (trans->trans_cfg->gen2)
649 		return iwl_txq_gen2_tx(trans, skb, dev_cmd, queue);
650 
651 	return iwl_trans_pcie_tx(trans, skb, dev_cmd, queue);
652 }
653 IWL_EXPORT_SYMBOL(iwl_trans_tx);
654 
iwl_trans_reclaim(struct iwl_trans * trans,int queue,int ssn,struct sk_buff_head * skbs,bool is_flush)655 void iwl_trans_reclaim(struct iwl_trans *trans, int queue, int ssn,
656 		       struct sk_buff_head *skbs, bool is_flush)
657 {
658 	if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
659 		return;
660 
661 	if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
662 		      "bad state = %d\n", trans->state))
663 		return;
664 
665 	iwl_pcie_reclaim(trans, queue, ssn, skbs, is_flush);
666 }
667 IWL_EXPORT_SYMBOL(iwl_trans_reclaim);
668 
iwl_trans_txq_disable(struct iwl_trans * trans,int queue,bool configure_scd)669 void iwl_trans_txq_disable(struct iwl_trans *trans, int queue,
670 			   bool configure_scd)
671 {
672 	iwl_trans_pcie_txq_disable(trans, queue, configure_scd);
673 }
674 IWL_EXPORT_SYMBOL(iwl_trans_txq_disable);
675 
iwl_trans_txq_enable_cfg(struct iwl_trans * trans,int queue,u16 ssn,const struct iwl_trans_txq_scd_cfg * cfg,unsigned int queue_wdg_timeout)676 bool iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn,
677 			      const struct iwl_trans_txq_scd_cfg *cfg,
678 			      unsigned int queue_wdg_timeout)
679 {
680 	might_sleep();
681 
682 	if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
683 		      "bad state = %d\n", trans->state))
684 		return false;
685 
686 	return iwl_trans_pcie_txq_enable(trans, queue, ssn,
687 					 cfg, queue_wdg_timeout);
688 }
689 IWL_EXPORT_SYMBOL(iwl_trans_txq_enable_cfg);
690 
iwl_trans_wait_txq_empty(struct iwl_trans * trans,int queue)691 int iwl_trans_wait_txq_empty(struct iwl_trans *trans, int queue)
692 {
693 	if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
694 		return -EIO;
695 
696 	if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
697 		      "bad state = %d\n", trans->state))
698 		return -EIO;
699 
700 	return iwl_trans_pcie_wait_txq_empty(trans, queue);
701 }
702 IWL_EXPORT_SYMBOL(iwl_trans_wait_txq_empty);
703 
iwl_trans_wait_tx_queues_empty(struct iwl_trans * trans,u32 txqs)704 int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans, u32 txqs)
705 {
706 	if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
707 		      "bad state = %d\n", trans->state))
708 		return -EIO;
709 
710 	return iwl_trans_pcie_wait_txqs_empty(trans, txqs);
711 }
712 IWL_EXPORT_SYMBOL(iwl_trans_wait_tx_queues_empty);
713 
iwl_trans_freeze_txq_timer(struct iwl_trans * trans,unsigned long txqs,bool freeze)714 void iwl_trans_freeze_txq_timer(struct iwl_trans *trans,
715 				unsigned long txqs, bool freeze)
716 {
717 	if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
718 		      "bad state = %d\n", trans->state))
719 		return;
720 
721 	iwl_pcie_freeze_txq_timer(trans, txqs, freeze);
722 }
723 IWL_EXPORT_SYMBOL(iwl_trans_freeze_txq_timer);
724 
iwl_trans_txq_set_shared_mode(struct iwl_trans * trans,int txq_id,bool shared_mode)725 void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans,
726 				   int txq_id, bool shared_mode)
727 {
728 	iwl_trans_pcie_txq_set_shared_mode(trans, txq_id, shared_mode);
729 }
730 IWL_EXPORT_SYMBOL(iwl_trans_txq_set_shared_mode);
731 
732 #ifdef CONFIG_IWLWIFI_DEBUGFS
iwl_trans_debugfs_cleanup(struct iwl_trans * trans)733 void iwl_trans_debugfs_cleanup(struct iwl_trans *trans)
734 {
735 	iwl_trans_pcie_debugfs_cleanup(trans);
736 }
737 IWL_EXPORT_SYMBOL(iwl_trans_debugfs_cleanup);
738 #endif
739 
iwl_trans_set_q_ptrs(struct iwl_trans * trans,int queue,int ptr)740 void iwl_trans_set_q_ptrs(struct iwl_trans *trans, int queue, int ptr)
741 {
742 	if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
743 		      "bad state = %d\n", trans->state))
744 		return;
745 
746 	iwl_pcie_set_q_ptrs(trans, queue, ptr);
747 }
748 IWL_EXPORT_SYMBOL(iwl_trans_set_q_ptrs);
749 
iwl_trans_txq_alloc(struct iwl_trans * trans,u32 flags,u32 sta_mask,u8 tid,int size,unsigned int wdg_timeout)750 int iwl_trans_txq_alloc(struct iwl_trans *trans, u32 flags, u32 sta_mask,
751 			u8 tid, int size, unsigned int wdg_timeout)
752 {
753 	might_sleep();
754 
755 	if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
756 		      "bad state = %d\n", trans->state))
757 		return -EIO;
758 
759 	return iwl_txq_dyn_alloc(trans, flags, sta_mask, tid,
760 				 size, wdg_timeout);
761 }
762 IWL_EXPORT_SYMBOL(iwl_trans_txq_alloc);
763 
iwl_trans_txq_free(struct iwl_trans * trans,int queue)764 void iwl_trans_txq_free(struct iwl_trans *trans, int queue)
765 {
766 	iwl_txq_dyn_free(trans, queue);
767 }
768 IWL_EXPORT_SYMBOL(iwl_trans_txq_free);
769 
iwl_trans_get_rxq_dma_data(struct iwl_trans * trans,int queue,struct iwl_trans_rxq_dma_data * data)770 int iwl_trans_get_rxq_dma_data(struct iwl_trans *trans, int queue,
771 			       struct iwl_trans_rxq_dma_data *data)
772 {
773 	return iwl_trans_pcie_rxq_dma_data(trans, queue, data);
774 }
775 IWL_EXPORT_SYMBOL(iwl_trans_get_rxq_dma_data);
776 
iwl_trans_load_pnvm(struct iwl_trans * trans,const struct iwl_pnvm_image * pnvm_data,const struct iwl_ucode_capabilities * capa)777 int iwl_trans_load_pnvm(struct iwl_trans *trans,
778 			const struct iwl_pnvm_image *pnvm_data,
779 			const struct iwl_ucode_capabilities *capa)
780 {
781 	return iwl_trans_pcie_ctx_info_gen3_load_pnvm(trans, pnvm_data, capa);
782 }
783 IWL_EXPORT_SYMBOL(iwl_trans_load_pnvm);
784 
iwl_trans_set_pnvm(struct iwl_trans * trans,const struct iwl_ucode_capabilities * capa)785 void iwl_trans_set_pnvm(struct iwl_trans *trans,
786 			const struct iwl_ucode_capabilities *capa)
787 {
788 	iwl_trans_pcie_ctx_info_gen3_set_pnvm(trans, capa);
789 }
790 IWL_EXPORT_SYMBOL(iwl_trans_set_pnvm);
791 
iwl_trans_load_reduce_power(struct iwl_trans * trans,const struct iwl_pnvm_image * payloads,const struct iwl_ucode_capabilities * capa)792 int iwl_trans_load_reduce_power(struct iwl_trans *trans,
793 				const struct iwl_pnvm_image *payloads,
794 				const struct iwl_ucode_capabilities *capa)
795 {
796 	return iwl_trans_pcie_ctx_info_gen3_load_reduce_power(trans, payloads,
797 							      capa);
798 }
799 IWL_EXPORT_SYMBOL(iwl_trans_load_reduce_power);
800 
iwl_trans_set_reduce_power(struct iwl_trans * trans,const struct iwl_ucode_capabilities * capa)801 void iwl_trans_set_reduce_power(struct iwl_trans *trans,
802 				const struct iwl_ucode_capabilities *capa)
803 {
804 	iwl_trans_pcie_ctx_info_gen3_set_reduce_power(trans, capa);
805 }
806 IWL_EXPORT_SYMBOL(iwl_trans_set_reduce_power);
807