1 /*
2 * Copyright © 2008 Intel Corporation
3 * 2014 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 *
24 */
25
26 #include <drm/drm_atomic_helper.h>
27 #include <drm/drm_edid.h>
28 #include <drm/drm_probe_helper.h>
29
30 #include "i915_drv.h"
31 #include "intel_atomic.h"
32 #include "intel_audio.h"
33 #include "intel_connector.h"
34 #include "intel_ddi.h"
35 #include "intel_display_types.h"
36 #include "intel_hotplug.h"
37 #include "intel_dp.h"
38 #include "intel_dp_mst.h"
39 #include "intel_dpio_phy.h"
40 #include "intel_hdcp.h"
41
intel_dp_mst_compute_link_config(struct intel_encoder * encoder,struct intel_crtc_state * crtc_state,struct drm_connector_state * conn_state,struct link_config_limits * limits)42 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
43 struct intel_crtc_state *crtc_state,
44 struct drm_connector_state *conn_state,
45 struct link_config_limits *limits)
46 {
47 struct drm_atomic_state *state = crtc_state->uapi.state;
48 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
49 struct intel_dp *intel_dp = &intel_mst->primary->dp;
50 struct intel_connector *connector =
51 to_intel_connector(conn_state->connector);
52 struct drm_i915_private *i915 = to_i915(connector->base.dev);
53 const struct drm_display_mode *adjusted_mode =
54 &crtc_state->hw.adjusted_mode;
55 bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0,
56 DP_DPCD_QUIRK_CONSTANT_N);
57 int bpp, slots = -EINVAL;
58
59 crtc_state->lane_count = limits->max_lane_count;
60 crtc_state->port_clock = limits->max_clock;
61
62 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
63 crtc_state->pipe_bpp = bpp;
64
65 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
66 crtc_state->pipe_bpp,
67 false);
68
69 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
70 connector->port,
71 crtc_state->pbn, 0);
72 if (slots == -EDEADLK)
73 return slots;
74 if (slots >= 0)
75 break;
76 }
77
78 if (slots < 0) {
79 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
80 slots);
81 return slots;
82 }
83
84 intel_link_compute_m_n(crtc_state->pipe_bpp,
85 crtc_state->lane_count,
86 adjusted_mode->crtc_clock,
87 crtc_state->port_clock,
88 &crtc_state->dp_m_n,
89 constant_n, crtc_state->fec_enable);
90 crtc_state->dp_m_n.tu = slots;
91
92 return 0;
93 }
94
intel_dp_mst_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state)95 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
96 struct intel_crtc_state *pipe_config,
97 struct drm_connector_state *conn_state)
98 {
99 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
100 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
101 struct intel_dp *intel_dp = &intel_mst->primary->dp;
102 struct intel_connector *connector =
103 to_intel_connector(conn_state->connector);
104 struct intel_digital_connector_state *intel_conn_state =
105 to_intel_digital_connector_state(conn_state);
106 const struct drm_display_mode *adjusted_mode =
107 &pipe_config->hw.adjusted_mode;
108 struct link_config_limits limits;
109 int ret;
110
111 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
112 return -EINVAL;
113
114 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
115 pipe_config->has_pch_encoder = false;
116
117 if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
118 pipe_config->has_audio = connector->port->has_audio;
119 else
120 pipe_config->has_audio =
121 intel_conn_state->force_audio == HDMI_AUDIO_ON;
122
123 /*
124 * for MST we always configure max link bw - the spec doesn't
125 * seem to suggest we should do otherwise.
126 */
127 limits.min_clock =
128 limits.max_clock = intel_dp_max_link_rate(intel_dp);
129
130 limits.min_lane_count =
131 limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
132
133 limits.min_bpp = intel_dp_min_bpp(pipe_config);
134 /*
135 * FIXME: If all the streams can't fit into the link with
136 * their current pipe_bpp we should reduce pipe_bpp across
137 * the board until things start to fit. Until then we
138 * limit to <= 8bpc since that's what was hardcoded for all
139 * MST streams previously. This hack should be removed once
140 * we have the proper retry logic in place.
141 */
142 limits.max_bpp = min(pipe_config->pipe_bpp, 24);
143
144 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
145
146 ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
147 conn_state, &limits);
148 if (ret)
149 return ret;
150
151 pipe_config->limited_color_range =
152 intel_dp_limited_color_range(pipe_config, conn_state);
153
154 if (IS_GEN9_LP(dev_priv))
155 pipe_config->lane_lat_optim_mask =
156 bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
157
158 intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
159
160 return 0;
161 }
162
163 /*
164 * Iterate over all connectors and return a mask of
165 * all CPU transcoders streaming over the same DP link.
166 */
167 static unsigned int
intel_dp_mst_transcoder_mask(struct intel_atomic_state * state,struct intel_dp * mst_port)168 intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
169 struct intel_dp *mst_port)
170 {
171 struct drm_i915_private *dev_priv = to_i915(state->base.dev);
172 const struct intel_digital_connector_state *conn_state;
173 struct intel_connector *connector;
174 u8 transcoders = 0;
175 int i;
176
177 if (INTEL_GEN(dev_priv) < 12)
178 return 0;
179
180 for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
181 const struct intel_crtc_state *crtc_state;
182 struct intel_crtc *crtc;
183
184 if (connector->mst_port != mst_port || !conn_state->base.crtc)
185 continue;
186
187 crtc = to_intel_crtc(conn_state->base.crtc);
188 crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
189
190 if (!crtc_state->hw.active)
191 continue;
192
193 transcoders |= BIT(crtc_state->cpu_transcoder);
194 }
195
196 return transcoders;
197 }
198
intel_dp_mst_compute_config_late(struct intel_encoder * encoder,struct intel_crtc_state * crtc_state,struct drm_connector_state * conn_state)199 static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder,
200 struct intel_crtc_state *crtc_state,
201 struct drm_connector_state *conn_state)
202 {
203 struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
204 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
205 struct intel_dp *intel_dp = &intel_mst->primary->dp;
206
207 /* lowest numbered transcoder will be designated master */
208 crtc_state->mst_master_transcoder =
209 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
210
211 return 0;
212 }
213
214 /*
215 * If one of the connectors in a MST stream needs a modeset, mark all CRTCs
216 * that shares the same MST stream as mode changed,
217 * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do
218 * a fastset when possible.
219 */
220 static int
intel_dp_mst_atomic_master_trans_check(struct intel_connector * connector,struct intel_atomic_state * state)221 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector,
222 struct intel_atomic_state *state)
223 {
224 struct drm_i915_private *dev_priv = to_i915(state->base.dev);
225 struct drm_connector_list_iter connector_list_iter;
226 struct intel_connector *connector_iter;
227
228 if (INTEL_GEN(dev_priv) < 12)
229 return 0;
230
231 if (!intel_connector_needs_modeset(state, &connector->base))
232 return 0;
233
234 drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter);
235 for_each_intel_connector_iter(connector_iter, &connector_list_iter) {
236 struct intel_digital_connector_state *conn_iter_state;
237 struct intel_crtc_state *crtc_state;
238 struct intel_crtc *crtc;
239 int ret;
240
241 if (connector_iter->mst_port != connector->mst_port ||
242 connector_iter == connector)
243 continue;
244
245 conn_iter_state = intel_atomic_get_digital_connector_state(state,
246 connector_iter);
247 if (IS_ERR(conn_iter_state)) {
248 drm_connector_list_iter_end(&connector_list_iter);
249 return PTR_ERR(conn_iter_state);
250 }
251
252 if (!conn_iter_state->base.crtc)
253 continue;
254
255 crtc = to_intel_crtc(conn_iter_state->base.crtc);
256 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
257 if (IS_ERR(crtc_state)) {
258 drm_connector_list_iter_end(&connector_list_iter);
259 return PTR_ERR(crtc_state);
260 }
261
262 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
263 if (ret) {
264 drm_connector_list_iter_end(&connector_list_iter);
265 return ret;
266 }
267 crtc_state->uapi.mode_changed = true;
268 }
269 drm_connector_list_iter_end(&connector_list_iter);
270
271 return 0;
272 }
273
274 static int
intel_dp_mst_atomic_check(struct drm_connector * connector,struct drm_atomic_state * _state)275 intel_dp_mst_atomic_check(struct drm_connector *connector,
276 struct drm_atomic_state *_state)
277 {
278 struct intel_atomic_state *state = to_intel_atomic_state(_state);
279 struct drm_connector_state *new_conn_state =
280 drm_atomic_get_new_connector_state(&state->base, connector);
281 struct drm_connector_state *old_conn_state =
282 drm_atomic_get_old_connector_state(&state->base, connector);
283 struct intel_connector *intel_connector =
284 to_intel_connector(connector);
285 struct drm_crtc *new_crtc = new_conn_state->crtc;
286 struct drm_dp_mst_topology_mgr *mgr;
287 int ret;
288
289 ret = intel_digital_connector_atomic_check(connector, &state->base);
290 if (ret)
291 return ret;
292
293 ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state);
294 if (ret)
295 return ret;
296
297 if (!old_conn_state->crtc)
298 return 0;
299
300 /* We only want to free VCPI if this state disables the CRTC on this
301 * connector
302 */
303 if (new_crtc) {
304 struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc);
305 struct intel_crtc_state *crtc_state =
306 intel_atomic_get_new_crtc_state(state, intel_crtc);
307
308 if (!crtc_state ||
309 !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) ||
310 crtc_state->uapi.enable)
311 return 0;
312 }
313
314 mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr;
315 ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr,
316 intel_connector->port);
317
318 return ret;
319 }
320
clear_act_sent(struct intel_dp * intel_dp)321 static void clear_act_sent(struct intel_dp *intel_dp)
322 {
323 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
324
325 intel_de_write(i915, intel_dp->regs.dp_tp_status,
326 DP_TP_STATUS_ACT_SENT);
327 }
328
wait_for_act_sent(struct intel_dp * intel_dp)329 static void wait_for_act_sent(struct intel_dp *intel_dp)
330 {
331 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
332
333 if (intel_de_wait_for_set(i915, intel_dp->regs.dp_tp_status,
334 DP_TP_STATUS_ACT_SENT, 1))
335 drm_err(&i915->drm, "Timed out waiting for ACT sent\n");
336
337 drm_dp_check_act_status(&intel_dp->mst_mgr);
338 }
339
intel_mst_disable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * old_crtc_state,const struct drm_connector_state * old_conn_state)340 static void intel_mst_disable_dp(struct intel_atomic_state *state,
341 struct intel_encoder *encoder,
342 const struct intel_crtc_state *old_crtc_state,
343 const struct drm_connector_state *old_conn_state)
344 {
345 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
346 struct intel_digital_port *dig_port = intel_mst->primary;
347 struct intel_dp *intel_dp = &dig_port->dp;
348 struct intel_connector *connector =
349 to_intel_connector(old_conn_state->connector);
350 struct drm_i915_private *i915 = to_i915(connector->base.dev);
351 int ret;
352
353 drm_dbg_kms(&i915->drm, "active links %d\n",
354 intel_dp->active_mst_links);
355
356 intel_hdcp_disable(intel_mst->connector);
357
358 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
359
360 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
361 if (ret) {
362 drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
363 }
364 if (old_crtc_state->has_audio)
365 intel_audio_codec_disable(encoder,
366 old_crtc_state, old_conn_state);
367 }
368
intel_mst_post_disable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * old_crtc_state,const struct drm_connector_state * old_conn_state)369 static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
370 struct intel_encoder *encoder,
371 const struct intel_crtc_state *old_crtc_state,
372 const struct drm_connector_state *old_conn_state)
373 {
374 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
375 struct intel_digital_port *dig_port = intel_mst->primary;
376 struct intel_dp *intel_dp = &dig_port->dp;
377 struct intel_connector *connector =
378 to_intel_connector(old_conn_state->connector);
379 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
380 bool last_mst_stream;
381 u32 val;
382
383 intel_dp->active_mst_links--;
384 last_mst_stream = intel_dp->active_mst_links == 0;
385 drm_WARN_ON(&dev_priv->drm,
386 INTEL_GEN(dev_priv) >= 12 && last_mst_stream &&
387 !intel_dp_mst_is_master_trans(old_crtc_state));
388
389 intel_crtc_vblank_off(old_crtc_state);
390
391 intel_disable_pipe(old_crtc_state);
392
393 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
394
395 clear_act_sent(intel_dp);
396
397 val = intel_de_read(dev_priv,
398 TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder));
399 val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
400 intel_de_write(dev_priv,
401 TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
402 val);
403
404 wait_for_act_sent(intel_dp);
405
406 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
407
408 intel_ddi_disable_transcoder_func(old_crtc_state);
409
410 if (INTEL_GEN(dev_priv) >= 9)
411 skl_scaler_disable(old_crtc_state);
412 else
413 ilk_pfit_disable(old_crtc_state);
414
415 /*
416 * Power down mst path before disabling the port, otherwise we end
417 * up getting interrupts from the sink upon detecting link loss.
418 */
419 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
420 false);
421
422 /*
423 * BSpec 4287: disable DIP after the transcoder is disabled and before
424 * the transcoder clock select is set to none.
425 */
426 if (last_mst_stream)
427 intel_dp_set_infoframes(&dig_port->base, false,
428 old_crtc_state, NULL);
429 /*
430 * From TGL spec: "If multi-stream slave transcoder: Configure
431 * Transcoder Clock Select to direct no clock to the transcoder"
432 *
433 * From older GENs spec: "Configure Transcoder Clock Select to direct
434 * no clock to the transcoder"
435 */
436 if (INTEL_GEN(dev_priv) < 12 || !last_mst_stream)
437 intel_ddi_disable_pipe_clock(old_crtc_state);
438
439
440 intel_mst->connector = NULL;
441 if (last_mst_stream)
442 dig_port->base.post_disable(state, &dig_port->base,
443 old_crtc_state, NULL);
444
445 drm_dbg_kms(&dev_priv->drm, "active links %d\n",
446 intel_dp->active_mst_links);
447 }
448
intel_mst_pre_pll_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)449 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
450 struct intel_encoder *encoder,
451 const struct intel_crtc_state *pipe_config,
452 const struct drm_connector_state *conn_state)
453 {
454 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
455 struct intel_digital_port *dig_port = intel_mst->primary;
456 struct intel_dp *intel_dp = &dig_port->dp;
457
458 if (intel_dp->active_mst_links == 0)
459 dig_port->base.pre_pll_enable(state, &dig_port->base,
460 pipe_config, NULL);
461 }
462
intel_mst_pre_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)463 static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
464 struct intel_encoder *encoder,
465 const struct intel_crtc_state *pipe_config,
466 const struct drm_connector_state *conn_state)
467 {
468 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
469 struct intel_digital_port *dig_port = intel_mst->primary;
470 struct intel_dp *intel_dp = &dig_port->dp;
471 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
472 struct intel_connector *connector =
473 to_intel_connector(conn_state->connector);
474 int ret;
475 bool first_mst_stream;
476
477 /* MST encoders are bound to a crtc, not to a connector,
478 * force the mapping here for get_hw_state.
479 */
480 connector->encoder = encoder;
481 intel_mst->connector = connector;
482 first_mst_stream = intel_dp->active_mst_links == 0;
483 drm_WARN_ON(&dev_priv->drm,
484 INTEL_GEN(dev_priv) >= 12 && first_mst_stream &&
485 !intel_dp_mst_is_master_trans(pipe_config));
486
487 drm_dbg_kms(&dev_priv->drm, "active links %d\n",
488 intel_dp->active_mst_links);
489
490 if (first_mst_stream)
491 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
492
493 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
494
495 if (first_mst_stream)
496 dig_port->base.pre_enable(state, &dig_port->base,
497 pipe_config, NULL);
498
499 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
500 connector->port,
501 pipe_config->pbn,
502 pipe_config->dp_m_n.tu);
503 if (!ret)
504 drm_err(&dev_priv->drm, "failed to allocate vcpi\n");
505
506 intel_dp->active_mst_links++;
507
508 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
509
510 /*
511 * Before Gen 12 this is not done as part of
512 * dig_port->base.pre_enable() and should be done here. For
513 * Gen 12+ the step in which this should be done is different for the
514 * first MST stream, so it's done on the DDI for the first stream and
515 * here for the following ones.
516 */
517 if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream)
518 intel_ddi_enable_pipe_clock(encoder, pipe_config);
519
520 intel_ddi_set_dp_msa(pipe_config, conn_state);
521
522 intel_dp_set_m_n(pipe_config, M1_N1);
523 }
524
intel_mst_enable_dp(struct intel_atomic_state * state,struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)525 static void intel_mst_enable_dp(struct intel_atomic_state *state,
526 struct intel_encoder *encoder,
527 const struct intel_crtc_state *pipe_config,
528 const struct drm_connector_state *conn_state)
529 {
530 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
531 struct intel_digital_port *dig_port = intel_mst->primary;
532 struct intel_dp *intel_dp = &dig_port->dp;
533 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
534 u32 val;
535
536 drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
537
538 clear_act_sent(intel_dp);
539
540 intel_ddi_enable_transcoder_func(encoder, pipe_config);
541
542 val = intel_de_read(dev_priv,
543 TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder));
544 val |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
545 intel_de_write(dev_priv,
546 TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder),
547 val);
548
549 drm_dbg_kms(&dev_priv->drm, "active links %d\n",
550 intel_dp->active_mst_links);
551
552 wait_for_act_sent(intel_dp);
553
554 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
555
556 intel_enable_pipe(pipe_config);
557
558 intel_crtc_vblank_on(pipe_config);
559
560 if (pipe_config->has_audio)
561 intel_audio_codec_enable(encoder, pipe_config, conn_state);
562
563 /* Enable hdcp if it's desired */
564 if (conn_state->content_protection ==
565 DRM_MODE_CONTENT_PROTECTION_DESIRED)
566 intel_hdcp_enable(to_intel_connector(conn_state->connector),
567 pipe_config->cpu_transcoder,
568 (u8)conn_state->hdcp_content_type);
569 }
570
intel_dp_mst_enc_get_hw_state(struct intel_encoder * encoder,enum pipe * pipe)571 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
572 enum pipe *pipe)
573 {
574 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
575 *pipe = intel_mst->pipe;
576 if (intel_mst->connector)
577 return true;
578 return false;
579 }
580
intel_dp_mst_enc_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config)581 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
582 struct intel_crtc_state *pipe_config)
583 {
584 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
585 struct intel_digital_port *dig_port = intel_mst->primary;
586
587 intel_ddi_get_config(&dig_port->base, pipe_config);
588 }
589
intel_dp_mst_get_ddc_modes(struct drm_connector * connector)590 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
591 {
592 struct intel_connector *intel_connector = to_intel_connector(connector);
593 struct intel_dp *intel_dp = intel_connector->mst_port;
594 struct edid *edid;
595 int ret;
596
597 if (drm_connector_is_unregistered(connector))
598 return intel_connector_update_modes(connector, NULL);
599
600 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
601 ret = intel_connector_update_modes(connector, edid);
602 kfree(edid);
603
604 return ret;
605 }
606
607 static int
intel_dp_mst_connector_late_register(struct drm_connector * connector)608 intel_dp_mst_connector_late_register(struct drm_connector *connector)
609 {
610 struct intel_connector *intel_connector = to_intel_connector(connector);
611 int ret;
612
613 ret = drm_dp_mst_connector_late_register(connector,
614 intel_connector->port);
615 if (ret < 0)
616 return ret;
617
618 ret = intel_connector_register(connector);
619 if (ret < 0)
620 drm_dp_mst_connector_early_unregister(connector,
621 intel_connector->port);
622
623 return ret;
624 }
625
626 static void
intel_dp_mst_connector_early_unregister(struct drm_connector * connector)627 intel_dp_mst_connector_early_unregister(struct drm_connector *connector)
628 {
629 struct intel_connector *intel_connector = to_intel_connector(connector);
630
631 intel_connector_unregister(connector);
632 drm_dp_mst_connector_early_unregister(connector,
633 intel_connector->port);
634 }
635
636 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
637 .fill_modes = drm_helper_probe_single_connector_modes,
638 .atomic_get_property = intel_digital_connector_atomic_get_property,
639 .atomic_set_property = intel_digital_connector_atomic_set_property,
640 .late_register = intel_dp_mst_connector_late_register,
641 .early_unregister = intel_dp_mst_connector_early_unregister,
642 .destroy = intel_connector_destroy,
643 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
644 .atomic_duplicate_state = intel_digital_connector_duplicate_state,
645 };
646
intel_dp_mst_get_modes(struct drm_connector * connector)647 static int intel_dp_mst_get_modes(struct drm_connector *connector)
648 {
649 return intel_dp_mst_get_ddc_modes(connector);
650 }
651
652 static int
intel_dp_mst_mode_valid_ctx(struct drm_connector * connector,struct drm_display_mode * mode,struct drm_modeset_acquire_ctx * ctx,enum drm_mode_status * status)653 intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
654 struct drm_display_mode *mode,
655 struct drm_modeset_acquire_ctx *ctx,
656 enum drm_mode_status *status)
657 {
658 struct drm_i915_private *dev_priv = to_i915(connector->dev);
659 struct intel_connector *intel_connector = to_intel_connector(connector);
660 struct intel_dp *intel_dp = intel_connector->mst_port;
661 struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
662 struct drm_dp_mst_port *port = intel_connector->port;
663 const int min_bpp = 18;
664 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
665 int max_rate, mode_rate, max_lanes, max_link_clock;
666 int ret;
667
668 if (drm_connector_is_unregistered(connector)) {
669 *status = MODE_ERROR;
670 return 0;
671 }
672
673 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) {
674 *status = MODE_NO_DBLESCAN;
675 return 0;
676 }
677
678 max_link_clock = intel_dp_max_link_rate(intel_dp);
679 max_lanes = intel_dp_max_lane_count(intel_dp);
680
681 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
682 mode_rate = intel_dp_link_required(mode->clock, min_bpp);
683
684 ret = drm_modeset_lock(&mgr->base.lock, ctx);
685 if (ret)
686 return ret;
687
688 if (mode_rate > max_rate || mode->clock > max_dotclk ||
689 drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) {
690 *status = MODE_CLOCK_HIGH;
691 return 0;
692 }
693
694 if (mode->clock < 10000) {
695 *status = MODE_CLOCK_LOW;
696 return 0;
697 }
698
699 if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
700 *status = MODE_H_ILLEGAL;
701 return 0;
702 }
703
704 *status = intel_mode_valid_max_plane_size(dev_priv, mode);
705 return 0;
706 }
707
intel_mst_atomic_best_encoder(struct drm_connector * connector,struct drm_connector_state * state)708 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
709 struct drm_connector_state *state)
710 {
711 struct intel_connector *intel_connector = to_intel_connector(connector);
712 struct intel_dp *intel_dp = intel_connector->mst_port;
713 struct intel_crtc *crtc = to_intel_crtc(state->crtc);
714
715 return &intel_dp->mst_encoders[crtc->pipe]->base.base;
716 }
717
718 static int
intel_dp_mst_detect(struct drm_connector * connector,struct drm_modeset_acquire_ctx * ctx,bool force)719 intel_dp_mst_detect(struct drm_connector *connector,
720 struct drm_modeset_acquire_ctx *ctx, bool force)
721 {
722 struct drm_i915_private *i915 = to_i915(connector->dev);
723 struct intel_connector *intel_connector = to_intel_connector(connector);
724 struct intel_dp *intel_dp = intel_connector->mst_port;
725
726 if (!INTEL_DISPLAY_ENABLED(i915))
727 return connector_status_disconnected;
728
729 if (drm_connector_is_unregistered(connector))
730 return connector_status_disconnected;
731
732 return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr,
733 intel_connector->port);
734 }
735
736 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
737 .get_modes = intel_dp_mst_get_modes,
738 .mode_valid_ctx = intel_dp_mst_mode_valid_ctx,
739 .atomic_best_encoder = intel_mst_atomic_best_encoder,
740 .atomic_check = intel_dp_mst_atomic_check,
741 .detect_ctx = intel_dp_mst_detect,
742 };
743
intel_dp_mst_encoder_destroy(struct drm_encoder * encoder)744 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
745 {
746 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder));
747
748 drm_encoder_cleanup(encoder);
749 kfree(intel_mst);
750 }
751
752 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
753 .destroy = intel_dp_mst_encoder_destroy,
754 };
755
intel_dp_mst_get_hw_state(struct intel_connector * connector)756 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
757 {
758 if (intel_attached_encoder(connector) && connector->base.state->crtc) {
759 enum pipe pipe;
760 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe))
761 return false;
762 return true;
763 }
764 return false;
765 }
766
intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr * mgr,struct drm_dp_mst_port * port,const char * pathprop)767 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
768 {
769 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
770 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
771 struct drm_device *dev = dig_port->base.base.dev;
772 struct drm_i915_private *dev_priv = to_i915(dev);
773 struct intel_connector *intel_connector;
774 struct drm_connector *connector;
775 enum pipe pipe;
776 int ret;
777
778 intel_connector = intel_connector_alloc();
779 if (!intel_connector)
780 return NULL;
781
782 intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
783 intel_connector->mst_port = intel_dp;
784 intel_connector->port = port;
785 drm_dp_mst_get_port_malloc(port);
786
787 connector = &intel_connector->base;
788 ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
789 DRM_MODE_CONNECTOR_DisplayPort);
790 if (ret) {
791 intel_connector_free(intel_connector);
792 return NULL;
793 }
794
795 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
796
797 for_each_pipe(dev_priv, pipe) {
798 struct drm_encoder *enc =
799 &intel_dp->mst_encoders[pipe]->base.base;
800
801 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
802 if (ret)
803 goto err;
804 }
805
806 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
807 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
808
809 ret = drm_connector_set_path_property(connector, pathprop);
810 if (ret)
811 goto err;
812
813 intel_attach_force_audio_property(connector);
814 intel_attach_broadcast_rgb_property(connector);
815
816
817 /* TODO: Figure out how to make HDCP work on GEN12+ */
818 if (INTEL_GEN(dev_priv) < 12) {
819 ret = intel_dp_init_hdcp(dig_port, intel_connector);
820 if (ret)
821 DRM_DEBUG_KMS("HDCP init failed, skipping.\n");
822 }
823
824 /*
825 * Reuse the prop from the SST connector because we're
826 * not allowed to create new props after device registration.
827 */
828 connector->max_bpc_property =
829 intel_dp->attached_connector->base.max_bpc_property;
830 if (connector->max_bpc_property)
831 drm_connector_attach_max_bpc_property(connector, 6, 12);
832
833 return connector;
834
835 err:
836 drm_connector_cleanup(connector);
837 return NULL;
838 }
839
840 static void
intel_dp_mst_poll_hpd_irq(struct drm_dp_mst_topology_mgr * mgr)841 intel_dp_mst_poll_hpd_irq(struct drm_dp_mst_topology_mgr *mgr)
842 {
843 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
844
845 intel_hpd_trigger_irq(dp_to_dig_port(intel_dp));
846 }
847
848 static const struct drm_dp_mst_topology_cbs mst_cbs = {
849 .add_connector = intel_dp_add_mst_connector,
850 .poll_hpd_irq = intel_dp_mst_poll_hpd_irq,
851 };
852
853 static struct intel_dp_mst_encoder *
intel_dp_create_fake_mst_encoder(struct intel_digital_port * dig_port,enum pipe pipe)854 intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe pipe)
855 {
856 struct intel_dp_mst_encoder *intel_mst;
857 struct intel_encoder *intel_encoder;
858 struct drm_device *dev = dig_port->base.base.dev;
859
860 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
861
862 if (!intel_mst)
863 return NULL;
864
865 intel_mst->pipe = pipe;
866 intel_encoder = &intel_mst->base;
867 intel_mst->primary = dig_port;
868
869 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
870 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
871
872 intel_encoder->type = INTEL_OUTPUT_DP_MST;
873 intel_encoder->power_domain = dig_port->base.power_domain;
874 intel_encoder->port = dig_port->base.port;
875 intel_encoder->cloneable = 0;
876 /*
877 * This is wrong, but broken userspace uses the intersection
878 * of possible_crtcs of all the encoders of a given connector
879 * to figure out which crtcs can drive said connector. What
880 * should be used instead is the union of possible_crtcs.
881 * To keep such userspace functioning we must misconfigure
882 * this to make sure the intersection is not empty :(
883 */
884 intel_encoder->pipe_mask = ~0;
885
886 intel_encoder->compute_config = intel_dp_mst_compute_config;
887 intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
888 intel_encoder->disable = intel_mst_disable_dp;
889 intel_encoder->post_disable = intel_mst_post_disable_dp;
890 intel_encoder->update_pipe = intel_ddi_update_pipe;
891 intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
892 intel_encoder->pre_enable = intel_mst_pre_enable_dp;
893 intel_encoder->enable = intel_mst_enable_dp;
894 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
895 intel_encoder->get_config = intel_dp_mst_enc_get_config;
896
897 return intel_mst;
898
899 }
900
901 static bool
intel_dp_create_fake_mst_encoders(struct intel_digital_port * dig_port)902 intel_dp_create_fake_mst_encoders(struct intel_digital_port *dig_port)
903 {
904 struct intel_dp *intel_dp = &dig_port->dp;
905 struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
906 enum pipe pipe;
907
908 for_each_pipe(dev_priv, pipe)
909 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(dig_port, pipe);
910 return true;
911 }
912
913 int
intel_dp_mst_encoder_active_links(struct intel_digital_port * dig_port)914 intel_dp_mst_encoder_active_links(struct intel_digital_port *dig_port)
915 {
916 return dig_port->dp.active_mst_links;
917 }
918
919 int
intel_dp_mst_encoder_init(struct intel_digital_port * dig_port,int conn_base_id)920 intel_dp_mst_encoder_init(struct intel_digital_port *dig_port, int conn_base_id)
921 {
922 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
923 struct intel_dp *intel_dp = &dig_port->dp;
924 enum port port = dig_port->base.port;
925 int ret;
926
927 if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
928 return 0;
929
930 if (INTEL_GEN(i915) < 12 && port == PORT_A)
931 return 0;
932
933 if (INTEL_GEN(i915) < 11 && port == PORT_E)
934 return 0;
935
936 intel_dp->mst_mgr.cbs = &mst_cbs;
937
938 /* create encoders */
939 intel_dp_create_fake_mst_encoders(dig_port);
940 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
941 &intel_dp->aux, 16, 3, conn_base_id);
942 if (ret)
943 return ret;
944
945 intel_dp->can_mst = true;
946
947 return 0;
948 }
949
950 void
intel_dp_mst_encoder_cleanup(struct intel_digital_port * dig_port)951 intel_dp_mst_encoder_cleanup(struct intel_digital_port *dig_port)
952 {
953 struct intel_dp *intel_dp = &dig_port->dp;
954
955 if (!intel_dp->can_mst)
956 return;
957
958 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
959 /* encoders will get killed by normal cleanup */
960 }
961
intel_dp_mst_is_master_trans(const struct intel_crtc_state * crtc_state)962 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state)
963 {
964 return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder;
965 }
966
intel_dp_mst_is_slave_trans(const struct intel_crtc_state * crtc_state)967 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state)
968 {
969 return crtc_state->mst_master_transcoder != INVALID_TRANSCODER &&
970 crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder;
971 }
972