/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_jpeg.h | 36 #define WREG32_SOC15_JPEG_DPG_MODE(inst_idx, offset, value, indirect) \ argument 55 #define RREG32_SOC15_JPEG_DPG_MODE(inst_idx, offset, mask_en) \ argument 64 #define WREG32_SOC24_JPEG_DPG_MODE(inst_idx, offset, value, indirect) \ argument 78 #define RREG32_SOC24_JPEG_DPG_MODE(inst_idx, offset, mask_en) \ argument 89 #define ADD_SOC24_JPEG_TO_DPG_SRAM(inst_idx, offset, value, indirect) \ argument
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H A D | vcn_v4_0_3.c | 137 static int vcn_v4_0_3_fw_shared_init(struct amdgpu_device *adev, int inst_idx) in vcn_v4_0_3_fw_shared_init() 300 int inst_idx = vinst->inst; in vcn_v4_0_3_hw_init_inst() local 458 int inst_idx = vinst->inst; in vcn_v4_0_3_mc_resume() local 535 int inst_idx = vinst->inst; in vcn_v4_0_3_mc_resume_dpg_mode() local 649 int inst_idx = vinst->inst; in vcn_v4_0_3_disable_clock_gating() local 747 int inst_idx = vinst->inst; in vcn_v4_0_3_disable_clock_gating_dpg_mode() local 796 int inst_idx = vinst->inst; in vcn_v4_0_3_enable_clock_gating() local 850 int inst_idx = vinst->inst; in vcn_v4_0_3_start_dpg_mode() local 1358 int inst_idx = vinst->inst; in vcn_v4_0_3_stop_dpg_mode() local 2166 int inst_idx, bool indirect) in vcn_v4_0_3_enable_ras()
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H A D | vcn_v4_0.c | 149 static int vcn_v4_0_fw_shared_init(struct amdgpu_device *adev, int inst_idx) in vcn_v4_0_fw_shared_init() 525 int inst_idx = vinst->inst; in vcn_v4_0_mc_resume_dpg_mode() local 871 int inst_idx = vinst->inst; in vcn_v4_0_disable_clock_gating_dpg_mode() local 980 int inst_idx = vinst->inst; in vcn_v4_0_enable_ras() local 1011 int inst_idx = vinst->inst; in vcn_v4_0_start_dpg_mode() local 1578 int inst_idx = vinst->inst; in vcn_v4_0_stop_dpg_mode() local 1709 int inst_idx = vinst->inst; in vcn_v4_0_pause_dpg_mode() local
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H A D | vcn_v4_0_5.c | 475 int inst_idx = vinst->inst; in vcn_v4_0_5_mc_resume_dpg_mode() local 808 int inst_idx = vinst->inst; in vcn_v4_0_5_disable_clock_gating_dpg_mode() local 925 int inst_idx = vinst->inst; in vcn_v4_0_5_start_dpg_mode() local 1241 int inst_idx = vinst->inst; in vcn_v4_0_5_stop_dpg_mode() local 1370 int inst_idx = vinst->inst; in vcn_v4_0_5_pause_dpg_mode() local
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H A D | jpeg_v5_0_0.c | 304 int inst_idx, uint8_t indirect) in jpeg_engine_5_0_0_dpg_clock_gating_mode() 341 static int jpeg_v5_0_0_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in jpeg_v5_0_0_start_dpg_mode() 409 static void jpeg_v5_0_0_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) in jpeg_v5_0_0_stop_dpg_mode()
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H A D | vcn_v5_0_0.c | 442 int inst_idx = vinst->inst; in vcn_v5_0_0_mc_resume_dpg_mode() local 712 int inst_idx = vinst->inst; in vcn_v5_0_0_start_dpg_mode() local 973 int inst_idx = vinst->inst; in vcn_v5_0_0_stop_dpg_mode() local 1101 int inst_idx = vinst->inst; in vcn_v5_0_0_pause_dpg_mode() local
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H A D | vcn_v2_5.c | 680 int inst_idx = vinst->inst; in vcn_v2_5_mc_resume_dpg_mode() local 895 int inst_idx = vinst->inst; in vcn_v2_5_clock_gating_dpg_mode() local 1006 int inst_idx = vinst->inst; in vcn_v2_6_enable_ras() local 1034 int inst_idx = vinst->inst; in vcn_v2_5_start_dpg_mode() local 1571 int inst_idx = vinst->inst; in vcn_v2_5_stop_dpg_mode() local 1681 int inst_idx = vinst->inst; in vcn_v2_5_pause_dpg_mode() local
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H A D | jpeg_v4_0_5.c | 356 int inst_idx, uint8_t indirect) in jpeg_engine_4_0_5_dpg_clock_gating_mode() 421 static void jpeg_v4_0_5_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in jpeg_v4_0_5_start_dpg_mode() 484 static void jpeg_v4_0_5_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx) in jpeg_v4_0_5_stop_dpg_mode()
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H A D | vcn_v3_0.c | 586 int inst_idx = vinst->inst; in vcn_v3_0_mc_resume_dpg_mode() local 923 int inst_idx = vinst->inst; in vcn_v3_0_clock_gating_dpg_mode() local 1041 int inst_idx = vinst->inst; in vcn_v3_0_start_dpg_mode() local 1601 int inst_idx = vinst->inst; in vcn_v3_0_stop_dpg_mode() local 1721 int inst_idx = vinst->inst; in vcn_v3_0_pause_dpg_mode() local
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H A D | vcn_v5_0_1.c | 82 static void vcn_v5_0_1_fw_shared_init(struct amdgpu_device *adev, int inst_idx) in vcn_v5_0_1_fw_shared_init() 421 int inst_idx = vinst->inst; in vcn_v5_0_1_mc_resume_dpg_mode() local 603 int inst_idx = vinst->inst; in vcn_v5_0_1_start_dpg_mode() local 1063 int inst_idx = vinst->inst; in vcn_v5_0_1_stop_dpg_mode() local
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H A D | amdgpu_vcn.h | 80 #define RREG32_SOC15_DPG_MODE_1_0(ip, inst_idx, reg, mask, sram_sel) \ argument 90 #define WREG32_SOC15_DPG_MODE_1_0(ip, inst_idx, reg, value, mask, sram_sel) \ argument 101 #define SOC15_DPG_MODE_OFFSET(ip, inst_idx, reg) \ argument 134 #define RREG32_SOC15_DPG_MODE(inst_idx, offset, mask_en) \ argument 143 #define WREG32_SOC15_DPG_MODE(inst_idx, offset, value, mask_en, indirect) \ argument 162 #define SOC24_DPG_MODE_OFFSET(ip, inst_idx, reg) \ argument 195 #define WREG32_SOC24_DPG_MODE(inst_idx, offset, value, mask_en, indirect) \ argument
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H A D | jpeg_v4_0_3.c | 493 static void jpeg_v4_0_3_disable_clock_gating(struct amdgpu_device *adev, int inst_idx) in jpeg_v4_0_3_disable_clock_gating() 518 static void jpeg_v4_0_3_enable_clock_gating(struct amdgpu_device *adev, int inst_idx) in jpeg_v4_0_3_enable_clock_gating()
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H A D | amdgpu_jpeg.c | 337 int amdgpu_jpeg_psp_update_sram(struct amdgpu_device *adev, int inst_idx, in amdgpu_jpeg_psp_update_sram()
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H A D | amdgpu_xcp.c | 502 uint32_t inst_idx, in amdgpu_set_xcp_id()
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H A D | vcn_v1_0.c | 1294 int inst_idx = vinst->inst; in vcn_v1_0_pause_dpg_mode() local
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H A D | vcn_v2_0.c | 1297 int inst_idx = vinst->inst; in vcn_v2_0_pause_dpg_mode() local
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H A D | amdgpu_vcn.c | 1313 int amdgpu_vcn_psp_update_sram(struct amdgpu_device *adev, int inst_idx, in amdgpu_vcn_psp_update_sram()
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/linux/drivers/net/wireless/realtek/rtw89/ |
H A D | chan.c | 2989 u8 inst_idx) in __rtw89_query_mr_wmode() 3042 u8 inst_idx) in __rtw89_query_mr_ctxtype() 3101 void rtw89_query_mr_chanctx_info(struct rtw89_dev *rtwdev, u8 inst_idx, in rtw89_query_mr_chanctx_info()
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