1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * header file for Samsung EXYNOS5 SoC series G-Scaler driver
7
8 */
9
10 #ifndef GSC_CORE_H_
11 #define GSC_CORE_H_
12
13 #include <linux/delay.h>
14 #include <linux/sched.h>
15 #include <linux/spinlock.h>
16 #include <linux/types.h>
17 #include <linux/videodev2.h>
18 #include <linux/io.h>
19 #include <linux/pm_runtime.h>
20 #include <media/videobuf2-v4l2.h>
21 #include <media/v4l2-ctrls.h>
22 #include <media/v4l2-device.h>
23 #include <media/v4l2-mem2mem.h>
24 #include <media/v4l2-mediabus.h>
25 #include <media/videobuf2-dma-contig.h>
26
27 #include "gsc-regs.h"
28
29 #define GSC_MODULE_NAME "exynos-gsc"
30
31 #define GSC_SHUTDOWN_TIMEOUT ((100*HZ)/1000)
32 #define GSC_MAX_DEVS 4
33 #define GSC_MAX_CLOCKS 4
34 #define GSC_M2M_BUF_NUM 0
35 #define GSC_MAX_CTRL_NUM 10
36 #define GSC_SC_ALIGN_4 4
37 #define GSC_SC_ALIGN_2 2
38 #define DEFAULT_CSC_EQ 1
39 #define DEFAULT_CSC_RANGE 1
40
41 #define GSC_PARAMS (1 << 0)
42 #define GSC_SRC_FMT (1 << 1)
43 #define GSC_DST_FMT (1 << 2)
44 #define GSC_CTX_M2M (1 << 3)
45 #define GSC_CTX_STOP_REQ (1 << 6)
46 #define GSC_CTX_ABORT (1 << 7)
47
48 enum gsc_dev_flags {
49 /* for m2m node */
50 ST_M2M_OPEN,
51 ST_M2M_RUN,
52 ST_M2M_PEND,
53 ST_M2M_SUSPENDED,
54 ST_M2M_SUSPENDING,
55 };
56
57 enum gsc_irq {
58 GSC_IRQ_DONE,
59 GSC_IRQ_OVERRUN
60 };
61
62 /**
63 * enum gsc_datapath - the path of data used for G-Scaler
64 * @GSC_CAMERA: from camera
65 * @GSC_DMA: from/to DMA
66 * @GSC_WRITEBACK: from FIMD
67 */
68 enum gsc_datapath {
69 GSC_CAMERA = 0x1,
70 GSC_DMA,
71 GSC_WRITEBACK,
72 };
73
74 enum gsc_color_fmt {
75 GSC_RGB = 0x1,
76 GSC_YUV420 = 0x2,
77 GSC_YUV422 = 0x4,
78 GSC_YUV444 = 0x8,
79 };
80
81 enum gsc_yuv_fmt {
82 GSC_LSB_Y = 0x10,
83 GSC_LSB_C,
84 GSC_CBCR = 0x20,
85 GSC_CRCB,
86 };
87
88 #define is_rgb(x) (!!((x) & 0x1))
89 #define is_yuv420(x) (!!((x) & 0x2))
90 #define is_yuv422(x) (!!((x) & 0x4))
91
92 #define gsc_m2m_active(dev) test_bit(ST_M2M_RUN, &(dev)->state)
93 #define gsc_m2m_pending(dev) test_bit(ST_M2M_PEND, &(dev)->state)
94 #define gsc_m2m_opened(dev) test_bit(ST_M2M_OPEN, &(dev)->state)
95
96 #define ctrl_to_ctx(__ctrl) \
97 container_of((__ctrl)->handler, struct gsc_ctx, ctrl_handler)
98 /**
99 * struct gsc_fmt - the driver's internal color format data
100 * @mbus_code: Media Bus pixel code, -1 if not applicable
101 * @pixelformat: the fourcc code for this format, 0 if not applicable
102 * @color: color encoding
103 * @yorder: Y/C order
104 * @corder: Chrominance order control
105 * @num_planes: number of physically non-contiguous data planes
106 * @num_comp: number of physically contiguous data planes
107 * @depth: per plane driver's private 'number of bits per pixel'
108 * @flags: flags indicating which operation mode format applies to
109 */
110 struct gsc_fmt {
111 u32 mbus_code;
112 u32 pixelformat;
113 u32 color;
114 u32 yorder;
115 u32 corder;
116 u16 num_planes;
117 u16 num_comp;
118 u8 depth[VIDEO_MAX_PLANES];
119 u32 flags;
120 };
121
122 /**
123 * struct gsc_input_buf - the driver's video buffer
124 * @vb: videobuf2 buffer
125 * @list : linked list structure for buffer queue
126 * @idx : index of G-Scaler input buffer
127 */
128 struct gsc_input_buf {
129 struct vb2_v4l2_buffer vb;
130 struct list_head list;
131 int idx;
132 };
133
134 /**
135 * struct gsc_addr - the G-Scaler physical address set
136 * @y: luminance plane address
137 * @cb: Cb plane address
138 * @cr: Cr plane address
139 */
140 struct gsc_addr {
141 dma_addr_t y;
142 dma_addr_t cb;
143 dma_addr_t cr;
144 };
145
146 /* struct gsc_ctrls - the G-Scaler control set
147 * @rotate: rotation degree
148 * @hflip: horizontal flip
149 * @vflip: vertical flip
150 * @global_alpha: the alpha value of current frame
151 */
152 struct gsc_ctrls {
153 struct v4l2_ctrl *rotate;
154 struct v4l2_ctrl *hflip;
155 struct v4l2_ctrl *vflip;
156 struct v4l2_ctrl *global_alpha;
157 };
158
159 /**
160 * struct gsc_scaler - the configuration data for G-Scaler inetrnal scaler
161 * @pre_shfactor: pre sclaer shift factor
162 * @pre_hratio: horizontal ratio of the prescaler
163 * @pre_vratio: vertical ratio of the prescaler
164 * @main_hratio: the main scaler's horizontal ratio
165 * @main_vratio: the main scaler's vertical ratio
166 */
167 struct gsc_scaler {
168 u32 pre_shfactor;
169 u32 pre_hratio;
170 u32 pre_vratio;
171 u32 main_hratio;
172 u32 main_vratio;
173 };
174
175 struct gsc_dev;
176
177 struct gsc_ctx;
178
179 /**
180 * struct gsc_frame - source/target frame properties
181 * @f_width: SRC : SRCIMG_WIDTH, DST : OUTPUTDMA_WHOLE_IMG_WIDTH
182 * @f_height: SRC : SRCIMG_HEIGHT, DST : OUTPUTDMA_WHOLE_IMG_HEIGHT
183 * @crop: cropped(source)/scaled(destination) size
184 * @payload: image size in bytes (w x h x bpp)
185 * @addr: image frame buffer physical addresses
186 * @fmt: G-Scaler color format pointer
187 * @colorspace: value indicating v4l2_colorspace
188 * @alpha: frame's alpha value
189 */
190 struct gsc_frame {
191 u32 f_width;
192 u32 f_height;
193 struct v4l2_rect crop;
194 unsigned long payload[VIDEO_MAX_PLANES];
195 struct gsc_addr addr;
196 const struct gsc_fmt *fmt;
197 u32 colorspace;
198 u8 alpha;
199 };
200
201 /**
202 * struct gsc_m2m_device - v4l2 memory-to-memory device data
203 * @vfd: the video device node for v4l2 m2m mode
204 * @m2m_dev: v4l2 memory-to-memory device data
205 * @ctx: hardware context data
206 * @refcnt: the reference counter
207 */
208 struct gsc_m2m_device {
209 struct video_device *vfd;
210 struct v4l2_m2m_dev *m2m_dev;
211 struct gsc_ctx *ctx;
212 int refcnt;
213 };
214
215 /**
216 * struct gsc_pix_max - image pixel size limits in various IP configurations
217 *
218 * @org_scaler_bypass_w: max pixel width when the scaler is disabled
219 * @org_scaler_bypass_h: max pixel height when the scaler is disabled
220 * @org_scaler_input_w: max pixel width when the scaler is enabled
221 * @org_scaler_input_h: max pixel height when the scaler is enabled
222 * @real_rot_dis_w: max pixel src cropped height with the rotator is off
223 * @real_rot_dis_h: max pixel src cropped width with the rotator is off
224 * @real_rot_en_w: max pixel src cropped width with the rotator is on
225 * @real_rot_en_h: max pixel src cropped height with the rotator is on
226 * @target_rot_dis_w: max pixel dst scaled width with the rotator is off
227 * @target_rot_dis_h: max pixel dst scaled height with the rotator is off
228 * @target_rot_en_w: max pixel dst scaled width with the rotator is on
229 * @target_rot_en_h: max pixel dst scaled height with the rotator is on
230 */
231 struct gsc_pix_max {
232 u16 org_scaler_bypass_w;
233 u16 org_scaler_bypass_h;
234 u16 org_scaler_input_w;
235 u16 org_scaler_input_h;
236 u16 real_rot_dis_w;
237 u16 real_rot_dis_h;
238 u16 real_rot_en_w;
239 u16 real_rot_en_h;
240 u16 target_rot_dis_w;
241 u16 target_rot_dis_h;
242 u16 target_rot_en_w;
243 u16 target_rot_en_h;
244 };
245
246 /**
247 * struct gsc_pix_min - image pixel size limits in various IP configurations
248 *
249 * @org_w: minimum source pixel width
250 * @org_h: minimum source pixel height
251 * @real_w: minimum input crop pixel width
252 * @real_h: minimum input crop pixel height
253 * @target_rot_dis_w: minimum output scaled pixel height when rotator is off
254 * @target_rot_dis_h: minimum output scaled pixel height when rotator is off
255 * @target_rot_en_w: minimum output scaled pixel height when rotator is on
256 * @target_rot_en_h: minimum output scaled pixel height when rotator is on
257 */
258 struct gsc_pix_min {
259 u16 org_w;
260 u16 org_h;
261 u16 real_w;
262 u16 real_h;
263 u16 target_rot_dis_w;
264 u16 target_rot_dis_h;
265 u16 target_rot_en_w;
266 u16 target_rot_en_h;
267 };
268
269 struct gsc_pix_align {
270 u16 org_h;
271 u16 org_w;
272 u16 offset_h;
273 u16 real_w;
274 u16 real_h;
275 u16 target_w;
276 u16 target_h;
277 };
278
279 /*
280 * struct gsc_variant - G-Scaler variant information
281 */
282 struct gsc_variant {
283 struct gsc_pix_max *pix_max;
284 struct gsc_pix_min *pix_min;
285 struct gsc_pix_align *pix_align;
286 u16 in_buf_cnt;
287 u16 out_buf_cnt;
288 u16 sc_up_max;
289 u16 sc_down_max;
290 u16 poly_sc_down_max;
291 u16 pre_sc_down_max;
292 u16 local_sc_down;
293 };
294
295 /**
296 * struct gsc_driverdata - per device type driver data for init time.
297 *
298 * @variant: the variant information for this driver.
299 * @num_entities: the number of g-scalers
300 * @clk_names: clock names
301 * @num_clocks: the number of clocks in @clk_names
302 * @num_entities: the number of g-scalers
303 */
304 struct gsc_driverdata {
305 struct gsc_variant *variant[GSC_MAX_DEVS];
306 const char *clk_names[GSC_MAX_CLOCKS];
307 int num_clocks;
308 int num_entities;
309 };
310
311 /**
312 * struct gsc_dev - abstraction for G-Scaler entity
313 * @slock: the spinlock protecting this data structure
314 * @lock: the mutex protecting this data structure
315 * @pdev: pointer to the G-Scaler platform device
316 * @variant: the IP variant information
317 * @id: G-Scaler device index (0..GSC_MAX_DEVS)
318 * @num_clocks: number of clocks required for G-Scaler operation
319 * @clock: clocks required for G-Scaler operation
320 * @regs: the mapped hardware registers
321 * @irq_queue: interrupt handler waitqueue
322 * @m2m: memory-to-memory V4L2 device information
323 * @state: flags used to synchronize m2m and capture mode operation
324 * @vdev: video device for G-Scaler instance
325 * @v4l2_dev: v4l2_device for G-Scaler instance
326 */
327 struct gsc_dev {
328 spinlock_t slock;
329 struct mutex lock;
330 struct platform_device *pdev;
331 struct gsc_variant *variant;
332 u16 id;
333 int num_clocks;
334 struct clk *clock[GSC_MAX_CLOCKS];
335 void __iomem *regs;
336 wait_queue_head_t irq_queue;
337 struct gsc_m2m_device m2m;
338 unsigned long state;
339 struct video_device vdev;
340 struct v4l2_device v4l2_dev;
341 };
342
343 /**
344 * struct gsc_ctx - the device context data
345 * @s_frame: source frame properties
346 * @d_frame: destination frame properties
347 * @in_path: input mode (DMA or camera)
348 * @out_path: output mode (DMA or FIFO)
349 * @scaler: image scaler properties
350 * @flags: additional flags for image conversion
351 * @state: flags to keep track of user configuration
352 * @rotation: rotation
353 * @hflip: horizontal flip
354 * @vflip: vertical flip
355 * @gsc_dev: the G-Scaler device this context applies to
356 * @m2m_ctx: memory-to-memory device context
357 * @fh: v4l2 file handle
358 * @ctrl_handler: v4l2 controls handler
359 * @gsc_ctrls: G-Scaler control set
360 * @ctrls_rdy: true if the control handler is initialized
361 * @out_colorspace: the colorspace of the OUTPUT queue
362 */
363 struct gsc_ctx {
364 struct gsc_frame s_frame;
365 struct gsc_frame d_frame;
366 enum gsc_datapath in_path;
367 enum gsc_datapath out_path;
368 struct gsc_scaler scaler;
369 u32 flags;
370 u32 state;
371 int rotation;
372 unsigned int hflip:1;
373 unsigned int vflip:1;
374 struct gsc_dev *gsc_dev;
375 struct v4l2_m2m_ctx *m2m_ctx;
376 struct v4l2_fh fh;
377 struct v4l2_ctrl_handler ctrl_handler;
378 struct gsc_ctrls gsc_ctrls;
379 bool ctrls_rdy;
380 enum v4l2_colorspace out_colorspace;
381 };
382
file_to_ctx(struct file * filp)383 static inline struct gsc_ctx *file_to_ctx(struct file *filp)
384 {
385 return container_of(file_to_v4l2_fh(filp), struct gsc_ctx, fh);
386 }
387
388 void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm);
389 int gsc_register_m2m_device(struct gsc_dev *gsc);
390 void gsc_unregister_m2m_device(struct gsc_dev *gsc);
391 void gsc_m2m_job_finish(struct gsc_ctx *ctx, int vb_state);
392
393 u32 get_plane_size(struct gsc_frame *fr, unsigned int plane);
394 const struct gsc_fmt *get_format(int index);
395 const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index);
396 int gsc_enum_fmt(struct v4l2_fmtdesc *f);
397 int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
398 void gsc_set_frame_size(struct gsc_frame *frame, int width, int height);
399 int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
400 void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h);
401 int gsc_try_selection(struct gsc_ctx *ctx, struct v4l2_selection *s);
402 int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst,
403 u32 *ratio);
404 void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh);
405 void gsc_check_src_scale_info(struct gsc_variant *var,
406 struct gsc_frame *s_frame,
407 u32 *wratio, u32 tx, u32 ty, u32 *hratio);
408 int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw,
409 int dh, int rot, int out_path);
410 int gsc_set_scaler_info(struct gsc_ctx *ctx);
411 int gsc_ctrls_create(struct gsc_ctx *ctx);
412 void gsc_ctrls_delete(struct gsc_ctx *ctx);
413 int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb,
414 struct gsc_frame *frame, struct gsc_addr *addr);
415
gsc_ctx_state_lock_set(u32 state,struct gsc_ctx * ctx)416 static inline void gsc_ctx_state_lock_set(u32 state, struct gsc_ctx *ctx)
417 {
418 unsigned long flags;
419
420 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
421 ctx->state |= state;
422 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
423 }
424
gsc_ctx_state_lock_clear(u32 state,struct gsc_ctx * ctx)425 static inline void gsc_ctx_state_lock_clear(u32 state, struct gsc_ctx *ctx)
426 {
427 unsigned long flags;
428
429 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
430 ctx->state &= ~state;
431 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
432 }
433
is_tiled(const struct gsc_fmt * fmt)434 static inline int is_tiled(const struct gsc_fmt *fmt)
435 {
436 return fmt->pixelformat == V4L2_PIX_FMT_NV12MT_16X16;
437 }
438
gsc_hw_enable_control(struct gsc_dev * dev,bool on)439 static inline void gsc_hw_enable_control(struct gsc_dev *dev, bool on)
440 {
441 u32 cfg = readl(dev->regs + GSC_ENABLE);
442
443 if (on)
444 cfg |= GSC_ENABLE_ON;
445 else
446 cfg &= ~GSC_ENABLE_ON;
447
448 writel(cfg, dev->regs + GSC_ENABLE);
449 }
450
gsc_hw_get_irq_status(struct gsc_dev * dev)451 static inline int gsc_hw_get_irq_status(struct gsc_dev *dev)
452 {
453 u32 cfg = readl(dev->regs + GSC_IRQ);
454 if (cfg & GSC_IRQ_STATUS_OR_IRQ)
455 return GSC_IRQ_OVERRUN;
456 else
457 return GSC_IRQ_DONE;
458
459 }
460
gsc_hw_clear_irq(struct gsc_dev * dev,int irq)461 static inline void gsc_hw_clear_irq(struct gsc_dev *dev, int irq)
462 {
463 u32 cfg = readl(dev->regs + GSC_IRQ);
464 if (irq == GSC_IRQ_OVERRUN)
465 cfg |= GSC_IRQ_STATUS_OR_IRQ;
466 else if (irq == GSC_IRQ_DONE)
467 cfg |= GSC_IRQ_STATUS_FRM_DONE_IRQ;
468 writel(cfg, dev->regs + GSC_IRQ);
469 }
470
gsc_ctx_state_is_set(u32 mask,struct gsc_ctx * ctx)471 static inline bool gsc_ctx_state_is_set(u32 mask, struct gsc_ctx *ctx)
472 {
473 unsigned long flags;
474 bool ret;
475
476 spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
477 ret = (ctx->state & mask) == mask;
478 spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
479 return ret;
480 }
481
ctx_get_frame(struct gsc_ctx * ctx,enum v4l2_buf_type type)482 static inline struct gsc_frame *ctx_get_frame(struct gsc_ctx *ctx,
483 enum v4l2_buf_type type)
484 {
485 struct gsc_frame *frame;
486
487 if (V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE == type) {
488 frame = &ctx->s_frame;
489 } else if (V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE == type) {
490 frame = &ctx->d_frame;
491 } else {
492 pr_err("Wrong buffer/video queue type (%d)", type);
493 return ERR_PTR(-EINVAL);
494 }
495
496 return frame;
497 }
498
499 void gsc_hw_set_sw_reset(struct gsc_dev *dev);
500 int gsc_wait_reset(struct gsc_dev *dev);
501
502 void gsc_hw_set_frm_done_irq_mask(struct gsc_dev *dev, bool mask);
503 void gsc_hw_set_gsc_irq_enable(struct gsc_dev *dev, bool mask);
504 void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
505 void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
506 void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr,
507 int index);
508 void gsc_hw_set_output_addr(struct gsc_dev *dev, struct gsc_addr *addr,
509 int index);
510 void gsc_hw_set_input_path(struct gsc_ctx *ctx);
511 void gsc_hw_set_in_size(struct gsc_ctx *ctx);
512 void gsc_hw_set_in_image_rgb(struct gsc_ctx *ctx);
513 void gsc_hw_set_in_image_format(struct gsc_ctx *ctx);
514 void gsc_hw_set_output_path(struct gsc_ctx *ctx);
515 void gsc_hw_set_out_size(struct gsc_ctx *ctx);
516 void gsc_hw_set_out_image_rgb(struct gsc_ctx *ctx);
517 void gsc_hw_set_out_image_format(struct gsc_ctx *ctx);
518 void gsc_hw_set_prescaler(struct gsc_ctx *ctx);
519 void gsc_hw_set_mainscaler(struct gsc_ctx *ctx);
520 void gsc_hw_set_rotation(struct gsc_ctx *ctx);
521 void gsc_hw_set_global_alpha(struct gsc_ctx *ctx);
522 void gsc_hw_set_sfr_update(struct gsc_ctx *ctx);
523
524 #endif /* GSC_CORE_H_ */
525