1 #ifndef __strcop_defs_h
2 #define __strcop_defs_h
3 
4 /*
5  * This file is autogenerated from
6  *   file:           ../../inst/strcop/rtl/strcop_regs.r
7  *     id:           strcop_regs.r,v 1.5 2003/10/15 12:09:45 kriskn Exp
8  *     last modfied: Mon Apr 11 16:09:38 2005
9  *
10  *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile strcop_defs.h ../../inst/strcop/rtl/strcop_regs.r
11  *      id: $Id: strcop_defs.h,v 1.7 2005/04/24 18:30:58 starvik Exp $
12  * Any changes here will be lost.
13  *
14  * -*- buffer-read-only: t -*-
15  */
16 /* Main access macros */
17 #ifndef REG_RD
18 #define REG_RD( scope, inst, reg ) \
19   REG_READ( reg_##scope##_##reg, \
20             (inst) + REG_RD_ADDR_##scope##_##reg )
21 #endif
22 
23 #ifndef REG_WR
24 #define REG_WR( scope, inst, reg, val ) \
25   REG_WRITE( reg_##scope##_##reg, \
26              (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #endif
28 
29 #ifndef REG_RD_VECT
30 #define REG_RD_VECT( scope, inst, reg, index ) \
31   REG_READ( reg_##scope##_##reg, \
32             (inst) + REG_RD_ADDR_##scope##_##reg + \
33 	    (index) * STRIDE_##scope##_##reg )
34 #endif
35 
36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \
38   REG_WRITE( reg_##scope##_##reg, \
39              (inst) + REG_WR_ADDR_##scope##_##reg + \
40 	     (index) * STRIDE_##scope##_##reg, (val) )
41 #endif
42 
43 #ifndef REG_RD_INT
44 #define REG_RD_INT( scope, inst, reg ) \
45   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46 #endif
47 
48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \
50   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51 #endif
52 
53 #ifndef REG_RD_INT_VECT
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
55   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56 	    (index) * STRIDE_##scope##_##reg )
57 #endif
58 
59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62 	     (index) * STRIDE_##scope##_##reg, (val) )
63 #endif
64 
65 #ifndef REG_TYPE_CONV
66 #define REG_TYPE_CONV( type, orgtype, val ) \
67   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68 #endif
69 
70 #ifndef reg_page_size
71 #define reg_page_size 8192
72 #endif
73 
74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \
76   ( (inst) + REG_RD_ADDR_##scope##_##reg )
77 #endif
78 
79 #ifndef REG_ADDR_VECT
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \
81   ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82     (index) * STRIDE_##scope##_##reg )
83 #endif
84 
85 /* C-code for register scope strcop */
86 
87 /* Register rw_cfg, scope strcop, type rw */
88 typedef struct {
89   unsigned int td3         : 1;
90   unsigned int td2         : 1;
91   unsigned int td1         : 1;
92   unsigned int ipend       : 1;
93   unsigned int ignore_sync : 1;
94   unsigned int en          : 1;
95   unsigned int dummy1      : 26;
96 } reg_strcop_rw_cfg;
97 #define REG_RD_ADDR_strcop_rw_cfg 0
98 #define REG_WR_ADDR_strcop_rw_cfg 0
99 
100 
101 /* Constants */
102 enum {
103   regk_strcop_big                          = 0x00000001,
104   regk_strcop_d                            = 0x00000001,
105   regk_strcop_e                            = 0x00000000,
106   regk_strcop_little                       = 0x00000000,
107   regk_strcop_rw_cfg_default               = 0x00000002
108 };
109 #endif /* __strcop_defs_h */
110