1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2018 MediaTek Inc. 4 * 5 * Author: Sean Wang <sean.wang@mediatek.com> 6 * 7 */ 8 9 #ifndef __PINCTRL_MTK_COMMON_V2_H 10 #define __PINCTRL_MTK_COMMON_V2_H 11 12 #include <linux/gpio/driver.h> 13 14 #define MTK_INPUT 0 15 #define MTK_OUTPUT 1 16 #define MTK_DISABLE 0 17 #define MTK_ENABLE 1 18 #define MTK_PULLDOWN 0 19 #define MTK_PULLUP 1 20 #define MTK_PULL_PU_PD_TYPE BIT(0) 21 #define MTK_PULL_PULLSEL_TYPE BIT(1) 22 #define MTK_PULL_PUPD_R1R0_TYPE BIT(2) 23 /* MTK_PULL_RSEL_TYPE can select resistance and can be 24 * turned on/off itself. But it can't be selected pull up/down 25 */ 26 #define MTK_PULL_RSEL_TYPE BIT(3) 27 #define MTK_PULL_PD_TYPE BIT(4) 28 /* MTK_PULL_PU_PD_RSEL_TYPE is a type which is controlled by 29 * MTK_PULL_PU_PD_TYPE and MTK_PULL_RSEL_TYPE. 30 */ 31 #define MTK_PULL_PU_PD_RSEL_TYPE (MTK_PULL_PU_PD_TYPE \ 32 | MTK_PULL_RSEL_TYPE) 33 #define MTK_PULL_TYPE_MASK (MTK_PULL_PU_PD_TYPE |\ 34 MTK_PULL_PULLSEL_TYPE |\ 35 MTK_PULL_PUPD_R1R0_TYPE |\ 36 MTK_PULL_RSEL_TYPE) 37 38 #define EINT_NA U16_MAX 39 #define NO_EINT_SUPPORT EINT_NA 40 41 #define PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, \ 42 _s_bit, _x_bits, _sz_reg, _fixed) { \ 43 .s_pin = _s_pin, \ 44 .e_pin = _e_pin, \ 45 .i_base = _i_base, \ 46 .s_addr = _s_addr, \ 47 .x_addrs = _x_addrs, \ 48 .s_bit = _s_bit, \ 49 .x_bits = _x_bits, \ 50 .sz_reg = _sz_reg, \ 51 .fixed = _fixed, \ 52 } 53 54 #define PIN_FIELD(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \ 55 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ 56 _x_bits, 32, 0) 57 58 #define PINS_FIELD(_s_pin, _e_pin, _s_addr, _x_addrs, _s_bit, _x_bits) \ 59 PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ 60 _x_bits, 32, 1) 61 62 #define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl, _down_rsel) { \ 63 .s_pin = _s_pin, \ 64 .e_pin = _e_pin, \ 65 .rsel_index = _rsel_index, \ 66 .up_rsel = _up_resl, \ 67 .down_rsel = _down_rsel, \ 68 } 69 70 /* List these attributes which could be modified for the pin */ 71 enum { 72 PINCTRL_PIN_REG_MODE, 73 PINCTRL_PIN_REG_DIR, 74 PINCTRL_PIN_REG_DI, 75 PINCTRL_PIN_REG_DO, 76 PINCTRL_PIN_REG_SR, 77 PINCTRL_PIN_REG_SMT, 78 PINCTRL_PIN_REG_PD, 79 PINCTRL_PIN_REG_PU, 80 PINCTRL_PIN_REG_E4, 81 PINCTRL_PIN_REG_E8, 82 PINCTRL_PIN_REG_TDSEL, 83 PINCTRL_PIN_REG_RDSEL, 84 PINCTRL_PIN_REG_DRV, 85 PINCTRL_PIN_REG_PUPD, 86 PINCTRL_PIN_REG_R0, 87 PINCTRL_PIN_REG_R1, 88 PINCTRL_PIN_REG_IES, 89 PINCTRL_PIN_REG_PULLEN, 90 PINCTRL_PIN_REG_PULLSEL, 91 PINCTRL_PIN_REG_DRV_EN, 92 PINCTRL_PIN_REG_DRV_E0, 93 PINCTRL_PIN_REG_DRV_E1, 94 PINCTRL_PIN_REG_DRV_ADV, 95 PINCTRL_PIN_REG_RSEL, 96 PINCTRL_PIN_REG_MAX, 97 }; 98 99 /* Group the pins by the driving current */ 100 enum { 101 DRV_FIXED, 102 DRV_GRP0, 103 DRV_GRP1, 104 DRV_GRP2, 105 DRV_GRP3, 106 DRV_GRP4, 107 DRV_GRP_MAX, 108 }; 109 110 static const char * const mtk_default_register_base_names[] __maybe_unused = { 111 "base", 112 }; 113 114 /* struct mtk_pin_field - the structure that holds the information of the field 115 * used to describe the attribute for the pin 116 * @base: the index pointing to the entry in base address list 117 * @offset: the register offset relative to the base address 118 * @mask: the mask used to filter out the field from the register 119 * @bitpos: the start bit relative to the register 120 * @next: the indication that the field would be extended to the 121 next register 122 */ 123 struct mtk_pin_field { 124 u8 index; 125 u32 offset; 126 u32 mask; 127 u8 bitpos; 128 u8 next; 129 }; 130 131 /* struct mtk_pin_field_calc - the structure that holds the range providing 132 * the guide used to look up the relevant field 133 * @s_pin: the start pin within the range 134 * @e_pin: the end pin within the range 135 * @i_base: the index pointing to the entry in base address list 136 * @s_addr: the start address for the range 137 * @x_addrs: the address distance between two consecutive registers 138 * within the range 139 * @s_bit: the start bit for the first register within the range 140 * @x_bits: the bit distance between two consecutive pins within 141 * the range 142 * @sz_reg: the size of bits in a register 143 * @fixed: the consecutive pins share the same bits with the 1st 144 * pin 145 */ 146 struct mtk_pin_field_calc { 147 u16 s_pin; 148 u16 e_pin; 149 u8 i_base; 150 u32 s_addr; 151 u8 x_addrs; 152 u8 s_bit; 153 u8 x_bits; 154 u8 sz_reg; 155 u8 fixed; 156 }; 157 158 /** 159 * struct mtk_pin_rsel - the structure that provides bias resistance selection. 160 * @s_pin: the start pin within the rsel range 161 * @e_pin: the end pin within the rsel range 162 * @rsel_index: the rsel bias resistance index 163 * @up_rsel: the pullup rsel bias resistance value 164 * @down_rsel: the pulldown rsel bias resistance value 165 */ 166 struct mtk_pin_rsel { 167 u16 s_pin; 168 u16 e_pin; 169 u16 rsel_index; 170 u32 up_rsel; 171 u32 down_rsel; 172 }; 173 174 /* struct mtk_pin_reg_calc - the structure that holds all ranges used to 175 * determine which register the pin would make use of 176 * for certain pin attribute. 177 * @range: the start address for the range 178 * @nranges: the number of items in the range 179 */ 180 struct mtk_pin_reg_calc { 181 const struct mtk_pin_field_calc *range; 182 unsigned int nranges; 183 }; 184 185 /** 186 * struct mtk_func_desc - the structure that providing information 187 * all the funcs for this pin 188 * @name: the name of function 189 * @muxval: the mux to the function 190 */ 191 struct mtk_func_desc { 192 const char *name; 193 u8 muxval; 194 }; 195 196 /** 197 * struct mtk_eint_desc - the structure that providing information 198 * for eint data per pin 199 * @eint_m: the eint mux for this pin 200 * @eitn_n: the eint number for this pin 201 */ 202 struct mtk_eint_desc { 203 u16 eint_m; 204 u16 eint_n; 205 }; 206 207 /** 208 * struct mtk_pin_desc - the structure that providing information 209 * for each pin of chips 210 * @number: unique pin number from the global pin number space 211 * @name: name for this pin 212 * @eint: the eint data for this pin 213 * @drv_n: the index with the driving group 214 * @funcs: all available functions for this pins (only used in 215 * those drivers compatible to pinctrl-mtk-common.c-like 216 * ones) 217 */ 218 struct mtk_pin_desc { 219 unsigned int number; 220 const char *name; 221 struct mtk_eint_desc eint; 222 u8 drv_n; 223 struct mtk_func_desc *funcs; 224 }; 225 226 struct mtk_pinctrl_group { 227 const char *name; 228 unsigned long config; 229 unsigned pin; 230 }; 231 232 struct mtk_pinctrl; 233 234 /* struct mtk_pin_soc - the structure that holds SoC-specific data */ 235 struct mtk_pin_soc { 236 const struct mtk_pin_reg_calc *reg_cal; 237 const struct mtk_pin_desc *pins; 238 unsigned int npins; 239 const struct group_desc *grps; 240 unsigned int ngrps; 241 const struct function_desc *funcs; 242 unsigned int nfuncs; 243 const struct mtk_eint_regs *eint_regs; 244 const struct mtk_eint_hw *eint_hw; 245 struct mtk_eint_pin *eint_pin; 246 247 /* Specific parameters per SoC */ 248 u8 gpio_m; 249 bool ies_present; 250 const char * const *base_names; 251 unsigned int nbase_names; 252 const unsigned int *pull_type; 253 const struct mtk_pin_rsel *pin_rsel; 254 unsigned int npin_rsel; 255 256 /* Specific pinconfig operations */ 257 int (*bias_disable_set)(struct mtk_pinctrl *hw, 258 const struct mtk_pin_desc *desc); 259 int (*bias_disable_get)(struct mtk_pinctrl *hw, 260 const struct mtk_pin_desc *desc, int *res); 261 int (*bias_set)(struct mtk_pinctrl *hw, 262 const struct mtk_pin_desc *desc, bool pullup); 263 int (*bias_get)(struct mtk_pinctrl *hw, 264 const struct mtk_pin_desc *desc, bool pullup, int *res); 265 266 int (*bias_set_combo)(struct mtk_pinctrl *hw, 267 const struct mtk_pin_desc *desc, u32 pullup, u32 arg); 268 int (*bias_get_combo)(struct mtk_pinctrl *hw, 269 const struct mtk_pin_desc *desc, u32 *pullup, u32 *arg); 270 271 int (*drive_set)(struct mtk_pinctrl *hw, 272 const struct mtk_pin_desc *desc, u32 arg); 273 int (*drive_get)(struct mtk_pinctrl *hw, 274 const struct mtk_pin_desc *desc, int *val); 275 276 int (*adv_pull_set)(struct mtk_pinctrl *hw, 277 const struct mtk_pin_desc *desc, bool pullup, 278 u32 arg); 279 int (*adv_pull_get)(struct mtk_pinctrl *hw, 280 const struct mtk_pin_desc *desc, bool pullup, 281 u32 *val); 282 int (*adv_drive_set)(struct mtk_pinctrl *hw, 283 const struct mtk_pin_desc *desc, u32 arg); 284 int (*adv_drive_get)(struct mtk_pinctrl *hw, 285 const struct mtk_pin_desc *desc, u32 *val); 286 287 /* Specific driver data */ 288 void *driver_data; 289 }; 290 291 struct mtk_pinctrl { 292 struct pinctrl_dev *pctrl; 293 void __iomem **base; 294 u8 nbase; 295 struct device *dev; 296 struct gpio_chip chip; 297 const struct mtk_pin_soc *soc; 298 struct mtk_eint *eint; 299 struct mtk_pinctrl_group *groups; 300 const char **grp_names; 301 /* lock pin's register resource to avoid multiple threads issue*/ 302 spinlock_t lock; 303 /* identify rsel setting by si unit or rsel define in dts node */ 304 bool rsel_si_unit; 305 }; 306 307 void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set); 308 309 int mtk_hw_set_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, 310 int field, int value); 311 int mtk_hw_get_value(struct mtk_pinctrl *hw, const struct mtk_pin_desc *desc, 312 int field, int *value); 313 314 int mtk_build_eint(struct mtk_pinctrl *hw, struct platform_device *pdev); 315 316 int mtk_pinconf_bias_disable_set(struct mtk_pinctrl *hw, 317 const struct mtk_pin_desc *desc); 318 int mtk_pinconf_bias_disable_get(struct mtk_pinctrl *hw, 319 const struct mtk_pin_desc *desc, int *res); 320 int mtk_pinconf_bias_set(struct mtk_pinctrl *hw, 321 const struct mtk_pin_desc *desc, bool pullup); 322 int mtk_pinconf_bias_get(struct mtk_pinctrl *hw, 323 const struct mtk_pin_desc *desc, bool pullup, 324 int *res); 325 326 int mtk_pinconf_bias_disable_set_rev1(struct mtk_pinctrl *hw, 327 const struct mtk_pin_desc *desc); 328 int mtk_pinconf_bias_disable_get_rev1(struct mtk_pinctrl *hw, 329 const struct mtk_pin_desc *desc, 330 int *res); 331 int mtk_pinconf_bias_set_rev1(struct mtk_pinctrl *hw, 332 const struct mtk_pin_desc *desc, bool pullup); 333 int mtk_pinconf_bias_get_rev1(struct mtk_pinctrl *hw, 334 const struct mtk_pin_desc *desc, bool pullup, 335 int *res); 336 int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, 337 const struct mtk_pin_desc *desc, 338 u32 pullup, u32 enable); 339 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw, 340 const struct mtk_pin_desc *desc, 341 u32 *pullup, u32 *enable); 342 343 int mtk_pinconf_drive_set(struct mtk_pinctrl *hw, 344 const struct mtk_pin_desc *desc, u32 arg); 345 int mtk_pinconf_drive_get(struct mtk_pinctrl *hw, 346 const struct mtk_pin_desc *desc, int *val); 347 348 int mtk_pinconf_drive_set_rev1(struct mtk_pinctrl *hw, 349 const struct mtk_pin_desc *desc, u32 arg); 350 int mtk_pinconf_drive_get_rev1(struct mtk_pinctrl *hw, 351 const struct mtk_pin_desc *desc, int *val); 352 353 int mtk_pinconf_drive_set_raw(struct mtk_pinctrl *hw, 354 const struct mtk_pin_desc *desc, u32 arg); 355 int mtk_pinconf_drive_get_raw(struct mtk_pinctrl *hw, 356 const struct mtk_pin_desc *desc, int *val); 357 358 int mtk_pinconf_adv_pull_set(struct mtk_pinctrl *hw, 359 const struct mtk_pin_desc *desc, bool pullup, 360 u32 arg); 361 int mtk_pinconf_adv_pull_get(struct mtk_pinctrl *hw, 362 const struct mtk_pin_desc *desc, bool pullup, 363 u32 *val); 364 int mtk_pinconf_adv_drive_set(struct mtk_pinctrl *hw, 365 const struct mtk_pin_desc *desc, u32 arg); 366 int mtk_pinconf_adv_drive_get(struct mtk_pinctrl *hw, 367 const struct mtk_pin_desc *desc, u32 *val); 368 int mtk_pinconf_adv_drive_set_raw(struct mtk_pinctrl *hw, 369 const struct mtk_pin_desc *desc, u32 arg); 370 int mtk_pinconf_adv_drive_get_raw(struct mtk_pinctrl *hw, 371 const struct mtk_pin_desc *desc, u32 *val); 372 373 bool mtk_is_virt_gpio(struct mtk_pinctrl *hw, unsigned int gpio_n); 374 #endif /* __PINCTRL_MTK_COMMON_V2_H */ 375