1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) Meta Platforms, Inc. and affiliates. */
3 
4 #ifndef _FBNIC_H_
5 #define _FBNIC_H_
6 
7 #include <linux/interrupt.h>
8 #include <linux/io.h>
9 #include <linux/ptp_clock_kernel.h>
10 #include <linux/types.h>
11 #include <linux/workqueue.h>
12 
13 #include "fbnic_csr.h"
14 #include "fbnic_fw.h"
15 #include "fbnic_hw_stats.h"
16 #include "fbnic_mac.h"
17 #include "fbnic_rpc.h"
18 
19 struct fbnic_napi_vector;
20 
21 #define FBNIC_MAX_NAPI_VECTORS		128u
22 
23 struct fbnic_dev {
24 	struct device *dev;
25 	struct net_device *netdev;
26 	struct dentry *dbg_fbd;
27 	struct device *hwmon;
28 
29 	u32 __iomem *uc_addr0;
30 	u32 __iomem *uc_addr4;
31 	const struct fbnic_mac *mac;
32 	unsigned int fw_msix_vector;
33 	unsigned int pcs_msix_vector;
34 	unsigned short num_irqs;
35 
36 	struct {
37 		u8 users;
38 		char name[IFNAMSIZ + 9];
39 	} napi_irq[FBNIC_MAX_NAPI_VECTORS];
40 
41 	struct delayed_work service_task;
42 
43 	struct fbnic_fw_mbx mbx[FBNIC_IPC_MBX_INDICES];
44 	struct fbnic_fw_cap fw_cap;
45 	struct fbnic_fw_completion *cmpl_data;
46 	/* Lock protecting Tx Mailbox queue to prevent possible races */
47 	spinlock_t fw_tx_lock;
48 
49 	unsigned long last_heartbeat_request;
50 	unsigned long last_heartbeat_response;
51 	u8 fw_heartbeat_enabled;
52 
53 	u64 dsn;
54 	u32 mps;
55 	u32 readrq;
56 
57 	/* Local copy of the devices TCAM */
58 	struct fbnic_act_tcam act_tcam[FBNIC_RPC_TCAM_ACT_NUM_ENTRIES];
59 	struct fbnic_mac_addr mac_addr[FBNIC_RPC_TCAM_MACDA_NUM_ENTRIES];
60 	u8 mac_addr_boundary;
61 	u8 tce_tcam_last;
62 
63 	/* IP TCAM */
64 	struct fbnic_ip_addr ip_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
65 	struct fbnic_ip_addr ip_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
66 	struct fbnic_ip_addr ipo_src[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
67 	struct fbnic_ip_addr ipo_dst[FBNIC_RPC_TCAM_IP_ADDR_NUM_ENTRIES];
68 
69 	/* Number of TCQs/RCQs available on hardware */
70 	u16 max_num_queues;
71 
72 	/* Lock protecting writes to @time_high, @time_offset of fbnic_netdev,
73 	 * and the HW time CSR machinery.
74 	 */
75 	spinlock_t time_lock;
76 	/* Externally accessible PTP clock, may be NULL */
77 	struct ptp_clock *ptp;
78 	struct ptp_clock_info ptp_info;
79 	/* Last @time_high refresh time in jiffies (to catch stalls) */
80 	unsigned long last_read;
81 
82 	/* Local copy of hardware statistics */
83 	struct fbnic_hw_stats hw_stats;
84 };
85 
86 /* Reserve entry 0 in the MSI-X "others" array until we have filled all
87  * 32 of the possible interrupt slots. By doing this we can avoid any
88  * potential conflicts should we need to enable one of the debug interrupt
89  * causes later.
90  */
91 enum {
92 	FBNIC_FW_MSIX_ENTRY,
93 	FBNIC_PCS_MSIX_ENTRY,
94 	FBNIC_NON_NAPI_VECTORS
95 };
96 
fbnic_present(struct fbnic_dev * fbd)97 static inline bool fbnic_present(struct fbnic_dev *fbd)
98 {
99 	return !!READ_ONCE(fbd->uc_addr0);
100 }
101 
fbnic_wr32(struct fbnic_dev * fbd,u32 reg,u32 val)102 static inline void fbnic_wr32(struct fbnic_dev *fbd, u32 reg, u32 val)
103 {
104 	u32 __iomem *csr = READ_ONCE(fbd->uc_addr0);
105 
106 	if (csr)
107 		writel(val, csr + reg);
108 }
109 
110 u32 fbnic_rd32(struct fbnic_dev *fbd, u32 reg);
111 
fbnic_wrfl(struct fbnic_dev * fbd)112 static inline void fbnic_wrfl(struct fbnic_dev *fbd)
113 {
114 	fbnic_rd32(fbd, FBNIC_MASTER_SPARE_0);
115 }
116 
117 static inline void
fbnic_rmw32(struct fbnic_dev * fbd,u32 reg,u32 mask,u32 val)118 fbnic_rmw32(struct fbnic_dev *fbd, u32 reg, u32 mask, u32 val)
119 {
120 	u32 v;
121 
122 	v = fbnic_rd32(fbd, reg);
123 	v &= ~mask;
124 	v |= val;
125 	fbnic_wr32(fbd, reg, v);
126 }
127 
128 #define wr32(_f, _r, _v)	fbnic_wr32(_f, _r, _v)
129 #define rd32(_f, _r)		fbnic_rd32(_f, _r)
130 #define wrfl(_f)		fbnic_wrfl(_f)
131 
132 bool fbnic_fw_present(struct fbnic_dev *fbd);
133 u32 fbnic_fw_rd32(struct fbnic_dev *fbd, u32 reg);
134 void fbnic_fw_wr32(struct fbnic_dev *fbd, u32 reg, u32 val);
135 
136 #define fw_rd32(_f, _r)		fbnic_fw_rd32(_f, _r)
137 #define fw_wr32(_f, _r, _v)	fbnic_fw_wr32(_f, _r, _v)
138 #define fw_wrfl(_f)		fbnic_fw_rd32(_f, FBNIC_FW_ZERO_REG)
139 
fbnic_bmc_present(struct fbnic_dev * fbd)140 static inline bool fbnic_bmc_present(struct fbnic_dev *fbd)
141 {
142 	return fbd->fw_cap.bmc_present;
143 }
144 
fbnic_init_failure(struct fbnic_dev * fbd)145 static inline bool fbnic_init_failure(struct fbnic_dev *fbd)
146 {
147 	return !fbd->netdev;
148 }
149 
150 extern char fbnic_driver_name[];
151 
152 void fbnic_devlink_free(struct fbnic_dev *fbd);
153 struct fbnic_dev *fbnic_devlink_alloc(struct pci_dev *pdev);
154 void fbnic_devlink_register(struct fbnic_dev *fbd);
155 void fbnic_devlink_unregister(struct fbnic_dev *fbd);
156 
157 int fbnic_fw_request_mbx(struct fbnic_dev *fbd);
158 void fbnic_fw_free_mbx(struct fbnic_dev *fbd);
159 
160 void fbnic_hwmon_register(struct fbnic_dev *fbd);
161 void fbnic_hwmon_unregister(struct fbnic_dev *fbd);
162 
163 int fbnic_pcs_request_irq(struct fbnic_dev *fbd);
164 void fbnic_pcs_free_irq(struct fbnic_dev *fbd);
165 
166 void fbnic_napi_name_irqs(struct fbnic_dev *fbd);
167 int fbnic_napi_request_irq(struct fbnic_dev *fbd,
168 			   struct fbnic_napi_vector *nv);
169 void fbnic_napi_free_irq(struct fbnic_dev *fbd,
170 			 struct fbnic_napi_vector *nv);
171 void fbnic_synchronize_irq(struct fbnic_dev *fbd, int nr);
172 int fbnic_request_irq(struct fbnic_dev *dev, int nr, irq_handler_t handler,
173 		      unsigned long flags, const char *name, void *data);
174 void fbnic_free_irq(struct fbnic_dev *dev, int nr, void *data);
175 void fbnic_free_irqs(struct fbnic_dev *fbd);
176 int fbnic_alloc_irqs(struct fbnic_dev *fbd);
177 
178 void fbnic_get_fw_ver_commit_str(struct fbnic_dev *fbd, char *fw_version,
179 				 const size_t str_sz);
180 
181 void fbnic_dbg_fbd_init(struct fbnic_dev *fbd);
182 void fbnic_dbg_fbd_exit(struct fbnic_dev *fbd);
183 void fbnic_dbg_init(void);
184 void fbnic_dbg_exit(void);
185 
186 void fbnic_csr_get_regs(struct fbnic_dev *fbd, u32 *data, u32 *regs_version);
187 int fbnic_csr_regs_len(struct fbnic_dev *fbd);
188 
189 void fbnic_config_txrx_usecs(struct fbnic_napi_vector *nv, u32 arm);
190 void fbnic_config_rx_frames(struct fbnic_napi_vector *nv);
191 
192 enum fbnic_boards {
193 	fbnic_board_asic
194 };
195 
196 struct fbnic_info {
197 	unsigned int max_num_queues;
198 	unsigned int bar_mask;
199 };
200 
201 #endif /* _FBNIC_H_ */
202