1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* Copyright 2017-2019 NXP */
3
4 #include <linux/ethtool_netlink.h>
5 #include <linux/net_tstamp.h>
6 #include <linux/module.h>
7 #include <linux/of.h>
8 #include <linux/ptp_clock_kernel.h>
9
10 #include "enetc.h"
11
12 static const u32 enetc_si_regs[] = {
13 ENETC_SIMR, ENETC_SIPMAR0, ENETC_SIPMAR1, ENETC_SICBDRMR,
14 ENETC_SICBDRSR, ENETC_SICBDRBAR0, ENETC_SICBDRBAR1, ENETC_SICBDRPIR,
15 ENETC_SICBDRCIR, ENETC_SICBDRLENR, ENETC_SICAPR0, ENETC_SICAPR1,
16 ENETC_SIUEFDCR
17 };
18
19 static const u32 enetc_txbdr_regs[] = {
20 ENETC_TBMR, ENETC_TBSR, ENETC_TBBAR0, ENETC_TBBAR1,
21 ENETC_TBPIR, ENETC_TBCIR, ENETC_TBLENR, ENETC_TBIER, ENETC_TBICR0,
22 ENETC_TBICR1
23 };
24
25 static const u32 enetc_rxbdr_regs[] = {
26 ENETC_RBMR, ENETC_RBSR, ENETC_RBBSR, ENETC_RBCIR, ENETC_RBBAR0,
27 ENETC_RBBAR1, ENETC_RBPIR, ENETC_RBLENR, ENETC_RBIER, ENETC_RBICR0,
28 ENETC_RBICR1
29 };
30
31 static const u32 enetc_port_regs[] = {
32 ENETC_PMR, ENETC_PSR, ENETC_PSIPMR, ENETC_PSIPMAR0(0),
33 ENETC_PSIPMAR1(0), ENETC_PTXMBAR, ENETC_PCAPR0, ENETC_PCAPR1,
34 ENETC_PSICFGR0(0), ENETC_PRFSCAPR, ENETC_PTCMSDUR(0),
35 ENETC_PM0_CMD_CFG, ENETC_PM0_MAXFRM, ENETC_PM0_IF_MODE
36 };
37
38 static const u32 enetc_port_mm_regs[] = {
39 ENETC_MMCSR, ENETC_PFPMR, ENETC_PTCFPR(0), ENETC_PTCFPR(1),
40 ENETC_PTCFPR(2), ENETC_PTCFPR(3), ENETC_PTCFPR(4), ENETC_PTCFPR(5),
41 ENETC_PTCFPR(6), ENETC_PTCFPR(7),
42 };
43
enetc_get_reglen(struct net_device * ndev)44 static int enetc_get_reglen(struct net_device *ndev)
45 {
46 struct enetc_ndev_priv *priv = netdev_priv(ndev);
47 struct enetc_hw *hw = &priv->si->hw;
48 int len;
49
50 len = ARRAY_SIZE(enetc_si_regs);
51 len += ARRAY_SIZE(enetc_txbdr_regs) * priv->num_tx_rings;
52 len += ARRAY_SIZE(enetc_rxbdr_regs) * priv->num_rx_rings;
53
54 if (hw->port)
55 len += ARRAY_SIZE(enetc_port_regs);
56
57 if (hw->port && !!(priv->si->hw_features & ENETC_SI_F_QBU))
58 len += ARRAY_SIZE(enetc_port_mm_regs);
59
60 len *= sizeof(u32) * 2; /* store 2 entries per reg: addr and value */
61
62 return len;
63 }
64
enetc_get_regs(struct net_device * ndev,struct ethtool_regs * regs,void * regbuf)65 static void enetc_get_regs(struct net_device *ndev, struct ethtool_regs *regs,
66 void *regbuf)
67 {
68 struct enetc_ndev_priv *priv = netdev_priv(ndev);
69 struct enetc_hw *hw = &priv->si->hw;
70 u32 *buf = (u32 *)regbuf;
71 int i, j;
72 u32 addr;
73
74 for (i = 0; i < ARRAY_SIZE(enetc_si_regs); i++) {
75 *buf++ = enetc_si_regs[i];
76 *buf++ = enetc_rd(hw, enetc_si_regs[i]);
77 }
78
79 for (i = 0; i < priv->num_tx_rings; i++) {
80 for (j = 0; j < ARRAY_SIZE(enetc_txbdr_regs); j++) {
81 addr = ENETC_BDR(TX, i, enetc_txbdr_regs[j]);
82
83 *buf++ = addr;
84 *buf++ = enetc_rd(hw, addr);
85 }
86 }
87
88 for (i = 0; i < priv->num_rx_rings; i++) {
89 for (j = 0; j < ARRAY_SIZE(enetc_rxbdr_regs); j++) {
90 addr = ENETC_BDR(RX, i, enetc_rxbdr_regs[j]);
91
92 *buf++ = addr;
93 *buf++ = enetc_rd(hw, addr);
94 }
95 }
96
97 if (!hw->port)
98 return;
99
100 for (i = 0; i < ARRAY_SIZE(enetc_port_regs); i++) {
101 addr = ENETC_PORT_BASE + enetc_port_regs[i];
102 *buf++ = addr;
103 *buf++ = enetc_rd(hw, addr);
104 }
105
106 if (priv->si->hw_features & ENETC_SI_F_QBU) {
107 for (i = 0; i < ARRAY_SIZE(enetc_port_mm_regs); i++) {
108 addr = ENETC_PORT_BASE + enetc_port_mm_regs[i];
109 *buf++ = addr;
110 *buf++ = enetc_rd(hw, addr);
111 }
112 }
113 }
114
115 static const struct {
116 int reg;
117 char name[ETH_GSTRING_LEN];
118 } enetc_si_counters[] = {
119 { ENETC_SIROCT, "SI rx octets" },
120 { ENETC_SIRFRM, "SI rx frames" },
121 { ENETC_SIRUCA, "SI rx u-cast frames" },
122 { ENETC_SIRMCA, "SI rx m-cast frames" },
123 { ENETC_SITOCT, "SI tx octets" },
124 { ENETC_SITFRM, "SI tx frames" },
125 { ENETC_SITUCA, "SI tx u-cast frames" },
126 { ENETC_SITMCA, "SI tx m-cast frames" },
127 { ENETC_RBDCR(0), "Rx ring 0 discarded frames" },
128 { ENETC_RBDCR(1), "Rx ring 1 discarded frames" },
129 { ENETC_RBDCR(2), "Rx ring 2 discarded frames" },
130 { ENETC_RBDCR(3), "Rx ring 3 discarded frames" },
131 { ENETC_RBDCR(4), "Rx ring 4 discarded frames" },
132 { ENETC_RBDCR(5), "Rx ring 5 discarded frames" },
133 { ENETC_RBDCR(6), "Rx ring 6 discarded frames" },
134 { ENETC_RBDCR(7), "Rx ring 7 discarded frames" },
135 { ENETC_RBDCR(8), "Rx ring 8 discarded frames" },
136 { ENETC_RBDCR(9), "Rx ring 9 discarded frames" },
137 { ENETC_RBDCR(10), "Rx ring 10 discarded frames" },
138 { ENETC_RBDCR(11), "Rx ring 11 discarded frames" },
139 { ENETC_RBDCR(12), "Rx ring 12 discarded frames" },
140 { ENETC_RBDCR(13), "Rx ring 13 discarded frames" },
141 { ENETC_RBDCR(14), "Rx ring 14 discarded frames" },
142 { ENETC_RBDCR(15), "Rx ring 15 discarded frames" },
143 };
144
145 static const struct {
146 int reg;
147 char name[ETH_GSTRING_LEN] __nonstring;
148 } enetc_pm_counters[] = {
149 { ENETC_PM_REOCT(0), "MAC rx ethernet octets" },
150 { ENETC_PM_RALN(0), "MAC rx alignment errors" },
151 { ENETC_PM_RXPF(0), "MAC rx valid pause frames" },
152 { ENETC_PM_RFRM(0), "MAC rx valid frames" },
153 { ENETC_PM_RFCS(0), "MAC rx fcs errors" },
154 { ENETC_PM_RVLAN(0), "MAC rx VLAN frames" },
155 { ENETC_PM_RERR(0), "MAC rx frame errors" },
156 { ENETC_PM_RUCA(0), "MAC rx unicast frames" },
157 { ENETC_PM_RMCA(0), "MAC rx multicast frames" },
158 { ENETC_PM_RBCA(0), "MAC rx broadcast frames" },
159 { ENETC_PM_RDRP(0), "MAC rx dropped packets" },
160 { ENETC_PM_RPKT(0), "MAC rx packets" },
161 { ENETC_PM_RUND(0), "MAC rx undersized packets" },
162 { ENETC_PM_R64(0), "MAC rx 64 byte packets" },
163 { ENETC_PM_R127(0), "MAC rx 65-127 byte packets" },
164 { ENETC_PM_R255(0), "MAC rx 128-255 byte packets" },
165 { ENETC_PM_R511(0), "MAC rx 256-511 byte packets" },
166 { ENETC_PM_R1023(0), "MAC rx 512-1023 byte packets" },
167 { ENETC_PM_R1522(0), "MAC rx 1024-1522 byte packets" },
168 { ENETC_PM_R1523X(0), "MAC rx 1523 to max-octet packets" },
169 { ENETC_PM_ROVR(0), "MAC rx oversized packets" },
170 { ENETC_PM_RJBR(0), "MAC rx jabber packets" },
171 { ENETC_PM_RFRG(0), "MAC rx fragment packets" },
172 { ENETC_PM_RCNP(0), "MAC rx control packets" },
173 { ENETC_PM_RDRNTP(0), "MAC rx fifo drop" },
174 { ENETC_PM_TEOCT(0), "MAC tx ethernet octets" },
175 { ENETC_PM_TOCT(0), "MAC tx octets" },
176 { ENETC_PM_TCRSE(0), "MAC tx carrier sense errors" },
177 { ENETC_PM_TXPF(0), "MAC tx valid pause frames" },
178 { ENETC_PM_TFRM(0), "MAC tx frames" },
179 { ENETC_PM_TFCS(0), "MAC tx fcs errors" },
180 { ENETC_PM_TVLAN(0), "MAC tx VLAN frames" },
181 { ENETC_PM_TERR(0), "MAC tx frame errors" },
182 { ENETC_PM_TUCA(0), "MAC tx unicast frames" },
183 { ENETC_PM_TMCA(0), "MAC tx multicast frames" },
184 { ENETC_PM_TBCA(0), "MAC tx broadcast frames" },
185 { ENETC_PM_TPKT(0), "MAC tx packets" },
186 { ENETC_PM_TUND(0), "MAC tx undersized packets" },
187 { ENETC_PM_T64(0), "MAC tx 64 byte packets" },
188 { ENETC_PM_T127(0), "MAC tx 65-127 byte packets" },
189 { ENETC_PM_T255(0), "MAC tx 128-255 byte packets" },
190 { ENETC_PM_T511(0), "MAC tx 256-511 byte packets" },
191 { ENETC_PM_T1023(0), "MAC tx 512-1023 byte packets" },
192 { ENETC_PM_T1522(0), "MAC tx 1024-1522 byte packets" },
193 { ENETC_PM_T1523X(0), "MAC tx 1523 to max-octet packets" },
194 { ENETC_PM_TCNP(0), "MAC tx control packets" },
195 { ENETC_PM_TDFR(0), "MAC tx deferred packets" },
196 { ENETC_PM_TMCOL(0), "MAC tx multiple collisions" },
197 { ENETC_PM_TSCOL(0), "MAC tx single collisions" },
198 { ENETC_PM_TLCOL(0), "MAC tx late collisions" },
199 { ENETC_PM_TECOL(0), "MAC tx excessive collisions" },
200 };
201
202 static const struct {
203 int reg;
204 char name[ETH_GSTRING_LEN] __nonstring;
205 } enetc_port_counters[] = {
206 { ENETC_UFDMF, "SI MAC nomatch u-cast discards" },
207 { ENETC_MFDMF, "SI MAC nomatch m-cast discards" },
208 { ENETC_PBFDSIR, "SI MAC nomatch b-cast discards" },
209 { ENETC_PUFDVFR, "SI VLAN nomatch u-cast discards" },
210 { ENETC_PMFDVFR, "SI VLAN nomatch m-cast discards" },
211 { ENETC_PBFDVFR, "SI VLAN nomatch b-cast discards" },
212 { ENETC_PFDMSAPR, "SI pruning discarded frames" },
213 { ENETC_PICDR(0), "ICM DR0 discarded frames" },
214 { ENETC_PICDR(1), "ICM DR1 discarded frames" },
215 { ENETC_PICDR(2), "ICM DR2 discarded frames" },
216 { ENETC_PICDR(3), "ICM DR3 discarded frames" },
217 };
218
219 static const char rx_ring_stats[][ETH_GSTRING_LEN] = {
220 "Rx ring %2d frames",
221 "Rx ring %2d alloc errors",
222 "Rx ring %2d XDP drops",
223 "Rx ring %2d recycles",
224 "Rx ring %2d recycle failures",
225 "Rx ring %2d redirects",
226 "Rx ring %2d redirect failures",
227 };
228
229 static const char tx_ring_stats[][ETH_GSTRING_LEN] = {
230 "Tx ring %2d frames",
231 "Tx ring %2d XDP frames",
232 "Tx ring %2d XDP drops",
233 "Tx window drop %2d frames",
234 };
235
enetc_get_sset_count(struct net_device * ndev,int sset)236 static int enetc_get_sset_count(struct net_device *ndev, int sset)
237 {
238 struct enetc_ndev_priv *priv = netdev_priv(ndev);
239 int len;
240
241 if (sset != ETH_SS_STATS)
242 return -EOPNOTSUPP;
243
244 len = ARRAY_SIZE(enetc_si_counters) +
245 ARRAY_SIZE(tx_ring_stats) * priv->num_tx_rings +
246 ARRAY_SIZE(rx_ring_stats) * priv->num_rx_rings;
247
248 if (!enetc_si_is_pf(priv->si))
249 return len;
250
251 len += ARRAY_SIZE(enetc_port_counters);
252 len += ARRAY_SIZE(enetc_pm_counters);
253
254 return len;
255 }
256
enetc_get_strings(struct net_device * ndev,u32 stringset,u8 * data)257 static void enetc_get_strings(struct net_device *ndev, u32 stringset, u8 *data)
258 {
259 struct enetc_ndev_priv *priv = netdev_priv(ndev);
260 int i, j;
261
262 switch (stringset) {
263 case ETH_SS_STATS:
264 for (i = 0; i < ARRAY_SIZE(enetc_si_counters); i++)
265 ethtool_puts(&data, enetc_si_counters[i].name);
266 for (i = 0; i < priv->num_tx_rings; i++)
267 for (j = 0; j < ARRAY_SIZE(tx_ring_stats); j++)
268 ethtool_sprintf(&data, tx_ring_stats[j], i);
269 for (i = 0; i < priv->num_rx_rings; i++)
270 for (j = 0; j < ARRAY_SIZE(rx_ring_stats); j++)
271 ethtool_sprintf(&data, rx_ring_stats[j], i);
272
273 if (!enetc_si_is_pf(priv->si))
274 break;
275
276 for (i = 0; i < ARRAY_SIZE(enetc_port_counters); i++)
277 ethtool_cpy(&data, enetc_port_counters[i].name);
278
279 for (i = 0; i < ARRAY_SIZE(enetc_pm_counters); i++)
280 ethtool_cpy(&data, enetc_pm_counters[i].name);
281
282 break;
283 }
284 }
285
enetc_get_ethtool_stats(struct net_device * ndev,struct ethtool_stats * stats,u64 * data)286 static void enetc_get_ethtool_stats(struct net_device *ndev,
287 struct ethtool_stats *stats, u64 *data)
288 {
289 struct enetc_ndev_priv *priv = netdev_priv(ndev);
290 struct enetc_hw *hw = &priv->si->hw;
291 int i, o = 0;
292
293 for (i = 0; i < ARRAY_SIZE(enetc_si_counters); i++)
294 data[o++] = enetc_rd64(hw, enetc_si_counters[i].reg);
295
296 for (i = 0; i < priv->num_tx_rings; i++) {
297 data[o++] = priv->tx_ring[i]->stats.packets;
298 data[o++] = priv->tx_ring[i]->stats.xdp_tx;
299 data[o++] = priv->tx_ring[i]->stats.xdp_tx_drops;
300 data[o++] = priv->tx_ring[i]->stats.win_drop;
301 }
302
303 for (i = 0; i < priv->num_rx_rings; i++) {
304 data[o++] = priv->rx_ring[i]->stats.packets;
305 data[o++] = priv->rx_ring[i]->stats.rx_alloc_errs;
306 data[o++] = priv->rx_ring[i]->stats.xdp_drops;
307 data[o++] = priv->rx_ring[i]->stats.recycles;
308 data[o++] = priv->rx_ring[i]->stats.recycle_failures;
309 data[o++] = priv->rx_ring[i]->stats.xdp_redirect;
310 data[o++] = priv->rx_ring[i]->stats.xdp_redirect_failures;
311 }
312
313 if (!enetc_si_is_pf(priv->si))
314 return;
315
316 for (i = 0; i < ARRAY_SIZE(enetc_port_counters); i++)
317 data[o++] = enetc_port_rd(hw, enetc_port_counters[i].reg);
318
319 for (i = 0; i < ARRAY_SIZE(enetc_pm_counters); i++)
320 data[o++] = enetc_port_rd64(hw, enetc_pm_counters[i].reg);
321 }
322
enetc_pause_stats(struct enetc_hw * hw,int mac,struct ethtool_pause_stats * pause_stats)323 static void enetc_pause_stats(struct enetc_hw *hw, int mac,
324 struct ethtool_pause_stats *pause_stats)
325 {
326 pause_stats->tx_pause_frames = enetc_port_rd64(hw, ENETC_PM_TXPF(mac));
327 pause_stats->rx_pause_frames = enetc_port_rd64(hw, ENETC_PM_RXPF(mac));
328 }
329
enetc_get_pause_stats(struct net_device * ndev,struct ethtool_pause_stats * pause_stats)330 static void enetc_get_pause_stats(struct net_device *ndev,
331 struct ethtool_pause_stats *pause_stats)
332 {
333 struct enetc_ndev_priv *priv = netdev_priv(ndev);
334 struct enetc_hw *hw = &priv->si->hw;
335 struct enetc_si *si = priv->si;
336
337 switch (pause_stats->src) {
338 case ETHTOOL_MAC_STATS_SRC_EMAC:
339 enetc_pause_stats(hw, 0, pause_stats);
340 break;
341 case ETHTOOL_MAC_STATS_SRC_PMAC:
342 if (si->hw_features & ENETC_SI_F_QBU)
343 enetc_pause_stats(hw, 1, pause_stats);
344 break;
345 case ETHTOOL_MAC_STATS_SRC_AGGREGATE:
346 ethtool_aggregate_pause_stats(ndev, pause_stats);
347 break;
348 }
349 }
350
enetc_mac_stats(struct enetc_hw * hw,int mac,struct ethtool_eth_mac_stats * s)351 static void enetc_mac_stats(struct enetc_hw *hw, int mac,
352 struct ethtool_eth_mac_stats *s)
353 {
354 s->FramesTransmittedOK = enetc_port_rd64(hw, ENETC_PM_TFRM(mac));
355 s->SingleCollisionFrames = enetc_port_rd64(hw, ENETC_PM_TSCOL(mac));
356 s->MultipleCollisionFrames = enetc_port_rd64(hw, ENETC_PM_TMCOL(mac));
357 s->FramesReceivedOK = enetc_port_rd64(hw, ENETC_PM_RFRM(mac));
358 s->FrameCheckSequenceErrors = enetc_port_rd64(hw, ENETC_PM_RFCS(mac));
359 s->AlignmentErrors = enetc_port_rd64(hw, ENETC_PM_RALN(mac));
360 s->OctetsTransmittedOK = enetc_port_rd64(hw, ENETC_PM_TEOCT(mac));
361 s->FramesWithDeferredXmissions = enetc_port_rd64(hw, ENETC_PM_TDFR(mac));
362 s->LateCollisions = enetc_port_rd64(hw, ENETC_PM_TLCOL(mac));
363 s->FramesAbortedDueToXSColls = enetc_port_rd64(hw, ENETC_PM_TECOL(mac));
364 s->FramesLostDueToIntMACXmitError = enetc_port_rd64(hw, ENETC_PM_TERR(mac));
365 s->CarrierSenseErrors = enetc_port_rd64(hw, ENETC_PM_TCRSE(mac));
366 s->OctetsReceivedOK = enetc_port_rd64(hw, ENETC_PM_REOCT(mac));
367 s->FramesLostDueToIntMACRcvError = enetc_port_rd64(hw, ENETC_PM_RDRNTP(mac));
368 s->MulticastFramesXmittedOK = enetc_port_rd64(hw, ENETC_PM_TMCA(mac));
369 s->BroadcastFramesXmittedOK = enetc_port_rd64(hw, ENETC_PM_TBCA(mac));
370 s->MulticastFramesReceivedOK = enetc_port_rd64(hw, ENETC_PM_RMCA(mac));
371 s->BroadcastFramesReceivedOK = enetc_port_rd64(hw, ENETC_PM_RBCA(mac));
372 }
373
enetc_ctrl_stats(struct enetc_hw * hw,int mac,struct ethtool_eth_ctrl_stats * s)374 static void enetc_ctrl_stats(struct enetc_hw *hw, int mac,
375 struct ethtool_eth_ctrl_stats *s)
376 {
377 s->MACControlFramesTransmitted = enetc_port_rd64(hw, ENETC_PM_TCNP(mac));
378 s->MACControlFramesReceived = enetc_port_rd64(hw, ENETC_PM_RCNP(mac));
379 }
380
381 static const struct ethtool_rmon_hist_range enetc_rmon_ranges[] = {
382 { 64, 64 },
383 { 65, 127 },
384 { 128, 255 },
385 { 256, 511 },
386 { 512, 1023 },
387 { 1024, 1522 },
388 { 1523, ENETC_MAC_MAXFRM_SIZE },
389 {},
390 };
391
enetc_rmon_stats(struct enetc_hw * hw,int mac,struct ethtool_rmon_stats * s)392 static void enetc_rmon_stats(struct enetc_hw *hw, int mac,
393 struct ethtool_rmon_stats *s)
394 {
395 s->undersize_pkts = enetc_port_rd64(hw, ENETC_PM_RUND(mac));
396 s->oversize_pkts = enetc_port_rd64(hw, ENETC_PM_ROVR(mac));
397 s->fragments = enetc_port_rd64(hw, ENETC_PM_RFRG(mac));
398 s->jabbers = enetc_port_rd64(hw, ENETC_PM_RJBR(mac));
399
400 s->hist[0] = enetc_port_rd64(hw, ENETC_PM_R64(mac));
401 s->hist[1] = enetc_port_rd64(hw, ENETC_PM_R127(mac));
402 s->hist[2] = enetc_port_rd64(hw, ENETC_PM_R255(mac));
403 s->hist[3] = enetc_port_rd64(hw, ENETC_PM_R511(mac));
404 s->hist[4] = enetc_port_rd64(hw, ENETC_PM_R1023(mac));
405 s->hist[5] = enetc_port_rd64(hw, ENETC_PM_R1522(mac));
406 s->hist[6] = enetc_port_rd64(hw, ENETC_PM_R1523X(mac));
407
408 s->hist_tx[0] = enetc_port_rd64(hw, ENETC_PM_T64(mac));
409 s->hist_tx[1] = enetc_port_rd64(hw, ENETC_PM_T127(mac));
410 s->hist_tx[2] = enetc_port_rd64(hw, ENETC_PM_T255(mac));
411 s->hist_tx[3] = enetc_port_rd64(hw, ENETC_PM_T511(mac));
412 s->hist_tx[4] = enetc_port_rd64(hw, ENETC_PM_T1023(mac));
413 s->hist_tx[5] = enetc_port_rd64(hw, ENETC_PM_T1522(mac));
414 s->hist_tx[6] = enetc_port_rd64(hw, ENETC_PM_T1523X(mac));
415 }
416
enetc_get_eth_mac_stats(struct net_device * ndev,struct ethtool_eth_mac_stats * mac_stats)417 static void enetc_get_eth_mac_stats(struct net_device *ndev,
418 struct ethtool_eth_mac_stats *mac_stats)
419 {
420 struct enetc_ndev_priv *priv = netdev_priv(ndev);
421 struct enetc_hw *hw = &priv->si->hw;
422 struct enetc_si *si = priv->si;
423
424 switch (mac_stats->src) {
425 case ETHTOOL_MAC_STATS_SRC_EMAC:
426 enetc_mac_stats(hw, 0, mac_stats);
427 break;
428 case ETHTOOL_MAC_STATS_SRC_PMAC:
429 if (si->hw_features & ENETC_SI_F_QBU)
430 enetc_mac_stats(hw, 1, mac_stats);
431 break;
432 case ETHTOOL_MAC_STATS_SRC_AGGREGATE:
433 ethtool_aggregate_mac_stats(ndev, mac_stats);
434 break;
435 }
436 }
437
enetc_ppm_mac_stats(struct enetc_si * si,struct ethtool_eth_mac_stats * s)438 static void enetc_ppm_mac_stats(struct enetc_si *si,
439 struct ethtool_eth_mac_stats *s)
440 {
441 struct enetc_hw *hw = &si->hw;
442 u64 rufcr, rmfcr, rbfcr;
443 u64 tufcr, tmfcr, tbfcr;
444
445 rufcr = enetc_port_rd64(hw, ENETC4_PPMRUFCR);
446 rmfcr = enetc_port_rd64(hw, ENETC4_PPMRMFCR);
447 rbfcr = enetc_port_rd64(hw, ENETC4_PPMRBFCR);
448
449 tufcr = enetc_port_rd64(hw, ENETC4_PPMTUFCR);
450 tmfcr = enetc_port_rd64(hw, ENETC4_PPMTMFCR);
451 tbfcr = enetc_port_rd64(hw, ENETC4_PPMTBFCR);
452
453 s->FramesTransmittedOK = tufcr + tmfcr + tbfcr;
454 s->FramesReceivedOK = rufcr + rmfcr + rbfcr;
455 s->OctetsTransmittedOK = enetc_port_rd64(hw, ENETC4_PPMTOCR);
456 s->OctetsReceivedOK = enetc_port_rd64(hw, ENETC4_PPMROCR);
457 s->MulticastFramesXmittedOK = tmfcr;
458 s->BroadcastFramesXmittedOK = tbfcr;
459 s->MulticastFramesReceivedOK = rmfcr;
460 s->BroadcastFramesReceivedOK = rbfcr;
461 }
462
enetc_ppm_get_eth_mac_stats(struct net_device * ndev,struct ethtool_eth_mac_stats * mac_stats)463 static void enetc_ppm_get_eth_mac_stats(struct net_device *ndev,
464 struct ethtool_eth_mac_stats *mac_stats)
465 {
466 struct enetc_ndev_priv *priv = netdev_priv(ndev);
467
468 switch (mac_stats->src) {
469 case ETHTOOL_MAC_STATS_SRC_EMAC:
470 enetc_ppm_mac_stats(priv->si, mac_stats);
471 break;
472 case ETHTOOL_MAC_STATS_SRC_PMAC:
473 break;
474 case ETHTOOL_MAC_STATS_SRC_AGGREGATE:
475 ethtool_aggregate_mac_stats(ndev, mac_stats);
476 break;
477 }
478 }
479
enetc_get_eth_ctrl_stats(struct net_device * ndev,struct ethtool_eth_ctrl_stats * ctrl_stats)480 static void enetc_get_eth_ctrl_stats(struct net_device *ndev,
481 struct ethtool_eth_ctrl_stats *ctrl_stats)
482 {
483 struct enetc_ndev_priv *priv = netdev_priv(ndev);
484 struct enetc_hw *hw = &priv->si->hw;
485 struct enetc_si *si = priv->si;
486
487 switch (ctrl_stats->src) {
488 case ETHTOOL_MAC_STATS_SRC_EMAC:
489 enetc_ctrl_stats(hw, 0, ctrl_stats);
490 break;
491 case ETHTOOL_MAC_STATS_SRC_PMAC:
492 if (si->hw_features & ENETC_SI_F_QBU)
493 enetc_ctrl_stats(hw, 1, ctrl_stats);
494 break;
495 case ETHTOOL_MAC_STATS_SRC_AGGREGATE:
496 ethtool_aggregate_ctrl_stats(ndev, ctrl_stats);
497 break;
498 }
499 }
500
enetc_get_rmon_stats(struct net_device * ndev,struct ethtool_rmon_stats * rmon_stats,const struct ethtool_rmon_hist_range ** ranges)501 static void enetc_get_rmon_stats(struct net_device *ndev,
502 struct ethtool_rmon_stats *rmon_stats,
503 const struct ethtool_rmon_hist_range **ranges)
504 {
505 struct enetc_ndev_priv *priv = netdev_priv(ndev);
506 struct enetc_hw *hw = &priv->si->hw;
507 struct enetc_si *si = priv->si;
508
509 *ranges = enetc_rmon_ranges;
510
511 switch (rmon_stats->src) {
512 case ETHTOOL_MAC_STATS_SRC_EMAC:
513 enetc_rmon_stats(hw, 0, rmon_stats);
514 break;
515 case ETHTOOL_MAC_STATS_SRC_PMAC:
516 if (si->hw_features & ENETC_SI_F_QBU)
517 enetc_rmon_stats(hw, 1, rmon_stats);
518 break;
519 case ETHTOOL_MAC_STATS_SRC_AGGREGATE:
520 ethtool_aggregate_rmon_stats(ndev, rmon_stats);
521 break;
522 }
523 }
524
525 #define ENETC_RSSHASH_L3 (RXH_L2DA | RXH_VLAN | RXH_L3_PROTO | RXH_IP_SRC | \
526 RXH_IP_DST)
527 #define ENETC_RSSHASH_L4 (ENETC_RSSHASH_L3 | RXH_L4_B_0_1 | RXH_L4_B_2_3)
enetc_get_rxfh_fields(struct net_device * netdev,struct ethtool_rxfh_fields * rxnfc)528 static int enetc_get_rxfh_fields(struct net_device *netdev,
529 struct ethtool_rxfh_fields *rxnfc)
530 {
531 static const u32 rsshash[] = {
532 [TCP_V4_FLOW] = ENETC_RSSHASH_L4,
533 [UDP_V4_FLOW] = ENETC_RSSHASH_L4,
534 [SCTP_V4_FLOW] = ENETC_RSSHASH_L4,
535 [AH_ESP_V4_FLOW] = ENETC_RSSHASH_L3,
536 [IPV4_FLOW] = ENETC_RSSHASH_L3,
537 [TCP_V6_FLOW] = ENETC_RSSHASH_L4,
538 [UDP_V6_FLOW] = ENETC_RSSHASH_L4,
539 [SCTP_V6_FLOW] = ENETC_RSSHASH_L4,
540 [AH_ESP_V6_FLOW] = ENETC_RSSHASH_L3,
541 [IPV6_FLOW] = ENETC_RSSHASH_L3,
542 [ETHER_FLOW] = 0,
543 };
544
545 if (rxnfc->flow_type >= ARRAY_SIZE(rsshash))
546 return -EINVAL;
547
548 rxnfc->data = rsshash[rxnfc->flow_type];
549
550 return 0;
551 }
552
553 /* current HW spec does byte reversal on everything including MAC addresses */
ether_addr_copy_swap(u8 * dst,const u8 * src)554 static void ether_addr_copy_swap(u8 *dst, const u8 *src)
555 {
556 int i;
557
558 for (i = 0; i < ETH_ALEN; i++)
559 dst[i] = src[ETH_ALEN - i - 1];
560 }
561
enetc_set_cls_entry(struct enetc_si * si,struct ethtool_rx_flow_spec * fs,bool en)562 static int enetc_set_cls_entry(struct enetc_si *si,
563 struct ethtool_rx_flow_spec *fs, bool en)
564 {
565 struct ethtool_tcpip4_spec *l4ip4_h, *l4ip4_m;
566 struct ethtool_usrip4_spec *l3ip4_h, *l3ip4_m;
567 struct ethhdr *eth_h, *eth_m;
568 struct enetc_cmd_rfse rfse = { {0} };
569
570 if (!en)
571 goto done;
572
573 switch (fs->flow_type & 0xff) {
574 case TCP_V4_FLOW:
575 l4ip4_h = &fs->h_u.tcp_ip4_spec;
576 l4ip4_m = &fs->m_u.tcp_ip4_spec;
577 goto l4ip4;
578 case UDP_V4_FLOW:
579 l4ip4_h = &fs->h_u.udp_ip4_spec;
580 l4ip4_m = &fs->m_u.udp_ip4_spec;
581 goto l4ip4;
582 case SCTP_V4_FLOW:
583 l4ip4_h = &fs->h_u.sctp_ip4_spec;
584 l4ip4_m = &fs->m_u.sctp_ip4_spec;
585 l4ip4:
586 rfse.sip_h[0] = l4ip4_h->ip4src;
587 rfse.sip_m[0] = l4ip4_m->ip4src;
588 rfse.dip_h[0] = l4ip4_h->ip4dst;
589 rfse.dip_m[0] = l4ip4_m->ip4dst;
590 rfse.sport_h = ntohs(l4ip4_h->psrc);
591 rfse.sport_m = ntohs(l4ip4_m->psrc);
592 rfse.dport_h = ntohs(l4ip4_h->pdst);
593 rfse.dport_m = ntohs(l4ip4_m->pdst);
594 if (l4ip4_m->tos)
595 netdev_warn(si->ndev, "ToS field is not supported and was ignored\n");
596 rfse.ethtype_h = ETH_P_IP; /* IPv4 */
597 rfse.ethtype_m = 0xffff;
598 break;
599 case IP_USER_FLOW:
600 l3ip4_h = &fs->h_u.usr_ip4_spec;
601 l3ip4_m = &fs->m_u.usr_ip4_spec;
602
603 rfse.sip_h[0] = l3ip4_h->ip4src;
604 rfse.sip_m[0] = l3ip4_m->ip4src;
605 rfse.dip_h[0] = l3ip4_h->ip4dst;
606 rfse.dip_m[0] = l3ip4_m->ip4dst;
607 if (l3ip4_m->tos)
608 netdev_warn(si->ndev, "ToS field is not supported and was ignored\n");
609 rfse.ethtype_h = ETH_P_IP; /* IPv4 */
610 rfse.ethtype_m = 0xffff;
611 break;
612 case ETHER_FLOW:
613 eth_h = &fs->h_u.ether_spec;
614 eth_m = &fs->m_u.ether_spec;
615
616 ether_addr_copy_swap(rfse.smac_h, eth_h->h_source);
617 ether_addr_copy_swap(rfse.smac_m, eth_m->h_source);
618 ether_addr_copy_swap(rfse.dmac_h, eth_h->h_dest);
619 ether_addr_copy_swap(rfse.dmac_m, eth_m->h_dest);
620 rfse.ethtype_h = ntohs(eth_h->h_proto);
621 rfse.ethtype_m = ntohs(eth_m->h_proto);
622 break;
623 default:
624 return -EOPNOTSUPP;
625 }
626
627 rfse.mode |= ENETC_RFSE_EN;
628 if (fs->ring_cookie != RX_CLS_FLOW_DISC) {
629 rfse.mode |= ENETC_RFSE_MODE_BD;
630 rfse.result = fs->ring_cookie;
631 }
632 done:
633 return enetc_set_fs_entry(si, &rfse, fs->location);
634 }
635
enetc_get_rx_ring_count(struct net_device * ndev)636 static u32 enetc_get_rx_ring_count(struct net_device *ndev)
637 {
638 struct enetc_ndev_priv *priv = netdev_priv(ndev);
639
640 return priv->num_rx_rings;
641 }
642
enetc_get_rxnfc(struct net_device * ndev,struct ethtool_rxnfc * rxnfc,u32 * rule_locs)643 static int enetc_get_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *rxnfc,
644 u32 *rule_locs)
645 {
646 struct enetc_ndev_priv *priv = netdev_priv(ndev);
647 int i, j;
648
649 switch (rxnfc->cmd) {
650 case ETHTOOL_GRXCLSRLCNT:
651 /* total number of entries */
652 rxnfc->data = priv->si->num_fs_entries;
653 /* number of entries in use */
654 rxnfc->rule_cnt = 0;
655 for (i = 0; i < priv->si->num_fs_entries; i++)
656 if (priv->cls_rules[i].used)
657 rxnfc->rule_cnt++;
658 break;
659 case ETHTOOL_GRXCLSRULE:
660 if (rxnfc->fs.location >= priv->si->num_fs_entries)
661 return -EINVAL;
662
663 /* get entry x */
664 rxnfc->fs = priv->cls_rules[rxnfc->fs.location].fs;
665 break;
666 case ETHTOOL_GRXCLSRLALL:
667 /* total number of entries */
668 rxnfc->data = priv->si->num_fs_entries;
669 /* array of indexes of used entries */
670 j = 0;
671 for (i = 0; i < priv->si->num_fs_entries; i++) {
672 if (!priv->cls_rules[i].used)
673 continue;
674 if (j == rxnfc->rule_cnt)
675 return -EMSGSIZE;
676 rule_locs[j++] = i;
677 }
678 /* number of entries in use */
679 rxnfc->rule_cnt = j;
680 break;
681 default:
682 return -EOPNOTSUPP;
683 }
684
685 return 0;
686 }
687
enetc_set_rxnfc(struct net_device * ndev,struct ethtool_rxnfc * rxnfc)688 static int enetc_set_rxnfc(struct net_device *ndev, struct ethtool_rxnfc *rxnfc)
689 {
690 struct enetc_ndev_priv *priv = netdev_priv(ndev);
691 int err;
692
693 switch (rxnfc->cmd) {
694 case ETHTOOL_SRXCLSRLINS:
695 if (rxnfc->fs.location >= priv->si->num_fs_entries)
696 return -EINVAL;
697
698 if (rxnfc->fs.ring_cookie >= priv->num_rx_rings &&
699 rxnfc->fs.ring_cookie != RX_CLS_FLOW_DISC)
700 return -EINVAL;
701
702 err = enetc_set_cls_entry(priv->si, &rxnfc->fs, true);
703 if (err)
704 return err;
705 priv->cls_rules[rxnfc->fs.location].fs = rxnfc->fs;
706 priv->cls_rules[rxnfc->fs.location].used = 1;
707 break;
708 case ETHTOOL_SRXCLSRLDEL:
709 if (rxnfc->fs.location >= priv->si->num_fs_entries)
710 return -EINVAL;
711
712 err = enetc_set_cls_entry(priv->si, &rxnfc->fs, false);
713 if (err)
714 return err;
715 priv->cls_rules[rxnfc->fs.location].used = 0;
716 break;
717 default:
718 return -EOPNOTSUPP;
719 }
720
721 return 0;
722 }
723
enetc_get_rxfh_key_size(struct net_device * ndev)724 static u32 enetc_get_rxfh_key_size(struct net_device *ndev)
725 {
726 struct enetc_ndev_priv *priv = netdev_priv(ndev);
727
728 /* return the size of the RX flow hash key. PF only */
729 return (priv->si->hw.port) ? ENETC_RSSHASH_KEY_SIZE : 0;
730 }
731
enetc_get_rxfh_indir_size(struct net_device * ndev)732 static u32 enetc_get_rxfh_indir_size(struct net_device *ndev)
733 {
734 struct enetc_ndev_priv *priv = netdev_priv(ndev);
735
736 /* return the size of the RX flow hash indirection table */
737 return priv->si->num_rss;
738 }
739
enetc_get_rss_key_base(struct enetc_si * si)740 static int enetc_get_rss_key_base(struct enetc_si *si)
741 {
742 if (is_enetc_rev1(si))
743 return ENETC_PRSSK(0);
744
745 return ENETC4_PRSSKR(0);
746 }
747
enetc_get_rss_key(struct enetc_si * si,const u8 * key)748 static void enetc_get_rss_key(struct enetc_si *si, const u8 *key)
749 {
750 int base = enetc_get_rss_key_base(si);
751 struct enetc_hw *hw = &si->hw;
752 int i;
753
754 for (i = 0; i < ENETC_RSSHASH_KEY_SIZE / 4; i++)
755 ((u32 *)key)[i] = enetc_port_rd(hw, base + i * 4);
756 }
757
enetc_get_rxfh(struct net_device * ndev,struct ethtool_rxfh_param * rxfh)758 static int enetc_get_rxfh(struct net_device *ndev,
759 struct ethtool_rxfh_param *rxfh)
760 {
761 struct enetc_ndev_priv *priv = netdev_priv(ndev);
762 struct enetc_si *si = priv->si;
763 int err = 0;
764
765 /* return hash function */
766 rxfh->hfunc = ETH_RSS_HASH_TOP;
767
768 /* return hash key */
769 if (rxfh->key && enetc_si_is_pf(si))
770 enetc_get_rss_key(si, rxfh->key);
771
772 /* return RSS table */
773 if (rxfh->indir)
774 err = si->ops->get_rss_table(si, rxfh->indir, si->num_rss);
775
776 return err;
777 }
778
enetc_set_rss_key(struct enetc_si * si,const u8 * bytes)779 void enetc_set_rss_key(struct enetc_si *si, const u8 *bytes)
780 {
781 int base = enetc_get_rss_key_base(si);
782 struct enetc_hw *hw = &si->hw;
783 int i;
784
785 for (i = 0; i < ENETC_RSSHASH_KEY_SIZE / 4; i++)
786 enetc_port_wr(hw, base + i * 4, ((u32 *)bytes)[i]);
787 }
788 EXPORT_SYMBOL_GPL(enetc_set_rss_key);
789
enetc_set_rxfh(struct net_device * ndev,struct ethtool_rxfh_param * rxfh,struct netlink_ext_ack * extack)790 static int enetc_set_rxfh(struct net_device *ndev,
791 struct ethtool_rxfh_param *rxfh,
792 struct netlink_ext_ack *extack)
793 {
794 struct enetc_ndev_priv *priv = netdev_priv(ndev);
795 struct enetc_si *si = priv->si;
796 int err = 0;
797
798 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE &&
799 rxfh->hfunc != ETH_RSS_HASH_TOP)
800 return -EOPNOTSUPP;
801
802 /* set hash key, if PF */
803 if (rxfh->key) {
804 if (!enetc_si_is_pf(si))
805 return -EOPNOTSUPP;
806
807 enetc_set_rss_key(si, rxfh->key);
808 }
809
810 /* set RSS table */
811 if (rxfh->indir)
812 err = si->ops->set_rss_table(si, rxfh->indir, si->num_rss);
813
814 return err;
815 }
816
enetc_get_ringparam(struct net_device * ndev,struct ethtool_ringparam * ring,struct kernel_ethtool_ringparam * kernel_ring,struct netlink_ext_ack * extack)817 static void enetc_get_ringparam(struct net_device *ndev,
818 struct ethtool_ringparam *ring,
819 struct kernel_ethtool_ringparam *kernel_ring,
820 struct netlink_ext_ack *extack)
821 {
822 struct enetc_ndev_priv *priv = netdev_priv(ndev);
823
824 ring->rx_max_pending = priv->rx_bd_count;
825 ring->tx_max_pending = priv->tx_bd_count;
826 ring->rx_pending = priv->rx_bd_count;
827 ring->tx_pending = priv->tx_bd_count;
828
829 /* do some h/w sanity checks for BDR length */
830 if (netif_running(ndev)) {
831 struct enetc_hw *hw = &priv->si->hw;
832 u32 val = enetc_rxbdr_rd(hw, 0, ENETC_RBLENR);
833
834 if (val != priv->rx_bd_count)
835 netif_err(priv, hw, ndev, "RxBDR[RBLENR] = %d!\n", val);
836
837 val = enetc_txbdr_rd(hw, 0, ENETC_TBLENR);
838
839 if (val != priv->tx_bd_count)
840 netif_err(priv, hw, ndev, "TxBDR[TBLENR] = %d!\n", val);
841 }
842 }
843
enetc_get_coalesce(struct net_device * ndev,struct ethtool_coalesce * ic,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)844 static int enetc_get_coalesce(struct net_device *ndev,
845 struct ethtool_coalesce *ic,
846 struct kernel_ethtool_coalesce *kernel_coal,
847 struct netlink_ext_ack *extack)
848 {
849 struct enetc_ndev_priv *priv = netdev_priv(ndev);
850 struct enetc_int_vector *v = priv->int_vector[0];
851 u64 clk_freq = priv->sysclk_freq;
852
853 ic->tx_coalesce_usecs = enetc_cycles_to_usecs(priv->tx_ictt, clk_freq);
854 ic->rx_coalesce_usecs = enetc_cycles_to_usecs(v->rx_ictt, clk_freq);
855
856 ic->tx_max_coalesced_frames = ENETC_TXIC_PKTTHR;
857 ic->rx_max_coalesced_frames = ENETC_RXIC_PKTTHR;
858
859 ic->use_adaptive_rx_coalesce = priv->ic_mode & ENETC_IC_RX_ADAPTIVE;
860
861 return 0;
862 }
863
enetc_set_coalesce(struct net_device * ndev,struct ethtool_coalesce * ic,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)864 static int enetc_set_coalesce(struct net_device *ndev,
865 struct ethtool_coalesce *ic,
866 struct kernel_ethtool_coalesce *kernel_coal,
867 struct netlink_ext_ack *extack)
868 {
869 struct enetc_ndev_priv *priv = netdev_priv(ndev);
870 u64 clk_freq = priv->sysclk_freq;
871 u32 rx_ictt, tx_ictt;
872 int i, ic_mode;
873 bool changed;
874
875 tx_ictt = enetc_usecs_to_cycles(ic->tx_coalesce_usecs, clk_freq);
876 rx_ictt = enetc_usecs_to_cycles(ic->rx_coalesce_usecs, clk_freq);
877
878 if (ic->rx_max_coalesced_frames != ENETC_RXIC_PKTTHR)
879 return -EOPNOTSUPP;
880
881 if (ic->tx_max_coalesced_frames != ENETC_TXIC_PKTTHR)
882 return -EOPNOTSUPP;
883
884 ic_mode = ENETC_IC_NONE;
885 if (ic->use_adaptive_rx_coalesce) {
886 ic_mode |= ENETC_IC_RX_ADAPTIVE;
887 rx_ictt = 0x1;
888 } else {
889 ic_mode |= rx_ictt ? ENETC_IC_RX_MANUAL : 0;
890 }
891
892 ic_mode |= tx_ictt ? ENETC_IC_TX_MANUAL : 0;
893
894 /* commit the settings */
895 changed = (ic_mode != priv->ic_mode) || (priv->tx_ictt != tx_ictt);
896
897 priv->ic_mode = ic_mode;
898 priv->tx_ictt = tx_ictt;
899
900 for (i = 0; i < priv->bdr_int_num; i++) {
901 struct enetc_int_vector *v = priv->int_vector[i];
902
903 v->rx_ictt = rx_ictt;
904 v->rx_dim_en = !!(ic_mode & ENETC_IC_RX_ADAPTIVE);
905 }
906
907 if (netif_running(ndev) && changed) {
908 /* reconfigure the operation mode of h/w interrupts,
909 * traffic needs to be paused in the process
910 */
911 enetc_stop(ndev);
912 enetc_start(ndev);
913 }
914
915 return 0;
916 }
917
enetc_get_phc_index_by_pdev(struct enetc_si * si)918 static int enetc_get_phc_index_by_pdev(struct enetc_si *si)
919 {
920 struct pci_bus *bus = si->pdev->bus;
921 struct pci_dev *timer_pdev;
922 unsigned int devfn;
923 int phc_index;
924
925 switch (si->revision) {
926 case ENETC_REV_1_0:
927 devfn = PCI_DEVFN(0, 4);
928 break;
929 case ENETC_REV_4_1:
930 devfn = PCI_DEVFN(24, 0);
931 break;
932 case ENETC_REV_4_3:
933 devfn = PCI_DEVFN(0, 1);
934 break;
935 default:
936 return -1;
937 }
938
939 timer_pdev = pci_get_domain_bus_and_slot(pci_domain_nr(bus),
940 bus->number, devfn);
941 if (!timer_pdev)
942 return -1;
943
944 phc_index = ptp_clock_index_by_dev(&timer_pdev->dev);
945 pci_dev_put(timer_pdev);
946
947 return phc_index;
948 }
949
enetc_get_phc_index(struct enetc_si * si)950 static int enetc_get_phc_index(struct enetc_si *si)
951 {
952 struct device_node *np = si->pdev->dev.of_node;
953 struct device_node *timer_np;
954 int phc_index;
955
956 if (!np)
957 return enetc_get_phc_index_by_pdev(si);
958
959 timer_np = of_parse_phandle(np, "ptp-timer", 0);
960 if (!timer_np)
961 return enetc_get_phc_index_by_pdev(si);
962
963 phc_index = ptp_clock_index_by_of_node(timer_np);
964 of_node_put(timer_np);
965
966 return phc_index;
967 }
968
enetc_get_ts_generic_info(struct net_device * ndev,struct kernel_ethtool_ts_info * info)969 static void enetc_get_ts_generic_info(struct net_device *ndev,
970 struct kernel_ethtool_ts_info *info)
971 {
972 struct enetc_ndev_priv *priv = netdev_priv(ndev);
973
974 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
975 SOF_TIMESTAMPING_RX_HARDWARE |
976 SOF_TIMESTAMPING_RAW_HARDWARE |
977 SOF_TIMESTAMPING_TX_SOFTWARE;
978
979 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
980 (1 << HWTSTAMP_TX_ON);
981
982 if (enetc_si_is_pf(priv->si))
983 info->tx_types |= (1 << HWTSTAMP_TX_ONESTEP_SYNC);
984
985 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
986 (1 << HWTSTAMP_FILTER_ALL);
987 }
988
enetc_get_ts_info(struct net_device * ndev,struct kernel_ethtool_ts_info * info)989 static int enetc_get_ts_info(struct net_device *ndev,
990 struct kernel_ethtool_ts_info *info)
991 {
992 struct enetc_ndev_priv *priv = netdev_priv(ndev);
993 struct enetc_si *si = priv->si;
994
995 if (!enetc_ptp_clock_is_enabled(si))
996 goto timestamp_tx_sw;
997
998 info->phc_index = enetc_get_phc_index(si);
999 if (info->phc_index < 0)
1000 goto timestamp_tx_sw;
1001
1002 enetc_get_ts_generic_info(ndev, info);
1003
1004 return 0;
1005
1006 timestamp_tx_sw:
1007 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE;
1008
1009 return 0;
1010 }
1011
enetc_get_wol(struct net_device * dev,struct ethtool_wolinfo * wol)1012 static void enetc_get_wol(struct net_device *dev,
1013 struct ethtool_wolinfo *wol)
1014 {
1015 wol->supported = 0;
1016 wol->wolopts = 0;
1017
1018 if (dev->phydev)
1019 phy_ethtool_get_wol(dev->phydev, wol);
1020 }
1021
enetc_set_wol(struct net_device * dev,struct ethtool_wolinfo * wol)1022 static int enetc_set_wol(struct net_device *dev,
1023 struct ethtool_wolinfo *wol)
1024 {
1025 int ret;
1026
1027 if (!dev->phydev)
1028 return -EOPNOTSUPP;
1029
1030 ret = phy_ethtool_set_wol(dev->phydev, wol);
1031 if (!ret)
1032 device_set_wakeup_enable(&dev->dev, wol->wolopts);
1033
1034 return ret;
1035 }
1036
enetc_get_pauseparam(struct net_device * dev,struct ethtool_pauseparam * pause)1037 static void enetc_get_pauseparam(struct net_device *dev,
1038 struct ethtool_pauseparam *pause)
1039 {
1040 struct enetc_ndev_priv *priv = netdev_priv(dev);
1041
1042 phylink_ethtool_get_pauseparam(priv->phylink, pause);
1043 }
1044
enetc_set_pauseparam(struct net_device * dev,struct ethtool_pauseparam * pause)1045 static int enetc_set_pauseparam(struct net_device *dev,
1046 struct ethtool_pauseparam *pause)
1047 {
1048 struct enetc_ndev_priv *priv = netdev_priv(dev);
1049
1050 return phylink_ethtool_set_pauseparam(priv->phylink, pause);
1051 }
1052
enetc_get_link_ksettings(struct net_device * dev,struct ethtool_link_ksettings * cmd)1053 static int enetc_get_link_ksettings(struct net_device *dev,
1054 struct ethtool_link_ksettings *cmd)
1055 {
1056 struct enetc_ndev_priv *priv = netdev_priv(dev);
1057
1058 if (!priv->phylink)
1059 return -EOPNOTSUPP;
1060
1061 return phylink_ethtool_ksettings_get(priv->phylink, cmd);
1062 }
1063
enetc_set_link_ksettings(struct net_device * dev,const struct ethtool_link_ksettings * cmd)1064 static int enetc_set_link_ksettings(struct net_device *dev,
1065 const struct ethtool_link_ksettings *cmd)
1066 {
1067 struct enetc_ndev_priv *priv = netdev_priv(dev);
1068
1069 if (!priv->phylink)
1070 return -EOPNOTSUPP;
1071
1072 return phylink_ethtool_ksettings_set(priv->phylink, cmd);
1073 }
1074
enetc_get_mm_stats(struct net_device * ndev,struct ethtool_mm_stats * s)1075 static void enetc_get_mm_stats(struct net_device *ndev,
1076 struct ethtool_mm_stats *s)
1077 {
1078 struct enetc_ndev_priv *priv = netdev_priv(ndev);
1079 struct enetc_hw *hw = &priv->si->hw;
1080 struct enetc_si *si = priv->si;
1081
1082 if (!(si->hw_features & ENETC_SI_F_QBU))
1083 return;
1084
1085 s->MACMergeFrameAssErrorCount = enetc_port_rd(hw, ENETC_MMFAECR);
1086 s->MACMergeFrameSmdErrorCount = enetc_port_rd(hw, ENETC_MMFSECR);
1087 s->MACMergeFrameAssOkCount = enetc_port_rd(hw, ENETC_MMFAOCR);
1088 s->MACMergeFragCountRx = enetc_port_rd(hw, ENETC_MMFCRXR);
1089 s->MACMergeFragCountTx = enetc_port_rd(hw, ENETC_MMFCTXR);
1090 s->MACMergeHoldCount = enetc_port_rd(hw, ENETC_MMHCR);
1091 }
1092
enetc_get_mm(struct net_device * ndev,struct ethtool_mm_state * state)1093 static int enetc_get_mm(struct net_device *ndev, struct ethtool_mm_state *state)
1094 {
1095 struct enetc_ndev_priv *priv = netdev_priv(ndev);
1096 struct enetc_si *si = priv->si;
1097 struct enetc_hw *hw = &si->hw;
1098 u32 lafs, rafs, val;
1099
1100 if (!(si->hw_features & ENETC_SI_F_QBU))
1101 return -EOPNOTSUPP;
1102
1103 mutex_lock(&priv->mm_lock);
1104
1105 val = enetc_port_rd(hw, ENETC_PFPMR);
1106 state->pmac_enabled = !!(val & ENETC_PFPMR_PMACE);
1107
1108 val = enetc_port_rd(hw, ENETC_MMCSR);
1109
1110 switch (ENETC_MMCSR_GET_VSTS(val)) {
1111 case 0:
1112 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_DISABLED;
1113 break;
1114 case 2:
1115 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_VERIFYING;
1116 break;
1117 case 3:
1118 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED;
1119 break;
1120 case 4:
1121 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_FAILED;
1122 break;
1123 case 5:
1124 default:
1125 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_UNKNOWN;
1126 break;
1127 }
1128
1129 rafs = ENETC_MMCSR_GET_RAFS(val);
1130 state->tx_min_frag_size = ethtool_mm_frag_size_add_to_min(rafs);
1131 lafs = ENETC_MMCSR_GET_LAFS(val);
1132 state->rx_min_frag_size = ethtool_mm_frag_size_add_to_min(lafs);
1133 state->tx_enabled = !!(val & ENETC_MMCSR_LPE); /* mirror of MMCSR_ME */
1134 state->tx_active = state->tx_enabled &&
1135 (state->verify_status == ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED ||
1136 state->verify_status == ETHTOOL_MM_VERIFY_STATUS_DISABLED);
1137 state->verify_enabled = !(val & ENETC_MMCSR_VDIS);
1138 state->verify_time = ENETC_MMCSR_GET_VT(val);
1139 /* A verifyTime of 128 ms would exceed the 7 bit width
1140 * of the ENETC_MMCSR_VT field
1141 */
1142 state->max_verify_time = 127;
1143
1144 mutex_unlock(&priv->mm_lock);
1145
1146 return 0;
1147 }
1148
enetc_mm_wait_tx_active(struct enetc_hw * hw,int verify_time)1149 static int enetc_mm_wait_tx_active(struct enetc_hw *hw, int verify_time)
1150 {
1151 int timeout = verify_time * USEC_PER_MSEC * ENETC_MM_VERIFY_RETRIES;
1152 u32 val;
1153
1154 /* This will time out after the standard value of 3 verification
1155 * attempts. To not sleep forever, it relies on a non-zero verify_time,
1156 * guarantee which is provided by the ethtool nlattr policy.
1157 */
1158 return read_poll_timeout(enetc_port_rd, val,
1159 ENETC_MMCSR_GET_VSTS(val) == 3,
1160 ENETC_MM_VERIFY_SLEEP_US, timeout,
1161 true, hw, ENETC_MMCSR);
1162 }
1163
enetc_set_ptcfpr(struct enetc_hw * hw,u8 preemptible_tcs)1164 static void enetc_set_ptcfpr(struct enetc_hw *hw, u8 preemptible_tcs)
1165 {
1166 u32 val;
1167 int tc;
1168
1169 for (tc = 0; tc < 8; tc++) {
1170 val = enetc_port_rd(hw, ENETC_PTCFPR(tc));
1171
1172 if (preemptible_tcs & BIT(tc))
1173 val |= ENETC_PTCFPR_FPE;
1174 else
1175 val &= ~ENETC_PTCFPR_FPE;
1176
1177 enetc_port_wr(hw, ENETC_PTCFPR(tc), val);
1178 }
1179 }
1180
1181 /* ENETC does not have an IRQ to notify changes to the MAC Merge TX status
1182 * (active/inactive), but the preemptible traffic classes should only be
1183 * committed to hardware once TX is active. Resort to polling.
1184 */
enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv * priv)1185 void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv)
1186 {
1187 struct enetc_hw *hw = &priv->si->hw;
1188 u8 preemptible_tcs = 0;
1189 u32 val;
1190 int err;
1191
1192 val = enetc_port_rd(hw, ENETC_MMCSR);
1193 if (!(val & ENETC_MMCSR_ME))
1194 goto out;
1195
1196 if (!(val & ENETC_MMCSR_VDIS)) {
1197 err = enetc_mm_wait_tx_active(hw, ENETC_MMCSR_GET_VT(val));
1198 if (err)
1199 goto out;
1200 }
1201
1202 preemptible_tcs = priv->preemptible_tcs;
1203 out:
1204 enetc_set_ptcfpr(hw, preemptible_tcs);
1205 }
1206
1207 /* FIXME: Workaround for the link partner's verification failing if ENETC
1208 * priorly received too much express traffic. The documentation doesn't
1209 * suggest this is needed.
1210 */
enetc_restart_emac_rx(struct enetc_si * si)1211 static void enetc_restart_emac_rx(struct enetc_si *si)
1212 {
1213 u32 val = enetc_port_rd(&si->hw, ENETC_PM0_CMD_CFG);
1214
1215 enetc_port_wr(&si->hw, ENETC_PM0_CMD_CFG, val & ~ENETC_PM0_RX_EN);
1216
1217 if (val & ENETC_PM0_RX_EN)
1218 enetc_port_wr(&si->hw, ENETC_PM0_CMD_CFG, val);
1219 }
1220
enetc_set_mm(struct net_device * ndev,struct ethtool_mm_cfg * cfg,struct netlink_ext_ack * extack)1221 static int enetc_set_mm(struct net_device *ndev, struct ethtool_mm_cfg *cfg,
1222 struct netlink_ext_ack *extack)
1223 {
1224 struct enetc_ndev_priv *priv = netdev_priv(ndev);
1225 struct enetc_hw *hw = &priv->si->hw;
1226 struct enetc_si *si = priv->si;
1227 u32 val, add_frag_size;
1228 int err;
1229
1230 if (!(si->hw_features & ENETC_SI_F_QBU))
1231 return -EOPNOTSUPP;
1232
1233 err = ethtool_mm_frag_size_min_to_add(cfg->tx_min_frag_size,
1234 &add_frag_size, extack);
1235 if (err)
1236 return err;
1237
1238 mutex_lock(&priv->mm_lock);
1239
1240 val = enetc_port_rd(hw, ENETC_PFPMR);
1241 if (cfg->pmac_enabled)
1242 val |= ENETC_PFPMR_PMACE;
1243 else
1244 val &= ~ENETC_PFPMR_PMACE;
1245 enetc_port_wr(hw, ENETC_PFPMR, val);
1246
1247 val = enetc_port_rd(hw, ENETC_MMCSR);
1248
1249 if (cfg->verify_enabled)
1250 val &= ~ENETC_MMCSR_VDIS;
1251 else
1252 val |= ENETC_MMCSR_VDIS;
1253
1254 if (cfg->tx_enabled)
1255 priv->active_offloads |= ENETC_F_QBU;
1256 else
1257 priv->active_offloads &= ~ENETC_F_QBU;
1258
1259 /* If link is up, enable/disable MAC Merge right away */
1260 if (!(val & ENETC_MMCSR_LINK_FAIL)) {
1261 if (!!(priv->active_offloads & ENETC_F_QBU))
1262 val |= ENETC_MMCSR_ME;
1263 else
1264 val &= ~ENETC_MMCSR_ME;
1265 }
1266
1267 val &= ~ENETC_MMCSR_VT_MASK;
1268 val |= ENETC_MMCSR_VT(cfg->verify_time);
1269
1270 val &= ~ENETC_MMCSR_RAFS_MASK;
1271 val |= ENETC_MMCSR_RAFS(add_frag_size);
1272
1273 enetc_port_wr(hw, ENETC_MMCSR, val);
1274
1275 enetc_restart_emac_rx(priv->si);
1276
1277 enetc_mm_commit_preemptible_tcs(priv);
1278
1279 mutex_unlock(&priv->mm_lock);
1280
1281 return 0;
1282 }
1283
1284 /* When the link is lost, the verification state machine goes to the FAILED
1285 * state and doesn't restart on its own after a new link up event.
1286 * According to 802.3 Figure 99-8 - Verify state diagram, the LINK_FAIL bit
1287 * should have been sufficient to re-trigger verification, but for ENETC it
1288 * doesn't. As a workaround, we need to toggle the Merge Enable bit to
1289 * re-trigger verification when link comes up.
1290 */
enetc_mm_link_state_update(struct enetc_ndev_priv * priv,bool link)1291 void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link)
1292 {
1293 struct enetc_hw *hw = &priv->si->hw;
1294 u32 val;
1295
1296 mutex_lock(&priv->mm_lock);
1297
1298 val = enetc_port_rd(hw, ENETC_MMCSR);
1299
1300 if (link) {
1301 val &= ~ENETC_MMCSR_LINK_FAIL;
1302 if (priv->active_offloads & ENETC_F_QBU)
1303 val |= ENETC_MMCSR_ME;
1304 } else {
1305 val |= ENETC_MMCSR_LINK_FAIL;
1306 if (priv->active_offloads & ENETC_F_QBU)
1307 val &= ~ENETC_MMCSR_ME;
1308 }
1309
1310 enetc_port_wr(hw, ENETC_MMCSR, val);
1311
1312 enetc_mm_commit_preemptible_tcs(priv);
1313
1314 mutex_unlock(&priv->mm_lock);
1315 }
1316 EXPORT_SYMBOL_GPL(enetc_mm_link_state_update);
1317
1318 const struct ethtool_ops enetc_pf_ethtool_ops = {
1319 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1320 ETHTOOL_COALESCE_MAX_FRAMES |
1321 ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
1322 .get_regs_len = enetc_get_reglen,
1323 .get_regs = enetc_get_regs,
1324 .get_sset_count = enetc_get_sset_count,
1325 .get_strings = enetc_get_strings,
1326 .get_ethtool_stats = enetc_get_ethtool_stats,
1327 .get_pause_stats = enetc_get_pause_stats,
1328 .get_rmon_stats = enetc_get_rmon_stats,
1329 .get_eth_ctrl_stats = enetc_get_eth_ctrl_stats,
1330 .get_eth_mac_stats = enetc_get_eth_mac_stats,
1331 .get_rx_ring_count = enetc_get_rx_ring_count,
1332 .get_rxnfc = enetc_get_rxnfc,
1333 .set_rxnfc = enetc_set_rxnfc,
1334 .get_rxfh_key_size = enetc_get_rxfh_key_size,
1335 .get_rxfh_indir_size = enetc_get_rxfh_indir_size,
1336 .get_rxfh = enetc_get_rxfh,
1337 .set_rxfh = enetc_set_rxfh,
1338 .get_rxfh_fields = enetc_get_rxfh_fields,
1339 .get_ringparam = enetc_get_ringparam,
1340 .get_coalesce = enetc_get_coalesce,
1341 .set_coalesce = enetc_set_coalesce,
1342 .get_link_ksettings = enetc_get_link_ksettings,
1343 .set_link_ksettings = enetc_set_link_ksettings,
1344 .get_link = ethtool_op_get_link,
1345 .get_ts_info = enetc_get_ts_info,
1346 .get_wol = enetc_get_wol,
1347 .set_wol = enetc_set_wol,
1348 .get_pauseparam = enetc_get_pauseparam,
1349 .set_pauseparam = enetc_set_pauseparam,
1350 .get_mm = enetc_get_mm,
1351 .set_mm = enetc_set_mm,
1352 .get_mm_stats = enetc_get_mm_stats,
1353 };
1354
1355 const struct ethtool_ops enetc4_ppm_ethtool_ops = {
1356 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1357 ETHTOOL_COALESCE_MAX_FRAMES |
1358 ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
1359 .get_eth_mac_stats = enetc_ppm_get_eth_mac_stats,
1360 .get_rx_ring_count = enetc_get_rx_ring_count,
1361 .get_rxfh_key_size = enetc_get_rxfh_key_size,
1362 .get_rxfh_indir_size = enetc_get_rxfh_indir_size,
1363 .get_rxfh = enetc_get_rxfh,
1364 .set_rxfh = enetc_set_rxfh,
1365 .get_rxfh_fields = enetc_get_rxfh_fields,
1366 .get_ringparam = enetc_get_ringparam,
1367 .get_coalesce = enetc_get_coalesce,
1368 .set_coalesce = enetc_set_coalesce,
1369 .get_link_ksettings = enetc_get_link_ksettings,
1370 .set_link_ksettings = enetc_set_link_ksettings,
1371 .get_link = ethtool_op_get_link,
1372 };
1373
1374 const struct ethtool_ops enetc_vf_ethtool_ops = {
1375 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1376 ETHTOOL_COALESCE_MAX_FRAMES |
1377 ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
1378 .get_regs_len = enetc_get_reglen,
1379 .get_regs = enetc_get_regs,
1380 .get_sset_count = enetc_get_sset_count,
1381 .get_strings = enetc_get_strings,
1382 .get_ethtool_stats = enetc_get_ethtool_stats,
1383 .get_rx_ring_count = enetc_get_rx_ring_count,
1384 .get_rxnfc = enetc_get_rxnfc,
1385 .set_rxnfc = enetc_set_rxnfc,
1386 .get_rxfh_indir_size = enetc_get_rxfh_indir_size,
1387 .get_rxfh = enetc_get_rxfh,
1388 .set_rxfh = enetc_set_rxfh,
1389 .get_rxfh_fields = enetc_get_rxfh_fields,
1390 .get_ringparam = enetc_get_ringparam,
1391 .get_coalesce = enetc_get_coalesce,
1392 .set_coalesce = enetc_set_coalesce,
1393 .get_link = ethtool_op_get_link,
1394 .get_ts_info = enetc_get_ts_info,
1395 };
1396
1397 const struct ethtool_ops enetc4_pf_ethtool_ops = {
1398 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
1399 ETHTOOL_COALESCE_MAX_FRAMES |
1400 ETHTOOL_COALESCE_USE_ADAPTIVE_RX,
1401 .get_ringparam = enetc_get_ringparam,
1402 .get_coalesce = enetc_get_coalesce,
1403 .set_coalesce = enetc_set_coalesce,
1404 .get_link_ksettings = enetc_get_link_ksettings,
1405 .set_link_ksettings = enetc_set_link_ksettings,
1406 .get_link = ethtool_op_get_link,
1407 .get_wol = enetc_get_wol,
1408 .set_wol = enetc_set_wol,
1409 .get_pauseparam = enetc_get_pauseparam,
1410 .set_pauseparam = enetc_set_pauseparam,
1411 .get_rx_ring_count = enetc_get_rx_ring_count,
1412 .get_rxfh_key_size = enetc_get_rxfh_key_size,
1413 .get_rxfh_indir_size = enetc_get_rxfh_indir_size,
1414 .get_rxfh = enetc_get_rxfh,
1415 .set_rxfh = enetc_set_rxfh,
1416 .get_rxfh_fields = enetc_get_rxfh_fields,
1417 .get_ts_info = enetc_get_ts_info,
1418 };
1419
enetc_set_ethtool_ops(struct net_device * ndev)1420 void enetc_set_ethtool_ops(struct net_device *ndev)
1421 {
1422 struct enetc_ndev_priv *priv = netdev_priv(ndev);
1423
1424 ndev->ethtool_ops = priv->si->drvdata->eth_ops;
1425 }
1426 EXPORT_SYMBOL_GPL(enetc_set_ethtool_ops);
1427