1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Fence mechanism for dma-buf to allow for asynchronous dma access
4 *
5 * Copyright (C) 2012 Canonical Ltd
6 * Copyright (C) 2012 Texas Instruments
7 *
8 * Authors:
9 * Rob Clark <robdclark@gmail.com>
10 * Maarten Lankhorst <maarten.lankhorst@canonical.com>
11 */
12
13 #ifndef __LINUX_DMA_FENCE_H
14 #define __LINUX_DMA_FENCE_H
15
16 #include <linux/err.h>
17 #include <linux/wait.h>
18 #include <linux/list.h>
19 #include <linux/bitops.h>
20 #include <linux/kref.h>
21 #include <linux/sched.h>
22 #include <linux/printk.h>
23 #include <linux/rcupdate.h>
24 #include <linux/timekeeping.h>
25
26 struct dma_fence;
27 struct dma_fence_ops;
28 struct dma_fence_cb;
29 struct seq_file;
30
31 /**
32 * struct dma_fence - software synchronization primitive
33 * @refcount: refcount for this fence
34 * @ops: dma_fence_ops associated with this fence
35 * @rcu: used for releasing fence with kfree_rcu
36 * @cb_list: list of all callbacks to call
37 * @lock: spin_lock_irqsave used for locking
38 * @context: execution context this fence belongs to, returned by
39 * dma_fence_context_alloc()
40 * @seqno: the sequence number of this fence inside the execution context,
41 * can be compared to decide which fence would be signaled later.
42 * @flags: A mask of DMA_FENCE_FLAG_* defined below
43 * @timestamp: Timestamp when the fence was signaled.
44 * @error: Optional, only valid if < 0, must be set before calling
45 * dma_fence_signal, indicates that the fence has completed with an error.
46 *
47 * the flags member must be manipulated and read using the appropriate
48 * atomic ops (bit_*), so taking the spinlock will not be needed most
49 * of the time.
50 *
51 * DMA_FENCE_FLAG_SIGNALED_BIT - fence is already signaled
52 * DMA_FENCE_FLAG_TIMESTAMP_BIT - timestamp recorded for fence signaling
53 * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT - enable_signaling might have been called
54 * DMA_FENCE_FLAG_USER_BITS - start of the unused bits, can be used by the
55 * implementer of the fence for its own purposes. Can be used in different
56 * ways by different fence implementers, so do not rely on this.
57 *
58 * Since atomic bitops are used, this is not guaranteed to be the case.
59 * Particularly, if the bit was set, but dma_fence_signal was called right
60 * before this bit was set, it would have been able to set the
61 * DMA_FENCE_FLAG_SIGNALED_BIT, before enable_signaling was called.
62 * Adding a check for DMA_FENCE_FLAG_SIGNALED_BIT after setting
63 * DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT closes this race, and makes sure that
64 * after dma_fence_signal was called, any enable_signaling call will have either
65 * been completed, or never called at all.
66 */
67 struct dma_fence {
68 spinlock_t *lock;
69 const struct dma_fence_ops *ops;
70 /*
71 * We clear the callback list on kref_put so that by the time we
72 * release the fence it is unused. No one should be adding to the
73 * cb_list that they don't themselves hold a reference for.
74 *
75 * The lifetime of the timestamp is similarly tied to both the
76 * rcu freelist and the cb_list. The timestamp is only set upon
77 * signaling while simultaneously notifying the cb_list. Ergo, we
78 * only use either the cb_list of timestamp. Upon destruction,
79 * neither are accessible, and so we can use the rcu. This means
80 * that the cb_list is *only* valid until the signal bit is set,
81 * and to read either you *must* hold a reference to the fence,
82 * and not just the rcu_read_lock.
83 *
84 * Listed in chronological order.
85 */
86 union {
87 struct list_head cb_list;
88 /* @cb_list replaced by @timestamp on dma_fence_signal() */
89 ktime_t timestamp;
90 /* @timestamp replaced by @rcu on dma_fence_release() */
91 struct rcu_head rcu;
92 };
93 u64 context;
94 u64 seqno;
95 unsigned long flags;
96 struct kref refcount;
97 int error;
98 };
99
100 enum dma_fence_flag_bits {
101 DMA_FENCE_FLAG_SEQNO64_BIT,
102 DMA_FENCE_FLAG_SIGNALED_BIT,
103 DMA_FENCE_FLAG_TIMESTAMP_BIT,
104 DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
105 DMA_FENCE_FLAG_USER_BITS, /* must always be last member */
106 };
107
108 typedef void (*dma_fence_func_t)(struct dma_fence *fence,
109 struct dma_fence_cb *cb);
110
111 /**
112 * struct dma_fence_cb - callback for dma_fence_add_callback()
113 * @node: used by dma_fence_add_callback() to append this struct to fence::cb_list
114 * @func: dma_fence_func_t to call
115 *
116 * This struct will be initialized by dma_fence_add_callback(), additional
117 * data can be passed along by embedding dma_fence_cb in another struct.
118 */
119 struct dma_fence_cb {
120 struct list_head node;
121 dma_fence_func_t func;
122 };
123
124 /**
125 * struct dma_fence_ops - operations implemented for fence
126 *
127 */
128 struct dma_fence_ops {
129 /**
130 * @get_driver_name:
131 *
132 * Returns the driver name. This is a callback to allow drivers to
133 * compute the name at runtime, without having it to store permanently
134 * for each fence, or build a cache of some sort.
135 *
136 * This callback is mandatory.
137 */
138 const char * (*get_driver_name)(struct dma_fence *fence);
139
140 /**
141 * @get_timeline_name:
142 *
143 * Return the name of the context this fence belongs to. This is a
144 * callback to allow drivers to compute the name at runtime, without
145 * having it to store permanently for each fence, or build a cache of
146 * some sort.
147 *
148 * This callback is mandatory.
149 */
150 const char * (*get_timeline_name)(struct dma_fence *fence);
151
152 /**
153 * @enable_signaling:
154 *
155 * Enable software signaling of fence.
156 *
157 * For fence implementations that have the capability for hw->hw
158 * signaling, they can implement this op to enable the necessary
159 * interrupts, or insert commands into cmdstream, etc, to avoid these
160 * costly operations for the common case where only hw->hw
161 * synchronization is required. This is called in the first
162 * dma_fence_wait() or dma_fence_add_callback() path to let the fence
163 * implementation know that there is another driver waiting on the
164 * signal (ie. hw->sw case).
165 *
166 * This is called with irq's disabled, so only spinlocks which disable
167 * IRQ's can be used in the code outside of this callback.
168 *
169 * A return value of false indicates the fence already passed,
170 * or some failure occurred that made it impossible to enable
171 * signaling. True indicates successful enabling.
172 *
173 * &dma_fence.error may be set in enable_signaling, but only when false
174 * is returned.
175 *
176 * Since many implementations can call dma_fence_signal() even when before
177 * @enable_signaling has been called there's a race window, where the
178 * dma_fence_signal() might result in the final fence reference being
179 * released and its memory freed. To avoid this, implementations of this
180 * callback should grab their own reference using dma_fence_get(), to be
181 * released when the fence is signalled (through e.g. the interrupt
182 * handler).
183 *
184 * This callback is optional. If this callback is not present, then the
185 * driver must always have signaling enabled.
186 */
187 bool (*enable_signaling)(struct dma_fence *fence);
188
189 /**
190 * @signaled:
191 *
192 * Peek whether the fence is signaled, as a fastpath optimization for
193 * e.g. dma_fence_wait() or dma_fence_add_callback(). Note that this
194 * callback does not need to make any guarantees beyond that a fence
195 * once indicates as signalled must always return true from this
196 * callback. This callback may return false even if the fence has
197 * completed already, in this case information hasn't propogated throug
198 * the system yet. See also dma_fence_is_signaled().
199 *
200 * May set &dma_fence.error if returning true.
201 *
202 * This callback is optional.
203 */
204 bool (*signaled)(struct dma_fence *fence);
205
206 /**
207 * @wait:
208 *
209 * Custom wait implementation, defaults to dma_fence_default_wait() if
210 * not set.
211 *
212 * Deprecated and should not be used by new implementations. Only used
213 * by existing implementations which need special handling for their
214 * hardware reset procedure.
215 *
216 * Must return -ERESTARTSYS if the wait is intr = true and the wait was
217 * interrupted, and remaining jiffies if fence has signaled, or 0 if wait
218 * timed out. Can also return other error values on custom implementations,
219 * which should be treated as if the fence is signaled. For example a hardware
220 * lockup could be reported like that.
221 */
222 signed long (*wait)(struct dma_fence *fence,
223 bool intr, signed long timeout);
224
225 /**
226 * @release:
227 *
228 * Called on destruction of fence to release additional resources.
229 * Can be called from irq context. This callback is optional. If it is
230 * NULL, then dma_fence_free() is instead called as the default
231 * implementation.
232 */
233 void (*release)(struct dma_fence *fence);
234
235 /**
236 * @set_deadline:
237 *
238 * Callback to allow a fence waiter to inform the fence signaler of
239 * an upcoming deadline, such as vblank, by which point the waiter
240 * would prefer the fence to be signaled by. This is intended to
241 * give feedback to the fence signaler to aid in power management
242 * decisions, such as boosting GPU frequency.
243 *
244 * This is called without &dma_fence.lock held, it can be called
245 * multiple times and from any context. Locking is up to the callee
246 * if it has some state to manage. If multiple deadlines are set,
247 * the expectation is to track the soonest one. If the deadline is
248 * before the current time, it should be interpreted as an immediate
249 * deadline.
250 *
251 * This callback is optional.
252 */
253 void (*set_deadline)(struct dma_fence *fence, ktime_t deadline);
254 };
255
256 void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
257 spinlock_t *lock, u64 context, u64 seqno);
258
259 void dma_fence_init64(struct dma_fence *fence, const struct dma_fence_ops *ops,
260 spinlock_t *lock, u64 context, u64 seqno);
261
262 void dma_fence_release(struct kref *kref);
263 void dma_fence_free(struct dma_fence *fence);
264 void dma_fence_describe(struct dma_fence *fence, struct seq_file *seq);
265
266 /**
267 * dma_fence_put - decreases refcount of the fence
268 * @fence: fence to reduce refcount of
269 */
dma_fence_put(struct dma_fence * fence)270 static inline void dma_fence_put(struct dma_fence *fence)
271 {
272 if (fence)
273 kref_put(&fence->refcount, dma_fence_release);
274 }
275
276 /**
277 * dma_fence_get - increases refcount of the fence
278 * @fence: fence to increase refcount of
279 *
280 * Returns the same fence, with refcount increased by 1.
281 */
dma_fence_get(struct dma_fence * fence)282 static inline struct dma_fence *dma_fence_get(struct dma_fence *fence)
283 {
284 if (fence)
285 kref_get(&fence->refcount);
286 return fence;
287 }
288
289 /**
290 * dma_fence_get_rcu - get a fence from a dma_resv_list with
291 * rcu read lock
292 * @fence: fence to increase refcount of
293 *
294 * Function returns NULL if no refcount could be obtained, or the fence.
295 */
dma_fence_get_rcu(struct dma_fence * fence)296 static inline struct dma_fence *dma_fence_get_rcu(struct dma_fence *fence)
297 {
298 if (kref_get_unless_zero(&fence->refcount))
299 return fence;
300 else
301 return NULL;
302 }
303
304 /**
305 * dma_fence_get_rcu_safe - acquire a reference to an RCU tracked fence
306 * @fencep: pointer to fence to increase refcount of
307 *
308 * Function returns NULL if no refcount could be obtained, or the fence.
309 * This function handles acquiring a reference to a fence that may be
310 * reallocated within the RCU grace period (such as with SLAB_TYPESAFE_BY_RCU),
311 * so long as the caller is using RCU on the pointer to the fence.
312 *
313 * An alternative mechanism is to employ a seqlock to protect a bunch of
314 * fences, such as used by struct dma_resv. When using a seqlock,
315 * the seqlock must be taken before and checked after a reference to the
316 * fence is acquired (as shown here).
317 *
318 * The caller is required to hold the RCU read lock.
319 */
320 static inline struct dma_fence *
dma_fence_get_rcu_safe(struct dma_fence __rcu ** fencep)321 dma_fence_get_rcu_safe(struct dma_fence __rcu **fencep)
322 {
323 do {
324 struct dma_fence *fence;
325
326 fence = rcu_dereference(*fencep);
327 if (!fence)
328 return NULL;
329
330 if (!dma_fence_get_rcu(fence))
331 continue;
332
333 /* The atomic_inc_not_zero() inside dma_fence_get_rcu()
334 * provides a full memory barrier upon success (such as now).
335 * This is paired with the write barrier from assigning
336 * to the __rcu protected fence pointer so that if that
337 * pointer still matches the current fence, we know we
338 * have successfully acquire a reference to it. If it no
339 * longer matches, we are holding a reference to some other
340 * reallocated pointer. This is possible if the allocator
341 * is using a freelist like SLAB_TYPESAFE_BY_RCU where the
342 * fence remains valid for the RCU grace period, but it
343 * may be reallocated. When using such allocators, we are
344 * responsible for ensuring the reference we get is to
345 * the right fence, as below.
346 */
347 if (fence == rcu_access_pointer(*fencep))
348 return rcu_pointer_handoff(fence);
349
350 dma_fence_put(fence);
351 } while (1);
352 }
353
354 #ifdef CONFIG_LOCKDEP
355 bool dma_fence_begin_signalling(void);
356 void dma_fence_end_signalling(bool cookie);
357 void __dma_fence_might_wait(void);
358 #else
dma_fence_begin_signalling(void)359 static inline bool dma_fence_begin_signalling(void)
360 {
361 return true;
362 }
dma_fence_end_signalling(bool cookie)363 static inline void dma_fence_end_signalling(bool cookie) {}
__dma_fence_might_wait(void)364 static inline void __dma_fence_might_wait(void) {}
365 #endif
366
367 int dma_fence_signal(struct dma_fence *fence);
368 int dma_fence_signal_locked(struct dma_fence *fence);
369 int dma_fence_signal_timestamp(struct dma_fence *fence, ktime_t timestamp);
370 int dma_fence_signal_timestamp_locked(struct dma_fence *fence,
371 ktime_t timestamp);
372 signed long dma_fence_default_wait(struct dma_fence *fence,
373 bool intr, signed long timeout);
374 int dma_fence_add_callback(struct dma_fence *fence,
375 struct dma_fence_cb *cb,
376 dma_fence_func_t func);
377 bool dma_fence_remove_callback(struct dma_fence *fence,
378 struct dma_fence_cb *cb);
379 void dma_fence_enable_sw_signaling(struct dma_fence *fence);
380
381 /**
382 * DOC: Safe external access to driver provided object members
383 *
384 * All data not stored directly in the dma-fence object, such as the
385 * &dma_fence.lock and memory potentially accessed by functions in the
386 * &dma_fence.ops table, MUST NOT be accessed after the fence has been signalled
387 * because after that point drivers are allowed to free it.
388 *
389 * All code accessing that data via the dma-fence API (or directly, which is
390 * discouraged), MUST make sure to contain the complete access within a
391 * &rcu_read_lock and &rcu_read_unlock pair.
392 *
393 * Some dma-fence API handles this automatically, while other, as for example
394 * &dma_fence_driver_name and &dma_fence_timeline_name, leave that
395 * responsibility to the caller.
396 *
397 * To enable this scheme to work drivers MUST ensure a RCU grace period elapses
398 * between signalling the fence and freeing the said data.
399 *
400 */
401 const char __rcu *dma_fence_driver_name(struct dma_fence *fence);
402 const char __rcu *dma_fence_timeline_name(struct dma_fence *fence);
403
404 /**
405 * dma_fence_is_signaled_locked - Return an indication if the fence
406 * is signaled yet.
407 * @fence: the fence to check
408 *
409 * Returns true if the fence was already signaled, false if not. Since this
410 * function doesn't enable signaling, it is not guaranteed to ever return
411 * true if dma_fence_add_callback(), dma_fence_wait() or
412 * dma_fence_enable_sw_signaling() haven't been called before.
413 *
414 * This function requires &dma_fence.lock to be held.
415 *
416 * See also dma_fence_is_signaled().
417 */
418 static inline bool
dma_fence_is_signaled_locked(struct dma_fence * fence)419 dma_fence_is_signaled_locked(struct dma_fence *fence)
420 {
421 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
422 return true;
423
424 if (fence->ops->signaled && fence->ops->signaled(fence)) {
425 dma_fence_signal_locked(fence);
426 return true;
427 }
428
429 return false;
430 }
431
432 /**
433 * dma_fence_is_signaled - Return an indication if the fence is signaled yet.
434 * @fence: the fence to check
435 *
436 * Returns true if the fence was already signaled, false if not. Since this
437 * function doesn't enable signaling, it is not guaranteed to ever return
438 * true if dma_fence_add_callback(), dma_fence_wait() or
439 * dma_fence_enable_sw_signaling() haven't been called before.
440 *
441 * It's recommended for seqno fences to call dma_fence_signal when the
442 * operation is complete, it makes it possible to prevent issues from
443 * wraparound between time of issue and time of use by checking the return
444 * value of this function before calling hardware-specific wait instructions.
445 *
446 * See also dma_fence_is_signaled_locked().
447 */
448 static inline bool
dma_fence_is_signaled(struct dma_fence * fence)449 dma_fence_is_signaled(struct dma_fence *fence)
450 {
451 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
452 return true;
453
454 if (fence->ops->signaled && fence->ops->signaled(fence)) {
455 dma_fence_signal(fence);
456 return true;
457 }
458
459 return false;
460 }
461
462 /**
463 * __dma_fence_is_later - return if f1 is chronologically later than f2
464 * @fence: fence in whose context to do the comparison
465 * @f1: the first fence's seqno
466 * @f2: the second fence's seqno from the same context
467 *
468 * Returns true if f1 is chronologically later than f2. Both fences must be
469 * from the same context, since a seqno is not common across contexts.
470 */
__dma_fence_is_later(struct dma_fence * fence,u64 f1,u64 f2)471 static inline bool __dma_fence_is_later(struct dma_fence *fence, u64 f1, u64 f2)
472 {
473 /* This is for backward compatibility with drivers which can only handle
474 * 32bit sequence numbers. Use a 64bit compare when the driver says to
475 * do so.
476 */
477 if (test_bit(DMA_FENCE_FLAG_SEQNO64_BIT, &fence->flags))
478 return f1 > f2;
479
480 return (int)(lower_32_bits(f1) - lower_32_bits(f2)) > 0;
481 }
482
483 /**
484 * dma_fence_is_later - return if f1 is chronologically later than f2
485 * @f1: the first fence from the same context
486 * @f2: the second fence from the same context
487 *
488 * Returns true if f1 is chronologically later than f2. Both fences must be
489 * from the same context, since a seqno is not re-used across contexts.
490 */
dma_fence_is_later(struct dma_fence * f1,struct dma_fence * f2)491 static inline bool dma_fence_is_later(struct dma_fence *f1,
492 struct dma_fence *f2)
493 {
494 if (WARN_ON(f1->context != f2->context))
495 return false;
496
497 return __dma_fence_is_later(f1, f1->seqno, f2->seqno);
498 }
499
500 /**
501 * dma_fence_is_later_or_same - return true if f1 is later or same as f2
502 * @f1: the first fence from the same context
503 * @f2: the second fence from the same context
504 *
505 * Returns true if f1 is chronologically later than f2 or the same fence. Both
506 * fences must be from the same context, since a seqno is not re-used across
507 * contexts.
508 */
dma_fence_is_later_or_same(struct dma_fence * f1,struct dma_fence * f2)509 static inline bool dma_fence_is_later_or_same(struct dma_fence *f1,
510 struct dma_fence *f2)
511 {
512 return f1 == f2 || dma_fence_is_later(f1, f2);
513 }
514
515 /**
516 * dma_fence_later - return the chronologically later fence
517 * @f1: the first fence from the same context
518 * @f2: the second fence from the same context
519 *
520 * Returns NULL if both fences are signaled, otherwise the fence that would be
521 * signaled last. Both fences must be from the same context, since a seqno is
522 * not re-used across contexts.
523 */
dma_fence_later(struct dma_fence * f1,struct dma_fence * f2)524 static inline struct dma_fence *dma_fence_later(struct dma_fence *f1,
525 struct dma_fence *f2)
526 {
527 if (WARN_ON(f1->context != f2->context))
528 return NULL;
529
530 /*
531 * Can't check just DMA_FENCE_FLAG_SIGNALED_BIT here, it may never
532 * have been set if enable_signaling wasn't called, and enabling that
533 * here is overkill.
534 */
535 if (dma_fence_is_later(f1, f2))
536 return dma_fence_is_signaled(f1) ? NULL : f1;
537 else
538 return dma_fence_is_signaled(f2) ? NULL : f2;
539 }
540
541 /**
542 * dma_fence_get_status_locked - returns the status upon completion
543 * @fence: the dma_fence to query
544 *
545 * Drivers can supply an optional error status condition before they signal
546 * the fence (to indicate whether the fence was completed due to an error
547 * rather than success). The value of the status condition is only valid
548 * if the fence has been signaled, dma_fence_get_status_locked() first checks
549 * the signal state before reporting the error status.
550 *
551 * Returns 0 if the fence has not yet been signaled, 1 if the fence has
552 * been signaled without an error condition, or a negative error code
553 * if the fence has been completed in err.
554 */
dma_fence_get_status_locked(struct dma_fence * fence)555 static inline int dma_fence_get_status_locked(struct dma_fence *fence)
556 {
557 if (dma_fence_is_signaled_locked(fence))
558 return fence->error ?: 1;
559 else
560 return 0;
561 }
562
563 int dma_fence_get_status(struct dma_fence *fence);
564
565 /**
566 * dma_fence_set_error - flag an error condition on the fence
567 * @fence: the dma_fence
568 * @error: the error to store
569 *
570 * Drivers can supply an optional error status condition before they signal
571 * the fence, to indicate that the fence was completed due to an error
572 * rather than success. This must be set before signaling (so that the value
573 * is visible before any waiters on the signal callback are woken). This
574 * helper exists to help catching erroneous setting of #dma_fence.error.
575 *
576 * Examples of error codes which drivers should use:
577 *
578 * * %-ENODATA This operation produced no data, no other operation affected.
579 * * %-ECANCELED All operations from the same context have been canceled.
580 * * %-ETIME Operation caused a timeout and potentially device reset.
581 */
dma_fence_set_error(struct dma_fence * fence,int error)582 static inline void dma_fence_set_error(struct dma_fence *fence,
583 int error)
584 {
585 WARN_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags));
586 WARN_ON(error >= 0 || error < -MAX_ERRNO);
587
588 fence->error = error;
589 }
590
591 /**
592 * dma_fence_timestamp - helper to get the completion timestamp of a fence
593 * @fence: fence to get the timestamp from.
594 *
595 * After a fence is signaled the timestamp is updated with the signaling time,
596 * but setting the timestamp can race with tasks waiting for the signaling. This
597 * helper busy waits for the correct timestamp to appear.
598 */
dma_fence_timestamp(struct dma_fence * fence)599 static inline ktime_t dma_fence_timestamp(struct dma_fence *fence)
600 {
601 if (WARN_ON(!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)))
602 return ktime_get();
603
604 while (!test_bit(DMA_FENCE_FLAG_TIMESTAMP_BIT, &fence->flags))
605 cpu_relax();
606
607 return fence->timestamp;
608 }
609
610 signed long dma_fence_wait_timeout(struct dma_fence *,
611 bool intr, signed long timeout);
612 signed long dma_fence_wait_any_timeout(struct dma_fence **fences,
613 uint32_t count,
614 bool intr, signed long timeout,
615 uint32_t *idx);
616
617 /**
618 * dma_fence_wait - sleep until the fence gets signaled
619 * @fence: the fence to wait on
620 * @intr: if true, do an interruptible wait
621 *
622 * This function will return -ERESTARTSYS if interrupted by a signal,
623 * or 0 if the fence was signaled. Other error values may be
624 * returned on custom implementations.
625 *
626 * Performs a synchronous wait on this fence. It is assumed the caller
627 * directly or indirectly holds a reference to the fence, otherwise the
628 * fence might be freed before return, resulting in undefined behavior.
629 *
630 * See also dma_fence_wait_timeout() and dma_fence_wait_any_timeout().
631 */
dma_fence_wait(struct dma_fence * fence,bool intr)632 static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)
633 {
634 signed long ret;
635
636 /* Since dma_fence_wait_timeout cannot timeout with
637 * MAX_SCHEDULE_TIMEOUT, only valid return values are
638 * -ERESTARTSYS and MAX_SCHEDULE_TIMEOUT.
639 */
640 ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);
641
642 return ret < 0 ? ret : 0;
643 }
644
645 void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline);
646
647 struct dma_fence *dma_fence_get_stub(void);
648 struct dma_fence *dma_fence_allocate_private_stub(ktime_t timestamp);
649 u64 dma_fence_context_alloc(unsigned num);
650
651 extern const struct dma_fence_ops dma_fence_array_ops;
652 extern const struct dma_fence_ops dma_fence_chain_ops;
653
654 /**
655 * dma_fence_is_array - check if a fence is from the array subclass
656 * @fence: the fence to test
657 *
658 * Return true if it is a dma_fence_array and false otherwise.
659 */
dma_fence_is_array(struct dma_fence * fence)660 static inline bool dma_fence_is_array(struct dma_fence *fence)
661 {
662 return fence->ops == &dma_fence_array_ops;
663 }
664
665 /**
666 * dma_fence_is_chain - check if a fence is from the chain subclass
667 * @fence: the fence to test
668 *
669 * Return true if it is a dma_fence_chain and false otherwise.
670 */
dma_fence_is_chain(struct dma_fence * fence)671 static inline bool dma_fence_is_chain(struct dma_fence *fence)
672 {
673 return fence->ops == &dma_fence_chain_ops;
674 }
675
676 /**
677 * dma_fence_is_container - check if a fence is a container for other fences
678 * @fence: the fence to test
679 *
680 * Return true if this fence is a container for other fences, false otherwise.
681 * This is important since we can't build up large fence structure or otherwise
682 * we run into recursion during operation on those fences.
683 */
dma_fence_is_container(struct dma_fence * fence)684 static inline bool dma_fence_is_container(struct dma_fence *fence)
685 {
686 return dma_fence_is_array(fence) || dma_fence_is_chain(fence);
687 }
688
689 #endif /* __LINUX_DMA_FENCE_H */
690